diff --git a/arch/arm64/boot/dts/hi6220.dtsi b/arch/arm64/boot/dts/hi6220.dtsi
index 9cd040abeef1c3..d945da781f90e0 100644
--- a/arch/arm64/boot/dts/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hi6220.dtsi
@@ -683,6 +683,41 @@
 			status = "ok";
 		};
 
+		i2c0: i2c@f7100000 {
+			compatible = "snps,designware-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0xf7100000 0x0 0x1000>;
+			interrupts = <0 44 4>;
+
+			clocks = <&clock_sys HI6220_I2C0_CLK>;
+			clock-names = "clk_i2c0";
+			i2c-sda-hold-time-ns = <300>;
+			#delay-reg = <0x0 0x0f8 0x0 4>;
+			reset-controller-reg = <0x330 0x334 0x338 1>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
+			status = "ok";
+		};
+
+		i2c1: i2c@f7101000 {
+			compatible = "snps,designware-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0xf7101000 0x0 0x1000>;
+			interrupts = <0 45 4>;
+
+			clocks = <&clock_sys HI6220_I2C1_CLK>;
+			clock-names = "clk_i2c1";
+			i2c-sda-hold-time-ns = <300>;
+			clock-frequency = <100000>;
+			#delay-reg = <0x0 0x0f8 0x0 4>;
+			reset-controller-reg = <0x330 0x334 0x338 2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
+			status = "ok";
+		};
+
 		i2c2: i2c@f7102000 {
 			compatible = "snps,designware-i2c";
 			#address-cells = <1>;
@@ -715,6 +750,8 @@
 
 		 spi_0: spi@f7106000 {
 			compatible = "arm,pl022", "arm,primecell";
+			#address-cells = <1>;
+			#size-cells = <0>;
 			reg = <0x0 0xf7106000 0x0 0x1000>;
 			interrupts = <0 50 4>;
 			bus-id = <0>;
@@ -726,10 +763,22 @@
 			clock-names = "apb_pclk";
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>;
-			num-cs = <4>;
-			cs-gpios = <&gpio6 2 0>,<&gpio6 3 0>,<&gpio6 4 0>,<&gpio6 5 0>;
+			num-cs = <2>;
+			cs-gpios = <&gpio2 2 0>,<&gpio2 3 0>;
 
 			status = "ok";
+
+			spidev@0 {
+				compatible = "linux,spidev";
+				spi-max-frequency = <500000>;
+				reg = <0>;
+			};
+
+			spidev@1 {
+				compatible = "linux,spidev";
+				spi-max-frequency = <500000>;
+				reg = <1>;
+			};
 		};
 
 		display-subsystem {