diff --git a/project/template_2/riscvsingle.vhdl b/project/template_2/riscvsingle.vhdl
index 9865aa0..393d4fa 100644
--- a/project/template_2/riscvsingle.vhdl
+++ b/project/template_2/riscvsingle.vhdl
@@ -615,8 +615,7 @@ end;
 architecture behave of shifter is  -- shift a left by b (as int)
 begin
   --y <= a sll to_integer(unsigned(b));
-  shift_amount <= to_integer(unsigned(b(4 downto 0)));
-  y <= std_logic_vector(shift_left(signed(a), shift_amount));
+  y <= std_logic_vector(shift_left(signed(a), to_integer(unsigned(b(4 downto 0)))));
 end;