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The sll is introduced because the srl requires that its input be zero extended (which, well, seems silly, but so it goes). In any case, because andi has a 16-bit immediate, some arithmetic and lookahead could find that 0x7 << 4 fits and so make this be
Consider
At present, the MIPS backend produces:
The
sll
is introduced because thesrl
requires that its input be zero extended (which, well, seems silly, but so it goes). In any case, becauseandi
has a 16-bit immediate, some arithmetic and lookahead could find that0x7 << 4
fits and so make this beAlternatively, whatever's concluding that it can use 32-bit values internally could stop doing that and this could instead just be
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