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Merge pull request #3930 from Sonicadvance1/hostfeatures_only_harness…
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HostFeatures: Removes feature flags always supported by FEX
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alyssarosenzweig authored Aug 9, 2024
2 parents 85d1b57 + a1f55f0 commit 633f624
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Showing 4 changed files with 28 additions and 22 deletions.
2 changes: 1 addition & 1 deletion FEXCore/Source/Interface/Core/CPUID.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -638,7 +638,7 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) const {
(0 << 21) | // Reserved
(0 << 22) | // Reserved
(1 << 23) | // CLFLUSHOPT instruction
(CTX->HostFeatures.SupportsCLWB << 24) | // CLWB instruction
(1 << 24) | // CLWB instruction
(0 << 25) | // Intel processor trace
(0 << 26) | // Reserved
(0 << 27) | // Reserved
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5 changes: 0 additions & 5 deletions FEXCore/include/FEXCore/Core/HostFeatures.h
Original file line number Diff line number Diff line change
Expand Up @@ -19,15 +19,10 @@ struct HostFeatures {
bool SupportsRCPC {};
bool SupportsTSOImm9 {};
bool SupportsRAND {};
bool Supports3DNow {};
bool SupportsSSE4A {};
bool SupportsAVX {};
bool SupportsSVE128 {};
bool SupportsSVE256 {};
bool SupportsSHA {};
bool SupportsBMI1 {};
bool SupportsBMI2 {};
bool SupportsCLWB {};
bool SupportsPMULL_128Bit {};
bool SupportsCSSC {};
bool SupportsFCMA {};
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13 changes: 1 addition & 12 deletions Source/Common/HostFeatures.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -62,6 +62,7 @@ static uint32_t GetDCZID() {
return DCZID_DZP_MASK;
}

[[maybe_unused]]
static int ReadSVEVectorLengthInBits() {
// Return unsupported
return 0;
Expand Down Expand Up @@ -166,9 +167,6 @@ FEXCore::HostFeatures FetchHostFeatures() {
HostFeatures.SupportsRPRES = Features.Has(vixl::CPUFeatures::Feature::kRPRES);
HostFeatures.SupportsSVEBitPerm = Features.Has(vixl::CPUFeatures::Feature::kSVEBitPerm);

HostFeatures.Supports3DNow = true;
HostFeatures.SupportsSSE4A = true;

#ifdef VIXL_SIMULATOR
// Hardcode enable SVE with 256-bit wide registers.
HostFeatures.SupportsSVE128 = ForceSVEWidth() ? ForceSVEWidth() >= 128 : true;
Expand All @@ -181,10 +179,6 @@ FEXCore::HostFeatures FetchHostFeatures() {

HostFeatures.SupportsAES256 = HostFeatures.SupportsAVX && HostFeatures.SupportsAES;

HostFeatures.SupportsBMI1 = true;
HostFeatures.SupportsBMI2 = true;
HostFeatures.SupportsCLWB = true;

if (!HostFeatures.SupportsAtomics) {
WARN_ONCE_FMT("Host CPU doesn't support atomics. Expect bad performance");
}
Expand Down Expand Up @@ -265,13 +259,8 @@ FEXCore::HostFeatures FetchHostFeatures() {
HostFeatures.SupportsRAND = X86Features.has(Xbyak::util::Cpu::tRDRAND) && X86Features.has(Xbyak::util::Cpu::tRDSEED);
HostFeatures.SupportsRCPC = true;
HostFeatures.SupportsTSOImm9 = true;
HostFeatures.Supports3DNow = X86Features.has(Xbyak::util::Cpu::t3DN) && X86Features.has(Xbyak::util::Cpu::tE3DN);
HostFeatures.SupportsSSE4A = X86Features.has(Xbyak::util::Cpu::tSSE4a);
HostFeatures.SupportsAVX = true;
HostFeatures.SupportsSHA = X86Features.has(Xbyak::util::Cpu::tSHA);
HostFeatures.SupportsBMI1 = X86Features.has(Xbyak::util::Cpu::tBMI1);
HostFeatures.SupportsBMI2 = X86Features.has(Xbyak::util::Cpu::tBMI2);
HostFeatures.SupportsCLWB = X86Features.has(Xbyak::util::Cpu::tCLWB);
HostFeatures.SupportsPMULL_128Bit = X86Features.has(Xbyak::util::Cpu::tPCLMULQDQ);
HostFeatures.SupportsAES256 = HostFeatures.SupportsAES && X86Features.has(Xbyak::util::Cpu::tVAES);

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30 changes: 26 additions & 4 deletions Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,13 @@ desc: Used to run Assembly tests
#include <sys/types.h>
#include <utility>

#ifdef _M_X86_64
#define XBYAK64
#define XBYAK_NO_EXCEPTION
#include <xbyak/xbyak.h>
#include <xbyak/xbyak_util.h>
#endif

void MsgHandler(LogMan::DebugLevels Level, const char* Message) {
fextl::fmt::print("[{}] {}\n", LogMan::DebugLevelStr(Level), Message);
}
Expand Down Expand Up @@ -265,13 +272,28 @@ int main(int argc, char** argv, char** const envp) {
// Skip any tests that the host doesn't support features for
SupportsAVX = HostFeatures.SupportsAVX;

bool TestUnsupported = (!HostFeatures.Supports3DNow && Loader.Requires3DNow()) || (!HostFeatures.SupportsSSE4A && Loader.RequiresSSE4A()) ||
(!SupportsAVX && Loader.RequiresAVX()) || (!HostFeatures.SupportsRAND && Loader.RequiresRAND()) ||
bool TestUnsupported = (!SupportsAVX && Loader.RequiresAVX()) || (!HostFeatures.SupportsRAND && Loader.RequiresRAND()) ||
(!HostFeatures.SupportsSHA && Loader.RequiresSHA()) || (!HostFeatures.SupportsCLZERO && Loader.RequiresCLZERO()) ||
(!HostFeatures.SupportsBMI1 && Loader.RequiresBMI1()) || (!HostFeatures.SupportsBMI2 && Loader.RequiresBMI2()) ||
(!HostFeatures.SupportsCLWB && Loader.RequiresCLWB()) ||
(!HostFeatures.SupportsAES256 && Loader.RequiresAES256()) || (!HostFeatures.SupportsAFP && Loader.RequiresAFP());


#if !defined(VIXL_SIMULATOR) && defined(_M_X86_64)
const bool IsHostRunner = Core == FEXCore::Config::CONFIG_CUSTOM;
if (IsHostRunner) {
///< Features that are only unsupported when running using the HostRunner and the CI machine doesn't support the feature getting tested.
Xbyak::util::Cpu X86Features {};
const bool Supports3DNow = X86Features.has(Xbyak::util::Cpu::t3DN) && X86Features.has(Xbyak::util::Cpu::tE3DN);
const bool SupportsSSE4A = X86Features.has(Xbyak::util::Cpu::tSSE4a);
const bool SupportsBMI1 = X86Features.has(Xbyak::util::Cpu::tBMI1);
const bool SupportsBMI2 = X86Features.has(Xbyak::util::Cpu::tBMI2);
const bool SupportsCLWB = X86Features.has(Xbyak::util::Cpu::tCLWB);

TestUnsupported |= (!Supports3DNow && Loader.Requires3DNow()) || (!SupportsSSE4A && Loader.RequiresSSE4A()) ||
(!SupportsBMI1 && Loader.RequiresBMI1()) || (!SupportsBMI2 && Loader.RequiresBMI2()) ||
(!SupportsCLWB && Loader.RequiresCLWB());
}
#endif

#ifdef _WIN32
TestUnsupported |= Loader.RequiresLinux();
#endif
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