diff --git a/.gitignore b/.gitignore
index edbd6728..a648ff12 100644
--- a/.gitignore
+++ b/.gitignore
@@ -348,3 +348,9 @@ ASALocalRun/
 healthchecksdb
 
 # End of https://www.gitignore.io/api/visualstudio
+/cmake-build-debug
+/examples/inpoutx64.dll
+/examples/libryzenadj.dll
+/examples/pmtable-example.py
+/examples/WinRing0x64.dll
+/examples/WinRing0x64.sys
diff --git a/examples/pmtable-example.py b/examples/pmtable-example.py
index c2ab4106..fbd68297 100644
--- a/examples/pmtable-example.py
+++ b/examples/pmtable-example.py
@@ -19,7 +19,7 @@
 else:
     lib = cdll.LoadLibrary('libryzenadj.so')
 
-# define ctype mappings for types which can not be mapped automatically
+# define ctype mappings for types which can not be mapped auotmatically
 lib.init_ryzenadj.restype = c_void_p
 lib.get_table_ver.argtypes = [c_void_p]
 lib.get_table_size.argtypes = [c_void_p]
diff --git a/lib/api.c b/lib/api.c
index 779e73bc..fd8d6666 100644
--- a/lib/api.c
+++ b/lib/api.c
@@ -289,7 +289,7 @@ static int request_transfer_table(ryzen_access ry)
 
 EXP int CALL init_table(ryzen_access ry)
 {
-	DBG("init_table\n");
+	//DBG("init_table\n");
 	int errorcode = 0;
 
 	errorcode = request_table_ver_and_size(ry);
@@ -1203,6 +1203,11 @@ EXP int CALL set_oc_clk(ryzen_access ry, uint32_t value) {
 
 	switch (ry->family)
 	{
+	case FAM_RAVEN:
+	case FAM_DALI:
+	case FAM_PICASSO:
+		_do_adjust_psmu(0x7D);
+		break;
 	case FAM_LUCIENNE:
 	case FAM_RENOIR:
 	case FAM_CEZANNE:
@@ -1224,6 +1229,11 @@ EXP int CALL set_per_core_oc_clk(ryzen_access ry, uint32_t value) {
 
 	switch (ry->family)
 	{
+	case FAM_RAVEN:
+	case FAM_DALI:
+	case FAM_PICASSO:
+		_do_adjust_psmu(0x7E);
+		break;
 	case FAM_LUCIENNE:
 	case FAM_RENOIR:
 	case FAM_CEZANNE:
@@ -1245,6 +1255,15 @@ EXP int CALL set_oc_volt(ryzen_access ry, uint32_t value) {
 
 	switch (ry->family)
 	{
+	case FAM_RAVEN:
+	case FAM_DALI:
+	case FAM_PICASSO:
+		_do_adjust(0x40);
+		if (err) {
+			printf("%s: Retry with PSMU\n", __func__);
+			_do_adjust_psmu(0x7F);
+		}
+		break;
 	case FAM_LUCIENNE:
 	case FAM_RENOIR:
 	case FAM_CEZANNE:
@@ -1267,6 +1286,15 @@ EXP int CALL set_disable_oc(ryzen_access ry) {
 
 	switch (ry->family)
 	{
+	case FAM_RAVEN:
+	case FAM_DALI:
+	case FAM_PICASSO:
+		_do_adjust(0x3F);
+		if (err) {
+			printf("%s: Retry with PSMU\n", __func__);
+			_do_adjust_psmu(0x6A);
+		}
+		break;
 	case FAM_LUCIENNE:
 	case FAM_RENOIR:
 	case FAM_CEZANNE:
@@ -1291,6 +1319,11 @@ EXP int CALL set_enable_oc(ryzen_access ry) {
 
 	switch (ry->family)
 	{
+	case FAM_RAVEN:
+	case FAM_DALI:
+	case FAM_PICASSO:
+		_do_adjust_psmu(0x69);
+		break;
 	case FAM_LUCIENNE:
 	case FAM_RENOIR:
 	case FAM_CEZANNE:
@@ -1310,6 +1343,11 @@ EXP int CALL set_coall(ryzen_access ry, uint32_t value) {
 
 	switch (ry->family)
 	{
+	case FAM_RAVEN:
+	case FAM_DALI:
+	case FAM_PICASSO:
+		_do_adjust_psmu(0x59);
+		break;
 	case FAM_CEZANNE:
 	case FAM_RENOIR:
 	case FAM_LUCIENNE:
@@ -1332,15 +1370,18 @@ EXP int CALL set_coper(ryzen_access ry, uint32_t value) {
 
 	switch (ry->family)
 	{
+	case FAM_RAVEN:
+	case FAM_DALI:
+	case FAM_PICASSO:
+		_do_adjust_psmu(0x58); //Different formula to adjust!
+		break;
 	case FAM_CEZANNE:
 	case FAM_RENOIR:
 	case FAM_LUCIENNE:
 		_do_adjust(0x54);
 	case FAM_REMBRANDT:
 	case FAM_PHOENIX:
-	case FAM_VANGOGH:  
-		_do_adjust(0x4b);  
-		break;
+	case FAM_VANGOGH: 
 	case FAM_HAWKPOINT:
 		_do_adjust(0x4B);
 		break;
@@ -1355,6 +1396,11 @@ EXP int CALL set_cogfx(ryzen_access ry, uint32_t value) {
 
 	switch (ry->family)
 	{
+	case FAM_RAVEN:
+	case FAM_DALI:
+	case FAM_PICASSO:
+		_do_adjust_psmu(0x59); //Same with COALL, should work.
+		break;
 	case FAM_CEZANNE:
 	case FAM_RENOIR:
 	case FAM_LUCIENNE:
@@ -1717,7 +1763,7 @@ EXP float CALL get_tctl_temp(ryzen_access ry) {
 	case 0x00400002:
 	case 0x00400003:
 	case 0x00400004:
-	case 0x00400005:
+	case 0x00400005: 
 	case 0x00450004:
 	case 0x00450005:
 	case 0x004C0006:
@@ -1753,7 +1799,7 @@ EXP float CALL get_tctl_temp_value(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 	case 0x00450004:
-	case 0x00450005:
+	case 0x00450005: 
 	case 0x004C0006:
 	case 0x004C0007:
 	case 0x004C0008:
@@ -1888,6 +1934,8 @@ EXP float CALL get_psi0_current(ryzen_access ry) {
 	case 0x00400003:
 	case 0x00400004:
 	case 0x00400005:
+	case 0x00450004:
+	case 0x00450005:
 	case 0x004C0006:
 	case 0x004C0007:
 	case 0x004C0008:
@@ -1920,6 +1968,8 @@ EXP float CALL get_psi0soc_current(ryzen_access ry) {
 	case 0x00400003:
 	case 0x00400004:
 	case 0x00400005:
+	case 0x00450004:
+	case 0x00450005:
 	case 0x004C0006:
 	case 0x004C0007:
 	case 0x004C0008:
@@ -1953,6 +2003,8 @@ EXP float CALL get_cclk_setpoint(ryzen_access ry) {
 	case 0x00400003:
 	case 0x00400004:
 	case 0x00400005:
+	case 0x00450004:
+	case 0x00450005:
 		_read_float_value(0x100);
 	default:
 		break;
@@ -1961,6 +2013,8 @@ EXP float CALL get_cclk_setpoint(ryzen_access ry) {
 }
 
 EXP float CALL get_cclk_busy_value(ryzen_access ry) {
+	float sum = 0.0;
+	int count = 0; 
 	switch (ry->table_ver)
 	{
 	case 0x001E0001:
@@ -1970,7 +2024,19 @@ EXP float CALL get_cclk_busy_value(ryzen_access ry) {
 	case 0x001E0005:
 	case 0x001E000A:
 	case 0x001E0101:
-		_read_float_value(0x9C); //use core1 because core0 is not reported on dual core cpus
+		if (ry->family == FAM_PICASSO) {
+			if (ry->table_values[0x94 / 4] == 0) {
+				_read_float_value(0x9C); //use core1 because core0 is not reported on dual core cpus 
+			}
+			else {
+				return (ry->table_values[0x94 / 4] 
+					+ ry->table_values[0xA4 / 4]) / 2; 
+				break;
+			} 
+		}
+		else {
+			_read_float_value(0x9C); //use core1 because core0 is not reported on dual core cpus
+		}
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -1984,6 +2050,45 @@ EXP float CALL get_cclk_busy_value(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x104);
+	case 0x00450004:
+	case 0x00450005:
+		if (!ry->table_values) {
+			return NAN;
+		}
+		sum = 0.0;
+		count = 0;
+		int indices[] = { 0x044C / 4, 0x0450 / 4, 0x0454 / 4, 0x0458 / 4, 0x045C / 4, 0x0460 / 4, 0x0464 / 4, 0x0468 / 4 };
+		for (int i = 0; i < 8; i++) {
+			float value = ry->table_values[indices[i]];
+			if (value != 0.0) { 
+				sum += value;
+				count++;
+			}
+		} 
+		if (count == 0) {
+			return NAN;
+		} 
+		return sum / count;
+		break;
+	case 0x004C0008:   
+		if (!ry->table_values) {
+			return NAN;
+		}
+		sum = 0.0;
+		count = 0; 
+		int indices1[] = { 0x08D4 / 4, 0x08D8 / 4, 0x08DC / 4, 0x08E0 / 4, 0x08E4 / 4, 0x08E8 / 4, 0x08EC / 4, 0x08F0 / 4 };
+		for (int i1 = 0; i1 < 8; i1) {
+			float value1 = ry->table_values[indices1[i1]];
+			if (value1 != 0.0) {
+				sum += value1;
+				count++;
+			}
+		}
+		if (count == 0) {
+			return NAN;
+		}
+		return sum / count;
+		break; //Read all C0-State and summ them to get normal core usage. Phoenix DOESN'T HAVE ANY PHYSICAL CORE USAGE INDEXES! ONLY C-States - Serzhik Saku
 	default:
 		break;
 	}
@@ -2074,11 +2179,32 @@ EXP float CALL get_slow_time(ryzen_access ry) {
 }
 
 EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
+	if (0 > core || core > 7) {
+		core = 0;
+	}
 	switch (core)
 	{
 	case 0:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				if (ry->table_values[0xF8 / 4] == 0) {
+					_read_float_value(0x180);
+				}
+				else {
+					_read_float_value(0xF8);
+				}
+			}
+			else {
+				_read_float_value(0xF8);
+			} 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2094,12 +2220,35 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x320); //800
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x42C); 
+		case 0x004C0008:
+			_read_float_value(0x07F4);
 	default:
 		break;
 	}
 	case 1:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				if (ry->table_values[0xFC / 4] == 0) {
+					_read_float_value(0x184);
+				}
+				else {
+					_read_float_value(0xFC);
+				}
+			}
+			else {
+				_read_float_value(0xFC);
+			} 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2115,12 +2264,30 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x324); //804
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x430); 
+		case 0x004C0008:
+			_read_float_value(0x07F8);
 	default:
 		break;
 	}
 	case 2:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				_read_float_value(0x188);
+			}
+			else {
+				return NAN;
+			}
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2136,12 +2303,30 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x328); //808
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x434); 
+		case 0x004C0008:
+			_read_float_value(0x07FC);
 	default:
 		break;
 	}
 	case 3:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				_read_float_value(0x18C);
+			}
+			else {
+				return NAN;
+			}
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2157,12 +2342,17 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x32c); //812
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x438); 
+		case 0x004C0008:
+			_read_float_value(0x0800);
 	default:
 		break;
 	}
 	case 4:
 		switch (ry->table_ver)
-		{
+		{ 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2175,14 +2365,24 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 			_read_float_value(0x314); //788
 		case 0x00400004:
 		case 0x00400005:
-			_read_float_value(0x330); //816
+			if (ry->table_values[0x330 / 4] == 0) {
+				_read_float_value(0x338); //Fix for six-cores Cezanne
+			}
+			else {
+				_read_float_value(0x330);
+			} 
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x43C);  
+		case 0x004C0008:
+			_read_float_value(0x0804);
 	default:
 		break;
 	}
 
 	case 5:
 		switch (ry->table_ver)
-		{
+		{ 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2196,12 +2396,17 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x334); //820
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x440); 
+		case 0x004C0008:
+			_read_float_value(0x0808);
 	default:
 		break;
 	}
 	case 6:
 		switch (ry->table_ver)
-		{
+		{ 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2215,12 +2420,17 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x338); //824
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x444); 
+		case 0x004C0008:
+			_read_float_value(0x080C);
 	default:
 		break;
 	}
 	case 7:
 		switch (ry->table_ver)
-		{
+		{ 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2234,6 +2444,11 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x33c); //828
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x448);  
+		case 0x004C0008:
+			_read_float_value(0x0810);
 	default:
 		break;
 	}
@@ -2244,11 +2459,32 @@ EXP float CALL get_core_power(ryzen_access ry, uint32_t core) {
 }
 
 EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
+	if (0 > core || core > 7) {
+		core = 0;
+	}
 	switch (core)
 	{
 	case 0:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				if (ry->table_values[0xE4 / 4] == 0) {
+					_read_float_value(0x1A0);
+				}
+				else {
+					_read_float_value(0xE4);
+				}
+			}
+			else {
+				_read_float_value(0xE4);
+			} 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2262,12 +2498,35 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x340); //832
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x38C);  
+		case 0x004C0008:
+			_read_float_value(0x0814);
 	default:
 		break;
 	}
 	case 1:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				if (ry->table_values[0xF4 / 4] == 0) {
+					_read_float_value(0x1A4);
+				}
+				else {
+					_read_float_value(0xF4);
+				}
+			}
+			else {
+				_read_float_value(0xF4);
+			} 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2281,12 +2540,30 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x344); //836
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x390); 
+		case 0x004C0008:
+			_read_float_value(0x0818);
 	default:
 		break;
 	}
 	case 2:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				_read_float_value(0x1A8);
+			}
+			else {
+				return NAN;
+			}
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2300,12 +2577,30 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x348); //840
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x394); 
+		case 0x004C0008:
+			_read_float_value(0x081C);
 	default:
 		break;
 	}
 	case 3:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				_read_float_value(0x1AC);
+			}
+			else {
+				return NAN;
+			}
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2319,6 +2614,11 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x34c); //844
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x398);  
+		case 0x004C0008:
+			_read_float_value(0x0820);
 	default:
 		break;
 	}
@@ -2335,7 +2635,17 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 			_read_float_value(0x34C);
 		case 0x00400004:
 		case 0x00400005:
-			_read_float_value(0x350); //848
+			if (ry->table_values[0x350 / 4] == 0) {
+				_read_float_value(0x358); //Fix for six-cores Cezanne
+			}
+			else {
+				_read_float_value(0x350);
+			} 
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x39C); 
+		case 0x004C0008:
+			_read_float_value(0x0824);
 
 	default:
 		break;
@@ -2354,6 +2664,11 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x354); //852
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3A0); 
+		case 0x004C0008:
+			_read_float_value(0x0828);
 	default:
 		break;
 	}
@@ -2371,6 +2686,11 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x358); //856
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3A4); 
+		case 0x004C0008:
+			_read_float_value(0x082C);
 	default:
 		break;
 	}
@@ -2388,6 +2708,11 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x35c); //860
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3A8); 
+		case 0x004C0008:
+			_read_float_value(0x0830);
 	default:
 		break;
 	}
@@ -2396,11 +2721,22 @@ EXP float CALL get_core_volt(ryzen_access ry, uint32_t core) {
 }
 
 EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
+	if (0 > core || core > 7) {
+		core = 0;
+	}
 	switch (core)
 	{
 	case 0:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			_read_float_value(0x1B0);
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2414,12 +2750,25 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x360); //864
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3AC); 
+		case 0x004C0008:
+			_read_float_value(0x0834);
 	default:
 		break;
 	}
 	case 1:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			_read_float_value(0x1B4);
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2433,12 +2782,25 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x364); //868
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3B0); 
+		case 0x004C0008:
+			_read_float_value(0x0838);
 	default:
 		break;
 	}
 	case 2:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			_read_float_value(0x1B8);
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2452,12 +2814,25 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x368); //872
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3B4); 
+		case 0x004C0008:
+			_read_float_value(0x083C);
 	default:
 		break;
 	}
 	case 3:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			_read_float_value(0x1BC);
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2471,6 +2846,11 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x36c); //876
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3B8); 
+		case 0x004C0008:
+			_read_float_value(0x0840);
 	default:
 		break;
 	}
@@ -2488,6 +2868,11 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x370); //880
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3BC); 
+		case 0x004C0008:
+			_read_float_value(0x0844);
 	default:
 		break;
 	}
@@ -2505,6 +2890,11 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x374); //884
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3C0); 
+		case 0x004C0008:
+			_read_float_value(0x0848);
 	default:
 		break;
 	}
@@ -2522,6 +2912,11 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x378); //888
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3C4); 
+		case 0x004C0008:
+			_read_float_value(0x084C);
 	default:
 		break;
 	}
@@ -2539,6 +2934,11 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x37C); //892
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x3C8); 
+		case 0x004C0008:
+			_read_float_value(0x0850);
 	default:
 		break;
 	}
@@ -2549,11 +2949,32 @@ EXP float CALL get_core_temp(ryzen_access ry, uint32_t core) {
 }
 
 EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
+	if (0 > core || core > 7) {
+		core = 0;
+	}
 	switch (core)
 	{
 	case 0:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				if (ry->table_values[0x1E4 / 4] == 0) {
+					_read_float_value(0x1E0);
+				}
+				else {
+					_read_float_value(0x1E4);
+				}
+			}
+			else {
+				_read_float_value(0x1E4);
+			}
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2566,13 +2987,36 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 			_read_float_value(0x288); //648
 		case 0x00400004:
 		case 0x00400005:
-			_read_float_value(0x3c0); //960
+			_read_float_value(0x3c0); //960 
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x040C); 
+		case 0x004C0008:
+			_read_float_value(0x0894);
 	default:
 		break;
 	}
 	case 1:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				if (ry->table_values[0x1EC / 4] == 0) {
+					_read_float_value(0x1E8);
+				}
+				else {
+					_read_float_value(0x1EC);
+				}
+			}
+			else {
+				_read_float_value(0x1EC);
+			}
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2586,12 +3030,31 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x3c4); //964
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x0410); 
+		case 0x004C0008:
+			_read_float_value(0x0898);
+			
 	default:
 		break;
 	}
 	case 2:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				_read_float_value(0x1E0);
+			}
+			else {
+				_read_float_value(0x1F4);
+			}
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2605,12 +3068,30 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x3c8); //968
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x0414); 
+		case 0x004C0008:
+			_read_float_value(0x089C);
 	default:
 		break;
 	}
 	case 3:
 		switch (ry->table_ver)
 		{
+		case 0x001E0001:
+		case 0x001E0002:
+		case 0x001E0003:
+		case 0x001E0004:
+		case 0x001E0005:
+		case 0x001E000A:
+		case 0x001E0101:
+			if (ry->family == FAM_PICASSO) {
+				_read_float_value(0x1E8);
+			}
+			else {
+				_read_float_value(0x1FC);
+			} 
 		case 0x00370000:
 		case 0x00370001:
 		case 0x00370002:
@@ -2624,6 +3105,11 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x3cc); //972
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x0418);  
+		case 0x004C0008:
+			_read_float_value(0x08A0);
 	default:
 		break;
 	}
@@ -2640,7 +3126,17 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 			_read_float_value(0x3CC);
 		case 0x00400004:
 		case 0x00400005:
-			_read_float_value(0x3d0); //976
+			if (ry->table_values[0x3d0 / 4] == 0) {
+				_read_float_value(0x3d8); //Fix for six-cores Cezanne
+			}
+			else {
+				_read_float_value(0x3d0);
+			}
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x41C); 
+		case 0x004C0008:
+			_read_float_value(0x08A4);
 	default:
 		break;
 	}
@@ -2658,6 +3154,11 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x3d4); //980
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x0420); 
+		case 0x004C0008:
+			_read_float_value(0x08A8);
 	default:
 		break;
 	}
@@ -2675,6 +3176,11 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x3d8); //984
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x424); 
+		case 0x004C0008:
+			_read_float_value(0x08AC);
 	default:
 		break;
 	}
@@ -2692,6 +3198,11 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 		case 0x00400004:
 		case 0x00400005:
 			_read_float_value(0x3dc); //988
+		case 0x00450004:
+		case 0x00450005:
+			_read_float_value(0x0428); 
+		case 0x004C0008:
+			_read_float_value(0x08B0);
 	default:
 		break;
 	}
@@ -2701,9 +3212,17 @@ EXP float CALL get_core_clk(ryzen_access ry, uint32_t core) {
 	return NAN;
 }
 
-EXP float CALL get_l3_clk(ryzen_access ry) {
+EXP float CALL get_l3_clk(ryzen_access ry) { 
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x254);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2717,6 +3236,11 @@ EXP float CALL get_l3_clk(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x614); //1556
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x660); 
+	case 0x004C0008:
+		_read_float_value(0x03CC);
 	default:
 		break;
 	}
@@ -2726,6 +3250,14 @@ EXP float CALL get_l3_clk(ryzen_access ry) {
 EXP float CALL get_l3_logic(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x244);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2738,7 +3270,10 @@ EXP float CALL get_l3_logic(ryzen_access ry) {
 		_read_float_value(0x348); //840
 	case 0x00400004:
 	case 0x00400005:
-		_read_float_value(0x600); //1536
+		_read_float_value(0x664); //1536
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x600); 
 	default:
 		break;
 	}
@@ -2748,6 +3283,14 @@ EXP float CALL get_l3_logic(ryzen_access ry) {
 EXP float CALL get_l3_vddm(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x240);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2761,6 +3304,11 @@ EXP float CALL get_l3_vddm(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x604); //1540
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x688); 
+	case 0x004C0008:
+		_read_float_value(0x01A4);
 	default:
 		break;
 	}
@@ -2770,6 +3318,14 @@ EXP float CALL get_l3_vddm(ryzen_access ry) {
 EXP float CALL get_l3_temp(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x248);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2783,6 +3339,11 @@ EXP float CALL get_l3_temp(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x608); //1544
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x654); 
+	case 0x004C0008:
+		_read_float_value(0x0850);
 	default:
 		break;
 	}
@@ -2792,6 +3353,19 @@ EXP float CALL get_l3_temp(ryzen_access ry) {
 EXP float CALL get_gfx_clk(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		if (ry->family == FAM_PICASSO) { 
+		    _read_float_value(0x268); 
+		}
+		else {
+			_read_float_value(0x26C);
+		}
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2809,8 +3383,13 @@ EXP float CALL get_gfx_clk(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x648); //1608
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x694); 
 	case 0x003F0000: //Van Gogh
 		_read_float_value(0x388); //904
+	case 0x004C0008:
+		_read_float_value(0x0354);
 	default:
 		break;
 	}
@@ -2820,6 +3399,14 @@ EXP float CALL get_gfx_clk(ryzen_access ry) {
 EXP float CALL get_gfx_volt(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x258);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2837,8 +3424,13 @@ EXP float CALL get_gfx_volt(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x63C); //1596
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0xB0); 
 	case 0x003F0000: //Van Gogh
 		_read_float_value(0x37C); //896
+	case 0x004C0008:
+		_read_float_value(0x0348);
 	default:
 		break;
 	}
@@ -2848,6 +3440,14 @@ EXP float CALL get_gfx_volt(ryzen_access ry) {
 EXP float CALL get_gfx_temp(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x25C);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2865,8 +3465,13 @@ EXP float CALL get_gfx_temp(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x640); //1600
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x68C); 
 	case 0x003F0000: //Van Gogh
 		_read_float_value(0x380); //896
+	case 0x004C0008:
+		_read_float_value(0x034C);
 	default:
 		break;
 	}
@@ -2876,6 +3481,14 @@ EXP float CALL get_gfx_temp(ryzen_access ry) {
 EXP float CALL get_fclk(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x29C);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2889,6 +3502,11 @@ EXP float CALL get_fclk(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x664); //1636
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x6B0); 
+	case 0x004C0008:
+		_read_float_value(0x0370);
 	default:
 		break;
 	}
@@ -2898,6 +3516,14 @@ EXP float CALL get_fclk(ryzen_access ry) {
 EXP float CALL get_mem_clk(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x2C8);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2911,6 +3537,11 @@ EXP float CALL get_mem_clk(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x66c); //1644
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x6B4); 
+	case 0x004C0008:
+		_read_float_value(0x0374);
 	default:
 		break;
 	}
@@ -2920,6 +3551,14 @@ EXP float CALL get_mem_clk(ryzen_access ry) {
 EXP float CALL get_soc_volt(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x104);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2933,7 +3572,11 @@ EXP float CALL get_soc_volt(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x19c); //412
-
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x1C8); 
+	case 0x004C0008:
+		_read_float_value(0x01B8); //Phoenix
 	default:
 		break;
 	}
@@ -2943,6 +3586,14 @@ EXP float CALL get_soc_volt(ryzen_access ry) {
 EXP float CALL get_soc_power(ryzen_access ry) {
 	switch (ry->table_ver)
 	{
+	case 0x001E0001:
+	case 0x001E0002:
+	case 0x001E0003:
+	case 0x001E0004:
+	case 0x001E0005:
+	case 0x001E000A:
+	case 0x001E0101:
+		_read_float_value(0x10C);
 	case 0x00370000:
 	case 0x00370001:
 	case 0x00370002:
@@ -2956,6 +3607,11 @@ EXP float CALL get_soc_power(ryzen_access ry) {
 	case 0x00400004:
 	case 0x00400005:
 		_read_float_value(0x1a4); //420
+	case 0x00450004:
+	case 0x00450005:
+		_read_float_value(0x1D0); 
+	case 0x004C0008:
+		_read_float_value(0x01C0);
 	default:
 		break;
 	}
@@ -2980,6 +3636,8 @@ EXP float CALL get_socket_power(ryzen_access ry) {
 		_read_float_value(0x98); //152
 	case 0x003F0000: //Van Gogh
 		_read_float_value(0xA8); //168
+	case 0x004C0008:
+		_read_float_value(0x008C); //Phoenix
 	default:
 		break;
 	}
diff --git a/lib/nb_smu_ops.c b/lib/nb_smu_ops.c
index 4224cd19..a3335063 100644
--- a/lib/nb_smu_ops.c
+++ b/lib/nb_smu_ops.c
@@ -7,9 +7,9 @@
 u32 smu_service_req(smu_t smu ,u32 id ,smu_service_args_t *args)
 {
 	u32 response = 0x0;
-	DBG("SMU_SERVICE REQ_ID:0x%x\n", id);
+	/*DBG("SMU_SERVICE REQ_ID:0x%x\n", id);
 	DBG("SMU_SERVICE REQ: arg0: 0x%x, arg1:0x%x, arg2:0x%x, arg3:0x%x, arg4: 0x%x, arg5: 0x%x\n",  \
-		args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5);
+		args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5);*/
 
 	/* Clear the response */
 	smn_reg_write(smu->nb, smu->rep, 0x0);
@@ -34,8 +34,8 @@ u32 smu_service_req(smu_t smu ,u32 id ,smu_service_args_t *args)
 	args->arg4 = smn_reg_read(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 4));
 	args->arg5 = smn_reg_read(smu->nb, C2PMSG_ARGx_ADDR(smu->arg_base, 5));
 
-	DBG("SMU_SERVICE REP: REP: 0x%x, arg0: 0x%x, arg1:0x%x, arg2:0x%x, arg3:0x%x, arg4: 0x%x, arg5: 0x%x\n",  \
-		response, args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5);
+	/*DBG("SMU_SERVICE REP: REP: 0x%x, arg0: 0x%x, arg1:0x%x, arg2:0x%x, arg3:0x%x, arg4: 0x%x, arg5: 0x%x\n",  \
+		response, args->arg0, args->arg1, args->arg2, args->arg3, args->arg4, args->arg5);*/
 
 	return response;
 }
diff --git a/main.c b/main.c
index 7850f282..0e4954ae 100644
--- a/main.c
+++ b/main.c
@@ -4,7 +4,7 @@
 
 #include <string.h>
 #include "lib/ryzenadj.h"
-#include "argparse.h"
+#include "argparse.h" 
 
 #define STRINGIFY2(X) #X
 #define STRINGIFY(X) STRINGIFY2(X)
@@ -85,6 +85,7 @@ static const char *family_name(enum ryzen_family fam)
 
 static void show_info_header(ryzen_access ry)
 {
+	//printf("Custom RyzenADJ by Serzhik Saku and FlyGoat\n");
 	printf("CPU Family: %s\n", family_name(get_cpu_family(ry)));
 	printf("SMU BIOS Interface Version: %d\n", get_bios_if_ver(ry));
 	printf("Version: v" STRINGIFY(RYZENADJ_REVISION_VER) "." STRINGIFY(RYZENADJ_MAJOR_VER) "." STRINGIFY(RYZENADJ_MINIOR_VER) " \n");
@@ -101,6 +102,48 @@ static void show_info_table(ryzen_access ry)
 		return;
 	}
 
+	//print table in github markdown
+	printf("|        Name         |   Value   |     Parameter      |\n");
+	printf("|---------------------|-----------|--------------------|\n");
+	char tableFormat[] = "| %-19s | %9.3lf | %-18s |\n";
+	printf(tableFormat, "STAPM LIMIT", get_stapm_limit(ry), "stapm-limit");
+	printf(tableFormat, "STAPM VALUE", get_stapm_value(ry), "");
+	printf(tableFormat, "PPT LIMIT FAST", get_fast_limit(ry), "fast-limit");
+	printf(tableFormat, "PPT VALUE FAST", get_fast_value(ry), "");
+	printf(tableFormat, "PPT LIMIT SLOW", get_slow_limit(ry), "slow-limit");
+	printf(tableFormat, "PPT VALUE SLOW", get_slow_value(ry), "");
+	printf(tableFormat, "StapmTimeConst", get_stapm_time(ry), "stapm-time");
+	printf(tableFormat, "SlowPPTTimeConst", get_slow_time(ry), "slow-time");
+	printf(tableFormat, "PPT LIMIT APU", get_apu_slow_limit(ry), "apu-slow-limit");
+	printf(tableFormat, "PPT VALUE APU", get_apu_slow_value(ry), "");
+	printf(tableFormat, "TDC LIMIT VDD", get_vrm_current(ry), "vrm-current");
+	printf(tableFormat, "TDC VALUE VDD", get_vrm_current_value(ry), "");
+	printf(tableFormat, "TDC LIMIT SOC", get_vrmsoc_current(ry), "vrmsoc-current");
+	printf(tableFormat, "TDC VALUE SOC", get_vrmsoc_current_value(ry), "");
+	printf(tableFormat, "EDC LIMIT VDD", get_vrmmax_current(ry), "vrmmax-current");
+	printf(tableFormat, "EDC VALUE VDD", get_vrmmax_current_value(ry), "");
+	printf(tableFormat, "EDC LIMIT SOC", get_vrmsocmax_current(ry), "vrmsocmax-current");
+	printf(tableFormat, "EDC VALUE SOC", get_vrmsocmax_current_value(ry), "");
+	printf(tableFormat, "THM LIMIT CORE", get_tctl_temp(ry), "tctl-temp");
+	printf(tableFormat, "THM VALUE CORE", get_tctl_temp_value(ry), "");
+	printf(tableFormat, "STT LIMIT APU", get_apu_skin_temp_limit(ry), "apu-skin-temp");
+	printf(tableFormat, "STT VALUE APU", get_apu_skin_temp_value(ry), "");
+	printf(tableFormat, "STT LIMIT dGPU", get_dgpu_skin_temp_limit(ry), "dgpu-skin-temp");
+	printf(tableFormat, "STT VALUE dGPU", get_dgpu_skin_temp_value(ry), "");
+	printf(tableFormat, "CCLK Boost SETPOINT", get_cclk_setpoint(ry), "power-saving /");
+	printf(tableFormat, "CCLK BUSY VALUE", get_cclk_busy_value(ry), "max-performance"); 
+}
+
+static void show_info_table_new(ryzen_access ry)
+{
+	printf("PM Table Version: %x\n", get_table_ver(ry)); 
+	//get refresh table after adjust
+	int errorcode = refresh_table(ry);
+	if (errorcode) {
+		printf("Unable to refresh power metric table: %d\n", errorcode);
+		return;
+	}
+
 	//print table in github markdown
 	printf("|        Name         |   Value   |     Parameter      |\n");
 	printf("|---------------------|-----------|--------------------|\n");
@@ -131,6 +174,41 @@ static void show_info_table(ryzen_access ry)
 	printf(tableFormat, "STT VALUE dGPU", get_dgpu_skin_temp_value(ry), "");
 	printf(tableFormat, "CCLK Boost SETPOINT", get_cclk_setpoint(ry), "power-saving /");
 	printf(tableFormat, "CCLK BUSY VALUE", get_cclk_busy_value(ry), "max-performance");
+	printf(tableFormat, "CPU CORE0 POWER", get_core_power(ry, 0), "");
+	printf(tableFormat, "CPU CORE1 POWER", get_core_power(ry, 1), "");
+	printf(tableFormat, "CPU CORE2 POWER", get_core_power(ry, 2), "");
+	printf(tableFormat, "CPU CORE3 POWER", get_core_power(ry, 3), "");
+	printf(tableFormat, "CPU CORE4 POWER", get_core_power(ry, 4), "");
+	printf(tableFormat, "CPU CORE5 POWER", get_core_power(ry, 5), "");
+	printf(tableFormat, "CPU CORE6 POWER", get_core_power(ry, 6), "");
+	printf(tableFormat, "CPU CORE7 POWER", get_core_power(ry, 7), "");
+	printf(tableFormat, "CPU CORE0 VOLT", get_core_volt(ry, 0), "");
+	printf(tableFormat, "CPU CORE1 VOLT", get_core_volt(ry, 1), "");
+	printf(tableFormat, "CPU CORE2 VOLT", get_core_volt(ry, 2), "");
+	printf(tableFormat, "CPU CORE3 VOLT", get_core_volt(ry, 3), "");
+	printf(tableFormat, "CPU CORE4 VOLT", get_core_volt(ry, 4), "");
+	printf(tableFormat, "CPU CORE5 VOLT", get_core_volt(ry, 5), "");
+	printf(tableFormat, "CPU CORE6 VOLT", get_core_volt(ry, 6), "");
+	printf(tableFormat, "CPU CORE7 VOLT", get_core_volt(ry, 7), "");
+	printf(tableFormat, "CPU CORE0 FREQ", get_core_clk(ry, 0) * 1000, "");
+	printf(tableFormat, "CPU CORE1 FREQ", get_core_clk(ry, 1) * 1000, "");
+	printf(tableFormat, "CPU CORE2 FREQ", get_core_clk(ry, 2) * 1000, "");
+	printf(tableFormat, "CPU CORE3 FREQ", get_core_clk(ry, 3) * 1000, "");
+	printf(tableFormat, "CPU CORE4 FREQ", get_core_clk(ry, 4) * 1000, "");
+	printf(tableFormat, "CPU CORE5 FREQ", get_core_clk(ry, 5) * 1000, "");
+	printf(tableFormat, "CPU CORE6 FREQ", get_core_clk(ry, 6) * 1000, "");
+	printf(tableFormat, "CPU CORE7 FREQ", get_core_clk(ry, 7) * 1000, "");
+	printf(tableFormat, "L3 CACHE FREQ", get_l3_clk(ry), "");
+	printf(tableFormat, "L3 CACHE LOGIC", get_l3_logic(ry), "");
+	printf(tableFormat, "L3 CACHE VDDM", get_l3_vddm(ry), "");
+	printf(tableFormat, "L3 CACHE TEMP", get_l3_temp(ry), "");
+	printf(tableFormat, "APU GFX FREQ", get_gfx_clk(ry), "");
+	printf(tableFormat, "APU GFX VOLT", get_gfx_volt(ry), "");
+	printf(tableFormat, "APU GFX TEMP", get_gfx_temp(ry), "");
+	printf(tableFormat, "INFINITY FABRIC", get_fclk(ry), "");
+	printf(tableFormat, "MEM CLK", get_mem_clk(ry), "");
+	printf(tableFormat, "SOC VOLT", get_soc_volt(ry), "");
+	printf(tableFormat, "SOC POWER", get_soc_power(ry), "");
 }
 
 static void show_table_dump(ryzen_access ry, int any_adjust_applied)
@@ -190,7 +268,7 @@ int main(int argc, const char **argv)
 	ryzen_access ry;
 	int err = 0;
 
-	int info = 0, dump_table = 0, any_adjust_applied = 0;
+	int info = 0, dump_table = 0, any_adjust_applied = 0, new_info = 0;
 	int power_saving = 0, max_performance = 0, enable_oc = 0x0, disable_oc = 0x0;
 	//init unsigned types with max value because we treat max value as unset
 	uint32_t stapm_limit = -1, fast_limit = -1, slow_limit = -1, slow_time = -1, stapm_time = -1, tctl_temp = -1;
@@ -205,7 +283,8 @@ int main(int argc, const char **argv)
 	struct argparse_option options[] = {
 		OPT_HELP(),
 		OPT_GROUP("Options"),
-		OPT_BOOLEAN('i', "info", &info, "Show information and most important power metrics after adjustment"),
+		OPT_BOOLEAN('i', "info", &info, "Show old information and most important power metrics after adjustment"),
+		OPT_BOOLEAN('z', "infonew", &new_info, "Show new information and most important power metrics after adjustment"),
 		OPT_BOOLEAN('\0', "dump-table", &dump_table, "Show whole power metric table before and after adjustment"),
 		OPT_GROUP("Settings"),
 		OPT_U32('a', "stapm-limit", &stapm_limit, "Sustained Power Limit         - STAPM LIMIT (mW)"),
@@ -257,7 +336,7 @@ int main(int argc, const char **argv)
 
 	struct argparse argparse;
 	argparse_init(&argparse, options, usage, ARGPARSE_NON_OPTION_IS_INVALID);
-	argparse_describe(&argparse, "\n Ryzen Power Management adjust tool.", "\nWARNING: Use at your own risk!\nBy Jiaxun Yang <jiaxun.yang@flygoat.com>, Under LGPL.\nVersion: v" STRINGIFY(RYZENADJ_REVISION_VER) "." STRINGIFY(RYZENADJ_MAJOR_VER) "." STRINGIFY(RYZENADJ_MINIOR_VER));
+	argparse_describe(&argparse, "\n Ryzen Power Management adjust tool.", "\nWARNING: Use at your own risk!\nBy Jiaxun Yang <jiaxun.yang@flygoat.com> and Serzhik Sakurazhima <erruarbrorder@gmail.com>, Under LGPL.\nVersion: v" STRINGIFY(RYZENADJ_REVISION_VER) "." STRINGIFY(RYZENADJ_MAJOR_VER) "." STRINGIFY(RYZENADJ_MINIOR_VER));
 	argc = argparse_parse(&argparse, argc, argv);
 
 
@@ -269,11 +348,11 @@ int main(int argc, const char **argv)
 	}
 
 	//shows info header before init_table
-	if (info) {
+	if (info || new_info) {
 		show_info_header(ry);
 	}
 
-	if (info || dump_table) {
+	if (info || dump_table || new_info) {
 		//init before adjustment to get the default values
 		err = init_table(ry);
 		if (err) {
@@ -334,6 +413,9 @@ int main(int argc, const char **argv)
 		if (info) {
 			show_info_table(ry);
 		}
+		if (new_info) { 
+			show_info_table_new(ry); 
+		}
 	}
 
 	cleanup_ryzenadj(ry);