Design and Simulation of Split L1 Cache - PSU ECE 585

Project Overview

This repository hosts the comprehensive work done for the PSU class project ECE 585: Microprocessor System Design, focusing on the design and simulation of a split L1 cache. It explores the implementation and evaluation of MESI protocol operations within a simulated microprocessor environment, aiming to optimize cache coherence and improve system performance.

Key Components

• MESI Operations: Detailed simulations and analysis of MESI protocol operations for maintaining cache coherence.
• Simulation Results: Includes Demo_mode0_output.txt showcasing the simulation output and combined_results directory for aggregated data.
• Documentation: Found within the docs directory, containing detailed documentation on the project's design choices, implementation, and results.
• Test Cases: Located in the testcases directory, providing robust scenarios used to validate the cache design and MESI protocol implementation.
• Source Code: The src directory contains all source files used in the project's simulation and analysis.

Getting Started

To get started with this project, clone the repository to your local machine and USAGE.md files for detailed instructions on setting up the simulation environment and running the test cases.

git clone https://github.com/Ghonimo/Design-and-Simulation-of-Split-L1-Cache-PSU-ECE585
cd Design-and-Simulation-of-Split-L1-Cache-PSU-ECE585

Usage

Please refer to the USAGE.md file for detailed instructions on how to run simulations and analyze the results.