ROADMAP_en.md

Done

• Specification draft
• Minimal specification core implementation
  Core implements basic mechanics defined by specification and provides easy way to extend it further
• Minimal language support for description - combo of Markdown + VHDL
• Running VHDL code (at proof-of-concept stage)
• Running interactively via Jupyter Notebook
• Basic run results representation in Jupyter
  • showing created sources
  • waveforms display for HDL runs

You Are Here

(things below will be ready really soon or were just done)

• Ways to run
  • locally on host (determine minimum suitable versions of packages)
  • in docker
  • in cloud

To Be Done soon

• Basic run results representation in Markdown
  • showing created sources
  • waveforms display for HDL runs
• Verilog support
• Contribution description and other community-related general things
• Ad-hoc expressions evaluation
• Off-source stimulus generation for HDL runs

A few moments later

• Complex HDL support
• Reverse VDF description (in the source)
• Mechanics for 3rd parties extensions
• Schematics from YAML

So far the future is cloudy

Following depends on community launch