From 8e39ef6fd6c5edafa34bc5c8132c915c18a3e84a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Thu, 1 Aug 2024 15:43:53 +0200 Subject: [PATCH 01/35] docs(troubleshooting): Mention needed permissions to the serial port on Linux Closes https://github.com/espressif/esptool/pull/984 --- docs/en/troubleshooting.rst | 22 +++++++++++++--------- esptool/loader.py | 5 +---- 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/docs/en/troubleshooting.rst b/docs/en/troubleshooting.rst index 7db2337bc..ae5d2dec9 100644 --- a/docs/en/troubleshooting.rst +++ b/docs/en/troubleshooting.rst @@ -197,15 +197,7 @@ A serial exception error occurred ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ ``esptool.py`` uses the `pySerial `_ Python module for accessing the serial port. -If pySerial cannot operate normally, it raises an error and terminates. Some of the most common pySerial error causes are: - -.. list:: - - * You don't have permission to access the port. - * The port is being already used by other software. - * The port doesn't exist. - * The device gets unexpectedly disconnected. - * The necessary serial port drivers are not installed or are faulty. +If pySerial cannot operate normally, it raises an error and terminates. An example of a pySerial error: @@ -214,3 +206,15 @@ An example of a pySerial error: A serial exception error occurred: read failed: [Errno 6] Device not configured Errors originating from pySerial are, therefore, not a problem with ``esptool.py``, but are usually caused by a problem with hardware or drivers. + +Some of the most common pySerial error causes are: + +.. list:: + + * The port is being already used by other software. + * The port doesn't exist. + * The device gets unexpectedly disconnected. + * The necessary serial port drivers are not installed or are faulty. + * You don't have permission to access the port. + +On Linux, read and write access the serial port over USB is necessary. You can add your user to the ``dialout`` or ``uucp`` group to grant access to the serial port. See `Adding user to dialout or uucp on Linux `_. diff --git a/esptool/loader.py b/esptool/loader.py index bb9ddcb60..8e033b08b 100644 --- a/esptool/loader.py +++ b/esptool/loader.py @@ -351,10 +351,7 @@ def __init__(self, port=DEFAULT_PORT, baud=ESP_ROM_BAUD, trace_enabled=False): port_issues.append( [ # permission denied error re.compile(r"Permission denied", re.IGNORECASE), - ( - "Try to add user into dialout group: " - "sudo usermod -a -G dialout $USER" - ), + ("Try to add user into dialout or uucp group."), ], ) From aa81360cdf8c0621f2a27a9c2e959029e86e657a Mon Sep 17 00:00:00 2001 From: Peter Dragun Date: Mon, 5 Aug 2024 15:04:51 +0200 Subject: [PATCH 02/35] ci: specify tags for danger jobs --- .gitlab-ci.yml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 7721efab3..1ca2acf42 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -22,6 +22,8 @@ include: file: danger.yaml run-danger-mr-linter: stage: pre-check + tags: + - dangerjs variables: ENABLE_CHECK_UPDATED_CHANGELOG: 'false' From 8ee6ea185a0dfcc7a8328afc47ee051cbcf7d915 Mon Sep 17 00:00:00 2001 From: Peter Dragun Date: Mon, 5 Aug 2024 15:12:42 +0200 Subject: [PATCH 03/35] ci(mypy): replace deprecated types-all with concrete types packages --- .pre-commit-config.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 7ffcb4f38..6e4b8a9d7 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -15,7 +15,7 @@ repos: rev: v1.4.1 # the last version running on py3.7 hooks: - id: mypy - additional_dependencies: [types-all] + additional_dependencies: ['types-PyYAML<=6.0.12.12'] # ignore wrapper scripts because of name colision with efuse/__init__.py etc. exclude: test/|docs/|espefuse.py|espsecure.py|esptool.py - repo: https://github.com/codespell-project/codespell From 14e5d93c492bc5cc55024ebeb3f84d48a9532d2a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Thu, 1 Aug 2024 11:11:13 +0200 Subject: [PATCH 04/35] change(espefuse_dump): Rename united and separated formats to joint and split --- docs/en/espefuse/dump-cmd.rst | 8 ++++---- espefuse/efuse/base_operations.py | 14 +++++++------- test/test_espefuse.py | 10 +++++----- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/docs/en/espefuse/dump-cmd.rst b/docs/en/espefuse/dump-cmd.rst index 7e05727c6..8f841ccb8 100644 --- a/docs/en/espefuse/dump-cmd.rst +++ b/docs/en/espefuse/dump-cmd.rst @@ -12,8 +12,8 @@ Optional arguments: - ``--format`` - Selects the dump format: - ``default`` - Usual console eFuse dump; - - ``united`` - All eFuse blocks are stored in one file; - - ``separated`` - Each eFuse block is placed in a separate file. The tool will create multiple files based on the given the ``--file_name`` argument. Example: "--file_name /path/blk.bin", blk0.bin, blk1.bin ... blkN.bin. Use the ``burn_block_data`` cmd to write it back to another chip. + - ``joint`` - All eFuse blocks are stored in one file; + - ``split`` - Each eFuse block is placed in its own file. The tool will create multiple files based on the given the ``--file_name`` argument. Example: "--file_name /path/blk.bin", blk0.bin, blk1.bin ... blkN.bin. Use the ``burn_block_data`` cmd to write it back to another chip. - ``--file_name`` - The path to the file in which to save the dump, if not specified, output to the console. Raw Values Of Efuse Registers @@ -93,7 +93,7 @@ This command saves dump for each block into a separate file. You need to provide .. code-block:: none - > espefuse.py dump --format separated --file_name backup/chip1/blk.bin + > espefuse.py dump --format split --file_name backup/chip1/blk.bin === Run "dump" command === backup/chip1/blk0.bin @@ -120,7 +120,7 @@ To save all eFuse blocks in one file, use the following command: .. code-block:: none - > espefuse.py dump --format united --file_name backup/chip1/efuses.bin + > espefuse.py dump --format joint --file_name backup/chip1/efuses.bin === Run "dump" command === backup/chip1/efuses.bin diff --git a/espefuse/efuse/base_operations.py b/espefuse/efuse/base_operations.py index fb21bcd4d..60f18dc5e 100644 --- a/espefuse/efuse/base_operations.py +++ b/espefuse/efuse/base_operations.py @@ -179,11 +179,11 @@ def check_efuse_name(efuse_name, efuse_list): "--format", help="Select the dump format: " "default - usual console eFuse dump; " - "united - all eFuse blocks are stored in one file; " - "separated - each eFuse block is placed in a separate file. Tool will create multiple files based on " + "joint - all eFuse blocks are stored in one file; " + "split - each eFuse block is placed into its own file. The tool will create multiple files based on " "the given --file_name (/path/blk.bin): blk0.bin, blk1.bin ... blkN.bin. Use the burn_block_data cmd " "to write it back to another chip.", - choices=["default", "separated", "united"], + choices=["default", "split", "joint"], default="default", ) dump_cmd.add_argument( @@ -409,10 +409,10 @@ def output_block_to_file(block, f, to_console): return else: # for back compatibility to support "espefuse.py dump --file_name dump.bin" - args.format = "separated" + args.format = "split" - if args.format == "separated": - # each efuse block is placed in a separate file + if args.format == "split": + # each efuse block is placed into its own file for block in efuses.blocks: if not to_console: file_dump_name = args.file_name @@ -423,7 +423,7 @@ def output_block_to_file(block, f, to_console): output_block_to_file(block, dump_file, to_console) if not to_console: dump_file.close() - elif args.format == "united": + elif args.format == "joint": # all efuse blocks are stored in one file if not to_console: print(f"Dump efuse blocks -> {args.file_name}") diff --git a/test/test_espefuse.py b/test/test_espefuse.py index 40adf0669..2c7b626c4 100755 --- a/test/test_espefuse.py +++ b/test/test_espefuse.py @@ -183,17 +183,17 @@ def test_dump(self): self.espefuse_py("dump -h") self.espefuse_py("dump") - def test_dump_format_united(self): + def test_dump_format_joint(self): tmp_file = tempfile.NamedTemporaryFile(delete=False) - self.espefuse_py(f"dump --format united --file_name {tmp_file.name}") + self.espefuse_py(f"dump --format joint --file_name {tmp_file.name}") - def test_dump_separated_default(self): + def test_dump_split_default(self): tmp_file = tempfile.NamedTemporaryFile(delete=False) self.espefuse_py(f"dump --file_name {tmp_file.name}") - def test_dump_separated(self): + def test_dump_split(self): tmp_file = tempfile.NamedTemporaryFile(delete=False) - self.espefuse_py(f"dump --format separated --file_name {tmp_file.name}") + self.espefuse_py(f"dump --format split --file_name {tmp_file.name}") def test_summary(self): self.espefuse_py("summary -h") From 7cc35e4e4df5568af94e0d1b9d3e737df8a00e7a Mon Sep 17 00:00:00 2001 From: Dmitriy Astapov Date: Mon, 24 Jun 2024 16:26:32 +0200 Subject: [PATCH 05/35] feat(cli): add autocompletions --- docs/en/installation.rst | 38 ++++++++++++++++++++++++++++++++++++++ espefuse/__init__.py | 10 ++++++++++ espsecure/__init__.py | 11 ++++++++++- esptool/__init__.py | 11 ++++++++++- pyproject.toml | 1 + 5 files changed, 69 insertions(+), 2 deletions(-) diff --git a/docs/en/installation.rst b/docs/en/installation.rst index 3a3828b8c..9e201d9d3 100644 --- a/docs/en/installation.rst +++ b/docs/en/installation.rst @@ -68,3 +68,41 @@ If updating directly is unavoidable, make sure you update to a compatible versio :: $ pip install esptool==3.3.2 + +Shell completions +----------------- + +To activate autocompletion, you can manually add commands provided below to your shell's config file +or run them in your current terminal session for one-time activation. +You will likely have to restart or re-login for the autocompletion to start working. + +bash: +:: + + eval "$(register-python-argcomplete esptool.py espsecure.py espefuse.py)" + +zsh: + +To activate completions in zsh, first make sure `compinit` is marked for +autoload and run autoload: + +.. code-block:: bash + + autoload -U compinit + compinit + +Afterwards you can enable completions for esptool.py, espsecure.py and espefuse.py: + +:: + + eval "$(register-python-argcomplete esptool.py espsecure.py espefuse.py)" + +fish: + +Not required to be in the config file, only run once + +:: + + register-python-argcomplete --shell fish esptool.py espsecure.py espefuse.py >~/.config/fish/completions/esptool.py.fish + +Other shells nor OS Windows are not supported. diff --git a/espefuse/__init__.py b/espefuse/__init__.py index 1ec0e2f23..518e96566 100755 --- a/espefuse/__init__.py +++ b/espefuse/__init__.py @@ -1,6 +1,7 @@ # SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD # # SPDX-License-Identifier: GPL-2.0-or-later +# PYTHON_ARGCOMPLETE_OK import argparse import os @@ -285,6 +286,15 @@ def main(custom_commandline=None, esp=None): efuse_operations.add_commands(subparsers, efuses) + # Enable argcomplete only on Unix-like systems + if sys.platform != "win32": + try: + import argcomplete + + argcomplete.autocomplete(parser) + except ImportError: + pass + grouped_remaining_args, used_cmds = split_on_groups(remaining_args) if len(grouped_remaining_args) == 0: parser.print_help() diff --git a/espsecure/__init__.py b/espsecure/__init__.py index fa0c258b6..81688c104 100755 --- a/espsecure/__init__.py +++ b/espsecure/__init__.py @@ -1,7 +1,7 @@ # SPDX-FileCopyrightText: 2016-2023 Espressif Systems (Shanghai) CO LTD # # SPDX-License-Identifier: GPL-2.0-or-later - +# PYTHON_ARGCOMPLETE_OK import argparse import hashlib import operator @@ -1867,6 +1867,15 @@ def main(custom_commandline=None): type=argparse.FileType("rb"), ) + # Enable argcomplete only on Unix-like systems + if sys.platform != "win32": + try: + import argcomplete + + argcomplete.autocomplete(parser) + except ImportError: + pass + args = parser.parse_args(custom_commandline) print("espsecure.py v%s" % esptool.__version__) if args.operation is None: diff --git a/esptool/__init__.py b/esptool/__init__.py index e88e66176..46dad3582 100644 --- a/esptool/__init__.py +++ b/esptool/__init__.py @@ -2,7 +2,7 @@ # Espressif Systems (Shanghai) CO LTD, other contributors as noted. # # SPDX-License-Identifier: GPL-2.0-or-later - +# PYTHON_ARGCOMPLETE_OK __all__ = [ "chip_id", "detect_chip", @@ -690,6 +690,15 @@ def add_spi_flash_subparsers( for operation in subparsers.choices.keys(): assert operation in globals(), "%s should be a module function" % operation + # Enable argcomplete only on Unix-like systems + if sys.platform != "win32": + try: + import argcomplete + + argcomplete.autocomplete(parser) + except ImportError: + pass + argv = expand_file_arguments(argv or sys.argv[1:]) args = parser.parse_args(argv) diff --git a/pyproject.toml b/pyproject.toml index 98bb5f9cf..640127ce1 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -40,6 +40,7 @@ "reedsolo>=1.5.3,<1.8", "PyYAML>=5.1", "intelhex", + 'argcomplete>=3; sys_platform != "win32"', ] [project.urls] From c266fdda713dc18828d2bc3848f56d758c6e22b5 Mon Sep 17 00:00:00 2001 From: Peter Dragun Date: Mon, 5 Aug 2024 14:01:11 +0200 Subject: [PATCH 06/35] fix: pass error message to exception in OTG mode Closes https://github.com/espressif/esptool/issues/996 Closes https://github.com/espressif/esptool/issues/997 --- esptool/targets/esp32s2.py | 13 +++++-------- esptool/targets/esp32s3.py | 13 +++++-------- 2 files changed, 10 insertions(+), 16 deletions(-) diff --git a/esptool/targets/esp32s2.py b/esptool/targets/esp32s2.py index 6af2842f7..8feabc82a 100644 --- a/esptool/targets/esp32s2.py +++ b/esptool/targets/esp32s2.py @@ -296,15 +296,12 @@ def _check_if_can_reset(self): strap_reg & self.GPIO_STRAP_SPI_BOOT_MASK == 0 and force_dl_reg & self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK == 0 ): - print( - "WARNING: {} chip was placed into download mode using GPIO0.\n" - "esptool.py can not exit the download mode over USB. " - "To run the app, reset the chip manually.\n" - "To suppress this note, set --after option to 'no_reset'.".format( - self.get_chip_description() - ) + raise SystemExit( + f"Error: {self.get_chip_description()} chip was placed into download " + "mode using GPIO0.\nesptool.py can not exit the download mode over " + "USB. To run the app, reset the chip manually.\n" + "To suppress this note, set --after option to 'no_reset'." ) - raise SystemExit(1) def hard_reset(self): uses_usb_otg = self.uses_usb_otg() diff --git a/esptool/targets/esp32s3.py b/esptool/targets/esp32s3.py index 06fb129eb..8894a30c2 100644 --- a/esptool/targets/esp32s3.py +++ b/esptool/targets/esp32s3.py @@ -358,15 +358,12 @@ def _check_if_can_reset(self): strap_reg & self.GPIO_STRAP_SPI_BOOT_MASK == 0 and force_dl_reg & self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK == 0 ): - print( - "WARNING: {} chip was placed into download mode using GPIO0.\n" - "esptool.py can not exit the download mode over USB. " - "To run the app, reset the chip manually.\n" - "To suppress this note, set --after option to 'no_reset'.".format( - self.get_chip_description() - ) + raise SystemExit( + f"Error: {self.get_chip_description()} chip was placed into download " + "mode using GPIO0.\nesptool.py can not exit the download mode over " + "USB. To run the app, reset the chip manually.\n" + "To suppress this note, set --after option to 'no_reset'." ) - raise SystemExit(1) def hard_reset(self): uses_usb_otg = self.uses_usb_otg() From dfd61e2252d5e9ae07669575f66ba3f5f1304c8a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Tue, 6 Aug 2024 13:41:04 +0200 Subject: [PATCH 07/35] fix(esp32_d0wdr2_v3): Print correct chip name --- esptool/targets/esp32.py | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/esptool/targets/esp32.py b/esptool/targets/esp32.py index a42e68dd5..aef531a0d 100644 --- a/esptool/targets/esp32.py +++ b/esptool/targets/esp32.py @@ -227,11 +227,11 @@ def get_chip_description(self): major_rev = self.get_major_chip_version() minor_rev = self.get_minor_chip_version() rev3 = major_rev == 3 - single_core = self.read_efuse(3) & (1 << 0) # CHIP_VER DIS_APP_CPU + sc = self.read_efuse(3) & (1 << 0) # single core, CHIP_VER DIS_APP_CPU chip_name = { - 0: "ESP32-S0WDQ6" if single_core else "ESP32-D0WDQ6", - 1: "ESP32-S0WD" if single_core else "ESP32-D0WD", + 0: "ESP32-S0WDQ6" if sc else "ESP32-D0WDQ6-V3" if rev3 else "ESP32-D0WDQ6", + 1: "ESP32-S0WD" if sc else "ESP32-D0WD-V3" if rev3 else "ESP32-D0WD", 2: "ESP32-D2WD", 4: "ESP32-U4WDH", 5: "ESP32-PICO-V3" if rev3 else "ESP32-PICO-D4", @@ -239,10 +239,6 @@ def get_chip_description(self): 7: "ESP32-D0WDR2-V3", }.get(pkg_version, "unknown ESP32") - # ESP32-D0WD-V3, ESP32-D0WDQ6-V3 - if chip_name.startswith("ESP32-D0WD") and rev3: - chip_name += "-V3" - return f"{chip_name} (revision v{major_rev}.{minor_rev})" def get_chip_features(self): From e8b391154bc8d71d9f9f37dbdfdb6b21a1e9f21d Mon Sep 17 00:00:00 2001 From: Jakub Kocka Date: Wed, 31 Jul 2024 14:04:44 +0200 Subject: [PATCH 08/35] feat(esp32c61): Added stub flasher support --- ci/download_flasher_stubs.py | 5 ++-- esptool/targets/esp32c61.py | 23 ++++++++++++++-- esptool/targets/stub_flasher/1/README.md | 2 +- esptool/targets/stub_flasher/1/esp32c61.json | 8 ++++++ .../ram_helloworld/helloworld-esp32c61.bin | Bin 0 -> 128 bytes test/images/ram_helloworld/source/Makefile | 7 ++++- .../ram_helloworld/source/ld/app_32c61.ld | 26 ++++++++++++++++++ test/test_esptool.py | 12 ++++++-- 8 files changed, 75 insertions(+), 8 deletions(-) create mode 100644 esptool/targets/stub_flasher/1/esp32c61.json create mode 100644 test/images/ram_helloworld/helloworld-esp32c61.bin create mode 100644 test/images/ram_helloworld/source/ld/app_32c61.ld diff --git a/ci/download_flasher_stubs.py b/ci/download_flasher_stubs.py index 1b3ae4cb4..8f34c4129 100755 --- a/ci/download_flasher_stubs.py +++ b/ci/download_flasher_stubs.py @@ -12,7 +12,7 @@ "STUB_SET_VERSION": "1", "DOWNLOAD_URL": "https://github.com/espressif/esptool-legacy-flasher-stub/releases/download", "TAG_URL": "https://github.com/espressif/esptool-legacy-flasher-stub/releases/tag", - "VERSION": "v1.2.0", + "VERSION": "v1.3.0", "FILE_LIST": ( "esp32", "esp32c2", @@ -20,6 +20,7 @@ "esp32c5", "esp32c5beta3", "esp32c6", + "esp32c61", "esp32c6beta", "esp32h2", "esp32h2beta1", @@ -50,7 +51,7 @@ }, ) -DESTINATION_DIR = "esptool/targets/stub_flasher" +DESTINATION_DIR = os.path.join("esptool", "targets", "stub_flasher") README_TEMPLATE = """# Licensing diff --git a/esptool/targets/esp32c61.py b/esptool/targets/esp32c61.py index dd7f09ef7..81fad3610 100644 --- a/esptool/targets/esp32c61.py +++ b/esptool/targets/esp32c61.py @@ -13,7 +13,7 @@ class ESP32C61ROM(ESP32C6ROM): IMAGE_CHIP_ID = 20 # Magic value for ESP32C61 - CHIP_DETECT_MAGIC_VALUE = [0x33F0206F] + CHIP_DETECT_MAGIC_VALUE = [0x33F0206F, 0x2421606F] UART_DATE_REG_ADDR = 0x60000000 + 0x7C @@ -104,4 +104,23 @@ def read_mac(self, mac_type="BASE_MAC"): return macs.get(mac_type, None) -# TODO: IDF-9241, stub flasher support +class ESP32C61StubLoader(ESP32C61ROM): + """Access class for ESP32C61 stub loader, runs on top of ROM. + + (Basically the same as ESP32StubLoader, but different base class. + Can possibly be made into a mixin.) + """ + + FLASH_WRITE_SIZE = 0x4000 # matches MAX_WRITE_BLOCK in stub_loader.c + STATUS_BYTES_LENGTH = 2 # same as ESP8266, different to ESP32 ROM + IS_STUB = True + + def __init__(self, rom_loader): + self.secure_download_mode = rom_loader.secure_download_mode + self._port = rom_loader._port + self._trace_enabled = rom_loader._trace_enabled + self.cache = rom_loader.cache + self.flush_input() # resets _slip_reader + + +ESP32C61ROM.STUB_CLASS = ESP32C61StubLoader diff --git a/esptool/targets/stub_flasher/1/README.md b/esptool/targets/stub_flasher/1/README.md index 0d5ca3834..44e3ca315 100644 --- a/esptool/targets/stub_flasher/1/README.md +++ b/esptool/targets/stub_flasher/1/README.md @@ -1,3 +1,3 @@ # Licensing -The binaries in JSON format distributed in this directory are released as Free Software under GNU General Public License Version 2 or later. They were released at https://github.com/espressif/esptool-legacy-flasher-stub/releases/tag/v1.2.0 from where the sources can be obtained. +The binaries in JSON format distributed in this directory are released as Free Software under GNU General Public License Version 2 or later. They were released at https://github.com/espressif/esptool-legacy-flasher-stub/releases/tag/v1.3.0 from where the sources can be obtained. diff --git a/esptool/targets/stub_flasher/1/esp32c61.json b/esptool/targets/stub_flasher/1/esp32c61.json new file mode 100644 index 000000000..2a95414c8 --- /dev/null +++ b/esptool/targets/stub_flasher/1/esp32c61.json @@ -0,0 +1,8 @@ +{ + "entry": 1082132164, + "text": "QREixCbCBsa39wBgEUc3RIBA2Mu39ABgEwQEANxAkYuR57JAIkSSREEBgoCIQBxAE3X1D4KX3bcBEbcHAGBOxoOphwBKyDdJgEAmylLEBs4izLcEAGB9WhMJCQDATBN09A8N4PJAYkQjqDQBQknSRLJJIkoFYYKAiECDJwkAE3X1D4KXfRTjGUT/yb8TBwAMlEGqh2MY5QCFR4XGI6AFAHlVgoAFR2OH5gAJRmONxgB9VYKAQgUTB7ANQYVjlecCiUecwfW3kwbADWMW1QCYwRMFAAyCgJMG0A19VWOV1wCYwRMFsA2CgLd1gUBBEZOFhboGxmE/Y0UFBrd3gUCThweyA6cHCAPWRwgTdfUPkwYWAMIGwYIjktcIMpcjAKcAA9dHCJFnk4cHBGMe9wI394BAEwcHsqFnupcDpgcItzaBQLd3gUCThweyk4YGtmMf5gAjpscII6DXCCOSBwghoPlX4wb1/LJAQQGCgCOm1wgjoOcI3bc3NwBgfEudi/X/NycAYHxLnYv1/4KAQREGxt03tzcAYCOmBwI3BwAImMOYQ33/yFeyQBNF9f8FiUEBgoBBEQbG2T993TcHAEC3NwBgmMM3NwBgHEP9/7JAQQGCgEERIsQ3xIBAkwdEAUrAA6kHAQbGJsJjCgkERTc5xb1HEwREAYFEY9YnAQREvYiTtBQAfTeFPxxENwaAABOXxwCZ4DcGAAG39v8AdY+3NgBg2MKQwphCff9BR5HgBUczCelAupcjKCQBHMSyQCJEkkQCSUEBgoABEQbOIswlNzcEzj9sABMFRP+XAID/54Cg86qHBUWV57JHk/cHID7GiTc3NwBgHEe3BkAAEwVE/9WPHMeyRZcAgP/ngCDxMzWgAPJAYkQFYYKAQRG3x4BABsaTh0cBBUcjgOcAE9fFAJjHBWd9F8zDyMf5jTqVqpWxgYzLI6oHAEE3GcETBVAMskBBAYKAAREizDfEgECTB0QBJsrER07GBs5KyKqJEwREAWPzlQCuhKnAAylEACaZE1nJABxIY1XwABxEY175ArU9fd1IQCaGzoWXAID/54Ag5BN19Q8BxZMHQAxcyFxAppdcwFxEhY9cxPJAYkTSREJJskkFYYKAaTVtv0ERBsaXAID/54CA1gNFhQGyQHUVEzUVAEEBgoBBEQbGxTcNxbdHgECThwcA1EOZzjdnCWATB4cOHEM3Bv3/fRbxjzcGAwDxjtWPHMOyQEEBgoBBEQbGbTcRwQ1FskBBARcDgP9nAIPMQREGxibCIsSqhJcAgP/ngKDJWTcNyTdHgECTBgcAg9eGABMEBwCFB8IHwYMjlPYAkwYADGOG1AATB+ADY3X3AG03IxQEALJAIkSSREEBgoBBEQbGEwcADGMa5QATBbANRTcTBcANskBBAVm/EwewDeMb5f5xNxMF0A31t0ERIsQmwgbGKoSzBLUAYxeUALJAIkSSREEBgoADRQQABQRNP+23NXEmy07H/XKFaf10Is1KyVLFVsMGz5OEhPoWkZOHCQemlxgIs4TnACqJJoUuhJcAgP/ngIAvk4cJBxgIBWq6l7OKR0Ex5AVnfXWTBYX6kwcHBxMFhfkUCKqXM4XXAJMHBweul7OF1wAqxpcAgP/ngEAsMkXBRZU3AUWFYhaR+kBqRNpESkm6SSpKmkoNYYKAooljc4oAhWlOhtaFSoWXAID/54DAxhN19Q8B7U6G1oUmhZcAgP/ngIAnTpkzBDRBUbcTBTAGVb8TBQAMSb0xcf1yBWdO11LVVtNezwbfIt0m20rZWtFizWbLaslux/13FpETBwcHPpccCLqXPsYjqgf4qokuirKKtov1M5MHAAIZwbcHAgA+hZcAgP/ngGAehWdj5VcTBWR9eRMJifqTBwQHypcYCDOJ5wBKhZcAgP/ngKAefXsTDDv5kwyL+RMHBAeTBwQHFAhil+aXgUQzDNcAs4zXAFJNY3xNCWPxpANBqJk/ooUIAY01uTcihgwBSoWXAID/54CAGqKZopRj9UQDs4ekQWPxdwMzBJpAY/OKAFaEIoYMAU6FlwCA/+eAALYTdfUPVd0CzAFEeV2NTaMJAQBihZcAgP/ngECkffkDRTEB5oWFNGNPBQDj4o3+hWeThwcHopcYCLqX2pcjiqf4BQTxt+MVpf2RR+MF9PYFZ311kwcHB5MFhfoTBYX5FAiqlzOF1wCTBwcHrpezhdcAKsaXAID/54CgEHE9MkXBRWUzUT3BMbcHAgAZ4ZMHAAI+hZcAgP/ngOALhWIWkfpQalTaVEpZulkqWppaClv6S2pM2kxKTbpNKWGCgLdXQUkZcZOH94QBRYbeotym2srYztbS1NbS2tDezuLM5srqyO7GPs6XAID/54DAnaE5DcE3ZwlgEweHDhxDt0aAQCOi9gC3Bv3//Rb1j8Fm1Y8cwxU5Bc23JwtgN0fYUJOGh8ETBxeqmMIThgfAIyAGACOgBgCThgfCmMKTh8fBmEM3BgQAUY+YwyOgBgC3R4BAN3eBQJOHBwATBwe7IaAjoAcAkQfj7ef+RTuRRWgIdTllM7f3gECThweyIWc+lyMg9wi3B4BAN0mAQJOHhw4jIPkAt3mBQEU+EwkJAJOJCbJjBgUQtwcBYBMHEAIjpOcKhUVFRZcAgP/ngOD2twWAQAFGk4UFAEVFlwCA/+eAIPi39wBgEUeYyzcFAgCXAID/54Bg97cXCWCIX4FFt8SAQHGJYRUTNRUAlwCA/+eAIJ/BZ/0XEwcAEIVmQWa3BQABAUWThEQBt0qAQA1qlwCA/+eA4JQTi0oBJpqDp8kI9d+Dq8kIhUcjpgkIIwLxAoPHGwAJRyMT4QKjAvECAtRNR2OB5whRR2OP5wYpR2Of5wCDxzsAA8crAKIH2Y8RR2OW5wCDp4sAnEM+1Hk5oUVIEG02g8c7AAPHKwCiB9mPEWdBB2N09wQTBbANET4TBcANOTYTBeAOITaFOUG3twWAQAFGk4WFAxVFlwCA/+eAIOk3BwBgXEcTBQACk+cXEFzHMbfJRyMT8QJNtwPHGwDRRmPn5gKFRmPm5gABTBME8A+FqHkXE3f3D8lG4+jm/rd2gUAKB5OGRrs2lxhDAoeTBgcDk/b2DxFG42nW/BMH9wITd/cPjUZj6+YIt3aBQAoHk4YGwDaXGEMChxMHQAJjmOcQAtQdRAFFnTQBRU086TbhNqFFSBB9FMk8dfQBTAFEE3X0D2k8E3X8D1E8dTbjHgTqg8cbAElHY2j3MAlH43b36vUXk/f3Dz1H42D36jd3gUCKBxMHB8G6l5xDgocFRJ3rcBCBRQFFl/B//+eAIHEd4dFFaBCVPAFEMagFRIHvl/B//+eA4HYzNKAAKaAhR2OF5wAFRAFMYbcDrIsAA6TLALNnjADSB/X37/CfhX3xwWwinP0cfX0zBYxAVdyzd5UBlePBbDMFjEBj5owC/XwzBYxAVdAxgZfwf//ngGBzVflmlPW3MYGX8H//54BgclXxapTRt0GBl/B//+eAoHFR+TMElEHBtyFH44nn8AFMEwQADDG3QUfNv0FHBUTjnOf2g6XLAAOliwDdMrG/QUcFROOS5/YDpwsBkWdj6uceg6VLAQOliwDv8N+ANb9BRwVE45Ln9IOnCwERZ2Nq9xwDp8sAg6VLAQOliwAzhOcC7/BP/iOsBAAjJIqwMbcDxwQAYwMHFAOniwDBFxMEAAxjE/cAwEgBR5MG8A5jRvcCg8dbAAPHSwABTKIH2Y8Dx2sAQgddj4PHewDiB9mP44H25hMEEAypvTOG6wADRoYBBQexjuG3g8cEAP3H3ERjnQcUwEgjgAQAfbVhR2OW5wKDp8sBA6eLAYOmSwEDpgsBg6XLAAOliwCX8H//54AgYiqMMzSgACm1AUwFRBG1EUcFROOa5+a3lwBgtF9ld30XBWb5jtGOA6WLALTftFeBRfmO0Y601/Rf+Y7RjvTf9FN1j1GP+NOX8H//54BAZSm9E/f3AOMVB+qT3EcAE4SLAAFMfV3jdJzbSESX8H//54DARxhEVEAQQPmOYwenARxCE0f3/32P2Y4UwgUMQQTZvxFHpbVBRwVE45fn3oOniwADp0sBIyj5ACMm6QB1u4MlyQDBF5Hlic8BTBMEYAyJuwMnCQFjZvcGE/c3AOMZB+IDKAkBAUYBRzMF6ECzhuUAY2n3AOMEBtIjKKkAIybZADG7M4brABBOEQeQwgVG6b8hRwVE45Hn2AMkCQEZwBMEgAwjKAkAIyYJADM0gAClswFMEwQgDO2xAUwTBIAMzbEBTBMEkAzpuRMHIA1jg+cMEwdADeOb57gDxDsAg8crACIEXYyX8H//54AgSAOsxABBFGNzhAEijOMJDLbAQGKUMYCcSGNV8ACcRGNb9Arv8I/Ldd3IQGKGk4WLAZfwf//ngCBEAcWTB0AM3MjcQOKX3MDcRLOHh0HcxJfwf//ngABDJbYJZRMFBXEDrMsAA6SLAJfwf//ngEAytwcAYNhLtwYAAcEWk1dHARIHdY+9i9mPs4eHAwFFs9WHApfwf//ngKAzEwWAPpfwf//ngOAu6byDpksBA6YLAYOlywADpYsA7/DP+9G0g8U7AIPHKwAThYsBogXdjcEV7/Bv1XW07/DPxD2/A8Q7AIPHKwATjIsBIgRdjNxEQRTN45FHhUtj/4cIkweQDNzIQbQDpw0AItAFSLOH7EA+1oMnirBjc/QADUhCxjrE7/BPwCJHMkg3xYBA4oV8EJOGSgEQEBMFxQKX8H//54BAMTf3gECTCEcBglcDp4iwg6UNAB2MHY8+nLJXI6TosKqLvpUjoL0Ak4dKAZ2NAcWhZ2OX9QBahe/wD8sjoG0BCcTcRJnD409w92PfCwCTB3AMvbeFS7d9gUC3zIBAk40Nu5OMTAHpv+OdC5zcROOKB5yTB4AMqbeDp4sA45MHnO/wD9MJZRMFBXGX8H//54BAHO/wj86X8H//54AAIVWyA6TLAOMPBJjv8I/QEwWAPpfwf//ngOAZ7/AvzAKUUbLv8K/L9lBmVNZURlm2WSZalloGW/ZLZkzWTEZNtk0JYYKA", + "text_start": 1082130432, + "data": "FECAQHQKgEDECoBAHAuAQOoLgEBWDIBABAyAQEAJgECmC4BA5guAQDALgEDwCIBAZAuAQPAIgEBOCoBAlAqAQMQKgEAcC4BAYAqAQKQJgEDUCYBAXAqAQK4OgEDECoBAbg2AQGYOgEAwCIBAjg6AQDAIgEAwCIBAMAiAQDAIgEAwCIBAMAiAQDAIgEAwCIBACg2AQDAIgECMDYBAZg6AQA==", + "data_start": 1082223536, + "bss_start": 1082146816 +} \ No newline at end of file diff --git a/test/images/ram_helloworld/helloworld-esp32c61.bin b/test/images/ram_helloworld/helloworld-esp32c61.bin new file mode 100644 index 0000000000000000000000000000000000000000..a9a60cf53b8c2e184e504fb48dbd3b2ac6fb30da GIT binary patch literal 128 zcmaFK!~g`%4)1`Z2#ERrKZs-miAew%j)F=@*p8XAG&=~hvItCPsQv%EA%XGgeg?*7 z2LYhGM`}(^zCw9^QBH~?7f2^6uuT0^aCMSLp4-0LwJKX|vL_s$$}Y6|&%|@?2fg0v Ia&BM%0G=Bood5s; literal 0 HcmV?d00001 diff --git a/test/images/ram_helloworld/source/Makefile b/test/images/ram_helloworld/source/Makefile index 1f4f050e7..0132b9ebe 100644 --- a/test/images/ram_helloworld/source/Makefile +++ b/test/images/ram_helloworld/source/Makefile @@ -26,6 +26,7 @@ APP_ELF_32S3 = $(BUILD_DIR)/$(APP)-esp32s3.elf APP_ELF_32C3 = $(BUILD_DIR)/$(APP)-esp32c3.elf APP_ELF_32C2 = $(BUILD_DIR)/$(APP)-esp32c2.elf APP_ELF_32C6 = $(BUILD_DIR)/$(APP)-esp32c6.elf +APP_ELF_32C61 = $(BUILD_DIR)/$(APP)-esp32c61.elf APP_ELF_32H2 = $(BUILD_DIR)/$(APP)-esp32h2.elf APP_ELF_32P4 = $(BUILD_DIR)/$(APP)-esp32p4.elf APP_ELF_32C5 = $(BUILD_DIR)/$(APP)-esp32c5.elf @@ -34,7 +35,7 @@ APP_ELF_32C5 = $(BUILD_DIR)/$(APP)-esp32c5.elf all: $(APP_ELF_8266) $(APP_ELF_32) $(APP_ELF_32S2) $(APP_ELF_32C3) $(APP_ELF_32S3) $(APP_ELF_32C2) $(APP_ELF_32C6) $(APP_ELF_32H2) $(APP_ELF_32P4) $(APP_ELF_32C5) -esp32: $(APP_ELF_32) $(APP_ELF_32S2) $(APP_ELF_32C3) $(APP_ELF_32S3) $(APP_ELF_32C2) $(APP_ELF_32C6) $(APP_ELF_32H2) $(APP_ELF_32P4) $(APP_ELF_32C5) +esp32: $(APP_ELF_32) $(APP_ELF_32S2) $(APP_ELF_32C3) $(APP_ELF_32S3) $(APP_ELF_32C2) $(APP_ELF_32C6) $(APP_ELF_32C61) $(APP_ELF_32H2) $(APP_ELF_32P4) $(APP_ELF_32C5) $(BUILD_DIR): $(Q) mkdir $@ @@ -80,6 +81,10 @@ $(APP_ELF_32C6): $(SRCS) $(BUILD_DIR) ld/app_32c6.ld @echo " CC(32C6) $^ -> $@" $(Q) $(CROSS_ESPRISCV32)gcc $(CFLAGS_ESPRISCV32) -DESP32C6=1 -Tapp_32c6.ld -Wl,-Map=$(@:.elf=.map) -o $@ $(filter %.c, $^) $(LDLIBS) +$(APP_ELF_32C61): $(SRCS) $(BUILD_DIR) ld/app_32c61.ld + @echo " CC(32C61) $^ -> $@" + $(Q) $(CROSS_ESPRISCV32)gcc $(CFLAGS_ESPRISCV32) -DESP32C61=1 -Tapp_32c61.ld -Wl,-Map=$(@:.elf=.map) -o $@ $(filter %.c, $^) $(LDLIBS) + $(APP_ELF_32H2): $(SRCS) $(BUILD_DIR) ld/app_32h2.ld @echo " CC(32H2) $^ -> $@" $(Q) $(CROSS_ESPRISCV32)gcc $(CFLAGS_ESPRISCV32) -DESP32H2=1 -Tapp_32h2.ld -Wl,-Map=$(@:.elf=.map) -o $@ $(filter %.c, $^) $(LDLIBS) diff --git a/test/images/ram_helloworld/source/ld/app_32c61.ld b/test/images/ram_helloworld/source/ld/app_32c61.ld new file mode 100644 index 000000000..7121cc935 --- /dev/null +++ b/test/images/ram_helloworld/source/ld/app_32c61.ld @@ -0,0 +1,26 @@ +MEMORY { + iram : org = 0x40830000, len = 0x100 + dram : org = 0x40830100, len = 0x100 +} + +ENTRY(ram_main) + +SECTIONS { + .text : ALIGN(4) { + *(.literal) + *(.text .text.*) + } > iram + + .bss : ALIGN(4) { + _bss_start = ABSOLUTE(.); + *(.bss) + _bss_end = ABSOLUTE(.); + } > dram + + .data : ALIGN(4) { + *(.data) + *(.rodata .rodata.*) + } > dram +} + +INCLUDE "../../../../flasher_stub/ld/rom_32c61.ld" diff --git a/test/test_esptool.py b/test/test_esptool.py index 6fae6ba43..03b2114c1 100755 --- a/test/test_esptool.py +++ b/test/test_esptool.py @@ -191,6 +191,7 @@ def run_esptool_process(cmd): "esp32h2", "esp32p4", "esp32c5", + "esp32c61", ] # With U-JS ): port_index = base_cmd.index("--port") + 1 @@ -1277,8 +1278,15 @@ def _test_read_write(self, esp): ]: # find a probably-unused memory type region = esp.get_memory_region(test_region) if region: - # Write at the end of DRAM on ESP32-C2 to avoid overwriting the stub - test_addr = region[1] - 8 if arg_chip == "esp32c2" else region[0] + if arg_chip == "esp32c61": + # Write into the "BYTE_ACCESSIBLE" space and after the stub + region = esp.get_memory_region("DRAM") + test_addr = region[1] - 0x2FFFF + elif arg_chip == "esp32c2": + # Write at the end of DRAM on ESP32-C2 to avoid overwriting the stub + test_addr = region[1] - 8 + else: + test_addr = region[0] break print(f"Using test address {test_addr:#x}") From 669a69f8f8a0256b66f1034d52f587edccea2914 Mon Sep 17 00:00:00 2001 From: Konstantin Kondrashov Date: Fri, 16 Aug 2024 14:38:01 +0300 Subject: [PATCH 09/35] feat(efuse): Updates efuse table for esp32p4 --- espefuse/efuse_defs/esp32p4.yaml | 117 +++++++++++++++---------------- esptool/targets/esp32p4.py | 2 +- 2 files changed, 58 insertions(+), 61 deletions(-) diff --git a/espefuse/efuse_defs/esp32p4.yaml b/espefuse/efuse_defs/esp32p4.yaml index 419e86fd4..e4ffea60d 100644 --- a/espefuse/efuse_defs/esp32p4.yaml +++ b/espefuse/efuse_defs/esp32p4.yaml @@ -1,30 +1,30 @@ -VER_NO: 6b72374c237a3473c8832aadee437405 +VER_NO: d4a48929387e281bd05db8cfb3a85f60 EFUSES: WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 32, start : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS_REG, bloc: 'B0,B1,B2,B3'} RD_DIS : {show: y, blk : 0, word: 1, pos : 0, len : 7, start : 32, type : 'uint:7', wr_dis : 0, rd_dis: null, alt : '', dict : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'} - USB_DEVICE_EXCHG_PINS : {show: y, blk : 0, word: 1, pos : 7, len : 1, start : 39, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Enable usb device exchange pins of D+ and D-, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[7]', bloc: 'B4[7]'} - USB_OTG11_EXCHG_PINS : {show: y, blk : 0, word: 1, pos : 8, len : 1, start : 40, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Enable usb otg11 exchange pins of D+ and D-, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'} - DIS_USB_JTAG : {show: y, blk : 0, word: 1, pos : 9, len : 1, start : 41, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'} + USB_DEVICE_EXCHG_PINS : {show: y, blk : 0, word: 1, pos : 7, len : 1, start : 39, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: Enable usb device exchange pins of D+ and D-, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[7]', bloc: 'B4[7]'} + USB_OTG11_EXCHG_PINS : {show: y, blk : 0, word: 1, pos : 8, len : 1, start : 40, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: Enable usb otg11 exchange pins of D+ and D-, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'} + DIS_USB_JTAG : {show: y, blk : 0, word: 1, pos : 9, len : 1, start : 41, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'} POWERGLITCH_EN : {show: y, blk : 0, word: 1, pos: 10, len : 1, start : 42, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether power glitch function is enabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'} - DIS_USB_SERIAL_JTAG : {show: n, blk : 0, word: 1, pos: 11, len : 1, start : 43, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'} - DIS_FORCE_DOWNLOAD : {show: y, blk : 0, word: 1, pos: 12, len : 1, start : 44, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'} - SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'} - DIS_TWAI : {show: y, blk : 0, word: 1, pos: 14, len : 1, start : 46, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'} - JTAG_SEL_ENABLE : {show: y, blk : 0, word: 1, pos: 15, len : 1, start : 47, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B5[7]'} - SOFT_DIS_JTAG : {show: y, blk : 0, word: 1, pos: 16, len : 3, start : 48, type : 'uint:3', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:16]', bloc: 'B6[2:0]'} - DIS_PAD_JTAG : {show: y, blk : 0, word: 1, pos: 19, len : 1, start : 51, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'} - DIS_DOWNLOAD_MANUAL_ENCRYPT : {show: y, blk : 0, word: 1, pos: 20, len : 1, start : 52, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[20]', bloc: 'B6[4]'} - USB_DEVICE_DREFH : {show: n, blk : 0, word: 1, pos: 21, len : 2, start : 53, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: USB intphy of usb device signle-end input high threshold; 1.76V to 2V. Step by 80mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[22:21]', bloc: 'B6[6:5]'} - USB_OTG11_DREFH : {show: n, blk : 0, word: 1, pos: 23, len : 2, start : 55, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: USB intphy of usb otg11 signle-end input high threshold; 1.76V to 2V. Step by 80mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[24:23]', bloc: 'B6[7],B7[0]'} - USB_PHY_SEL : {show: y, blk : 0, word: 1, pos: 25, len : 1, start : 57, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'} - KM_HUK_GEN_STATE : {show: y, blk : 0, word: 1, pos: 26, len : 9, start : 58, type : 'uint:9', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:26]', bloc: 'B7[7:2],B8[2:0]'} - KM_RND_SWITCH_CYCLE : {show: y, blk : 0, word: 2, pos : 3, len : 2, start : 67, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[4:3]', bloc: 'B8[4:3]'} - KM_DEPLOY_ONLY_ONCE : {show: y, blk : 0, word: 2, pos : 5, len : 4, start : 69, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[8:5]', bloc: 'B8[7:5],B9[0]'} - FORCE_USE_KEY_MANAGER_KEY : {show: y, blk : 0, word: 2, pos : 9, len : 4, start : 73, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key must come from key manager.. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[12:9]', bloc: 'B9[4:1]'} - FORCE_DISABLE_SW_INIT_KEY : {show: y, blk : 0, word: 2, pos: 13, len : 1, start : 77, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable software written init key; and force use efuse_init_key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13]', bloc: 'B9[5]'} - XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 2, pos: 14, len : 1, start : 78, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to configure flash encryption use xts-128 key; else use xts-256 key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'} + DIS_USB_SERIAL_JTAG : {show: n, blk : 0, word: 1, pos: 11, len : 1, start : 43, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'} + DIS_FORCE_DOWNLOAD : {show: y, blk : 0, word: 1, pos: 12, len : 1, start : 44, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'} + SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'} + DIS_TWAI : {show: y, blk : 0, word: 1, pos: 14, len : 1, start : 46, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'} + JTAG_SEL_ENABLE : {show: y, blk : 0, word: 1, pos: 15, len : 1, start : 47, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B5[7]'} + SOFT_DIS_JTAG : {show: y, blk : 0, word: 1, pos: 16, len : 3, start : 48, type : 'uint:3', wr_dis : 31, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:16]', bloc: 'B6[2:0]'} + DIS_PAD_JTAG : {show: y, blk : 0, word: 1, pos: 19, len : 1, start : 51, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'} + DIS_DOWNLOAD_MANUAL_ENCRYPT : {show: y, blk : 0, word: 1, pos: 20, len : 1, start : 52, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[20]', bloc: 'B6[4]'} + USB_DEVICE_DREFH : {show: n, blk : 0, word: 1, pos: 21, len : 2, start : 53, type : 'uint:2', wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: USB intphy of usb device signle-end input high threshold; 1.76V to 2V. Step by 80mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[22:21]', bloc: 'B6[6:5]'} + USB_OTG11_DREFH : {show: n, blk : 0, word: 1, pos: 23, len : 2, start : 55, type : 'uint:2', wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: USB intphy of usb otg11 signle-end input high threshold; 1.76V to 2V. Step by 80mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[24:23]', bloc: 'B6[7],B7[0]'} + USB_PHY_SEL : {show: y, blk : 0, word: 1, pos: 25, len : 1, start : 57, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'} + KM_HUK_GEN_STATE : {show: y, blk : 0, word: 1, pos: 26, len : 9, start : 58, type : 'uint:9', wr_dis : 19, rd_dis: null, alt : '', dict : '', desc: Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:26]', bloc: 'B7[7:2],B8[2:0]'} + KM_RND_SWITCH_CYCLE : {show: y, blk : 0, word: 2, pos : 3, len : 2, start : 67, type : 'uint:2', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[4:3]', bloc: 'B8[4:3]'} + KM_DEPLOY_ONLY_ONCE : {show: y, blk : 0, word: 2, pos : 5, len : 4, start : 69, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[8:5]', bloc: 'B8[7:5],B9[0]'} + FORCE_USE_KEY_MANAGER_KEY : {show: y, blk : 0, word: 2, pos : 9, len : 4, start : 73, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key must come from key manager.. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[12:9]', bloc: 'B9[4:1]'} + FORCE_DISABLE_SW_INIT_KEY : {show: y, blk : 0, word: 2, pos: 13, len : 1, start : 77, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable software written init key; and force use efuse_init_key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13]', bloc: 'B9[5]'} + XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 2, pos: 14, len : 1, start : 78, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: Set this bit to configure flash encryption use xts-128 key; else use xts-256 key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'} RESERVE_0_79 : {show: n, blk : 0, word: 2, pos: 15, len : 1, start : 79, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[15]', bloc: 'B9[7]'} - WDT_DELAY_SEL : {show: y, blk : 0, word: 2, pos: 16, len : 2, start : 80, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[17:16]', bloc: 'B10[1:0]'} + WDT_DELAY_SEL : {show: y, blk : 0, word: 2, pos: 16, len : 2, start : 80, type : 'uint:2', wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[17:16]', bloc: 'B10[1:0]'} SPI_BOOT_CRYPT_CNT : {show: y, blk : 0, word: 2, pos: 18, len : 3, start : 82, type : 'uint:3', wr_dis : 4, rd_dis: null, alt : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: Enables flash encryption when 1 or 3 bits are set and disables otherwise, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[20:18]', bloc: 'B10[4:2]'} SECURE_BOOT_KEY_REVOKE0 : {show: y, blk : 0, word: 2, pos: 21, len : 1, start : 85, type : bool, wr_dis : 5, rd_dis: null, alt : '', dict : '', desc: Revoke 1st secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[21]', bloc: 'B10[5]'} SECURE_BOOT_KEY_REVOKE1 : {show: y, blk : 0, word: 2, pos: 22, len : 1, start : 86, type : bool, wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: Revoke 2nd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[22]', bloc: 'B10[6]'} @@ -35,41 +35,41 @@ EFUSES: KEY_PURPOSE_3 : {show: y, blk : 0, word: 3, pos : 4, len : 4, start: 100, type : 'uint:4', wr_dis : 11, rd_dis: null, alt : KEY3_PURPOSE, dict : '', desc: Represents the purpose of Key3, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[7:4]', bloc: 'B12[7:4]'} KEY_PURPOSE_4 : {show: y, blk : 0, word: 3, pos : 8, len : 4, start: 104, type : 'uint:4', wr_dis : 12, rd_dis: null, alt : KEY4_PURPOSE, dict : '', desc: Represents the purpose of Key4, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[11:8]', bloc: 'B13[3:0]'} KEY_PURPOSE_5 : {show: y, blk : 0, word: 3, pos: 12, len : 4, start: 108, type : 'uint:4', wr_dis : 13, rd_dis: null, alt : KEY5_PURPOSE, dict : '', desc: Represents the purpose of Key5, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[15:12]', bloc: 'B13[7:4]'} - SEC_DPA_LEVEL : {show: y, blk : 0, word: 3, pos: 16, len : 2, start: 112, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents the spa secure level by configuring the clock random divide mode, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[17:16]', bloc: 'B14[1:0]'} - ECDSA_ENABLE_SOFT_K : {show: y, blk : 0, word: 3, pos: 18, len : 1, start: 114, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether hardware random number k is forced used in ESDCA. 1: force used. 0: not force used', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[18]', bloc: 'B14[2]'} - CRYPT_DPA_ENABLE : {show: y, blk : 0, word: 3, pos: 19, len : 1, start: 115, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[19]', bloc: 'B14[3]'} + SEC_DPA_LEVEL : {show: y, blk : 0, word: 3, pos: 16, len : 2, start: 112, type : 'uint:2', wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: Represents the spa secure level by configuring the clock random divide mode, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[17:16]', bloc: 'B14[1:0]'} + ECDSA_ENABLE_SOFT_K : {show: y, blk : 0, word: 3, pos: 18, len : 1, start: 114, type : bool, wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Represents whether hardware random number k is forced used in ESDCA. 1: force used. 0: not force used', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[18]', bloc: 'B14[2]'} + CRYPT_DPA_ENABLE : {show: y, blk : 0, word: 3, pos: 19, len : 1, start: 115, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[19]', bloc: 'B14[3]'} SECURE_BOOT_EN : {show: y, blk : 0, word: 3, pos: 20, len : 1, start: 116, type : bool, wr_dis : 15, rd_dis: null, alt : '', dict : '', desc: 'Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[20]', bloc: 'B14[4]'} - SECURE_BOOT_AGGRESSIVE_REVOKE : {show: y, blk : 0, word: 3, pos: 21, len : 1, start: 117, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21]', bloc: 'B14[5]'} + SECURE_BOOT_AGGRESSIVE_REVOKE : {show: y, blk : 0, word: 3, pos: 21, len : 1, start: 117, type : bool, wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: 'Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21]', bloc: 'B14[5]'} RESERVE_0_118 : {show: n, blk : 0, word: 3, pos: 22, len : 1, start: 118, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[22]', bloc: 'B14[6]'} - FLASH_TYPE : {show: y, blk : 0, word: 3, pos: 23, len : 1, start: 119, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'The type of interfaced flash. 0: four data lines; 1: eight data lines', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[23]', bloc: 'B14[7]'} - FLASH_PAGE_SIZE : {show: y, blk : 0, word: 3, pos: 24, len : 2, start: 120, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set flash page size, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25:24]', bloc: 'B15[1:0]'} - FLASH_ECC_EN : {show: y, blk : 0, word: 3, pos: 26, len : 1, start: 122, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to enable ecc for flash boot, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'} - DIS_USB_OTG_DOWNLOAD_MODE : {show: y, blk : 0, word: 3, pos: 27, len : 1, start: 123, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable download via USB-OTG, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'} - FLASH_TPUW : {show: y, blk : 0, word: 3, pos: 28, len : 4, start: 124, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31:28]', bloc: 'B15[7:4]'} - DIS_DOWNLOAD_MODE : {show: y, blk : 0, word: 4, pos : 0, len : 1, start: 128, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'} - DIS_DIRECT_BOOT : {show: y, blk : 0, word: 4, pos : 1, len : 1, start: 129, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'} - DIS_USB_SERIAL_JTAG_ROM_PRINT : {show: y, blk : 0, word: 4, pos : 2, len : 1, start: 130, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'} - LOCK_KM_KEY : {show: y, blk : 0, word: 4, pos : 3, len : 1, start: 131, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'} - DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: {show: y, blk : 0, word: 4, pos : 4, len : 1, start: 132, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'} - ENABLE_SECURITY_DOWNLOAD : {show: y, blk : 0, word: 4, pos : 5, len : 1, start: 133, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether security download is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'} - UART_PRINT_CONTROL : {show: y, blk : 0, word: 4, pos : 6, len : 2, start: 134, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents the type of UART printing. 00: force enable printing. 01: enable printing when GPIO8 is reset at low level. 10: enable printing when GPIO8 is reset at high level. 11: force disable printing', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[7:6]', bloc: 'B16[7:6]'} - FORCE_SEND_RESUME : {show: y, blk : 0, word: 4, pos : 8, len : 1, start: 136, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[8]', bloc: 'B17[0]'} - SECURE_VERSION : {show: y, blk : 0, word: 4, pos : 9, len : 16, start: 137, type : 'uint:16', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents the version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[24:9]', bloc: 'B17[7:1],B18,B19[0]'} - SECURE_BOOT_DISABLE_FAST_WAKE : {show: y, blk : 0, word: 4, pos: 25, len : 1, start: 153, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'} - HYS_EN_PAD : {show: y, blk : 0, word: 4, pos: 26, len : 1, start: 154, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled. 0:disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'} + FLASH_TYPE : {show: y, blk : 0, word: 3, pos: 23, len : 1, start: 119, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'The type of interfaced flash. 0: four data lines; 1: eight data lines', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[23]', bloc: 'B14[7]'} + FLASH_PAGE_SIZE : {show: y, blk : 0, word: 3, pos: 24, len : 2, start: 120, type : 'uint:2', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Set flash page size, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25:24]', bloc: 'B15[1:0]'} + FLASH_ECC_EN : {show: y, blk : 0, word: 3, pos: 26, len : 1, start: 122, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Set this bit to enable ecc for flash boot, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'} + DIS_USB_OTG_DOWNLOAD_MODE : {show: y, blk : 0, word: 3, pos: 27, len : 1, start: 123, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable download via USB-OTG, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'} + FLASH_TPUW : {show: y, blk : 0, word: 3, pos: 28, len : 4, start: 124, type : 'uint:4', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31:28]', bloc: 'B15[7:4]'} + DIS_DOWNLOAD_MODE : {show: y, blk : 0, word: 4, pos : 0, len : 1, start: 128, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'} + DIS_DIRECT_BOOT : {show: y, blk : 0, word: 4, pos : 1, len : 1, start: 129, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'} + DIS_USB_SERIAL_JTAG_ROM_PRINT : {show: y, blk : 0, word: 4, pos : 2, len : 1, start: 130, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'} + LOCK_KM_KEY : {show: y, blk : 0, word: 4, pos : 3, len : 1, start: 131, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'} + DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: {show: y, blk : 0, word: 4, pos : 4, len : 1, start: 132, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'} + ENABLE_SECURITY_DOWNLOAD : {show: y, blk : 0, word: 4, pos : 5, len : 1, start: 133, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether security download is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'} + UART_PRINT_CONTROL : {show: y, blk : 0, word: 4, pos : 6, len : 2, start: 134, type : 'uint:2', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents the type of UART printing. 00: force enable printing. 01: enable printing when GPIO8 is reset at low level. 10: enable printing when GPIO8 is reset at high level. 11: force disable printing', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[7:6]', bloc: 'B16[7:6]'} + FORCE_SEND_RESUME : {show: y, blk : 0, word: 4, pos : 8, len : 1, start: 136, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[8]', bloc: 'B17[0]'} + SECURE_VERSION : {show: y, blk : 0, word: 4, pos : 9, len : 16, start: 137, type : 'uint:16', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[24:9]', bloc: 'B17[7:1],B18,B19[0]'} + SECURE_BOOT_DISABLE_FAST_WAKE : {show: y, blk : 0, word: 4, pos: 25, len : 1, start: 153, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'} + HYS_EN_PAD : {show: y, blk : 0, word: 4, pos: 26, len : 1, start: 154, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled. 0:disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'} DCDC_VSET : {show: y, blk : 0, word: 4, pos: 27, len : 5, start: 155, type : 'uint:5', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set the dcdc voltage default, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[31:27]', bloc: 'B19[7:3]'} - PXA0_TIEH_SEL_0 : {show: y, blk : 0, word: 5, pos : 0, len : 2, start: 160, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[1:0]', bloc: 'B20[1:0]'} - PXA0_TIEH_SEL_1 : {show: y, blk : 0, word: 5, pos : 2, len : 2, start: 162, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[3:2]', bloc: 'B20[3:2]'} - PXA0_TIEH_SEL_2 : {show: y, blk : 0, word: 5, pos : 4, len : 2, start: 164, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[5:4]', bloc: 'B20[5:4]'} - PXA0_TIEH_SEL_3 : {show: y, blk : 0, word: 5, pos : 6, len : 2, start: 166, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[7:6]', bloc: 'B20[7:6]'} - KM_DISABLE_DEPLOY_MODE : {show: y, blk : 0, word: 5, pos : 8, len : 4, start: 168, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:8]', bloc: 'B21[3:0]'} - USB_DEVICE_DREFL : {show: n, blk : 0, word: 5, pos: 12, len : 2, start: 172, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents the usb device single-end input low threshold; 0.8 V to 1.04 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13:12]', bloc: 'B21[5:4]'} - USB_OTG11_DREFL : {show: n, blk : 0, word: 5, pos: 14, len : 2, start: 174, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents the usb otg11 single-end input low threshold; 0.8 V to 1.04 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[15:14]', bloc: 'B21[7:6]'} + PXA0_TIEH_SEL_0 : {show: y, blk : 0, word: 5, pos : 0, len : 2, start: 160, type : 'uint:2', wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[1:0]', bloc: 'B20[1:0]'} + PXA0_TIEH_SEL_1 : {show: y, blk : 0, word: 5, pos : 2, len : 2, start: 162, type : 'uint:2', wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[3:2]', bloc: 'B20[3:2]'} + PXA0_TIEH_SEL_2 : {show: y, blk : 0, word: 5, pos : 4, len : 2, start: 164, type : 'uint:2', wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[5:4]', bloc: 'B20[5:4]'} + PXA0_TIEH_SEL_3 : {show: y, blk : 0, word: 5, pos : 6, len : 2, start: 166, type : 'uint:2', wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[7:6]', bloc: 'B20[7:6]'} + KM_DISABLE_DEPLOY_MODE : {show: y, blk : 0, word: 5, pos : 8, len : 4, start: 168, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: TBD, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:8]', bloc: 'B21[3:0]'} + USB_DEVICE_DREFL : {show: n, blk : 0, word: 5, pos: 12, len : 2, start: 172, type : 'uint:2', wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: Represents the usb device single-end input low threshold; 0.8 V to 1.04 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13:12]', bloc: 'B21[5:4]'} + USB_OTG11_DREFL : {show: n, blk : 0, word: 5, pos: 14, len : 2, start: 174, type : 'uint:2', wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: Represents the usb otg11 single-end input low threshold; 0.8 V to 1.04 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[15:14]', bloc: 'B21[7:6]'} RESERVE_0_176 : {show: n, blk : 0, word: 5, pos: 16, len : 2, start: 176, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[17:16]', bloc: 'B22[1:0]'} - HP_PWR_SRC_SEL : {show: y, blk : 0, word: 5, pos: 18, len : 1, start: 178, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'HP system power source select. 0:LDO. 1: DCDC', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[18]', bloc: 'B22[2]'} + HP_PWR_SRC_SEL : {show: y, blk : 0, word: 5, pos: 18, len : 1, start: 178, type : bool, wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: 'HP system power source select. 0:LDO. 1: DCDC', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[18]', bloc: 'B22[2]'} DCDC_VSET_EN : {show: y, blk : 0, word: 5, pos: 19, len : 1, start: 179, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Select dcdc vset use efuse_dcdc_vset, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[19]', bloc: 'B22[3]'} - DIS_WDT : {show: y, blk : 0, word: 5, pos: 20, len : 1, start: 180, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable watch dog, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[20]', bloc: 'B22[4]'} - DIS_SWD : {show: y, blk : 0, word: 5, pos: 21, len : 1, start: 181, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable super-watchdog, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[21]', bloc: 'B22[5]'} + DIS_WDT : {show: y, blk : 0, word: 5, pos: 20, len : 1, start: 180, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable watch dog, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[20]', bloc: 'B22[4]'} + DIS_SWD : {show: y, blk : 0, word: 5, pos: 21, len : 1, start: 181, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable super-watchdog, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[21]', bloc: 'B22[5]'} RESERVE_0_182 : {show: n, blk : 0, word: 5, pos: 22, len : 10, start: 182, type : 'uint:10', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[31:22]', bloc: 'B22[7:6],B23'} MAC : {show: y, blk : 1, word: 0, pos : 0, len : 48, start : 0, type : 'bytes:6', wr_dis : 20, rd_dis: null, alt : MAC_FACTORY, dict : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS_0_REG, bloc: 'B0,B1,B2,B3,B4,B5'} RESERVED_1_16 : {show: n, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'uint:16', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the extended bits of MAC address, rloc: 'EFUSE_RD_MAC_SYS_1_REG[31:16]', bloc: 'B6,B7'} @@ -79,14 +79,11 @@ EFUSES: DISABLE_BLK_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 7, len : 1, start : 71, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Disables check of blk version major, rloc: 'EFUSE_RD_MAC_SYS_2_REG[7]', bloc: 'B8[7]'} BLK_VERSION_MINOR : {show: y, blk : 1, word: 2, pos : 8, len : 3, start : 72, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MINOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS_2_REG[10:8]', bloc: 'B9[2:0]'} BLK_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos: 11, len : 2, start : 75, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MAJOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS_2_REG[12:11]', bloc: 'B9[4:3]'} - FLASH_CAP : {show: y, blk : 1, word: 2, pos: 13, len : 3, start : 77, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash capacity, rloc: 'EFUSE_RD_MAC_SYS_2_REG[15:13]', bloc: 'B9[7:5]'} - FLASH_TEMP : {show: y, blk : 1, word: 2, pos: 16, len : 2, start : 80, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash temperature, rloc: 'EFUSE_RD_MAC_SYS_2_REG[17:16]', bloc: 'B10[1:0]'} - FLASH_VENDOR : {show: y, blk : 1, word: 2, pos: 18, len : 3, start : 82, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash vendor, rloc: 'EFUSE_RD_MAC_SYS_2_REG[20:18]', bloc: 'B10[4:2]'} - PSRAM_CAP : {show: y, blk : 1, word: 2, pos: 21, len : 2, start : 85, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PSRAM capacity, rloc: 'EFUSE_RD_MAC_SYS_2_REG[22:21]', bloc: 'B10[6:5]'} - PSRAM_TEMP : {show: y, blk : 1, word: 2, pos: 23, len : 2, start : 87, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PSRAM temperature, rloc: 'EFUSE_RD_MAC_SYS_2_REG[24:23]', bloc: 'B10[7],B11[0]'} - PSRAM_VENDOR : {show: y, blk : 1, word: 2, pos: 25, len : 2, start : 89, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PSRAM vendor, rloc: 'EFUSE_RD_MAC_SYS_2_REG[26:25]', bloc: 'B11[2:1]'} - PKG_VERSION : {show: y, blk : 1, word: 2, pos: 27, len : 3, start : 91, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS_2_REG[29:27]', bloc: 'B11[5:3]'} - RESERVED_1_94 : {show: n, blk : 1, word: 2, pos: 30, len : 2, start : 94, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS_2_REG[31:30]', bloc: 'B11[7:6]'} + PSRAM_CAP : {show: y, blk : 1, word: 2, pos: 13, len : 3, start : 77, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PSRAM capacity, rloc: 'EFUSE_RD_MAC_SYS_2_REG[15:13]', bloc: 'B9[7:5]'} + TEMP : {show: y, blk : 1, word: 2, pos: 16, len : 2, start : 80, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Operating temperature of the ESP chip, rloc: 'EFUSE_RD_MAC_SYS_2_REG[17:16]', bloc: 'B10[1:0]'} + PSRAM_VENDOR : {show: y, blk : 1, word: 2, pos: 18, len : 2, start : 82, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PSRAM vendor, rloc: 'EFUSE_RD_MAC_SYS_2_REG[19:18]', bloc: 'B10[3:2]'} + PKG_VERSION : {show: y, blk : 1, word: 2, pos: 20, len : 3, start : 84, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS_2_REG[22:20]', bloc: 'B10[6:4]'} + RESERVED_1_87 : {show: n, blk : 1, word: 2, pos: 23, len : 9, start : 87, type : 'uint:9', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS_2_REG[31:23]', bloc: 'B10[7],B11'} MAC_RESERVED_2 : {show: n, blk : 1, word: 3, pos : 0, len : 18, start : 96, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS_3_REG[17:0]', bloc: 'B12,B13,B14[1:0]'} SYS_DATA_PART0_0 : {show: n, blk : 1, word: 3, pos: 18, len : 14, start: 114, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the first 14 bits of the zeroth part of system data, rloc: 'EFUSE_RD_MAC_SYS_3_REG[31:18]', bloc: 'B14[7:2],B15'} SYS_DATA_PART0_1 : {show: n, blk : 1, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the first 32 bits of the zeroth part of system data, rloc: EFUSE_RD_MAC_SYS_4_REG, bloc: 'B16,B17,B18,B19'} diff --git a/esptool/targets/esp32p4.py b/esptool/targets/esp32p4.py index 10b8c2e35..0f6e81691 100644 --- a/esptool/targets/esp32p4.py +++ b/esptool/targets/esp32p4.py @@ -105,7 +105,7 @@ class ESP32P4ROM(ESP32ROM): def get_pkg_version(self): num_word = 2 - return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 27) & 0x07 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 20) & 0x07 def get_minor_chip_version(self): num_word = 2 From b3022fabf75d80452cad69a50650c612e2474c4f Mon Sep 17 00:00:00 2001 From: Konstantin Kondrashov Date: Fri, 16 Aug 2024 18:32:16 +0300 Subject: [PATCH 10/35] feat(efuse): Updates efuse table for esp32c5 --- espefuse/efuse_defs/esp32c5.yaml | 63 +++++++++++++++++---------- espefuse/efuse_defs/esp32c5beta3.yaml | 63 +++++++++++++++++---------- esptool/targets/esp32c5.py | 12 +++++ esptool/targets/esp32c5beta3.py | 12 +++++ 4 files changed, 106 insertions(+), 44 deletions(-) diff --git a/espefuse/efuse_defs/esp32c5.yaml b/espefuse/efuse_defs/esp32c5.yaml index 46a9fe7da..31af46a56 100644 --- a/espefuse/efuse_defs/esp32c5.yaml +++ b/espefuse/efuse_defs/esp32c5.yaml @@ -1,4 +1,4 @@ -VER_NO: 64acd55d57b7452dbb6838b7237c795b +VER_NO: b09fa417de505238a601eddce188b696 EFUSES: WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 32, start : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS0_REG, bloc: 'B0,B1,B2,B3'} RD_DIS : {show: y, blk : 0, word: 1, pos : 0, len : 7, start : 32, type : 'uint:7', wr_dis : 0, rd_dis: null, alt : '', dict : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'} @@ -8,7 +8,7 @@ EFUSES: RESERVE_0_42 : {show: n, blk : 0, word: 1, pos: 10, len : 1, start : 42, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'} DIS_USB_SERIAL_JTAG : {show: n, blk : 0, word: 1, pos: 11, len : 1, start : 43, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether USB-Serial-JTAG is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'} DIS_FORCE_DOWNLOAD : {show: y, blk : 0, word: 1, pos: 12, len : 1, start : 44, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function that forces chip into download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'} - SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'} + SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'} DIS_TWAI : {show: y, blk : 0, word: 1, pos: 14, len : 1, start : 46, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether TWAI function is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'} JTAG_SEL_ENABLE : {show: y, blk : 0, word: 1, pos: 15, len : 1, start : 47, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled.\\ 1: enabled\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B5[7]'} SOFT_DIS_JTAG : {show: y, blk : 0, word: 1, pos: 16, len : 3, start : 48, type : 'uint:3', wr_dis : 31, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in soft way.\\ Odd number: disabled\\ Even number: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:16]', bloc: 'B6[2:0]'} @@ -19,11 +19,11 @@ EFUSES: USB_EXCHG_PINS : {show: y, blk : 0, word: 1, pos: 25, len : 1, start : 57, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the D+ and D- pins is exchanged.\\ 1: exchanged\\ 0: not exchanged\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'} VDD_SPI_AS_GPIO : {show: y, blk : 0, word: 1, pos: 26, len : 1, start : 58, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: 'Represents whether vdd spi pin is functioned as gpio.\\ 1: functioned\\ 0: not functioned\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B7[2]'} RESERVE_0_59 : {show: n, blk : 0, word: 1, pos: 27, len : 5, start : 59, type : 'uint:5', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:27]', bloc: 'B7[7:3]'} - KM_DISABLE_DEPLOY_MODE : {show: y, blk : 0, word: 2, pos : 0, len : 4, start : 64, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the deploy mode of key manager is disable or not. \\ 1: disabled \\ 0: enabled.\\', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3:0]', bloc: 'B8[3:0]'} - KM_RND_SWITCH_CYCLE : {show: y, blk : 0, word: 2, pos : 4, len : 2, start : 68, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set the bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[5:4]', bloc: 'B8[5:4]'} - KM_DEPLOY_ONLY_ONCE : {show: y, blk : 0, word: 2, pos : 6, len : 4, start : 70, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:6]', bloc: 'B8[7:6],B9[1:0]'} - FORCE_USE_KEY_MANAGER_KEY : {show: y, blk : 0, word: 2, pos: 10, len : 4, start : 74, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13:10]', bloc: 'B9[5:2]'} - FORCE_DISABLE_SW_INIT_KEY : {show: y, blk : 0, word: 2, pos: 14, len : 1, start : 78, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable software written init key; and force use efuse_init_key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'} + KM_DISABLE_DEPLOY_MODE : {show: y, blk : 0, word: 2, pos : 0, len : 4, start : 64, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the deploy mode of key manager is disable or not. \\ 1: disabled \\ 0: enabled.\\', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3:0]', bloc: 'B8[3:0]'} + KM_RND_SWITCH_CYCLE : {show: y, blk : 0, word: 2, pos : 4, len : 2, start : 68, type : 'uint:2', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set the bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[5:4]', bloc: 'B8[5:4]'} + KM_DEPLOY_ONLY_ONCE : {show: y, blk : 0, word: 2, pos : 6, len : 4, start : 70, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:6]', bloc: 'B8[7:6],B9[1:0]'} + FORCE_USE_KEY_MANAGER_KEY : {show: y, blk : 0, word: 2, pos: 10, len : 4, start : 74, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13:10]', bloc: 'B9[5:2]'} + FORCE_DISABLE_SW_INIT_KEY : {show: y, blk : 0, word: 2, pos: 14, len : 1, start : 78, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable software written init key; and force use efuse_init_key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'} RESERVE_0_79 : {show: n, blk : 0, word: 2, pos: 15, len : 1, start : 79, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[15]', bloc: 'B9[7]'} WDT_DELAY_SEL : {show: y, blk : 0, word: 2, pos: 16, len : 2, start : 80, type : 'uint:2', wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: 'Represents the threshold level of the RTC watchdog STG0 timeout.\\ 0: Original threshold configuration value of STG0 *2 \\1: Original threshold configuration value of STG0 *4 \\2: Original threshold configuration value of STG0 *8 \\3: Original threshold configuration value of STG0 *16 \\', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[17:16]', bloc: 'B10[1:0]'} SPI_BOOT_CRYPT_CNT : {show: y, blk : 0, word: 2, pos: 18, len : 3, start : 82, type : 'uint:3', wr_dis : 4, rd_dis: null, alt : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: Enables flash encryption when 1 or 3 bits are set and disables otherwise, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[20:18]', bloc: 'B10[4:2]'} @@ -41,37 +41,56 @@ EFUSES: SECURE_BOOT_EN : {show: y, blk : 0, word: 3, pos: 20, len : 1, start: 116, type : bool, wr_dis : 15, rd_dis: null, alt : '', dict : '', desc: 'Represents whether secure boot is enabled or disabled.\\ 1: enabled\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[20]', bloc: 'B14[4]'} SECURE_BOOT_AGGRESSIVE_REVOKE : {show: y, blk : 0, word: 3, pos: 21, len : 1, start: 117, type : bool, wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: 'Represents whether revoking aggressive secure boot is enabled or disabled.\\ 1: enabled.\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21]', bloc: 'B14[5]'} RESERVE_0_118 : {show: n, blk : 0, word: 3, pos: 22, len : 5, start: 118, type : 'uint:5', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26:22]', bloc: 'B14[7:6],B15[2:0]'} - KM_XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 3, pos: 27, len : 1, start: 123, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bitto configure flash encryption use xts-128 key. else use xts-256 key, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'} + KM_XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 3, pos: 27, len : 1, start: 123, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: Set this bitto configure flash encryption use xts-128 key. else use xts-256 key, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'} FLASH_TPUW : {show: y, blk : 0, word: 3, pos: 28, len : 4, start: 124, type : 'uint:4', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31:28]', bloc: 'B15[7:4]'} DIS_DOWNLOAD_MODE : {show: y, blk : 0, word: 4, pos : 0, len : 1, start: 128, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether Download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'} DIS_DIRECT_BOOT : {show: y, blk : 0, word: 4, pos : 1, len : 1, start: 129, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether direct boot mode is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'} DIS_USB_SERIAL_JTAG_ROM_PRINT : {show: y, blk : 0, word: 4, pos : 2, len : 1, start: 130, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'} - LOCK_KM_KEY : {show: y, blk : 0, word: 4, pos : 3, len : 1, start: 131, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represetns whether to lock the efuse xts key.\\ 1. Lock\\ 0: Unlock\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'} + LOCK_KM_KEY : {show: y, blk : 0, word: 4, pos : 3, len : 1, start: 131, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represetns whether to lock the efuse xts key.\\ 1. Lock\\ 0: Unlock\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'} DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: {show: y, blk : 0, word: 4, pos : 4, len : 1, start: 132, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled.\\ 1: Disable\\ 0: Enable\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'} ENABLE_SECURITY_DOWNLOAD : {show: y, blk : 0, word: 4, pos : 5, len : 1, start: 133, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether security download is enabled or disabled.\\ 1: enabled\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'} UART_PRINT_CONTROL : {show: y, blk : 0, word: 4, pos : 6, len : 2, start: 134, type : 'uint:2', wr_dis : 18, rd_dis: null, alt : '', dict: '{0: "Enable", 1: "Enable when GPIO8 is low at reset", 2: "Enable when GPIO8 is high at reset", 3: "Disable"}', desc: Set the default UARTboot message output mode, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[7:6]', bloc: 'B16[7:6]'} FORCE_SEND_RESUME : {show: y, blk : 0, word: 4, pos : 8, len : 1, start: 136, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether ROM code is forced to send a resume command during SPI boot.\\ 1: forced\\ 0:not forced\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[8]', bloc: 'B17[0]'} SECURE_VERSION : {show: y, blk : 0, word: 4, pos : 9, len : 16, start: 137, type : 'uint:16', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[24:9]', bloc: 'B17[7:1],B18,B19[0]'} - SECURE_BOOT_DISABLE_FAST_WAKE : {show: y, blk : 0, word: 4, pos: 25, len : 1, start: 153, type : bool, wr_dis : 19, rd_dis: null, alt : '', dict : '', desc: 'Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'} - HYS_EN_PAD : {show: y, blk : 0, word: 4, pos: 26, len : 1, start: 154, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled.\\ 1: enabled\\ 0:disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'} - XTS_DPA_PSEUDO_LEVEL : {show: y, blk : 0, word: 4, pos: 27, len : 2, start: 155, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents the pseudo round level of xts-aes anti-dpa attack.\\ 3: High.\\ 2: Moderate 1. Low\\ 0: Disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28:27]', bloc: 'B19[4:3]'} - XTS_DPA_CLK_ENABLE : {show: y, blk : 0, word: 4, pos: 29, len : 1, start: 157, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether xts-aes anti-dpa attack clock is enabled.\\ 1. Enable.\\ 0: Disable.\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[29]', bloc: 'B19[5]'} + SECURE_BOOT_DISABLE_FAST_WAKE : {show: y, blk : 0, word: 4, pos: 25, len : 1, start: 153, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'} + HYS_EN_PAD : {show: y, blk : 0, word: 4, pos: 26, len : 1, start: 154, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled.\\ 1: enabled\\ 0:disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'} + XTS_DPA_PSEUDO_LEVEL : {show: y, blk : 0, word: 4, pos: 27, len : 2, start: 155, type : 'uint:2', wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents the pseudo round level of xts-aes anti-dpa attack.\\ 3: High.\\ 2: Moderate 1. Low\\ 0: Disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28:27]', bloc: 'B19[4:3]'} + XTS_DPA_CLK_ENABLE : {show: y, blk : 0, word: 4, pos: 29, len : 1, start: 157, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether xts-aes anti-dpa attack clock is enabled.\\ 1. Enable.\\ 0: Disable.\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[29]', bloc: 'B19[5]'} RESERVE_0_158 : {show: n, blk : 0, word: 4, pos: 30, len : 2, start: 158, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[31:30]', bloc: 'B19[7:6]'} - HUK_GEN_STATE : {show: y, blk : 0, word: 5, pos : 0, len : 9, start: 160, type : 'uint:9', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set the bits to control validation of HUK generate mode.\\ Odd of 1 is invalid.\\ Even of 1 is valid.\\, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8:0]', bloc: 'B20,B21[0]'} - XTAL_48M_SEL : {show: y, blk : 0, word: 5, pos : 9, len : 3, start: 169, type : 'uint:3', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether XTAL frequency is 48MHz or not. If not; 40MHz XTAL will be used. If this field contains Odd number bit 1: Enable 48MHz XTAL\ Even number bit 1: Enable 40MHz XTAL', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:9]', bloc: 'B21[3:1]'} - XTAL_48M_SEL_MODE : {show: y, blk : 0, word: 5, pos: 12, len : 1, start: 172, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Specify the XTAL frequency selection is decided by eFuse or strapping-PAD-state. 1: eFuse\\ 0: strapping-PAD-state', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[12]', bloc: 'B21[4]'} - ECDSA_DISABLE_P192 : {show: y, blk : 0, word: 5, pos: 13, len : 1, start: 173, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to disable P192 curve in ECDSA.\\ 1: Disabled.\\ 0: Not disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13]', bloc: 'B21[5]'} - ECC_FORCE_CONST_TIME : {show: y, blk : 0, word: 5, pos: 14, len : 1, start: 174, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to force ecc to use const-time calculation mode. \\ 1: Enable. \\ 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[14]', bloc: 'B21[6]'} + HUK_GEN_STATE : {show: y, blk : 0, word: 5, pos : 0, len : 9, start: 160, type : 'uint:9', wr_dis : 19, rd_dis: null, alt : '', dict : '', desc: Set the bits to control validation of HUK generate mode.\\ Odd of 1 is invalid.\\ Even of 1 is valid.\\, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8:0]', bloc: 'B20,B21[0]'} + XTAL_48M_SEL : {show: y, blk : 0, word: 5, pos : 9, len : 3, start: 169, type : 'uint:3', wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Represents whether XTAL frequency is 48MHz or not. If not; 40MHz XTAL will be used. If this field contains Odd number bit 1: Enable 48MHz XTAL\ Even number bit 1: Enable 40MHz XTAL', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:9]', bloc: 'B21[3:1]'} + XTAL_48M_SEL_MODE : {show: y, blk : 0, word: 5, pos: 12, len : 1, start: 172, type : bool, wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Specify the XTAL frequency selection is decided by eFuse or strapping-PAD-state. 1: eFuse\\ 0: strapping-PAD-state', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[12]', bloc: 'B21[4]'} + ECDSA_DISABLE_P192 : {show: y, blk : 0, word: 5, pos: 13, len : 1, start: 173, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to disable P192 curve in ECDSA.\\ 1: Disabled.\\ 0: Not disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13]', bloc: 'B21[5]'} + ECC_FORCE_CONST_TIME : {show: y, blk : 0, word: 5, pos: 14, len : 1, start: 174, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to force ecc to use const-time calculation mode. \\ 1: Enable. \\ 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[14]', bloc: 'B21[6]'} RESERVE_0_175 : {show: n, blk : 0, word: 5, pos: 15, len : 17, start: 175, type : 'uint:17', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[31:15]', bloc: 'B21[7],B22,B23'} MAC : {show: y, blk : 1, word: 0, pos : 0, len : 48, start : 0, type : 'bytes:6', wr_dis : 20, rd_dis: null, alt : MAC_FACTORY, dict : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS0_REG, bloc: 'B0,B1,B2,B3,B4,B5'} MAC_EXT : {show: y, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'bytes:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the extended bits of MAC address, rloc: 'EFUSE_RD_MAC_SYS1_REG[31:16]', bloc: 'B6,B7'} - MAC_RESERVED_0 : {show: n, blk : 1, word: 2, pos : 0, len : 14, start : 64, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS2_REG[13:0]', bloc: 'B8,B9[5:0]'} - MAC_RESERVED_1 : {show: n, blk : 1, word: 2, pos: 14, len : 18, start : 78, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:14]', bloc: 'B9[7:6],B10,B11'} - MAC_RESERVED_2 : {show: n, blk : 1, word: 3, pos : 0, len : 18, start : 96, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS3_REG[17:0]', bloc: 'B12,B13,B14[1:0]'} + WAFER_VERSION_MINOR : {show: y, blk : 1, word: 2, pos : 0, len : 4, start : 64, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[3:0]', bloc: 'B8[3:0]'} + WAFER_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 4, len : 2, start : 68, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[5:4]', bloc: 'B8[5:4]'} + DISABLE_WAFER_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 6, len : 1, start : 70, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Disables check of wafer version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[6]', bloc: 'B8[6]'} + DISABLE_BLK_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 7, len : 1, start : 71, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Disables check of blk version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[7]', bloc: 'B8[7]'} + BLK_VERSION_MINOR : {show: y, blk : 1, word: 2, pos : 8, len : 3, start : 72, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MINOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[10:8]', bloc: 'B9[2:0]'} + BLK_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos: 11, len : 2, start : 75, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MAJOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[12:11]', bloc: 'B9[4:3]'} + FLASH_CAP : {show: y, blk : 1, word: 2, pos: 13, len : 3, start : 77, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[15:13]', bloc: 'B9[7:5]'} + FLASH_VENDOR : {show: y, blk : 1, word: 2, pos: 16, len : 3, start : 80, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[18:16]', bloc: 'B10[2:0]'} + PSRAM_CAP : {show: y, blk : 1, word: 2, pos: 19, len : 3, start : 83, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Psram capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[21:19]', bloc: 'B10[5:3]'} + PSRAM_VENDOR : {show: y, blk : 1, word: 2, pos: 22, len : 2, start : 86, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Psram vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[23:22]', bloc: 'B10[7:6]'} + TEMP : {show: y, blk : 1, word: 2, pos: 24, len : 2, start : 88, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Temp (die embedded inside), rloc: 'EFUSE_RD_MAC_SYS2_REG[25:24]', bloc: 'B11[1:0]'} + PKG_VERSION : {show: y, blk : 1, word: 2, pos: 26, len : 3, start : 90, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS2_REG[28:26]', bloc: 'B11[4:2]'} + PA_TRIM_VERSION : {show: y, blk : 1, word: 2, pos: 29, len : 3, start : 93, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL PA trim version, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:29]', bloc: 'B11[7:5]'} + TRIM_N_BIAS : {show: y, blk : 1, word: 3, pos : 0, len : 5, start : 96, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL N bias, rloc: 'EFUSE_RD_MAC_SYS3_REG[4:0]', bloc: 'B12[4:0]'} + TRIM_P_BIAS : {show: y, blk : 1, word: 3, pos : 5, len : 5, start: 101, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL P bias, rloc: 'EFUSE_RD_MAC_SYS3_REG[9:5]', bloc: 'B12[7:5],B13[1:0]'} + RESERVED_1_106 : {show: n, blk : 1, word: 3, pos: 10, len : 8, start: 106, type : 'uint:8', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS3_REG[17:10]', bloc: 'B13[7:2],B14[1:0]'} SYS_DATA_PART0_0 : {show: n, blk : 1, word: 3, pos: 18, len : 14, start: 114, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:18]', bloc: 'B14[7:2],B15'} SYS_DATA_PART0_1 : {show: n, blk : 1, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS4_REG, bloc: 'B16,B17,B18,B19'} SYS_DATA_PART0_2 : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the second 32-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS5_REG, bloc: 'B20,B21,B22,B23'} - BLOCK_SYS_DATA1 : {show: y, blk : 2, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: System data part 1 (reserved), rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'} + OPTIONAL_UNIQUE_ID : {show: y, blk : 2, word: 0, pos : 0, len: 128, start : 0, type: 'bytes:16', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'} + RESERVED_2_128 : {show: n, blk : 2, word: 4, pos : 0, len : 9, start: 128, type : 'uint:9', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[8:0]', bloc: 'B16,B17[0]'} + OCODE : {show: y, blk : 2, word: 4, pos : 9, len : 8, start: 137, type : 'uint:8', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC OCode, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[16:9]', bloc: 'B17[7:1],B18[0]'} + RESERVED_2_145 : {show: n, blk : 2, word: 4, pos: 17, len : 15, start: 145, type : 'uint:15', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:17]', bloc: 'B18[7:1],B19'} + SYS_DATA_PART1_5 : {show: n, blk : 2, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA5_REG, bloc: 'B20,B21,B22,B23'} + SYS_DATA_PART1_6 : {show: n, blk : 2, word: 6, pos : 0, len : 32, start: 192, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA6_REG, bloc: 'B24,B25,B26,B27'} + SYS_DATA_PART1_7 : {show: n, blk : 2, word: 7, pos : 0, len : 32, start: 224, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA7_REG, bloc: 'B28,B29,B30,B31'} BLOCK_USR_DATA : {show: y, blk : 3, word: 0, pos : 0, len: 192, start : 0, type: 'bytes:24', wr_dis : 22, rd_dis: null, alt : USER_DATA, dict : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'} RESERVED_3_192 : {show: n, blk : 3, word: 6, pos : 0, len : 8, start: 192, type : 'uint:8', wr_dis : 22, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24} CUSTOM_MAC : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'} diff --git a/espefuse/efuse_defs/esp32c5beta3.yaml b/espefuse/efuse_defs/esp32c5beta3.yaml index 46a9fe7da..31af46a56 100644 --- a/espefuse/efuse_defs/esp32c5beta3.yaml +++ b/espefuse/efuse_defs/esp32c5beta3.yaml @@ -1,4 +1,4 @@ -VER_NO: 64acd55d57b7452dbb6838b7237c795b +VER_NO: b09fa417de505238a601eddce188b696 EFUSES: WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 32, start : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS0_REG, bloc: 'B0,B1,B2,B3'} RD_DIS : {show: y, blk : 0, word: 1, pos : 0, len : 7, start : 32, type : 'uint:7', wr_dis : 0, rd_dis: null, alt : '', dict : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'} @@ -8,7 +8,7 @@ EFUSES: RESERVE_0_42 : {show: n, blk : 0, word: 1, pos: 10, len : 1, start : 42, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'} DIS_USB_SERIAL_JTAG : {show: n, blk : 0, word: 1, pos: 11, len : 1, start : 43, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether USB-Serial-JTAG is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'} DIS_FORCE_DOWNLOAD : {show: y, blk : 0, word: 1, pos: 12, len : 1, start : 44, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function that forces chip into download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'} - SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'} + SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'} DIS_TWAI : {show: y, blk : 0, word: 1, pos: 14, len : 1, start : 46, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether TWAI function is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'} JTAG_SEL_ENABLE : {show: y, blk : 0, word: 1, pos: 15, len : 1, start : 47, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled.\\ 1: enabled\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B5[7]'} SOFT_DIS_JTAG : {show: y, blk : 0, word: 1, pos: 16, len : 3, start : 48, type : 'uint:3', wr_dis : 31, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in soft way.\\ Odd number: disabled\\ Even number: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:16]', bloc: 'B6[2:0]'} @@ -19,11 +19,11 @@ EFUSES: USB_EXCHG_PINS : {show: y, blk : 0, word: 1, pos: 25, len : 1, start : 57, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the D+ and D- pins is exchanged.\\ 1: exchanged\\ 0: not exchanged\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'} VDD_SPI_AS_GPIO : {show: y, blk : 0, word: 1, pos: 26, len : 1, start : 58, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: 'Represents whether vdd spi pin is functioned as gpio.\\ 1: functioned\\ 0: not functioned\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B7[2]'} RESERVE_0_59 : {show: n, blk : 0, word: 1, pos: 27, len : 5, start : 59, type : 'uint:5', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:27]', bloc: 'B7[7:3]'} - KM_DISABLE_DEPLOY_MODE : {show: y, blk : 0, word: 2, pos : 0, len : 4, start : 64, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the deploy mode of key manager is disable or not. \\ 1: disabled \\ 0: enabled.\\', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3:0]', bloc: 'B8[3:0]'} - KM_RND_SWITCH_CYCLE : {show: y, blk : 0, word: 2, pos : 4, len : 2, start : 68, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set the bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[5:4]', bloc: 'B8[5:4]'} - KM_DEPLOY_ONLY_ONCE : {show: y, blk : 0, word: 2, pos : 6, len : 4, start : 70, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:6]', bloc: 'B8[7:6],B9[1:0]'} - FORCE_USE_KEY_MANAGER_KEY : {show: y, blk : 0, word: 2, pos: 10, len : 4, start : 74, type : 'uint:4', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13:10]', bloc: 'B9[5:2]'} - FORCE_DISABLE_SW_INIT_KEY : {show: y, blk : 0, word: 2, pos: 14, len : 1, start : 78, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable software written init key; and force use efuse_init_key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'} + KM_DISABLE_DEPLOY_MODE : {show: y, blk : 0, word: 2, pos : 0, len : 4, start : 64, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the deploy mode of key manager is disable or not. \\ 1: disabled \\ 0: enabled.\\', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3:0]', bloc: 'B8[3:0]'} + KM_RND_SWITCH_CYCLE : {show: y, blk : 0, word: 2, pos : 4, len : 2, start : 68, type : 'uint:2', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set the bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[5:4]', bloc: 'B8[5:4]'} + KM_DEPLOY_ONLY_ONCE : {show: y, blk : 0, word: 2, pos : 6, len : 4, start : 70, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:6]', bloc: 'B8[7:6],B9[1:0]'} + FORCE_USE_KEY_MANAGER_KEY : {show: y, blk : 0, word: 2, pos: 10, len : 4, start : 74, type : 'uint:4', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13:10]', bloc: 'B9[5:2]'} + FORCE_DISABLE_SW_INIT_KEY : {show: y, blk : 0, word: 2, pos: 14, len : 1, start : 78, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: Set this bit to disable software written init key; and force use efuse_init_key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'} RESERVE_0_79 : {show: n, blk : 0, word: 2, pos: 15, len : 1, start : 79, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[15]', bloc: 'B9[7]'} WDT_DELAY_SEL : {show: y, blk : 0, word: 2, pos: 16, len : 2, start : 80, type : 'uint:2', wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: 'Represents the threshold level of the RTC watchdog STG0 timeout.\\ 0: Original threshold configuration value of STG0 *2 \\1: Original threshold configuration value of STG0 *4 \\2: Original threshold configuration value of STG0 *8 \\3: Original threshold configuration value of STG0 *16 \\', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[17:16]', bloc: 'B10[1:0]'} SPI_BOOT_CRYPT_CNT : {show: y, blk : 0, word: 2, pos: 18, len : 3, start : 82, type : 'uint:3', wr_dis : 4, rd_dis: null, alt : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: Enables flash encryption when 1 or 3 bits are set and disables otherwise, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[20:18]', bloc: 'B10[4:2]'} @@ -41,37 +41,56 @@ EFUSES: SECURE_BOOT_EN : {show: y, blk : 0, word: 3, pos: 20, len : 1, start: 116, type : bool, wr_dis : 15, rd_dis: null, alt : '', dict : '', desc: 'Represents whether secure boot is enabled or disabled.\\ 1: enabled\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[20]', bloc: 'B14[4]'} SECURE_BOOT_AGGRESSIVE_REVOKE : {show: y, blk : 0, word: 3, pos: 21, len : 1, start: 117, type : bool, wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: 'Represents whether revoking aggressive secure boot is enabled or disabled.\\ 1: enabled.\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21]', bloc: 'B14[5]'} RESERVE_0_118 : {show: n, blk : 0, word: 3, pos: 22, len : 5, start: 118, type : 'uint:5', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26:22]', bloc: 'B14[7:6],B15[2:0]'} - KM_XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 3, pos: 27, len : 1, start: 123, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set this bitto configure flash encryption use xts-128 key. else use xts-256 key, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'} + KM_XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 3, pos: 27, len : 1, start: 123, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: Set this bitto configure flash encryption use xts-128 key. else use xts-256 key, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'} FLASH_TPUW : {show: y, blk : 0, word: 3, pos: 28, len : 4, start: 124, type : 'uint:4', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31:28]', bloc: 'B15[7:4]'} DIS_DOWNLOAD_MODE : {show: y, blk : 0, word: 4, pos : 0, len : 1, start: 128, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether Download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'} DIS_DIRECT_BOOT : {show: y, blk : 0, word: 4, pos : 1, len : 1, start: 129, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether direct boot mode is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'} DIS_USB_SERIAL_JTAG_ROM_PRINT : {show: y, blk : 0, word: 4, pos : 2, len : 1, start: 130, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'} - LOCK_KM_KEY : {show: y, blk : 0, word: 4, pos : 3, len : 1, start: 131, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represetns whether to lock the efuse xts key.\\ 1. Lock\\ 0: Unlock\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'} + LOCK_KM_KEY : {show: y, blk : 0, word: 4, pos : 3, len : 1, start: 131, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represetns whether to lock the efuse xts key.\\ 1. Lock\\ 0: Unlock\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'} DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: {show: y, blk : 0, word: 4, pos : 4, len : 1, start: 132, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled.\\ 1: Disable\\ 0: Enable\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'} ENABLE_SECURITY_DOWNLOAD : {show: y, blk : 0, word: 4, pos : 5, len : 1, start: 133, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether security download is enabled or disabled.\\ 1: enabled\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'} UART_PRINT_CONTROL : {show: y, blk : 0, word: 4, pos : 6, len : 2, start: 134, type : 'uint:2', wr_dis : 18, rd_dis: null, alt : '', dict: '{0: "Enable", 1: "Enable when GPIO8 is low at reset", 2: "Enable when GPIO8 is high at reset", 3: "Disable"}', desc: Set the default UARTboot message output mode, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[7:6]', bloc: 'B16[7:6]'} FORCE_SEND_RESUME : {show: y, blk : 0, word: 4, pos : 8, len : 1, start: 136, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether ROM code is forced to send a resume command during SPI boot.\\ 1: forced\\ 0:not forced\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[8]', bloc: 'B17[0]'} SECURE_VERSION : {show: y, blk : 0, word: 4, pos : 9, len : 16, start: 137, type : 'uint:16', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[24:9]', bloc: 'B17[7:1],B18,B19[0]'} - SECURE_BOOT_DISABLE_FAST_WAKE : {show: y, blk : 0, word: 4, pos: 25, len : 1, start: 153, type : bool, wr_dis : 19, rd_dis: null, alt : '', dict : '', desc: 'Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'} - HYS_EN_PAD : {show: y, blk : 0, word: 4, pos: 26, len : 1, start: 154, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled.\\ 1: enabled\\ 0:disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'} - XTS_DPA_PSEUDO_LEVEL : {show: y, blk : 0, word: 4, pos: 27, len : 2, start: 155, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents the pseudo round level of xts-aes anti-dpa attack.\\ 3: High.\\ 2: Moderate 1. Low\\ 0: Disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28:27]', bloc: 'B19[4:3]'} - XTS_DPA_CLK_ENABLE : {show: y, blk : 0, word: 4, pos: 29, len : 1, start: 157, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether xts-aes anti-dpa attack clock is enabled.\\ 1. Enable.\\ 0: Disable.\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[29]', bloc: 'B19[5]'} + SECURE_BOOT_DISABLE_FAST_WAKE : {show: y, blk : 0, word: 4, pos: 25, len : 1, start: 153, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'} + HYS_EN_PAD : {show: y, blk : 0, word: 4, pos: 26, len : 1, start: 154, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled.\\ 1: enabled\\ 0:disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'} + XTS_DPA_PSEUDO_LEVEL : {show: y, blk : 0, word: 4, pos: 27, len : 2, start: 155, type : 'uint:2', wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents the pseudo round level of xts-aes anti-dpa attack.\\ 3: High.\\ 2: Moderate 1. Low\\ 0: Disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28:27]', bloc: 'B19[4:3]'} + XTS_DPA_CLK_ENABLE : {show: y, blk : 0, word: 4, pos: 29, len : 1, start: 157, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether xts-aes anti-dpa attack clock is enabled.\\ 1. Enable.\\ 0: Disable.\\', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[29]', bloc: 'B19[5]'} RESERVE_0_158 : {show: n, blk : 0, word: 4, pos: 30, len : 2, start: 158, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[31:30]', bloc: 'B19[7:6]'} - HUK_GEN_STATE : {show: y, blk : 0, word: 5, pos : 0, len : 9, start: 160, type : 'uint:9', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Set the bits to control validation of HUK generate mode.\\ Odd of 1 is invalid.\\ Even of 1 is valid.\\, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8:0]', bloc: 'B20,B21[0]'} - XTAL_48M_SEL : {show: y, blk : 0, word: 5, pos : 9, len : 3, start: 169, type : 'uint:3', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether XTAL frequency is 48MHz or not. If not; 40MHz XTAL will be used. If this field contains Odd number bit 1: Enable 48MHz XTAL\ Even number bit 1: Enable 40MHz XTAL', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:9]', bloc: 'B21[3:1]'} - XTAL_48M_SEL_MODE : {show: y, blk : 0, word: 5, pos: 12, len : 1, start: 172, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Specify the XTAL frequency selection is decided by eFuse or strapping-PAD-state. 1: eFuse\\ 0: strapping-PAD-state', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[12]', bloc: 'B21[4]'} - ECDSA_DISABLE_P192 : {show: y, blk : 0, word: 5, pos: 13, len : 1, start: 173, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to disable P192 curve in ECDSA.\\ 1: Disabled.\\ 0: Not disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13]', bloc: 'B21[5]'} - ECC_FORCE_CONST_TIME : {show: y, blk : 0, word: 5, pos: 14, len : 1, start: 174, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to force ecc to use const-time calculation mode. \\ 1: Enable. \\ 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[14]', bloc: 'B21[6]'} + HUK_GEN_STATE : {show: y, blk : 0, word: 5, pos : 0, len : 9, start: 160, type : 'uint:9', wr_dis : 19, rd_dis: null, alt : '', dict : '', desc: Set the bits to control validation of HUK generate mode.\\ Odd of 1 is invalid.\\ Even of 1 is valid.\\, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8:0]', bloc: 'B20,B21[0]'} + XTAL_48M_SEL : {show: y, blk : 0, word: 5, pos : 9, len : 3, start: 169, type : 'uint:3', wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Represents whether XTAL frequency is 48MHz or not. If not; 40MHz XTAL will be used. If this field contains Odd number bit 1: Enable 48MHz XTAL\ Even number bit 1: Enable 40MHz XTAL', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:9]', bloc: 'B21[3:1]'} + XTAL_48M_SEL_MODE : {show: y, blk : 0, word: 5, pos: 12, len : 1, start: 172, type : bool, wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Specify the XTAL frequency selection is decided by eFuse or strapping-PAD-state. 1: eFuse\\ 0: strapping-PAD-state', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[12]', bloc: 'B21[4]'} + ECDSA_DISABLE_P192 : {show: y, blk : 0, word: 5, pos: 13, len : 1, start: 173, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to disable P192 curve in ECDSA.\\ 1: Disabled.\\ 0: Not disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13]', bloc: 'B21[5]'} + ECC_FORCE_CONST_TIME : {show: y, blk : 0, word: 5, pos: 14, len : 1, start: 174, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to force ecc to use const-time calculation mode. \\ 1: Enable. \\ 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[14]', bloc: 'B21[6]'} RESERVE_0_175 : {show: n, blk : 0, word: 5, pos: 15, len : 17, start: 175, type : 'uint:17', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[31:15]', bloc: 'B21[7],B22,B23'} MAC : {show: y, blk : 1, word: 0, pos : 0, len : 48, start : 0, type : 'bytes:6', wr_dis : 20, rd_dis: null, alt : MAC_FACTORY, dict : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS0_REG, bloc: 'B0,B1,B2,B3,B4,B5'} MAC_EXT : {show: y, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'bytes:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the extended bits of MAC address, rloc: 'EFUSE_RD_MAC_SYS1_REG[31:16]', bloc: 'B6,B7'} - MAC_RESERVED_0 : {show: n, blk : 1, word: 2, pos : 0, len : 14, start : 64, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS2_REG[13:0]', bloc: 'B8,B9[5:0]'} - MAC_RESERVED_1 : {show: n, blk : 1, word: 2, pos: 14, len : 18, start : 78, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:14]', bloc: 'B9[7:6],B10,B11'} - MAC_RESERVED_2 : {show: n, blk : 1, word: 3, pos : 0, len : 18, start : 96, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS3_REG[17:0]', bloc: 'B12,B13,B14[1:0]'} + WAFER_VERSION_MINOR : {show: y, blk : 1, word: 2, pos : 0, len : 4, start : 64, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[3:0]', bloc: 'B8[3:0]'} + WAFER_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 4, len : 2, start : 68, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[5:4]', bloc: 'B8[5:4]'} + DISABLE_WAFER_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 6, len : 1, start : 70, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Disables check of wafer version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[6]', bloc: 'B8[6]'} + DISABLE_BLK_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 7, len : 1, start : 71, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Disables check of blk version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[7]', bloc: 'B8[7]'} + BLK_VERSION_MINOR : {show: y, blk : 1, word: 2, pos : 8, len : 3, start : 72, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MINOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[10:8]', bloc: 'B9[2:0]'} + BLK_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos: 11, len : 2, start : 75, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MAJOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[12:11]', bloc: 'B9[4:3]'} + FLASH_CAP : {show: y, blk : 1, word: 2, pos: 13, len : 3, start : 77, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[15:13]', bloc: 'B9[7:5]'} + FLASH_VENDOR : {show: y, blk : 1, word: 2, pos: 16, len : 3, start : 80, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[18:16]', bloc: 'B10[2:0]'} + PSRAM_CAP : {show: y, blk : 1, word: 2, pos: 19, len : 3, start : 83, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Psram capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[21:19]', bloc: 'B10[5:3]'} + PSRAM_VENDOR : {show: y, blk : 1, word: 2, pos: 22, len : 2, start : 86, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Psram vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[23:22]', bloc: 'B10[7:6]'} + TEMP : {show: y, blk : 1, word: 2, pos: 24, len : 2, start : 88, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Temp (die embedded inside), rloc: 'EFUSE_RD_MAC_SYS2_REG[25:24]', bloc: 'B11[1:0]'} + PKG_VERSION : {show: y, blk : 1, word: 2, pos: 26, len : 3, start : 90, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS2_REG[28:26]', bloc: 'B11[4:2]'} + PA_TRIM_VERSION : {show: y, blk : 1, word: 2, pos: 29, len : 3, start : 93, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL PA trim version, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:29]', bloc: 'B11[7:5]'} + TRIM_N_BIAS : {show: y, blk : 1, word: 3, pos : 0, len : 5, start : 96, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL N bias, rloc: 'EFUSE_RD_MAC_SYS3_REG[4:0]', bloc: 'B12[4:0]'} + TRIM_P_BIAS : {show: y, blk : 1, word: 3, pos : 5, len : 5, start: 101, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL P bias, rloc: 'EFUSE_RD_MAC_SYS3_REG[9:5]', bloc: 'B12[7:5],B13[1:0]'} + RESERVED_1_106 : {show: n, blk : 1, word: 3, pos: 10, len : 8, start: 106, type : 'uint:8', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS3_REG[17:10]', bloc: 'B13[7:2],B14[1:0]'} SYS_DATA_PART0_0 : {show: n, blk : 1, word: 3, pos: 18, len : 14, start: 114, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:18]', bloc: 'B14[7:2],B15'} SYS_DATA_PART0_1 : {show: n, blk : 1, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS4_REG, bloc: 'B16,B17,B18,B19'} SYS_DATA_PART0_2 : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the second 32-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS5_REG, bloc: 'B20,B21,B22,B23'} - BLOCK_SYS_DATA1 : {show: y, blk : 2, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: System data part 1 (reserved), rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'} + OPTIONAL_UNIQUE_ID : {show: y, blk : 2, word: 0, pos : 0, len: 128, start : 0, type: 'bytes:16', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'} + RESERVED_2_128 : {show: n, blk : 2, word: 4, pos : 0, len : 9, start: 128, type : 'uint:9', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[8:0]', bloc: 'B16,B17[0]'} + OCODE : {show: y, blk : 2, word: 4, pos : 9, len : 8, start: 137, type : 'uint:8', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC OCode, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[16:9]', bloc: 'B17[7:1],B18[0]'} + RESERVED_2_145 : {show: n, blk : 2, word: 4, pos: 17, len : 15, start: 145, type : 'uint:15', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:17]', bloc: 'B18[7:1],B19'} + SYS_DATA_PART1_5 : {show: n, blk : 2, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA5_REG, bloc: 'B20,B21,B22,B23'} + SYS_DATA_PART1_6 : {show: n, blk : 2, word: 6, pos : 0, len : 32, start: 192, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA6_REG, bloc: 'B24,B25,B26,B27'} + SYS_DATA_PART1_7 : {show: n, blk : 2, word: 7, pos : 0, len : 32, start: 224, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA7_REG, bloc: 'B28,B29,B30,B31'} BLOCK_USR_DATA : {show: y, blk : 3, word: 0, pos : 0, len: 192, start : 0, type: 'bytes:24', wr_dis : 22, rd_dis: null, alt : USER_DATA, dict : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'} RESERVED_3_192 : {show: n, blk : 3, word: 6, pos : 0, len : 8, start: 192, type : 'uint:8', wr_dis : 22, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24} CUSTOM_MAC : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'} diff --git a/esptool/targets/esp32c5.py b/esptool/targets/esp32c5.py index fc3d486c1..c47a229b0 100644 --- a/esptool/targets/esp32c5.py +++ b/esptool/targets/esp32c5.py @@ -97,6 +97,18 @@ class ESP32C5ROM(ESP32C6ROM): 12: "KM_INIT_KEY", } + def get_pkg_version(self): + num_word = 3 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x07 + + def get_minor_chip_version(self): + num_word = 3 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F + + def get_major_chip_version(self): + num_word = 3 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03 + def get_chip_description(self): chip_name = { 0: "ESP32-C5", diff --git a/esptool/targets/esp32c5beta3.py b/esptool/targets/esp32c5beta3.py index fd7795b3c..156dd99e7 100644 --- a/esptool/targets/esp32c5beta3.py +++ b/esptool/targets/esp32c5beta3.py @@ -59,6 +59,18 @@ class ESP32C5BETA3ROM(ESP32C6ROM): 12: "KM_INIT_KEY", } + def get_pkg_version(self): + num_word = 3 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x07 + + def get_minor_chip_version(self): + num_word = 3 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F + + def get_major_chip_version(self): + num_word = 3 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03 + def get_chip_description(self): chip_name = { 0: "ESP32-C5 beta3 (QFN40)", From 04045d6dcb241e11bc0112d87960ed70cc50901f Mon Sep 17 00:00:00 2001 From: Alfonso Acosta Date: Wed, 17 Jul 2024 01:27:21 +0200 Subject: [PATCH 11/35] feat(esptool): Add option to retry connection in a loop `esptool` frequently fails when trying to open the serial port of a device which deep-sleeps often: $ esptool.py --chip esp32s3 -p /dev/cu.usbmodem6101 [...] write_flash foo.bin Serial port /dev/cu.usbmodem6101 A fatal error occurred: Could not open /dev/cu.usbmodem6101, the port is busy or doesn't exist. ([Errno 35] Could not exclusively lock port [...]: [Errno 35] Resource temporarily unavailable) This makes developers add unnecessarily long sleeps when the main CPU is awake, in order to give `esptool` the chance to find the serial port. This PR adds a new env variable `DEFAULT_OPEN_PORT_ATTEMPTS` and cfg file entry `retry_open_serial` which attempts to open the port selected number of times (optionaly indefinitely) until the device shows up: $ export DEFAULT_OPEN_PORT_ATTEMPTS=1 $ esptool.py --chip esp32s3 -p /dev/cu.usbmodem6101 [...] write_flash foo.bin Serial port /dev/cu.usbmodem6101 [Errno 35] Could not exclusively lock port [...]: [Errno 35] Resource temporarily unavailable Retrying to open port ......................... Connecting.... Chip is ESP32-S3 (QFN56) (revision v0.2) [...] Closes https://github.com/espressif/esptool/pull/995 --- docs/en/esptool/advanced-options.rst | 21 +++++++ docs/en/esptool/configuration-file.rst | 4 +- esptool/__init__.py | 77 +++++++++++++++++++++++++- esptool/config.py | 1 + esptool/loader.py | 2 + 5 files changed, 103 insertions(+), 2 deletions(-) diff --git a/docs/en/esptool/advanced-options.rst b/docs/en/esptool/advanced-options.rst index 2851eac22..db47b8aa0 100644 --- a/docs/en/esptool/advanced-options.rst +++ b/docs/en/esptool/advanced-options.rst @@ -36,6 +36,27 @@ The ``--after`` argument allows you to specify whether the chip should be reset * ``--after no_reset`` leaves the chip in the serial bootloader, no reset is performed. * ``--after no_reset_stub`` leaves the chip in the stub bootloader, no reset is performed. + +Connect Loop +------------ + +Esptool supports connection loops, where the user can specify how many times to try to open a port. The delay between retries is 0.1 seconds. This can be useful for example when the chip is in deep sleep or esptool was started before the chip was connected to the PC. A connection loop can be created by setting the ``ESPTOOL_OPEN_PORT_ATTEMPTS`` environment variable. +This feature can also be enabled by using the ``open_port_attempts`` configuration option, for more details regarding config options see :ref:`Configuration file ` section. +There are 3 possible values for this option: + +.. list:: + + * ``0`` will keep trying to connect to the chip indefinitely + * ``1`` will try to connect to the chip only once (default) + * ``N`` will try to connect to the chip N times + + +.. note:: + + This option is only available if both the ``--port`` and ``--chip`` arguments are set. + + + .. _disable_stub: Disabling the Stub Loader diff --git a/docs/en/esptool/configuration-file.rst b/docs/en/esptool/configuration-file.rst index c538c608a..1583f86d1 100644 --- a/docs/en/esptool/configuration-file.rst +++ b/docs/en/esptool/configuration-file.rst @@ -78,7 +78,7 @@ Sample configuration file: Options ------- -Complete list configurable options: +Complete list of configurable options: +------------------------------+-----------------------------------------------------------+----------+ | Option | Description | Default | @@ -107,6 +107,8 @@ Complete list configurable options: +------------------------------+-----------------------------------------------------------+----------+ | reset_delay | Time to wait before the boot pin is released after reset | 0.05 s | +------------------------------+-----------------------------------------------------------+----------+ +| open_port_attempts | Number of attempts to open the port (0 - infinite) | 1 | ++------------------------------+-----------------------------------------------------------+----------+ | custom_reset_sequence | Custom reset sequence for resetting into the bootloader | | +------------------------------+-----------------------------------------------------------+----------+ diff --git a/esptool/__init__.py b/esptool/__init__.py index 46dad3582..4aa5c85ec 100644 --- a/esptool/__init__.py +++ b/esptool/__init__.py @@ -66,7 +66,13 @@ write_mem, ) from esptool.config import load_config_file -from esptool.loader import DEFAULT_CONNECT_ATTEMPTS, StubFlasher, ESPLoader, list_ports +from esptool.loader import ( + DEFAULT_CONNECT_ATTEMPTS, + DEFAULT_OPEN_PORT_ATTEMPTS, + StubFlasher, + ESPLoader, + list_ports, +) from esptool.targets import CHIP_DEFS, CHIP_LIST, ESP32ROM from esptool.util import ( FatalError, @@ -74,6 +80,7 @@ flash_size_bytes, strip_chip_name, ) +from itertools import chain, cycle, repeat import serial @@ -763,6 +770,27 @@ def add_spi_flash_subparsers( print("Found %d serial ports" % len(ser_list)) else: ser_list = [args.port] + open_port_attempts = os.environ.get( + "ESPTOOL_OPEN_PORT_ATTEMPTS", DEFAULT_OPEN_PORT_ATTEMPTS + ) + try: + open_port_attempts = int(open_port_attempts) + except ValueError: + raise SystemExit("Invalid value for ESPTOOL_OPEN_PORT_ATTEMPTS") + if open_port_attempts != 1: + if args.port is None or args.chip == "auto": + print( + "WARNING: The ESPTOOL_OPEN_PORT_ATTEMPTS (open_port_attempts) option can only be used with --port and --chip arguments." + ) + else: + esp = esp or connect_loop( + args.port, + initial_baud, + args.chip, + open_port_attempts, + args.trace, + args.before, + ) esp = esp or get_default_connected_device( ser_list, port=args.port, @@ -1092,6 +1120,53 @@ def expand_file_arguments(argv): return argv +def connect_loop( + port: str, + initial_baud: int, + chip: str, + max_retries: int, + trace: bool = False, + before: str = "default_reset", +): + chip_class = CHIP_DEFS[chip] + esp = None + print(f"Serial port {port}") + + first = True + ten_cycle = cycle(chain(repeat(False, 9), (True,))) + retry_loop = chain( + repeat(False, max_retries - 1), (True,) if max_retries else cycle((False,)) + ) + + for last, every_tenth in zip(retry_loop, ten_cycle): + try: + esp = chip_class(port, initial_baud, trace) + if not first: + # break the retrying line + print("") + esp.connect(before) + return esp + except ( + FatalError, + serial.serialutil.SerialException, + IOError, + OSError, + ) as err: + if esp and esp._port: + esp._port.close() + esp = None + if first: + print(err) + print("Retrying failed connection", end="", flush=True) + first = False + if last: + raise err + if every_tenth: + # print a dot every second + print(".", end="", flush=True) + time.sleep(0.1) + + def get_default_connected_device( serial_list, port, diff --git a/esptool/config.py b/esptool/config.py index 5566becca..ebbe3b8ee 100644 --- a/esptool/config.py +++ b/esptool/config.py @@ -19,6 +19,7 @@ "connect_attempts", "write_block_attempts", "reset_delay", + "open_port_attempts", "custom_reset_sequence", ] diff --git a/esptool/loader.py b/esptool/loader.py index 8e033b08b..934685934 100644 --- a/esptool/loader.py +++ b/esptool/loader.py @@ -98,6 +98,8 @@ DEFAULT_CONNECT_ATTEMPTS = cfg.getint("connect_attempts", 7) # Number of times to try writing a data block WRITE_BLOCK_ATTEMPTS = cfg.getint("write_block_attempts", 3) +# Number of times to try opening the serial port +DEFAULT_OPEN_PORT_ATTEMPTS = cfg.getint("open_port_attempts", 1) def timeout_per_mb(seconds_per_mb, size_bytes): From 92b2c68e27aa5ea80bfadefaaf1c88f8988d801b Mon Sep 17 00:00:00 2001 From: Peter Dragun Date: Mon, 26 Aug 2024 13:03:45 +0200 Subject: [PATCH 12/35] test: add test for 'open_port_attempts' config option --- test/test_esptool.py | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/test/test_esptool.py b/test/test_esptool.py index 03b2114c1..979d24e7c 100755 --- a/test/test_esptool.py +++ b/test/test_esptool.py @@ -1513,3 +1513,20 @@ def test_custom_reset_sequence(self): output = self.run_esptool_error("flash_id") assert f"Loaded custom configuration from {config_file_path}" in output assert 'Invalid "custom_reset_sequence" option format:' in output + + def test_open_port_attempts(self): + # Test that the open_port_attempts option is loaded correctly + connect_attempts = 5 + config = ( + "[esptool]\n" + f"open_port_attempts = {connect_attempts}\n" + "connect_attempts = 1\n" + "custom_reset_sequence = D0\n" # Invalid reset sequence to make sure connection fails + ) + config_file_path = os.path.join(os.getcwd(), "esptool.cfg") + with self.ConfigFile(config_file_path, config): + output = self.run_esptool_error("flash_id") + assert f"Loaded custom configuration from {config_file_path}" in output + assert "Retrying failed connection" in output + for _ in range(connect_attempts): + assert "Connecting........" in output From 9b24215d69190fe2f40b8220538e0d91fb72dc01 Mon Sep 17 00:00:00 2001 From: Jakub Kocka Date: Fri, 16 Aug 2024 14:16:42 +0200 Subject: [PATCH 13/35] refactor: Migrated esp_rfc2217_server into standalone subpackage This change solves the issues when running on Windows --- .pre-commit-config.yaml | 2 +- esp_rfc2217_server.py | 317 +++---------------------- esp_rfc2217_server/__init__.py | 124 ++++++++++ esp_rfc2217_server/__main__.py | 9 + esp_rfc2217_server/esp_port_manager.py | 97 ++++++++ esp_rfc2217_server/redirector.py | 89 +++++++ setup.py | 2 +- 7 files changed, 352 insertions(+), 288 deletions(-) mode change 100755 => 100644 esp_rfc2217_server.py create mode 100644 esp_rfc2217_server/__init__.py create mode 100644 esp_rfc2217_server/__main__.py create mode 100644 esp_rfc2217_server/esp_port_manager.py create mode 100644 esp_rfc2217_server/redirector.py diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 6e4b8a9d7..f51e25955 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -17,7 +17,7 @@ repos: - id: mypy additional_dependencies: ['types-PyYAML<=6.0.12.12'] # ignore wrapper scripts because of name colision with efuse/__init__.py etc. - exclude: test/|docs/|espefuse.py|espsecure.py|esptool.py + exclude: test/|docs/|espefuse.py|espsecure.py|esptool.py|esp_rfc2217_server.py - repo: https://github.com/codespell-project/codespell rev: v2.2.5 hooks: diff --git a/esp_rfc2217_server.py b/esp_rfc2217_server.py old mode 100755 new mode 100644 index 7beaa610b..4d9724759 --- a/esp_rfc2217_server.py +++ b/esp_rfc2217_server.py @@ -1,9 +1,16 @@ #!/usr/bin/env python - -# SPDX-FileCopyrightText: 2009-2015 Chris Liechti -# SPDX-FileContributor: 2020-2022 Espressif Systems (Shanghai) CO LTD -# SPDX-License-Identifier: BSD-3-Clause # +# SPDX-FileCopyrightText: 2014-2024 Fredrik Ahlberg, Angus Gratton, +# Espressif Systems (Shanghai) CO LTD, other contributors as noted. +# +# SPDX-License-Identifier: BSD-3-Clause + +# This executable script is a thin wrapper around the main functionality +# in the esp_rfc2217_server Python package + +# When updating this script, please also update esptool.py, espefuse.py and espsecure.py + +################################################################################### # Redirect data from a TCP/IP connection to a serial port and vice versa using RFC 2217. # # This is a modified version of rfc2217_server.py provided by the pyserial package @@ -21,291 +28,29 @@ # # esptool.py --port rfc2217://localhost:4000?ign_set_control flash_id # -################################################################################### -# redirect data from a TCP/IP connection to a serial port and vice versa -# using RFC 2217 -# -# (C) 2009-2015 Chris Liechti -# -# SPDX-License-Identifier: BSD-3-Clause -import logging +import contextlib import os -import socket import sys -import threading -import time - -from esptool.config import load_config_file -from esptool.reset import ( - ClassicReset, - CustomReset, - DEFAULT_RESET_DELAY, - HardReset, - UnixTightReset, -) - -import serial -import serial.rfc2217 -from serial.rfc2217 import ( - COM_PORT_OPTION, - SET_CONTROL, - SET_CONTROL_DTR_OFF, - SET_CONTROL_DTR_ON, - SET_CONTROL_RTS_OFF, - SET_CONTROL_RTS_ON, -) - -cfg, _ = load_config_file(verbose=True) -cfg = cfg["esptool"] - - -class EspPortManager(serial.rfc2217.PortManager): - """ - The beginning of the reset sequence is detected and the proper reset sequence - is applied in a thread. The rest of the reset sequence received is just ignored - and not sent to the serial port. - """ - - def __init__(self, serial_port, connection, esp32r0_delay, logger=None): - self.esp32r0_delay = esp32r0_delay - self.is_download_mode = False - super(EspPortManager, self).__init__(serial_port, connection, logger) - - def _telnet_process_subnegotiation(self, suboption): - if suboption[0:1] == COM_PORT_OPTION and suboption[1:2] == SET_CONTROL: - if suboption[2:3] == SET_CONTROL_DTR_OFF: - self.is_download_mode = False - self.serial.dtr = False - return - elif suboption[2:3] == SET_CONTROL_RTS_OFF and not self.is_download_mode: - reset_thread = threading.Thread(target=self._hard_reset_thread) - reset_thread.daemon = True - reset_thread.name = "hard_reset_thread" - reset_thread.start() - return - elif suboption[2:3] == SET_CONTROL_DTR_ON and not self.is_download_mode: - self.is_download_mode = True - reset_thread = threading.Thread(target=self._reset_thread) - reset_thread.daemon = True - reset_thread.name = "reset_thread" - reset_thread.start() - return - elif suboption[2:3] in [ - SET_CONTROL_DTR_ON, - SET_CONTROL_RTS_ON, - SET_CONTROL_RTS_OFF, - ]: - return - # only in cases not handled above do the original implementation in PortManager - super(EspPortManager, self)._telnet_process_subnegotiation(suboption) - - def _hard_reset_thread(self): - """ - The reset logic used for hard resetting the chip. - """ - if self.logger: - self.logger.info("Activating hard reset in thread") - HardReset(self.serial)() - - def _reset_thread(self): - """ - The reset logic is used from esptool.py because the RTS and DTR signals - cannot be retransmitted through RFC 2217 with proper timing. - """ - if self.logger: - self.logger.info("Activating reset in thread") - - delay = DEFAULT_RESET_DELAY - if self.esp32r0_delay: - delay += 0.5 - - cfg_custom_reset_sequence = cfg.get("custom_reset_sequence") - if cfg_custom_reset_sequence is not None: - CustomReset(self.serial, cfg_custom_reset_sequence)() - elif os.name != "nt": - UnixTightReset(self.serial, delay)() - else: - ClassicReset(self.serial, delay)() - - -class Redirector(object): - def __init__(self, serial_instance, socket, debug=False, esp32r0delay=False): - self.serial = serial_instance - self.socket = socket - self._write_lock = threading.Lock() - self.rfc2217 = EspPortManager( - self.serial, - self, - esp32r0delay, - logger=logging.getLogger("rfc2217.server") if debug else None, - ) - self.log = logging.getLogger("redirector") - - def statusline_poller(self): - self.log.debug("status line poll thread started") - while self.alive: - time.sleep(1) - self.rfc2217.check_modem_lines() - self.log.debug("status line poll thread terminated") - - def shortcircuit(self): - """connect the serial port to the TCP port by copying everything - from one side to the other""" - self.alive = True - self.thread_read = threading.Thread(target=self.reader) - self.thread_read.daemon = True - self.thread_read.name = "serial->socket" - self.thread_read.start() - self.thread_poll = threading.Thread(target=self.statusline_poller) - self.thread_poll.daemon = True - self.thread_poll.name = "status line poll" - self.thread_poll.start() - self.writer() - - def reader(self): - """loop forever and copy serial->socket""" - self.log.debug("reader thread started") - while self.alive: - try: - data = self.serial.read(self.serial.in_waiting or 1) - if data: - # escape outgoing data when needed (Telnet IAC (0xff) character) - self.write(b"".join(self.rfc2217.escape(data))) - except socket.error as msg: - self.log.error("{}".format(msg)) - # probably got disconnected - break - self.alive = False - self.log.debug("reader thread terminated") - - def write(self, data): - """thread safe socket write with no data escaping. used to send telnet stuff""" - with self._write_lock: - self.socket.sendall(data) - - def writer(self): - """loop forever and copy socket->serial""" - while self.alive: - try: - data = self.socket.recv(1024) - if not data: - break - self.serial.write(b"".join(self.rfc2217.filter(data))) - except socket.error as msg: - self.log.error("{}".format(msg)) - # probably got disconnected - break - self.stop() - - def stop(self): - """Stop copying""" - self.log.debug("stopping") - if self.alive: - self.alive = False - self.thread_read.join() - self.thread_poll.join() - - -def main(): - import argparse - - parser = argparse.ArgumentParser( - description="RFC 2217 Serial to Network (TCP/IP) redirector.", - epilog="NOTE: no security measures are implemented. " - "Anyone can remotely connect to this service over the network.\n" - "Only one connection at once is supported. " - "When the connection is terminated it waits for the next connect.", - ) - - parser.add_argument("SERIALPORT") - - parser.add_argument( - "-p", - "--localport", - type=int, - help="local TCP port, default: %(default)s", - metavar="TCPPORT", - default=2217, - ) - - parser.add_argument( - "-v", - "--verbose", - dest="verbosity", - action="count", - help="print more diagnostic messages (option can be given multiple times)", - default=0, - ) - - parser.add_argument( - "--r0", - help="Use delays necessary for ESP32 revision 0 chips", - action="store_true", - ) - - args = parser.parse_args() - - if args.verbosity > 3: - args.verbosity = 3 - level = (logging.WARNING, logging.INFO, logging.DEBUG, logging.NOTSET)[ - args.verbosity - ] - logging.basicConfig(level=logging.INFO) - # logging.getLogger('root').setLevel(logging.INFO) - logging.getLogger("rfc2217").setLevel(level) - - # connect to serial port - ser = serial.serial_for_url(args.SERIALPORT, do_not_open=True, exclusive=True) - ser.timeout = 3 # required so that the reader thread can exit - # reset control line as no _remote_ "terminal" has been connected yet - ser.dtr = False - ser.rts = False - - logging.info("RFC 2217 TCP/IP to Serial redirector - type Ctrl-C / BREAK to quit") - - try: - ser.open() - except serial.SerialException as e: - logging.error("Could not open serial port {}: {}".format(ser.name, e)) - sys.exit(1) - - logging.info("Serving serial port: {}".format(ser.name)) - settings = ser.get_settings() - - srv = socket.socket(socket.AF_INET, socket.SOCK_STREAM) - srv.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1) - srv.bind(("", args.localport)) - srv.listen(1) - logging.info("TCP/IP port: {}".format(args.localport)) - while True: - try: - client_socket, addr = srv.accept() - logging.info("Connected by {}:{}".format(addr[0], addr[1])) - client_socket.setsockopt(socket.IPPROTO_TCP, socket.TCP_NODELAY, 1) - ser.rts = True - ser.dtr = True - # enter network <-> serial loop - r = Redirector(ser, client_socket, args.verbosity > 0, args.r0) - try: - r.shortcircuit() - finally: - logging.info("Disconnected") - r.stop() - client_socket.close() - ser.dtr = False - ser.rts = False - # Restore port settings (may have been changed by RFC 2217 - # capable client) - ser.apply_settings(settings) - except KeyboardInterrupt: - sys.stdout.write("\n") - break - except socket.error as msg: - logging.error(str(msg)) - - logging.info("--- exit ---") +if os.name != "nt": + # Linux/macOS: remove current script directory to avoid importing this file + # as a module; we want to import the installed esp_rfc2217_server module instead + with contextlib.suppress(ValueError): + executable_dir = os.path.dirname(sys.executable) + sys.path = [ + path + for path in sys.path + if not path.endswith(("/bin", "/sbin")) and path != executable_dir + ] + + # Linux/macOS: delete imported module entry to force Python to load + # the module from scratch; this enables importing esp_rfc2217_server module in + # other Python scripts + with contextlib.suppress(KeyError): + del sys.modules["esp_rfc2217_server"] + +import esp_rfc2217_server if __name__ == "__main__": - main() + esp_rfc2217_server.main() diff --git a/esp_rfc2217_server/__init__.py b/esp_rfc2217_server/__init__.py new file mode 100644 index 000000000..4c489ec28 --- /dev/null +++ b/esp_rfc2217_server/__init__.py @@ -0,0 +1,124 @@ +# SPDX-FileCopyrightText: 2009-2015 Chris Liechti +# SPDX-FileContributor: 2020-2024 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: BSD-3-Clause +# +# Redirect data from a TCP/IP connection to a serial port and vice versa using RFC 2217. + +################################################################################### +# redirect data from a TCP/IP connection to a serial port and vice versa +# using RFC 2217 +# +# (C) 2009-2015 Chris Liechti +# +# SPDX-License-Identifier: BSD-3-Clause + +import logging +import socket +import sys +import serial + +from esp_rfc2217_server.redirector import Redirector + + +def main(): + import argparse + + parser = argparse.ArgumentParser( + description="RFC 2217 Serial to Network (TCP/IP) redirector.", + epilog="NOTE: no security measures are implemented. " + "Anyone can remotely connect to this service over the network.\n" + "Only one connection at once is supported. " + "When the connection is terminated it waits for the next connect.", + ) + + parser.add_argument("SERIALPORT") + + parser.add_argument( + "-p", + "--localport", + type=int, + help="local TCP port, default: %(default)s", + metavar="TCPPORT", + default=2217, + ) + + parser.add_argument( + "-v", + "--verbose", + dest="verbosity", + action="count", + help="print more diagnostic messages (option can be given multiple times)", + default=0, + ) + + parser.add_argument( + "--r0", + help="Use delays necessary for ESP32 revision 0 chips", + action="store_true", + ) + + args = parser.parse_args() + + if args.verbosity > 3: + args.verbosity = 3 + level = (logging.WARNING, logging.INFO, logging.DEBUG, logging.NOTSET)[ + args.verbosity + ] + logging.basicConfig(level=logging.INFO) + # logging.getLogger('root').setLevel(logging.INFO) + logging.getLogger("rfc2217").setLevel(level) + + # connect to serial port + ser = serial.serial_for_url(args.SERIALPORT, do_not_open=True, exclusive=True) + ser.timeout = 3 # required so that the reader thread can exit + # reset control line as no _remote_ "terminal" has been connected yet + ser.dtr = False + ser.rts = False + + logging.info(" RFC 2217 TCP/IP to Serial redirector - type Ctrl-C / BREAK to quit") + + try: + ser.open() + except serial.SerialException as e: + logging.error(" Could not open serial port {}: {}".format(ser.name, e)) + sys.exit(1) + + logging.info(" Serving serial port: {}".format(ser.name)) + settings = ser.get_settings() + + srv = socket.socket(socket.AF_INET, socket.SOCK_STREAM) + srv.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1) + srv.bind(("", args.localport)) + srv.listen(1) + logging.info(" TCP/IP port: {}".format(args.localport)) + while True: + try: + client_socket, addr = srv.accept() + logging.info("Connected by {}:{}".format(addr[0], addr[1])) + client_socket.setsockopt(socket.IPPROTO_TCP, socket.TCP_NODELAY, 1) + ser.rts = True + ser.dtr = True + # enter network <-> serial loop + r = Redirector(ser, client_socket, args.verbosity > 0, args.r0) + try: + r.shortcircuit() + finally: + logging.info("Disconnected") + r.stop() + client_socket.close() + ser.dtr = False + ser.rts = False + # Restore port settings (may have been changed by RFC 2217 + # capable client) + ser.apply_settings(settings) + except KeyboardInterrupt: + sys.stdout.write("\n") + break + except socket.error as msg: + logging.error(str(msg)) + + logging.info("--- exit ---") + + +if __name__ == "__main__": + main() diff --git a/esp_rfc2217_server/__main__.py b/esp_rfc2217_server/__main__.py new file mode 100644 index 000000000..2f041e64c --- /dev/null +++ b/esp_rfc2217_server/__main__.py @@ -0,0 +1,9 @@ +# SPDX-FileCopyrightText: 2014-2024 Fredrik Ahlberg, Angus Gratton, +# Espressif Systems (Shanghai) CO LTD, other contributors as noted. +# +# SPDX-License-Identifier: BSD-3-Clause + +import esp_rfc2217_server + +if __name__ == "__main__": + esp_rfc2217_server.main() diff --git a/esp_rfc2217_server/esp_port_manager.py b/esp_rfc2217_server/esp_port_manager.py new file mode 100644 index 000000000..29f104638 --- /dev/null +++ b/esp_rfc2217_server/esp_port_manager.py @@ -0,0 +1,97 @@ +# SPDX-FileCopyrightText: 2014-2024 Fredrik Ahlberg, Angus Gratton, +# Espressif Systems (Shanghai) CO LTD, other contributors as noted. +# +# SPDX-License-Identifier: BSD-3-Clause +import os +import threading +from esptool.reset import ( + ClassicReset, + CustomReset, + DEFAULT_RESET_DELAY, + HardReset, + UnixTightReset, +) +import serial +import serial.rfc2217 +from serial.rfc2217 import ( + COM_PORT_OPTION, + SET_CONTROL, + SET_CONTROL_DTR_OFF, + SET_CONTROL_DTR_ON, + SET_CONTROL_RTS_OFF, + SET_CONTROL_RTS_ON, +) + +from esptool.config import load_config_file + +cfg, _ = load_config_file(verbose=True) +cfg = cfg["esptool"] + + +class EspPortManager(serial.rfc2217.PortManager): + """ + The beginning of the reset sequence is detected and the proper reset sequence + is applied in a thread. The rest of the reset sequence received is just ignored + and not sent to the serial port. + """ + + def __init__(self, serial_port, connection, esp32r0_delay, logger=None): + self.esp32r0_delay = esp32r0_delay + self.is_download_mode = False + super(EspPortManager, self).__init__(serial_port, connection, logger) + + def _telnet_process_subnegotiation(self, suboption): + if suboption[0:1] == COM_PORT_OPTION and suboption[1:2] == SET_CONTROL: + if suboption[2:3] == SET_CONTROL_DTR_OFF: + self.is_download_mode = False + self.serial.dtr = False + return + elif suboption[2:3] == SET_CONTROL_RTS_OFF and not self.is_download_mode: + reset_thread = threading.Thread(target=self._hard_reset_thread) + reset_thread.daemon = True + reset_thread.name = "hard_reset_thread" + reset_thread.start() + return + elif suboption[2:3] == SET_CONTROL_DTR_ON and not self.is_download_mode: + self.is_download_mode = True + reset_thread = threading.Thread(target=self._reset_thread) + reset_thread.daemon = True + reset_thread.name = "reset_thread" + reset_thread.start() + return + elif suboption[2:3] in [ + SET_CONTROL_DTR_ON, + SET_CONTROL_RTS_ON, + SET_CONTROL_RTS_OFF, + ]: + return + # only in cases not handled above do the original implementation in PortManager + super(EspPortManager, self)._telnet_process_subnegotiation(suboption) + + def _hard_reset_thread(self): + """ + The reset logic used for hard resetting the chip. + """ + if self.logger: + self.logger.info("Activating hard reset in thread") + HardReset(self.serial)() + + def _reset_thread(self): + """ + The reset logic is used from esptool.py because the RTS and DTR signals + cannot be retransmitted through RFC 2217 with proper timing. + """ + if self.logger: + self.logger.info("Activating reset in thread") + + delay = DEFAULT_RESET_DELAY + if self.esp32r0_delay: + delay += 0.5 + + cfg_custom_reset_sequence = cfg.get("custom_reset_sequence") + if cfg_custom_reset_sequence is not None: + CustomReset(self.serial, cfg_custom_reset_sequence)() + elif os.name != "nt": + UnixTightReset(self.serial, delay)() + else: + ClassicReset(self.serial, delay)() diff --git a/esp_rfc2217_server/redirector.py b/esp_rfc2217_server/redirector.py new file mode 100644 index 000000000..aa2c643a2 --- /dev/null +++ b/esp_rfc2217_server/redirector.py @@ -0,0 +1,89 @@ +# SPDX-FileCopyrightText: 2014-2024 Fredrik Ahlberg, Angus Gratton, +# Espressif Systems (Shanghai) CO LTD, other contributors as noted. +# +# SPDX-License-Identifier: BSD-3-Clause +import threading +import time +import logging +import socket + +from esp_rfc2217_server.esp_port_manager import EspPortManager + + +class Redirector(object): + def __init__(self, serial_instance, socket, debug=False, esp32r0delay=False): + self.serial = serial_instance + self.socket = socket + self._write_lock = threading.Lock() + self.rfc2217 = EspPortManager( + self.serial, + self, + esp32r0delay, + logger=logging.getLogger("rfc2217.server") if debug else None, + ) + self.log = logging.getLogger("redirector") + self.force_exit = False + + def statusline_poller(self): + self.log.debug("status line poll thread started") + while self.alive: + time.sleep(1) + self.rfc2217.check_modem_lines() + self.log.debug("status line poll thread terminated") + + def shortcircuit(self): + """connect the serial port to the TCP port by copying everything + from one side to the other""" + self.alive = True + self.thread_read = threading.Thread(target=self.reader) + self.thread_read.daemon = True + self.thread_read.name = "serial->socket" + self.thread_read.start() + self.thread_poll = threading.Thread(target=self.statusline_poller) + self.thread_poll.daemon = True + self.thread_poll.name = "status line poll" + self.thread_poll.start() + self.writer() + + def reader(self): + """loop forever and copy serial->socket""" + self.log.debug("reader thread started") + while self.alive: + try: + data = self.serial.read(self.serial.in_waiting or 1) + if data: + # escape outgoing data when needed (Telnet IAC (0xff) character) + self.write(b"".join(self.rfc2217.escape(data))) + except socket.error as msg: + self.log.error("{}".format(msg)) + # probably got disconnected + break + self.alive = False + self.log.debug("reader thread terminated") + + def write(self, data): + """thread safe socket write with no data escaping. used to send telnet stuff""" + with self._write_lock: + self.socket.sendall(data) + + def writer(self): + """loop forever and copy socket->serial""" + while self.alive: + try: + data = self.socket.recv(1024) + if not data: + break + self.serial.write(b"".join(self.rfc2217.filter(data))) + except socket.error as msg: + self.log.error("{}".format(msg)) + # probably got disconnected + break + self.stop() + + def stop(self): + """Stop copying""" + self.log.debug("stopping") + if self.alive: + self.alive = False + self.thread_read.join() + self.thread_poll.join() diff --git a/setup.py b/setup.py index 0655e3c19..0ba809921 100644 --- a/setup.py +++ b/setup.py @@ -11,7 +11,7 @@ "esptool.py=esptool.__init__:_main", "espsecure.py=espsecure.__init__:_main", "espefuse.py=espefuse.__init__:_main", - "esp_rfc2217_server.py=esp_rfc2217_server:main", + "esp_rfc2217_server.py=esp_rfc2217_server.__init__:main", ], } From 4f7e22391c7415cf12deddcfe96836cb516f9914 Mon Sep 17 00:00:00 2001 From: Jakub Kocka Date: Fri, 2 Aug 2024 10:45:44 +0200 Subject: [PATCH 14/35] fix(bitstring): Restricted bitstring dependency to fix 32-bit compatibility --- .github/workflows/build_esptool.yml | 2 ++ pyproject.toml | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/.github/workflows/build_esptool.yml b/.github/workflows/build_esptool.yml index 850abd344..4e11ab7a0 100644 --- a/.github/workflows/build_esptool.yml +++ b/.github/workflows/build_esptool.yml @@ -92,6 +92,8 @@ jobs: if: startsWith(github.ref, 'refs/tags/') && !(contains(github.ref_name, 'dev')) needs: build-esptool-binaries runs-on: ubuntu-latest + env: + PIP_EXTRA_INDEX_URL: "https://dl.espressif.com/pypi" permissions: contents: write steps: diff --git a/pyproject.toml b/pyproject.toml index 640127ce1..f23cda366 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -33,7 +33,7 @@ dynamic = ["version", "scripts"] dependencies = [ - "bitstring>=3.1.6", + "bitstring>=3.1.6,!=4.2.0", "cryptography>=2.1.4", "ecdsa>=0.16.0", "pyserial>=3.3", From 92143ed1460bd94133ed9f0ffdf44a4566a31f17 Mon Sep 17 00:00:00 2001 From: Xiao Xufeng Date: Sat, 27 Jul 2024 02:02:20 +0800 Subject: [PATCH 15/35] feat(esptool): add new command SFDP read --- docs/en/esptool/advanced-commands.rst | 12 ++++++++++++ docs/en/esptool/basic-commands.rst | 1 + esptool/__init__.py | 9 +++++++++ esptool/cmds.py | 17 ++++++++++++++++- esptool/loader.py | 7 ++++++- esptool/targets/esp32c3.py | 2 ++ esptool/targets/esp32p4.py | 2 ++ esptool/targets/esp32s2.py | 2 ++ esptool/targets/esp32s3.py | 2 ++ test/test_esptool.py | 8 ++++++++ 10 files changed, 60 insertions(+), 2 deletions(-) diff --git a/docs/en/esptool/advanced-commands.rst b/docs/en/esptool/advanced-commands.rst index caa54c5e4..905739ba2 100644 --- a/docs/en/esptool/advanced-commands.rst +++ b/docs/en/esptool/advanced-commands.rst @@ -120,6 +120,18 @@ A second option ``--non-volatile`` can be used in order to send a ``WREN`` (06h) Setting status bits (particularly non-volatile ones) can have permanent side effects for some flash chips, so check carefully before using this command to set any bits! +.. _read-flash-sfdp: + +Read Serial Flash Discoverable Parameters (SFDP) +------------------------------------------------ + +The Serial Flash Discoverable Parameters (SFDP) store essential vendor-specific configuration data of the flash memory chip. These parameters help identify and interact with different flash devices. Usage: + +:: + esptool.py read_flash_sfdp 16 4 + +This will read 4 bytes from SFDP address 16. + .. only:: esp8266 .. _chip-id: diff --git a/docs/en/esptool/basic-commands.rst b/docs/en/esptool/basic-commands.rst index c92804583..8e16df7b4 100644 --- a/docs/en/esptool/basic-commands.rst +++ b/docs/en/esptool/basic-commands.rst @@ -338,6 +338,7 @@ The following commands are less commonly used, or only of interest to advanced u * :ref:`read-mem-write-mem` * :ref:`read-flash-status` * :ref:`write-flash-status` + * :ref:`read-flash-sfdp` :esp8266: * :ref:`chip-id` :esp8266: * :ref:`make-image` :esp8266: * :ref:`run` diff --git a/esptool/__init__.py b/esptool/__init__.py index 4aa5c85ec..d4dad9151 100644 --- a/esptool/__init__.py +++ b/esptool/__init__.py @@ -49,6 +49,7 @@ erase_flash, erase_region, flash_id, + read_flash_sfdp, get_security_info, image_info, load_ram, @@ -627,6 +628,14 @@ def add_spi_flash_subparsers( type=arg_auto_size, ) + parser_read_flash_sfdp = subparsers.add_parser( + "read_flash_sfdp", + help="Read SPI flash SFDP (Serial Flash Discoverable Parameters)", + ) + add_spi_flash_subparsers(parser_read_flash_sfdp, allow_keep=True, auto_detect=True) + parser_read_flash_sfdp.add_argument("addr", type=arg_auto_int) + parser_read_flash_sfdp.add_argument("bytes", type=int) + parser_merge_bin = subparsers.add_parser( "merge_bin", help="Merge multiple raw binary files into a single file for later flashing", diff --git a/esptool/cmds.py b/esptool/cmds.py index 1bc4059c5..864bde0c3 100644 --- a/esptool/cmds.py +++ b/esptool/cmds.py @@ -1164,7 +1164,7 @@ def run(esp, args): esp.run() -def flash_id(esp, args): +def detect_flash_id(esp): flash_id = esp.flash_id() print("Manufacturer: %02x" % (flash_id & 0xFF)) flid_lowbyte = (flash_id >> 16) & 0xFF @@ -1172,6 +1172,10 @@ def flash_id(esp, args): print( "Detected flash size: %s" % (DETECTED_FLASH_SIZES.get(flid_lowbyte, "Unknown")) ) + + +def flash_id(esp, args): + detect_flash_id(esp) flash_type = esp.flash_type() flash_type_dict = {0: "quad (4 data lines)", 1: "octal (8 data lines)"} flash_type_str = flash_type_dict.get(flash_type) @@ -1180,6 +1184,17 @@ def flash_id(esp, args): esp.get_flash_voltage() +def read_flash_sfdp(esp, args): + detect_flash_id(esp) + + sfdp = esp.read_spiflash_sfdp(args.addr, args.bytes * 8) + print(f"SFDP[{args.addr}..{args.addr+args.bytes-1}]: ", end="") + for i in range(args.bytes): + print(f"{sfdp&0xff:02X} ", end="") + sfdp = sfdp >> 8 + print() + + def read_flash(esp, args): if args.no_progress: flash_progress = None diff --git a/esptool/loader.py b/esptool/loader.py index 934685934..8f0813668 100644 --- a/esptool/loader.py +++ b/esptool/loader.py @@ -268,6 +268,9 @@ class ESPLoader(object): UART_DATE_REG_ADDR = 0x60000078 + # Whether the SPI peripheral sends from MSB of 32-bit register, or the MSB of valid LSB bits. + SPI_ADDR_REG_MSB = True + # This ROM address has a different value on each chip model CHIP_DETECT_MAGIC_REG_ADDR = 0x40001000 @@ -1392,7 +1395,9 @@ def set_data_lengths(mosi_bits, miso_bits): self.write_reg( SPI_USR2_REG, (7 << SPI_USR2_COMMAND_LEN_SHIFT) | spiflash_command ) - if addr and addr_len > 0: + if addr_len > 0: + if self.SPI_ADDR_REG_MSB: + addr = addr << (32 - addr_len) self.write_reg(SPI_ADDR_REG, addr) if data_bits == 0: self.write_reg(SPI_W0_REG, 0) # clear data register before we read it diff --git a/esptool/targets/esp32c3.py b/esptool/targets/esp32c3.py index 23364fb31..beb88656c 100644 --- a/esptool/targets/esp32c3.py +++ b/esptool/targets/esp32c3.py @@ -28,6 +28,8 @@ class ESP32C3ROM(ESP32ROM): SPI_MISO_DLEN_OFFS = 0x28 SPI_W0_OFFS = 0x58 + SPI_ADDR_REG_MSB = False + BOOTLOADER_FLASH_OFFSET = 0x0 # Magic values for ESP32-C3 eco 1+2, eco 3, eco 6, and eco 7 respectively diff --git a/esptool/targets/esp32p4.py b/esptool/targets/esp32p4.py index 0f6e81691..2b0a06498 100644 --- a/esptool/targets/esp32p4.py +++ b/esptool/targets/esp32p4.py @@ -38,6 +38,8 @@ class ESP32P4ROM(ESP32ROM): SPI_MISO_DLEN_OFFS = 0x28 SPI_W0_OFFS = 0x58 + SPI_ADDR_REG_MSB = False + EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030 # BLOCK0 read base address EFUSE_PURPOSE_KEY0_REG = EFUSE_BASE + 0x34 diff --git a/esptool/targets/esp32s2.py b/esptool/targets/esp32s2.py index 8feabc82a..e16f532f0 100644 --- a/esptool/targets/esp32s2.py +++ b/esptool/targets/esp32s2.py @@ -32,6 +32,8 @@ class ESP32S2ROM(ESP32ROM): SPI_MISO_DLEN_OFFS = 0x28 SPI_W0_OFFS = 0x58 + SPI_ADDR_REG_MSB = False + MAC_EFUSE_REG = 0x3F41A044 # ESP32-S2 has special block for MAC efuses UART_CLKDIV_REG = 0x3F400014 diff --git a/esptool/targets/esp32s3.py b/esptool/targets/esp32s3.py index 8894a30c2..fb0f23a2f 100644 --- a/esptool/targets/esp32s3.py +++ b/esptool/targets/esp32s3.py @@ -35,6 +35,8 @@ class ESP32S3ROM(ESP32ROM): SPI_MISO_DLEN_OFFS = 0x28 SPI_W0_OFFS = 0x58 + SPI_ADDR_REG_MSB = False + BOOTLOADER_FLASH_OFFSET = 0x0 SUPPORTS_ENCRYPTED_FLASH = True diff --git a/test/test_esptool.py b/test/test_esptool.py index 979d24e7c..604a1b8e6 100755 --- a/test/test_esptool.py +++ b/test/test_esptool.py @@ -841,6 +841,14 @@ def test_flash_size(self): for line in lines: assert "embedded flash" not in line.lower() + @pytest.mark.quick_test + def test_flash_sfdp(self): + """Test manufacturer and device response of flash detection.""" + res = self.run_esptool("read_flash_sfdp 0 4") + assert "SFDP[0..3]: 53 46 44 50" in res + res = self.run_esptool("read_flash_sfdp 1 3") + assert "SFDP[1..3]: 46 44 50 " in res + @pytest.mark.skipif( os.getenv("ESPTOOL_TEST_SPI_CONN") is None, reason="Needs external flash" From 1f1e2c253139631d2d1a2f732bbc9648d6079fa7 Mon Sep 17 00:00:00 2001 From: Peter Dragun Date: Thu, 22 Aug 2024 15:32:55 +0200 Subject: [PATCH 16/35] ci: fix github actions for dev release --- .github/workflows/dev_release_esptool_pypi.yml | 2 +- .github/workflows/release_esptool_pypi.yml | 2 +- .github/workflows/test_esptool.yml | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.github/workflows/dev_release_esptool_pypi.yml b/.github/workflows/dev_release_esptool_pypi.yml index 61cd63038..8f12e6846 100644 --- a/.github/workflows/dev_release_esptool_pypi.yml +++ b/.github/workflows/dev_release_esptool_pypi.yml @@ -23,7 +23,7 @@ jobs: - name: Install dependencies run: | python -m pip install --upgrade pip - python -m pip install twine setuptools + python -m pip install twine 'setuptools>=64' - name: Create development release ${{ github.ref_name }} env: diff --git a/.github/workflows/release_esptool_pypi.yml b/.github/workflows/release_esptool_pypi.yml index cd0c01bb0..8268e24d1 100644 --- a/.github/workflows/release_esptool_pypi.yml +++ b/.github/workflows/release_esptool_pypi.yml @@ -20,7 +20,7 @@ jobs: - name: Install dependencies run: | python -m pip install --upgrade pip - pip install setuptools twine + pip install 'setuptools>=64' twine - name: Build and upload esptool ${{ github.event.release.tag_name }} env: TWINE_USERNAME: __token__ diff --git a/.github/workflows/test_esptool.yml b/.github/workflows/test_esptool.yml index adc4a3b0c..597c029b4 100644 --- a/.github/workflows/test_esptool.yml +++ b/.github/workflows/test_esptool.yml @@ -22,7 +22,7 @@ jobs: - name: Install dependencies run: | python -m pip install --upgrade pip - pip install setuptools + pip install 'setuptools>=64' - name: SoftHSM2 setup run: | From 28556fbc4aa447a9d1467158c62e4c5cdd7206d2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Wed, 28 Aug 2024 13:19:25 +0200 Subject: [PATCH 17/35] fix(remote_ports): Disable reset sequence when a socket is used Closes https://github.com/espressif/esp-idf/issues/14200 --- esptool/loader.py | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/esptool/loader.py b/esptool/loader.py index 8f0813668..a1b4d59a9 100644 --- a/esptool/loader.py +++ b/esptool/loader.py @@ -708,6 +708,14 @@ def connect( "Connection may fail if the chip is not in bootloader " "or flasher stub mode.", ) + + if self._port.name.startswith("socket:"): + mode = "no_reset" # not possible to toggle DTR/RTS over a TCP socket + print( + "Note: It's not possible to reset the chip over a TCP socket. " + "Resetting to bootloader has been disabled." + ) + print("Connecting...", end="") sys.stdout.flush() last_error = None From 1693449497797a5ae6ed6bac6ce63765fb35d3ff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Wed, 28 Aug 2024 13:28:26 +0200 Subject: [PATCH 18/35] fix(write_flash): Verify if files will fit against the real flash size when possible --- esptool/cmds.py | 33 ++++++++++++++++++++++----------- esptool/loader.py | 3 ++- 2 files changed, 24 insertions(+), 12 deletions(-) diff --git a/esptool/cmds.py b/esptool/cmds.py index 864bde0c3..4948c9890 100644 --- a/esptool/cmds.py +++ b/esptool/cmds.py @@ -478,19 +478,32 @@ def write_flash(esp, args): "Use --force to override the warning." ) - # verify file sizes fit in flash - flash_end = flash_size_bytes( - detect_flash_size(esp) if args.flash_size == "keep" else args.flash_size + set_flash_size = ( + flash_size_bytes(args.flash_size) + if args.flash_size not in ["detect", "keep"] + else None ) - if flash_end is not None: # Not in secure download mode + if esp.secure_download_mode: + flash_end = set_flash_size + else: # Check against real flash chip size if not in SDM + flash_end_str = detect_flash_size(esp) + flash_end = flash_size_bytes(flash_end_str) + if set_flash_size and set_flash_size > flash_end: + print( + f"WARNING: Set --flash_size {args.flash_size} " + f"is larger than the available flash size of {flash_end_str}." + ) + + # Verify file sizes fit in the set --flash_size, or real flash size if smaller + flash_end = min(set_flash_size, flash_end) if set_flash_size else flash_end + if flash_end is not None: for address, argfile in args.addr_filename: argfile.seek(0, os.SEEK_END) if address + argfile.tell() > flash_end: raise FatalError( - "File %s (length %d) at offset %d " - "will not fit in %d bytes of flash. " - "Use --flash_size argument, or change flashing address." - % (argfile.name, argfile.tell(), address, flash_end) + f"File {argfile.name} (length {argfile.tell()}) at offset " + f"{address} will not fit in {flash_end} bytes of flash. " + "Change the --flash_size argument, or flashing address." ) argfile.seek(0) @@ -955,9 +968,7 @@ def get_key_from_value(dict, val): ESP8266V2FirmwareImage.IMAGE_V2_MAGIC, ]: raise FatalError( - "This is not a valid image " "(invalid magic number: {:#x})".format( - magic - ) + f"This is not a valid image (invalid magic number: {magic:#x})" ) if args.chip == "auto": diff --git a/esptool/loader.py b/esptool/loader.py index a1b4d59a9..ca3ab9329 100644 --- a/esptool/loader.py +++ b/esptool/loader.py @@ -713,7 +713,8 @@ def connect( mode = "no_reset" # not possible to toggle DTR/RTS over a TCP socket print( "Note: It's not possible to reset the chip over a TCP socket. " - "Resetting to bootloader has been disabled." + "Automatic resetting to bootloader has been disabled, " + "reset the chip manually." ) print("Connecting...", end="") From eacc94a386267ad39de876f29b7bd1a6823387ae Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Wed, 4 Sep 2024 13:54:30 +0200 Subject: [PATCH 19/35] ci(pypi_release): Update distribution build process --- .github/workflows/dev_release_esptool_pypi.yml | 5 ++--- .github/workflows/release_esptool_pypi.yml | 5 ++--- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/.github/workflows/dev_release_esptool_pypi.yml b/.github/workflows/dev_release_esptool_pypi.yml index 8f12e6846..a4fbbf5c1 100644 --- a/.github/workflows/dev_release_esptool_pypi.yml +++ b/.github/workflows/dev_release_esptool_pypi.yml @@ -23,7 +23,7 @@ jobs: - name: Install dependencies run: | python -m pip install --upgrade pip - python -m pip install twine 'setuptools>=64' + python -m pip install twine build - name: Create development release ${{ github.ref_name }} env: @@ -36,6 +36,5 @@ jobs: python -m pip download esptool==$(python setup.py -V) && echo "Version ${{ github.ref_name }} already published, skipping..." && exit 1 echo "Packaging and publishing new esptool development release: ${{ github.ref_name }}" - python setup.py sdist - tar -ztvf dist/* + python -m build twine upload dist/* diff --git a/.github/workflows/release_esptool_pypi.yml b/.github/workflows/release_esptool_pypi.yml index 8268e24d1..021b11483 100644 --- a/.github/workflows/release_esptool_pypi.yml +++ b/.github/workflows/release_esptool_pypi.yml @@ -20,7 +20,7 @@ jobs: - name: Install dependencies run: | python -m pip install --upgrade pip - pip install 'setuptools>=64' twine + pip install twine build - name: Build and upload esptool ${{ github.event.release.tag_name }} env: TWINE_USERNAME: __token__ @@ -34,7 +34,6 @@ jobs: exit 1 else echo "Packaging and publishing new esptool version: ${CURRENT_VERSION}" - python setup.py sdist - tar -ztvf dist/* + python -m build twine upload dist/* fi From 277f26eb50c59b8fa0edd9791e116ba3a3946d65 Mon Sep 17 00:00:00 2001 From: Jaroslav Burian Date: Tue, 3 Sep 2024 11:57:14 +0200 Subject: [PATCH 20/35] ci: Add overclock and watchdog tests This commit adds test for overclock and watchdog. The tests are executed only on ESP32-C3 as there would have to be a different register value for each chip. --- test/test_esptool.py | 84 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/test/test_esptool.py b/test/test_esptool.py index 604a1b8e6..9928b6f81 100755 --- a/test/test_esptool.py +++ b/test/test_esptool.py @@ -677,6 +677,90 @@ def test_flash_not_aligned_nostub(self): ) assert "Hard resetting via RTS pin..." in output + @pytest.mark.skipif(arg_preload_port is False, reason="USB-JTAG/Serial only") + @pytest.mark.skipif(arg_chip != "esp32c3", reason="ESP32-C3 only") + def test_flash_overclocked(self): + SYSTEM_BASE_REG = 0x600C0000 + SYSTEM_CPU_PER_CONF_REG = SYSTEM_BASE_REG + 0x008 + SYSTEM_CPUPERIOD_SEL_S = 0 + SYSTEM_CPUPERIOD_MAX = 1 # CPU_CLK frequency is 160 MHz + + SYSTEM_SYSCLK_CONF_REG = SYSTEM_BASE_REG + 0x058 + SYSTEM_SOC_CLK_SEL_S = 10 + SYSTEM_SOC_CLK_MAX = 1 + + output = self.run_esptool( + "--after no_reset_stub write_flash 0x0 images/one_mb.bin", preload=False + ) + faster = re.search(r"(\d+(\.\d+)?)\s+seconds", output) + assert faster, "Duration summary not found in the output" + + with esptool.cmds.detect_chip( + port=arg_port, connect_mode="no_reset" + ) as reg_mod: + reg_mod.write_reg( + SYSTEM_SYSCLK_CONF_REG, + 0, + mask=(SYSTEM_SOC_CLK_MAX << SYSTEM_SOC_CLK_SEL_S), + ) + sleep(0.1) + reg_mod.write_reg( + SYSTEM_CPU_PER_CONF_REG, + 0, + mask=(SYSTEM_CPUPERIOD_MAX << SYSTEM_CPUPERIOD_SEL_S), + ) + + output = self.run_esptool( + "--before no_reset write_flash 0x0 images/one_mb.bin", preload=False + ) + slower = re.search(r"(\d+(\.\d+)?)\s+seconds", output) + assert slower, "Duration summary not found in the output" + assert ( + float(slower.group(1)) - float(faster.group(1)) > 1 + ), "Overclocking failed" + + @pytest.mark.skipif(arg_preload_port is False, reason="USB-JTAG/Serial only") + @pytest.mark.skipif(arg_chip != "esp32c3", reason="ESP32-C3 only") + def test_flash_watchdogs(self): + RTC_WDT_ENABLE = 0xC927FA00 # Valid only for ESP32-C3 + + with esptool.cmds.detect_chip(port=arg_port) as reg_mod: + # Enable RTC WDT + reg_mod.write_reg( + reg_mod.RTC_CNTL_WDTWPROTECT_REG, reg_mod.RTC_CNTL_WDT_WKEY + ) + reg_mod.write_reg(reg_mod.RTC_CNTL_WDTCONFIG0_REG, RTC_WDT_ENABLE) + reg_mod.write_reg(reg_mod.RTC_CNTL_WDTWPROTECT_REG, 0) + + # Disable automatic feeding of SWD + reg_mod.write_reg( + reg_mod.RTC_CNTL_SWD_WPROTECT_REG, reg_mod.RTC_CNTL_SWD_WKEY + ) + reg_mod.write_reg( + reg_mod.RTC_CNTL_SWD_CONF_REG, 0, mask=reg_mod.RTC_CNTL_SWD_AUTO_FEED_EN + ) + reg_mod.write_reg(reg_mod.RTC_CNTL_SWD_WPROTECT_REG, 0) + + reg_mod.sync_stub_detected = False + reg_mod.run_stub() + + output = self.run_esptool( + "--before no_reset --after no_reset_stub flash_id", preload=False + ) + assert "Stub is already running. No upload is necessary." in output + + time.sleep(10) # Wait if RTC WDT triggers + + with esptool.cmds.detect_chip( + port=arg_port, connect_mode="no_reset" + ) as reg_mod: + output = reg_mod.read_reg(reg_mod.RTC_CNTL_WDTCONFIG0_REG) + assert output == 0, "RTC WDT is not disabled" + + output = reg_mod.read_reg(reg_mod.RTC_CNTL_SWD_CONF_REG) + print(f"RTC_CNTL_SWD_CONF_REG: {output}") + assert output & 0x80000000, "SWD auto feeding is not disabled" + @pytest.mark.skipif( arg_chip in ["esp8266", "esp32"], From 047284622444c7b7faaa46c15079dbb77031b789 Mon Sep 17 00:00:00 2001 From: Konstantin Kondrashov Date: Tue, 10 Sep 2024 13:14:21 +0300 Subject: [PATCH 21/35] feat(espefuse): Supports wafer efuse versions for esp32c61 --- espefuse/efuse_defs/esp32c61.yaml | 41 +++++++++++++++++++++---------- esptool/targets/esp32c61.py | 12 +++++++++ 2 files changed, 40 insertions(+), 13 deletions(-) diff --git a/espefuse/efuse_defs/esp32c61.yaml b/espefuse/efuse_defs/esp32c61.yaml index ffec87b7c..3cbd2660e 100644 --- a/espefuse/efuse_defs/esp32c61.yaml +++ b/espefuse/efuse_defs/esp32c61.yaml @@ -1,4 +1,4 @@ -VER_NO: beb6fa3bf4a43a464c3365fda28815f5 +VER_NO: e564f8042b56a475a7714bb28ecdadfa EFUSES: WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 32, start : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS0_REG, bloc: 'B0,B1,B2,B3'} RD_DIS : {show: y, blk : 0, word: 1, pos : 0, len : 7, start : 32, type : 'uint:7', wr_dis : 0, rd_dis: null, alt : '', dict : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'} @@ -6,7 +6,7 @@ EFUSES: DIS_USB_JTAG : {show: y, blk : 0, word: 1, pos : 8, len : 1, start : 40, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function of usb switch to jtag is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'} DIS_USB_SERIAL_JTAG : {show: n, blk : 0, word: 1, pos : 9, len : 1, start : 41, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether USB-Serial-JTAG is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'} DIS_FORCE_DOWNLOAD : {show: y, blk : 0, word: 1, pos: 10, len : 1, start : 42, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function that forces chip into download mode is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'} - SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 11, len : 1, start : 43, type : bool, wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'} + SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 11, len : 1, start : 43, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled.\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'} JTAG_SEL_ENABLE : {show: y, blk : 0, word: 1, pos: 12, len : 1, start : 44, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled.\\ 1: enabled\\ 0: disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'} DIS_PAD_JTAG : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in the hard way(permanently).\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'} DIS_DOWNLOAD_MANUAL_ENCRYPT : {show: y, blk : 0, word: 1, pos: 14, len : 1, start : 46, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode).\\ 1: disabled\\ 0: enabled\\', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'} @@ -38,24 +38,39 @@ EFUSES: UART_PRINT_CONTROL : {show: y, blk : 0, word: 3, pos : 5, len : 2, start: 101, type : 'uint:2', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the types of UART printing, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[6:5]', bloc: 'B12[6:5]'} FORCE_SEND_RESUME : {show: y, blk : 0, word: 3, pos : 7, len : 1, start: 103, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents whether ROM code is forced to send a resume command during SPI boot, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[7]', bloc: 'B12[7]'} SECURE_VERSION : {show: y, blk : 0, word: 3, pos : 8, len : 16, start: 104, type : 'uint:16', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[23:8]', bloc: 'B13,B14'} - SECURE_BOOT_DISABLE_FAST_WAKE : {show: y, blk : 0, word: 3, pos: 24, len : 1, start: 120, type : bool, wr_dis : 19, rd_dis: null, alt : '', dict : '', desc: Represents whether FAST_VERIFY_ON_WAKE is disable or enable when Secure Boot is enable, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24]', bloc: 'B15[0]'} - HYS_EN_PAD : {show: y, blk : 0, word: 3, pos: 25, len : 1, start: 121, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled.\\ 1: enabled\\ 0:disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'} - XTS_DPA_CLK_ENABLE : {show: y, blk : 0, word: 3, pos: 26, len : 1, start: 122, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether anti-dpa attack clock function is enabled.\\ 1. Enable\\ 0: Disable\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'} - XTS_DPA_PSEUDO_LEVEL : {show: y, blk : 0, word: 3, pos: 27, len : 2, start: 123, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents the anti-dpa attack pseudo function level.\\ 3:High\\ 2: Moderate\\ 1: Low\\ 0: Decided by register configuration\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[28:27]', bloc: 'B15[4:3]'} - DIS_WIFI6 : {show: y, blk : 0, word: 3, pos: 29, len : 1, start: 125, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the WiFi 6 feature is enable or disable.\\ 1: WiFi 6 is disable\\ 0: WiFi 6 is enabled.\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[29]', bloc: 'B15[5]'} - ECDSA_DISABLE_P192 : {show: y, blk : 0, word: 3, pos: 30, len : 1, start: 126, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to disable P192 curve in ECDSA.\\ 1: Disabled.\\ 0: Not disable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[30]', bloc: 'B15[6]'} - ECC_FORCE_CONST_TIME : {show: y, blk : 0, word: 3, pos: 31, len : 1, start: 127, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to force ecc to use const-time calculation mode. \\ 1: Enable. \\ 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31]', bloc: 'B15[7]'} + SECURE_BOOT_DISABLE_FAST_WAKE : {show: y, blk : 0, word: 3, pos: 24, len : 1, start: 120, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents whether FAST_VERIFY_ON_WAKE is disable or enable when Secure Boot is enable, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24]', bloc: 'B15[0]'} + HYS_EN_PAD : {show: y, blk : 0, word: 3, pos: 25, len : 1, start: 121, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled.\\ 1: enabled\\ 0:disabled\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'} + XTS_DPA_CLK_ENABLE : {show: y, blk : 0, word: 3, pos: 26, len : 1, start: 122, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether anti-dpa attack clock function is enabled.\\ 1. Enable\\ 0: Disable\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'} + XTS_DPA_PSEUDO_LEVEL : {show: y, blk : 0, word: 3, pos: 27, len : 2, start: 123, type : 'uint:2', wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents the anti-dpa attack pseudo function level.\\ 3:High\\ 2: Moderate\\ 1: Low\\ 0: Decided by register configuration\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[28:27]', bloc: 'B15[4:3]'} + DIS_WIFI6 : {show: y, blk : 0, word: 3, pos: 29, len : 1, start: 125, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the WiFi 6 feature is enable or disable.\\ 1: WiFi 6 is disable\\ 0: WiFi 6 is enabled.\\', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[29]', bloc: 'B15[5]'} + ECDSA_DISABLE_P192 : {show: y, blk : 0, word: 3, pos: 30, len : 1, start: 126, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to disable P192 curve in ECDSA.\\ 1: Disabled.\\ 0: Not disable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[30]', bloc: 'B15[6]'} + ECC_FORCE_CONST_TIME : {show: y, blk : 0, word: 3, pos: 31, len : 1, start: 127, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to force ecc to use const-time calculation mode. \\ 1: Enable. \\ 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31]', bloc: 'B15[7]'} REPEAT_DATA3 : {show: n, blk : 0, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: EFUSE_RD_REPEAT_DATA3_REG, bloc: 'B16,B17,B18,B19'} REPEAT_DATA4 : {show: n, blk : 0, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: EFUSE_RD_REPEAT_DATA4_REG, bloc: 'B20,B21,B22,B23'} MAC : {show: y, blk : 1, word: 0, pos : 0, len : 48, start : 0, type : 'bytes:6', wr_dis : 20, rd_dis: null, alt : MAC_FACTORY, dict : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS0_REG, bloc: 'B0,B1,B2,B3,B4,B5'} - RESERVE_1_48 : {show: n, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'uint:16', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_MAC_SYS1_REG[31:16]', bloc: 'B6,B7'} - MAC_RESERVED_0 : {show: n, blk : 1, word: 2, pos : 0, len : 14, start : 64, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS2_REG[13:0]', bloc: 'B8,B9[5:0]'} - MAC_RESERVED_1 : {show: n, blk : 1, word: 2, pos: 14, len : 18, start : 78, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:14]', bloc: 'B9[7:6],B10,B11'} + C61_NO_EXTENTION : {show: n, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'uint:16', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS1_REG[31:16]', bloc: 'B6,B7'} + WAFER_VERSION_MINOR : {show: y, blk : 1, word: 2, pos : 0, len : 4, start : 64, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[3:0]', bloc: 'B8[3:0]'} + WAFER_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 4, len : 2, start : 68, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Major chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[5:4]', bloc: 'B8[5:4]'} + DISABLE_WAFER_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 6, len : 1, start : 70, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Disables check of wafer version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[6]', bloc: 'B8[6]'} + DISABLE_BLK_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos : 7, len : 1, start : 71, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Disables check of blk version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[7]', bloc: 'B8[7]'} + BLK_VERSION_MINOR : {show: y, blk : 1, word: 2, pos : 8, len : 3, start : 72, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MINOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[10:8]', bloc: 'B9[2:0]'} + BLK_VERSION_MAJOR : {show: y, blk : 1, word: 2, pos: 11, len : 2, start : 75, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MAJOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[12:11]', bloc: 'B9[4:3]'} + FLASH_CAP : {show: y, blk : 1, word: 2, pos: 13, len : 3, start : 77, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[15:13]', bloc: 'B9[7:5]'} + FLASH_VENDOR : {show: y, blk : 1, word: 2, pos: 16, len : 3, start : 80, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Flash vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[18:16]', bloc: 'B10[2:0]'} + PSRAM_CAP : {show: y, blk : 1, word: 2, pos: 19, len : 3, start : 83, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PSRAM capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[21:19]', bloc: 'B10[5:3]'} + PSRAM_VENDOR : {show: y, blk : 1, word: 2, pos: 22, len : 2, start : 86, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PSRAM vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[23:22]', bloc: 'B10[7:6]'} + TEMP : {show: y, blk : 1, word: 2, pos: 24, len : 2, start : 88, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Temperature, rloc: 'EFUSE_RD_MAC_SYS2_REG[25:24]', bloc: 'B11[1:0]'} + PKG_VERSION : {show: y, blk : 1, word: 2, pos: 26, len : 3, start : 90, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS2_REG[28:26]', bloc: 'B11[4:2]'} + RESERVED_1_93 : {show: n, blk : 1, word: 2, pos: 29, len : 3, start : 93, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:29]', bloc: 'B11[7:5]'} MAC_RESERVED_2 : {show: n, blk : 1, word: 3, pos : 0, len : 18, start : 96, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS3_REG[17:0]', bloc: 'B12,B13,B14[1:0]'} SYS_DATA_PART0_0 : {show: n, blk : 1, word: 3, pos: 18, len : 14, start: 114, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:18]', bloc: 'B14[7:2],B15'} SYS_DATA_PART0_1 : {show: n, blk : 1, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS4_REG, bloc: 'B16,B17,B18,B19'} SYS_DATA_PART0_2 : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the second 32-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS5_REG, bloc: 'B20,B21,B22,B23'} - BLOCK_SYS_DATA1 : {show: y, blk : 2, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: System data part 1 (reserved), rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'} + OPTIONAL_UNIQUE_ID : {show: y, blk : 2, word: 0, pos : 0, len: 128, start : 0, type: 'bytes:16', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'} + SYS_DATA_PART1_4 : {show: n, blk : 2, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA4_REG, bloc: 'B16,B17,B18,B19'} + SYS_DATA_PART1_5 : {show: n, blk : 2, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA5_REG, bloc: 'B20,B21,B22,B23'} + SYS_DATA_PART1_6 : {show: n, blk : 2, word: 6, pos : 0, len : 32, start: 192, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA6_REG, bloc: 'B24,B25,B26,B27'} + SYS_DATA_PART1_7 : {show: n, blk : 2, word: 7, pos : 0, len : 32, start: 224, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA7_REG, bloc: 'B28,B29,B30,B31'} BLOCK_USR_DATA : {show: y, blk : 3, word: 0, pos : 0, len: 192, start : 0, type: 'bytes:24', wr_dis : 22, rd_dis: null, alt : USER_DATA, dict : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'} RESERVED_3_192 : {show: n, blk : 3, word: 6, pos : 0, len : 8, start: 192, type : 'uint:8', wr_dis : 22, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24} CUSTOM_MAC : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'} diff --git a/esptool/targets/esp32c61.py b/esptool/targets/esp32c61.py index 81fad3610..4d8216c71 100644 --- a/esptool/targets/esp32c61.py +++ b/esptool/targets/esp32c61.py @@ -81,6 +81,18 @@ class ESP32C61ROM(ESP32C6ROM): 15: "XTS_AES_128_KEY_PSRAM", } + def get_pkg_version(self): + num_word = 2 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x07 + + def get_minor_chip_version(self): + num_word = 2 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F + + def get_major_chip_version(self): + num_word = 2 + return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03 + def get_chip_description(self): chip_name = { 0: "ESP32-C61", From 3a74f62fe402402d39abb4f331512565b45ca7cb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Tue, 10 Sep 2024 14:40:27 +0200 Subject: [PATCH 22/35] docs(troubleshooting): Add info about debugging in USB-Serial/JTAG and USB-OTG modes --- docs/en/troubleshooting.rst | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/docs/en/troubleshooting.rst b/docs/en/troubleshooting.rst index ae5d2dec9..5f6fbead0 100644 --- a/docs/en/troubleshooting.rst +++ b/docs/en/troubleshooting.rst @@ -106,14 +106,17 @@ Early Stage Crash .. only:: not esp8266 and not esp32 and not esp32c2 - Issues When Using USB-Serial/JTAG or USB-OTG - -------------------------------------------- + Issues and Debugging in USB-Serial/JTAG or USB-OTG modes + -------------------------------------------------------- - When working with ESP chips that implement a `USB-Serial/JTAG Controller `_ or a `USB-OTG console `_, it's essential to be aware of potential issues related to the loaded application interfering with or reprogramming the GPIO pins used for USB communication. + When working with ESP chips that implement a `USB-Serial/JTAG `_ or a `USB-OTG `_ console (you are not using a classic USB-to-Serial adapter), it's essential to be aware of potential issues related to the loaded application interfering with or reprogramming the GPIO pins used for USB communication. If the application accidentally reconfigures the USB peripheral pins or disables the USB peripheral, the device disappears from the system. You can also encounter unstable flashing or errors like ``OSError: [Errno 71] Protocol error``. - If that happens, try :ref:`manually entering the download mode ` and then using the :ref:`erase_flash ` command to wipe the flash memory. Then, make sure to fix the issue in the application before flashing again. + If that happens, try to :ref:`manually enter the download mode ` and then use the :ref:`erase_flash ` command to wipe the flash memory. Then, make sure to fix the issue in the application before flashing again. + + On boards with two USB ports (usually marked as USB and UART), you can use the USB port for flashing while listening on the UART port for debugging purposes. This setup is useful for retrieving core dumps or the reset reason in the event of a crash. To implement this, connect the UART port to another instance of any of the `serial terminal programs`_, while repeating the failing action over the USB port. You'll be able to monitor the crash log without interference from the USB port used for communication or it disappearing due to a firmware crash. + If your devkit doesn't have a dedicated USB port connected to an on-board USB-to-UART bridge, you can use a separate adapter to connect to the UART pins on the board. Serial Terminal Programs ------------------------ From 2ccddc3e29c2a710b56d1ac88f8a1e12b31643f4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Mon, 16 Sep 2024 09:21:15 +0200 Subject: [PATCH 23/35] ci(github_builds): Specify arm32 runner tags --- .github/workflows/build_esptool.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/build_esptool.yml b/.github/workflows/build_esptool.yml index 4e11ab7a0..57e6d92e2 100644 --- a/.github/workflows/build_esptool.yml +++ b/.github/workflows/build_esptool.yml @@ -27,7 +27,7 @@ jobs: CONTAINER: python:3.8-bullseye TARGET: linux-arm32 SEPARATOR: ':' - RUN_ON: [ARM, self-hosted, linux] + RUN_ON: [ARM, self-hosted, linux, docker] - platform: linux-arm64 CONTAINER: python:3.8-bullseye TARGET: linux-arm64 From 138660bac40aecbd556b37f0b4b44a2bfe5125f0 Mon Sep 17 00:00:00 2001 From: Konstantin Kondrashov Date: Sat, 14 Sep 2024 12:56:30 +0300 Subject: [PATCH 24/35] fix(esptool): Fix incorrect chip version for esp32c5 --- esptool/targets/esp32c5.py | 6 +++--- esptool/targets/esp32c5beta3.py | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/esptool/targets/esp32c5.py b/esptool/targets/esp32c5.py index c47a229b0..99c9b99db 100644 --- a/esptool/targets/esp32c5.py +++ b/esptool/targets/esp32c5.py @@ -98,15 +98,15 @@ class ESP32C5ROM(ESP32C6ROM): } def get_pkg_version(self): - num_word = 3 + num_word = 2 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x07 def get_minor_chip_version(self): - num_word = 3 + num_word = 2 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F def get_major_chip_version(self): - num_word = 3 + num_word = 2 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03 def get_chip_description(self): diff --git a/esptool/targets/esp32c5beta3.py b/esptool/targets/esp32c5beta3.py index 156dd99e7..66b09ce66 100644 --- a/esptool/targets/esp32c5beta3.py +++ b/esptool/targets/esp32c5beta3.py @@ -60,15 +60,15 @@ class ESP32C5BETA3ROM(ESP32C6ROM): } def get_pkg_version(self): - num_word = 3 + num_word = 2 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 26) & 0x07 def get_minor_chip_version(self): - num_word = 3 + num_word = 2 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x0F def get_major_chip_version(self): - num_word = 3 + num_word = 2 return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 4) & 0x03 def get_chip_description(self): From 6edafeac25c097767dea50c3ccb17aea6c8098f0 Mon Sep 17 00:00:00 2001 From: "C.S.M" Date: Wed, 18 Sep 2024 15:23:12 +0800 Subject: [PATCH 25/35] fix(esptool): Fix esp32c61 flash frequency config --- esptool/targets/esp32c61.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/esptool/targets/esp32c61.py b/esptool/targets/esp32c61.py index 4d8216c71..2132bda3f 100644 --- a/esptool/targets/esp32c61.py +++ b/esptool/targets/esp32c61.py @@ -45,6 +45,12 @@ class ESP32C61ROM(ESP32C6ROM): EFUSE_SECURE_BOOT_EN_REG = EFUSE_BASE + 0x034 EFUSE_SECURE_BOOT_EN_MASK = 1 << 26 + FLASH_FREQUENCY = { + "80m": 0xF, + "40m": 0x0, + "20m": 0x2, + } + MEMORY_MAP = [ [0x00000000, 0x00010000, "PADDING"], [0x41800000, 0x42000000, "DROM"], From fbb74ec15b5d0bb56e8f2852fd11b4fcc662b8a2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Wed, 18 Sep 2024 13:13:20 +0200 Subject: [PATCH 26/35] change: Update version to 4.8.0 --- CHANGELOG.md | 92 +++++++++++++++++++++++++++++++++++++++++++++ esptool/__init__.py | 2 +- pyproject.toml | 2 +- 3 files changed, 94 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 447147995..2d851aee2 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,3 +1,95 @@ +## v4.8.0 (2024-09-18) + +### New Features + +- **espefuse**: Supports wafer efuse versions for esp32c61 +- **esptool**: add new command SFDP read +- **esptool**: Add option to retry connection in a loop +- **efuse**: Updates efuse table for esp32c5 +- **efuse**: Updates efuse table for esp32p4 +- **esp32c61**: Added stub flasher support +- **cli**: add autocompletions +- **esptool**: allow picking UART by VID/PID/Name +- **esp32c5**: Add USB-serial/JTAG stub support +- **esp32c5**: Add UART stub support +- **esptool**: Print key_purpose name for get_security_info cmd +- **espefuse**: Adds support extend efuse table by user CSV file +- **espefuse**: Adds efuse dump formats: separated(default) and united(new) +- **espefuse**: Adds incompatible eFuse settings check for S3 +- **reset**: Apply recconections to the whole reset sequence, not line transitions +- **reset**: Automatically reconnect if port disconnects during reset +- **esp32-p4**: Add ECO1 magic number +- **espsecure**: Add support for secure boot v2 using ECDSA-P384 signatures +- **write_flash**: retry flashing if chip disconnects +- **espefuse**: Allow filtering efuses based on command line arguments +- **esploader**: Enable context manager for esp instances +- **espefuse**: Added check for correctness of written data +- **espefuse**: Improves help for burn_efuse cmd +- **esp32s3**: clear boot control register on hard reset +- **esp32-p4**: add spi-connection restriction to ROM class +- add UF2 IDs for ESP32-C5 and ESP32-C61 +- **espefuse**: Updates efuses for C5 and C61 +- **esp32c61**: add c61 basic flash support (no_stub) +- **esp32c5**: skipped the stub check for esp32c5 mp +- **esp32c5**: base support of esp32c5 mp (no stub) +- Added warning when secure boot enabled +- **cmds/write_flash**: Recalculated SHA digest for image binary +- print flash voltage in flash_id command +- **esptool**: Adds wafer and pkg versions +- **espefuse**: Update adc_info commands for all chips +- **espefuse**: Adds new efuses for esp32p4 +- **espefuse**: Allow the espefuse.py to work when coding scheme == 3 +- **err_defs**: Add ROM bootloader flash error definitions +- Use ruff instead of flake8 and black both in pre-commit and CI +- **esp32p4**: Enable USB-serial/JTAG in flasher stub +- **espefuse**: Postpone some efuses to burn them at the very end +- add advisory port locking +- **espefuse**: check_error --recover chip even if there are num_errors +- **espefuse**: Adds new efuses for esp32c6 and esp32h2 +- **esp32c5**: add target esp32c5 beta3 + +### Bug Fixes + +- **esptool**: Fix esp32c61 flash frequency config +- **esptool**: Fix incorrect chip version for esp32c5 +- **write_flash**: Verify if files will fit against the real flash size when possible +- **remote_ports**: Disable reset sequence when a socket is used +- **bitstring**: Restricted bitstring dependency to fix 32-bit compatibility +- **esp32_d0wdr2_v3**: Print correct chip name +- pass error message to exception in OTG mode +- **bin_image**: add check for ELF file segment when saving RAM segments +- **docs**: Add a note about entering manual bootloader mode +- **esp32c5**: Fix MAC reading for esptool +- Erase non-aligned bytes with --no-stub +- **esp32-c5**: Use a longer reset delay with usb-serial/jtag to stabilize boot-up +- **espefuse**: Use stub class if stub flasher is running +- Do not append SHA256 when `--ram-only-header` +- **elf2image**: add ELF flags to merge condition +- ram_only_header: pad flash segment to next boundary +- sort segments if ram_only_header is used +- **espefuse**: Fix efuse base addr for esp32c5 MP +- fix type annotation to comply with mypy +- **espefuse**: Fix burn_key for ECDSA_KEY, it can read pem file +- **secure_download_mode**: Disable secure boot detection and print more info +- **esptool**: clear boot control register on ESP32-S3 +- **intelhex**: catch unicode decode errors when convering hex to binary +- ROM doesn't attach in-package flash chips +- close file gracefully in espsecure +- Fixed glitches on RTS line when no_reset option on Windows +- **merge_bin**: treat files starting with colon as raw files +- Index image segments from 0 instead of 1 +- **read_flash**: add flash size arg to enable reading past 2MB without stub +- **read_flash**: flush transmit buffer less often to inrease throughput +- **esptool**: Proper alignment for SoCs with offset load +- ignore resetting on unsupported ports +- **esptool**: Remove the shebang from uf2_writer.py + +### Code Refactoring + +- Migrated esp_rfc2217_server into standalone subpackage +- **test/esptool**: Updated tests according to SHA recomputation for binary +- **style**: Comply with black>=24.0.0 + ## v4.7.0 (2023-12-13) ### New Features diff --git a/esptool/__init__.py b/esptool/__init__.py index d4dad9151..688e559c7 100644 --- a/esptool/__init__.py +++ b/esptool/__init__.py @@ -28,7 +28,7 @@ "write_mem", ] -__version__ = "4.7.0" +__version__ = "4.8.0" import argparse import inspect diff --git a/pyproject.toml b/pyproject.toml index f23cda366..a1d6b8334 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -75,7 +75,7 @@ version = {attr = "esptool.__init__.__version__"} [tool.commitizen] - version = "4.7.0" + version = "4.8.0" update_changelog_on_bump = true tag_format = "v$version" changelog_start_rev = "v4.2.1" From 197845b800558953f7dafabf47c958fb3ec93026 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Wed, 18 Sep 2024 13:14:39 +0200 Subject: [PATCH 27/35] change(changelog): Fix typos to satisfy codespell --- CHANGELOG.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2d851aee2..f0c08fc86 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -16,7 +16,7 @@ - **espefuse**: Adds support extend efuse table by user CSV file - **espefuse**: Adds efuse dump formats: separated(default) and united(new) - **espefuse**: Adds incompatible eFuse settings check for S3 -- **reset**: Apply recconections to the whole reset sequence, not line transitions +- **reset**: Apply reconnections to the whole reset sequence, not line transitions - **reset**: Automatically reconnect if port disconnects during reset - **esp32-p4**: Add ECO1 magic number - **espsecure**: Add support for secure boot v2 using ECDSA-P384 signatures @@ -72,7 +72,7 @@ - **espefuse**: Fix burn_key for ECDSA_KEY, it can read pem file - **secure_download_mode**: Disable secure boot detection and print more info - **esptool**: clear boot control register on ESP32-S3 -- **intelhex**: catch unicode decode errors when convering hex to binary +- **intelhex**: catch unicode decode errors when converting hex to binary - ROM doesn't attach in-package flash chips - close file gracefully in espsecure - Fixed glitches on RTS line when no_reset option on Windows From 059f0b761d506111281af6d6792ea5313acb0020 Mon Sep 17 00:00:00 2001 From: Jason2866 <24528715+Jason2866@users.noreply.github.com> Date: Wed, 18 Sep 2024 23:44:34 +0200 Subject: [PATCH 28/35] Update build_esptool.yml --- .github/workflows/build_esptool.yml | 170 ++++++++++++++-------------- 1 file changed, 88 insertions(+), 82 deletions(-) diff --git a/.github/workflows/build_esptool.yml b/.github/workflows/build_esptool.yml index 57e6d92e2..faff0fec1 100644 --- a/.github/workflows/build_esptool.yml +++ b/.github/workflows/build_esptool.yml @@ -1,39 +1,34 @@ name: Build esptool -on: [push, pull_request] +on: + workflow_dispatch: + push: + tags: + - "v*.*.*" + paths-ignore: + - '.github/**' # Ignore changes towards the .github directory jobs: build-esptool-binaries: - name: Build esptool binaries for ${{ matrix.platform }} - runs-on: ${{ matrix.RUN_ON }} + name: Build esptool binaries for ${{ matrix.os }} + runs-on: ${{ matrix.os }} strategy: matrix: - platform: [macos, windows, linux-amd64, linux-arm32, linux-arm64] + os: [macos-14, macos-13, ubuntu-latest, windows-latest] include: - - platform: macos + - os: macos-14 + TARGET: macos-arm + SEPARATOR: ':' + - os: macos-13 TARGET: macos SEPARATOR: ':' - RUN_ON: macos-latest - - platform: windows + - os: ubuntu-latest + TARGET: linux-amd64 + SEPARATOR: ':' + - os: windows-latest TARGET: win64 EXTEN: .exe SEPARATOR: ';' - RUN_ON: windows-latest - - platform: linux-amd64 - TARGET: linux-amd64 - SEPARATOR: ':' - RUN_ON: ubuntu-20.04 - - platform: linux-arm32 - CONTAINER: python:3.8-bullseye - TARGET: linux-arm32 - SEPARATOR: ':' - RUN_ON: [ARM, self-hosted, linux, docker] - - platform: linux-arm64 - CONTAINER: python:3.8-bullseye - TARGET: linux-arm64 - SEPARATOR: ':' - RUN_ON: [ARM64, self-hosted, linux] - container: ${{ matrix.CONTAINER }} # use python container on ARM env: DISTPATH: esptool-${{ matrix.TARGET }} STUBS_DIR: ./esptool/targets/stub_flasher/ @@ -41,13 +36,18 @@ jobs: PIP_EXTRA_INDEX_URL: "https://dl.espressif.com/pypi" steps: - name: Checkout repository - uses: actions/checkout@master - - name: Set up Python 3.8 - # Skip setting python on ARM because of missing compatibility: https://github.com/actions/setup-python/issues/108 - if: matrix.platform != 'linux-arm32' && matrix.platform != 'linux-arm64' - uses: actions/setup-python@master + uses: actions/checkout@v4 + with: + ref: main_work + - name: Set up Python 3.11 + uses: actions/setup-python@v5 with: - python-version: 3.8 + python-version: 3.11 + - name: Update esptool version when releasing + if: startsWith(github.ref, 'refs/tags/') + run: | + python ci/patch_release.py --version ${{ github.ref_name }} esptool/__init__.py + #git diff - name: Install dependencies # PyInstaller >=6.0 results in significantly more antivirus false positives run: | @@ -60,17 +60,6 @@ jobs: pyinstaller --distpath ./${{ env.DISTPATH }} -F --icon=ci/espressif.ico --add-data="${{ env.EFUSE_DIR }}*.yaml${{ matrix.SEPARATOR }}${{ env.EFUSE_DIR }}" espefuse.py pyinstaller --distpath ./${{ env.DISTPATH }} -F --icon=ci/espressif.ico espsecure.py pyinstaller --distpath ./${{ env.DISTPATH }} -F --icon=ci/espressif.ico esp_rfc2217_server.py - - name: Sign binaries - if: matrix.platform == 'windows' && github.event_name != 'pull_request' - env: - CERTIFICATE: ${{ secrets.CERTIFICATE }} - CERTIFICATE_PASSWORD: ${{ secrets.CERTIFICATE_PASSWORD }} - shell: pwsh - run: | - ./ci/Sign-File.ps1 -Path ./${{ env.DISTPATH }}/esptool.exe - ./ci/Sign-File.ps1 -Path ./${{ env.DISTPATH }}/espefuse.exe - ./ci/Sign-File.ps1 -Path ./${{ env.DISTPATH }}/espsecure.exe - ./ci/Sign-File.ps1 -Path ./${{ env.DISTPATH }}/esp_rfc2217_server.exe - name: Test binaries shell: bash run: | @@ -78,56 +67,73 @@ jobs: ./${{ env.DISTPATH }}/espefuse${{ matrix.EXTEN }} -h ./${{ env.DISTPATH }}/espsecure${{ matrix.EXTEN }} -h ./${{ env.DISTPATH }}/esp_rfc2217_server${{ matrix.EXTEN }} -h - - name: Add license and readme - shell: bash - run: mv LICENSE README.md ./${{ env.DISTPATH }} - name: Archive artifact uses: actions/upload-artifact@master with: name: ${{ env.DISTPATH }} path: ${{ env.DISTPATH }} + - name: Update package.json when a release tag is set + if: startsWith(github.ref, 'refs/tags/') && matrix.os == 'ubuntu-latest' + run: | + rm package.json + python ci/gen_pio_manifest.py -o "./" -s ${{ github.ref_name }} + - name: Upload package.json artifact + if: matrix.os == 'ubuntu-latest' + uses: jason2866/upload-artifact@v2.0.3 + with: + name: manifest + path: /home/runner/work/esptool/esptool/package.json - create_release: - name: Create GitHub release - if: startsWith(github.ref, 'refs/tags/') && !(contains(github.ref_name, 'dev')) + push_stubs: + name: Commit changed package.json needs: build-esptool-binaries runs-on: ubuntu-latest - env: - PIP_EXTRA_INDEX_URL: "https://dl.espressif.com/pypi" - permissions: - contents: write steps: - - name: Get version - id: get_version - run: echo "VERSION=${GITHUB_REF#refs/tags/v}" >> $GITHUB_OUTPUT - shell: bash - - name: Checkout - uses: actions/checkout@master + - name: Checkout repository + uses: actions/checkout@v4 with: - fetch-depth: 0 - - name: Install dependencies - run: | - python -m pip install --upgrade pip - pip install --user -e ".[dev]" - - name: Generate changelog - run: | - cz changelog ${{ steps.get_version.outputs.VERSION }} --template ci/gh_changelog_template.md.j2 --file-name changelog_body.md - cat changelog_body.md - - name: Download built binaries - uses: actions/download-artifact@master - - name: Compress and rename binaries - run: | - for dir in esptool-*; do - zip -r "esptool-v${{ steps.get_version.outputs.VERSION }}-${dir#esptool-}.zip" "$dir" - done - - name: Create release - id: create_release - uses: softprops/action-gh-release@v1 - env: - GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} + ref: main_work + - name: Download artifacts + uses: jason2866/download-artifact@v3.0.4 + with: + name: | + manifest + path: | + ./ + - uses: stefanzweifel/git-auto-commit-action@v5 with: - body_path: changelog_body.md - name: Version ${{ steps.get_version.outputs.VERSION }} - draft: true - prerelease: false - files: esptool-v${{ steps.get_version.outputs.VERSION }}-*.zip + commit_message: update manifest + + release: + name: Upload release binaries + needs: build-esptool-binaries + if: startsWith(github.ref, 'refs/tags/') + runs-on: ubuntu-latest + steps: + - name: Checkout repository + uses: actions/checkout@v4 + with: + ref: main_work + - name: Zip esptool.py + run: | + echo "Packaging new esptool release: ${{ github.ref_name }}" + python ci/patch_release.py --version ${{ github.ref_name }} esptool/__init__.py + rm package.json + python ci/gen_pio_manifest.py -o "./" -s ${{ github.ref_name }} + python ci/pack_python.py + - name: Download built binaries + uses: actions/download-artifact@master + - name: Rename and package binaries + run: | + zip -r esptool-macos-arm.zip ./esptool-macos-arm + zip -r esptool-macos.zip ./esptool-macos + zip -r esptool-linux-amd64.zip ./esptool-linux-amd64 + zip -r esptool-win64.zip ./esptool-win64 + - name: Release + uses: jason2866/action-gh-release@v1.3 + with: + prerelease: false + files: | + *.zip + env: + GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} From 78fb0d86e5ead754f66b4fefba0385ca82888eb3 Mon Sep 17 00:00:00 2001 From: Jason2866 <24528715+Jason2866@users.noreply.github.com> Date: Wed, 18 Sep 2024 23:45:22 +0200 Subject: [PATCH 29/35] Delete .github/workflows/dangerjs.yml --- .github/workflows/dangerjs.yml | 25 ------------------------- 1 file changed, 25 deletions(-) delete mode 100644 .github/workflows/dangerjs.yml diff --git a/.github/workflows/dangerjs.yml b/.github/workflows/dangerjs.yml deleted file mode 100644 index c84b5dccb..000000000 --- a/.github/workflows/dangerjs.yml +++ /dev/null @@ -1,25 +0,0 @@ -name: DangerJS Pull Request linter -on: - pull_request_target: - types: [opened, edited, reopened, synchronize] - -permissions: - pull-requests: write - contents: write - -jobs: - pull-request-style-linter: - runs-on: ubuntu-latest - steps: - - name: Check out PR head - uses: actions/checkout@v4 - with: - ref: ${{ github.event.pull_request.head.sha }} - - - name: DangerJS pull request linter - uses: espressif/shared-github-dangerjs@v1 - env: - GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - with: - instructions-contributions-file: 'CONTRIBUTING.rst' - instructions-gitlab-mirror: 'true' From 94f4b5c974c0dc82b0bc460e06557f0b6ac0f5c7 Mon Sep 17 00:00:00 2001 From: Jason2866 <24528715+Jason2866@users.noreply.github.com> Date: Wed, 18 Sep 2024 23:45:32 +0200 Subject: [PATCH 30/35] Delete .github/workflows/dev_release_esptool_pypi.yml --- .../workflows/dev_release_esptool_pypi.yml | 40 ------------------- 1 file changed, 40 deletions(-) delete mode 100644 .github/workflows/dev_release_esptool_pypi.yml diff --git a/.github/workflows/dev_release_esptool_pypi.yml b/.github/workflows/dev_release_esptool_pypi.yml deleted file mode 100644 index a4fbbf5c1..000000000 --- a/.github/workflows/dev_release_esptool_pypi.yml +++ /dev/null @@ -1,40 +0,0 @@ -# This workflow will upload an esptool Python package when a dev release tag (e.g. "v4.7.dev2") is pushed - -name: PyPI dev release - -on: - push: - tags: - - v*.*.dev* - -jobs: - build_and_upload: - - runs-on: ubuntu-latest - - if: startsWith(github.ref, 'refs/tags/') && contains(github.ref_name, 'dev') - - steps: - - uses: actions/checkout@master - - name: Set up Python 3.8 - uses: actions/setup-python@master - with: - python-version: '3.8' - - name: Install dependencies - run: | - python -m pip install --upgrade pip - python -m pip install twine build - - - name: Create development release ${{ github.ref_name }} - env: - TWINE_USERNAME: __token__ - TWINE_PASSWORD: ${{ secrets.PYPI_PASSWORD }} - TWINE_NON_INTERACTIVE: true - run: | - python ci/patch_dev_release.py --version ${{ github.ref_name }} esptool/__init__.py - git diff - python -m pip download esptool==$(python setup.py -V) && echo "Version ${{ github.ref_name }} already published, skipping..." && exit 1 - - echo "Packaging and publishing new esptool development release: ${{ github.ref_name }}" - python -m build - twine upload dist/* From efa7f598fd15f0b3dba19859cbbd267b525dc438 Mon Sep 17 00:00:00 2001 From: Jason2866 <24528715+Jason2866@users.noreply.github.com> Date: Wed, 18 Sep 2024 23:45:41 +0200 Subject: [PATCH 31/35] Delete .github/workflows/issue_comment.yml --- .github/workflows/issue_comment.yml | 20 -------------------- 1 file changed, 20 deletions(-) delete mode 100644 .github/workflows/issue_comment.yml diff --git a/.github/workflows/issue_comment.yml b/.github/workflows/issue_comment.yml deleted file mode 100644 index fa1548bb1..000000000 --- a/.github/workflows/issue_comment.yml +++ /dev/null @@ -1,20 +0,0 @@ -name: Sync issue comments to Jira - -# This workflow will be triggered when new issue comment is created (including PR comments) -on: issue_comment - -jobs: - sync_issue_comments_to_jira: - name: Sync Issue Comments to Jira - runs-on: ubuntu-latest - steps: - - uses: actions/checkout@master - - name: Sync issue comments to Jira - uses: espressif/sync-jira-actions@v1 - env: - GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - JIRA_PASS: ${{ secrets.JIRA_PASS }} - JIRA_PROJECT: ESPTOOL - JIRA_COMPONENT: GitHub - JIRA_URL: ${{ secrets.JIRA_URL }} - JIRA_USER: ${{ secrets.JIRA_USER }} From 4f98d21a4f8e577ac1697e3d9afb0821eaa7668b Mon Sep 17 00:00:00 2001 From: Jason2866 <24528715+Jason2866@users.noreply.github.com> Date: Wed, 18 Sep 2024 23:45:48 +0200 Subject: [PATCH 32/35] Delete .github/workflows/new_issues.yml --- .github/workflows/new_issues.yml | 20 -------------------- 1 file changed, 20 deletions(-) delete mode 100644 .github/workflows/new_issues.yml diff --git a/.github/workflows/new_issues.yml b/.github/workflows/new_issues.yml deleted file mode 100644 index fd891e342..000000000 --- a/.github/workflows/new_issues.yml +++ /dev/null @@ -1,20 +0,0 @@ -name: Sync issues to Jira - -# This workflow will be triggered when a new issue is opened -on: issues - -jobs: - sync_issues_to_jira: - name: Sync issues to Jira - runs-on: ubuntu-latest - steps: - - uses: actions/checkout@master - - name: Sync GitHub issues to Jira project - uses: espressif/sync-jira-actions@v1 - env: - GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - JIRA_PASS: ${{ secrets.JIRA_PASS }} - JIRA_PROJECT: ESPTOOL - JIRA_COMPONENT: GitHub - JIRA_URL: ${{ secrets.JIRA_URL }} - JIRA_USER: ${{ secrets.JIRA_USER }} From 9fe1362d01f3abb0dd048ef51d441a9033143457 Mon Sep 17 00:00:00 2001 From: Jason2866 <24528715+Jason2866@users.noreply.github.com> Date: Wed, 18 Sep 2024 23:45:56 +0200 Subject: [PATCH 33/35] Delete .github/workflows/new_prs.yml --- .github/workflows/new_prs.yml | 25 ------------------------- 1 file changed, 25 deletions(-) delete mode 100644 .github/workflows/new_prs.yml diff --git a/.github/workflows/new_prs.yml b/.github/workflows/new_prs.yml deleted file mode 100644 index b98e828bb..000000000 --- a/.github/workflows/new_prs.yml +++ /dev/null @@ -1,25 +0,0 @@ -name: Sync remaining PRs to Jira - -# This workflow will be triggered every hour, to sync remaining PRs (i.e. PRs with zero comment) to Jira project -# Note that, PRs can also get synced when new PR comment is created -on: - schedule: - - cron: "0 * * * *" - -jobs: - sync_prs_to_jira: - name: Sync PRs to Jira - runs-on: ubuntu-latest - steps: - - uses: actions/checkout@master - - name: Sync PRs to Jira project - uses: espressif/sync-jira-actions@v1 - with: - cron_job: true - env: - GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} - JIRA_PASS: ${{ secrets.JIRA_PASS }} - JIRA_PROJECT: ESPTOOL - JIRA_COMPONENT: GitHub - JIRA_URL: ${{ secrets.JIRA_URL }} - JIRA_USER: ${{ secrets.JIRA_USER }} From d34e12a53a779e4978df575ad7e7bea658b50724 Mon Sep 17 00:00:00 2001 From: Jason2866 <24528715+Jason2866@users.noreply.github.com> Date: Wed, 18 Sep 2024 23:46:03 +0200 Subject: [PATCH 34/35] Delete .github/workflows/release_esptool_pypi.yml --- .github/workflows/release_esptool_pypi.yml | 39 ---------------------- 1 file changed, 39 deletions(-) delete mode 100644 .github/workflows/release_esptool_pypi.yml diff --git a/.github/workflows/release_esptool_pypi.yml b/.github/workflows/release_esptool_pypi.yml deleted file mode 100644 index 021b11483..000000000 --- a/.github/workflows/release_esptool_pypi.yml +++ /dev/null @@ -1,39 +0,0 @@ -# This workflow will upload an esptool Python package when a release is created - -name: PyPI release - -on: - release: - types: [released] - -jobs: - build_and_upload: - - runs-on: ubuntu-latest - - steps: - - uses: actions/checkout@master - - name: Set up Python 3.7 - uses: actions/setup-python@master - with: - python-version: '3.7' - - name: Install dependencies - run: | - python -m pip install --upgrade pip - pip install twine build - - name: Build and upload esptool ${{ github.event.release.tag_name }} - env: - TWINE_USERNAME: __token__ - TWINE_PASSWORD: ${{ secrets.PYPI_PASSWORD }} - run: | - PUBLISHED_VERSION=$(curl https://pypi.org/pypi/esptool/json 2>/dev/null | jq -r '.info.version') - CURRENT_VERSION=$(python setup.py --version 2>/dev/null) - - if [ "$PUBLISHED_VERSION" == "$CURRENT_VERSION" ]; then - echo "Version ${PUBLISHED_VERSION} already published, skipping..." - exit 1 - else - echo "Packaging and publishing new esptool version: ${CURRENT_VERSION}" - python -m build - twine upload dist/* - fi From d6d176091cee81d7bd02feb90e7990b232ddec22 Mon Sep 17 00:00:00 2001 From: Jason2866 <24528715+Jason2866@users.noreply.github.com> Date: Wed, 18 Sep 2024 23:46:51 +0200 Subject: [PATCH 35/35] Update test_esptool.yml --- .github/workflows/test_esptool.yml | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/.github/workflows/test_esptool.yml b/.github/workflows/test_esptool.yml index 597c029b4..95dd8cba5 100644 --- a/.github/workflows/test_esptool.yml +++ b/.github/workflows/test_esptool.yml @@ -8,7 +8,7 @@ jobs: strategy: matrix: - python-version: ['3.7', '3.8', '3.9', '3.10', '3.11', '3.12'] + python-version: ['3.9', '3.10', '3.11', '3.12'] steps: - name: Checkout ref commit @@ -22,7 +22,7 @@ jobs: - name: Install dependencies run: | python -m pip install --upgrade pip - pip install 'setuptools>=64' + pip install setuptools - name: SoftHSM2 setup run: | @@ -51,7 +51,6 @@ jobs: steps: - name: Checkout uses: actions/checkout@master - - name: Set up Python 3.12 uses: actions/setup-python@master with: @@ -67,13 +66,12 @@ jobs: steps: - name: Checkout uses: actions/checkout@master - - - name: Set up Python 3.7 + - name: Set up Python 3.9 uses: actions/setup-python@master with: - python-version: 3.7 - - - name: Run pre-commit hooks + python-version: '3.9' + - name: Lint and format with ruff run: | pip install --extra-index-url https://dl.espressif.com/pypi -e .[dev] - pre-commit run --all-files + python -m ruff check + python -m ruff format