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appendix-target-specific.tex
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\chapter{Model Specific Features}
\section{Detecting MEGA65 Models}
While we expect the production version of the MEGA65 to be a stable platform, there may still be
cases where detecting which hardware your program is running on. This is particularly important
for the MEGA65 system software, which may need to initialise different pieces of hardware on the
different models. Also, because there is a hand-held version of the MEGA65 already in development,
which uses a slightly different resolution screen (800x480 instead of 720x576), and has a touch
screen but no hardware keyboard, you may wish to make programs that adapt to the hand-held
devices in a more graceful way. For example, you may enable touch-screen input, and restructure
on-screen selections to be large enough to be easily activated by a finger.
The simple way to detect which model of MEGA65 your program is running on, is to check the
\$D629 register (but don't forget to enable the MEGA65 I/O personality first, via \$D02F).
This contains an 8-bit hardware identifier. The following values are currently defined:
\begin{description}[align=left,labelwidth=0.2cm]
\item[\$01 (1)] MEGA65 R1
\item[\$02 (2)] MEGA65 R2
\item[\$03 (3)] MEGA65 R3
\item[\$04 (4)] MEGA65 R4
\item[\$05 -- \$0F (5 -- 15)] MEGA65 R5 -- MEGA65 R15
\item[\$21 (33)] MEGAphone (hand-held) R1
\item[\$40 (64)] Nexys4 PSRAM
\item[\$41 (65)] Nexys4DDR
\item[\$42 (66)] Nexys4DDR with widget board
\item[\$FD (253)] QMTECH Wukong A100T board
\item[\$FE (254)] Simulation run of VHDL
\end{description}
\section{MEGA65 Desktop Computer, Revisions 5 and 6}
The R5 and R6 desktop PCBs are a relatively minor reworkings of the R4 desktop PCB, initially undertaken to address supply-chain problems for some of the power regulator components. However, the opportunity was also taken to implement a few improvements:
\begin{itemize}
\item Several signals on the expansion port that were previously output or input only, are now bi-directional, which should allow the C64 core to support all known cartridges, as well as allow further improvement of cartridge compatibility for the MEGA65 core.
\item Four additional dip-switches have been added to the mainboard. All 8 dip-switches are now connected via an I2C IO expander, rather than consuming direct FPGA pins.
\item This new IO expander also provides both major and minor board revision information. Major revision is set to 5, and the minor revision initially to 0. The minor revision may change if non-compatibility breaking changes occur to the board, such as changing the QSPI flash chip, HyperRAM and/or SDRAM chips. This allows software, especially the MEGA65's Hypervisor, to detect this situation and act accordingly.
\item The microphone interface on the 3.5mm audio jack is now able to supply bias voltage to enable the use of certain types of microphones that would not have previously worked. Currently the MEGA65 core does not support use of the microphone port, although it may in future.
\end{itemize}
R6 is electrically identical to R5, and is the model that was included with MEGA65 production units shipped in the year 2024.
\section{MEGA65 Desktop Computer, Revision 4}
The R4 desktop PCB is a significant reworking of the R3 desktop PCB, with several important changes:
\begin{itemize}
\item The Intel\texttrademark{} MAX10\texttrademark{} helper FPGA has been completely removed from the board, simplifying the design, and helping to offset some of the cost increases that have occurred since the R3 board was designed. This also eliminates some difficult failure modes that could occur if the MAX10 FPGA were accidentally deconfigured.
\item The joystick ports now have the ability to be driven low by the MEGA65. This should allow devices such as the protopad\texttrademark{} to be used with the MEGA65.
\item The on-board internal speaker ports have been removed, as these were not widely used, added cost, and could have problems with overheating speakers due to the type of DACs used.
\item The Real-Time Clock (RTC) has been replaced by a RV-3032-C7. This eliminates the problems experienced with the R3 boards due to variable-quality RTC chips of the previous type, that in many cases required replacement.
\item A driver IC has been added to the digital video output to prevent back-powering problems.
\item A new 16-pin header, J21, has been added that has direct access to the joystick output lines, as well as two additional FPGA pins. This is intended to assist with certain low-level development tasks, as well as to potentially support further improvements through the addition of a specialised daughter-board.
\item A 64MiB SDRAM has been added in addition to the 8MiB HyperRAM. This will allow the porting of more of the MiSTer cores, as well as provide a larger and higher performance Attic RAM for the MEGA65 core. It is likely that the HyperRAM will not be populated on production units of the R4 board, once the SDRAM is supported by the MEGA65 core, as the SDRAM is superior in every way to the HyperRAM: It is higher speed, with lower latency, and has 8$\times$ larger capacity.
\item Greatly improved audio quality on the 3.5mm external audio jack through the addition of a high-performance audio DAC chip.
\end{itemize}
\section{MEGA65 Desktop Computer, Revision 3 \& Revision 3A}
The R3 desktop PCB is very similar to the R2 desktop PCB, with two key changes:
\begin{itemize}
\item First, the R3 PCB does not have an ADV7511 digital video driver chip, and so the I2C register block for that device is not present.
\item Second, the R3 PCB uses a different on-board amplifier for the PC speakers, which are now present in stereo, rather than mono
as on the R2 PCB. The amplifier on the R3 PCB is the same as on the MEGAphone R1 -- R2 PCBs.
However, the I2C registers are at a different address. On the MEGA65 R3 PCB, the registers are located at \$FFD71DC -- \$FFD71EF.
\end{itemize}
The only difference between the R3 and R3A is the QSPI flash chip loaded onto the board. The PCB itself is unchanged. The QSPI flash chip on the R3 has capacity for only 4 core slots (0 -- 3), including the factory core in slot 0. The R3A uses a higher-capacity QSPI flash chip that has capacity for 8 core slots (0 -- 7), including the factory core in slot 0.
R3 boards were used for the MEGA65 DevKit models that shipped in the year 2020. R3A boards were used for the MEGA65 production units shipped in 2022 and 2023.
%\DONTinput{regtable_TARGETM65R3.MEGA65.tex}
\section{MEGA65 Desktop Computer, Revision 2}
The desktop version of the MEGA65 contains a Real-Time Clock (RTC), which also includes a small amount of non-volatile memory (NVRAM)
that retains its value, even if the computer is turned off and disconnected from its power supply. The NVRAM will hold its values
for as long as the internal battery has sufficient charge. This battery also powers the Real-Time Clock (RTC) itself, which includes
a 100 year calendar spanning the years 2000 -- 2099.
The main trick with accessing the RTC from BASIC, is that we will need to use a MEGA65 Enhanced DMA operation to fetch the RTC registers, because the RTC registers sit above the 1MB barrier, which is the limit of the C65's normal DMA operations. The easiest way to do this is to construct a little DMA list in memory somewhere, and make an assembly language routine that uses it. Something like this (using BASIC 65 in C65-mode):
\begin{tcolorbox}[colback=black,coltext=white]
\verbatimfont{\codefont}
\begin{verbatim}
10 RESTORE 110:FORI=0TO43:READA$:POKE1024+I,DEC(A$):NEXT:BANK 128:SYS1042
20 S=PEEK(1056):M=PEEK(1057):H=PEEK(1058)
30 D=PEEK(1059):MM=PEEK(1060):Y=PEEK(1061)+DEC("2000")
40 IF H AND 128 GOTO 80
50 PRINT "THE TIME IS ";RIGHT$(HEX$(H AND 63),2);":";RIGHT$(HEX$(M),2);".";RIGHT$(HEX$(S),2)
60 IF H AND 32 THEN PRINT "PM": ELSE PRINT "AM"
70 GOTO 90
80 PRINT "THE TIME IS ";RIGHT$(HEX$(H AND 63),1);":";RIGHT$(HEX$(M),2);".";RIGHT$(HEX$(S),2)
90 PRINT "THE DATE IS ";RIGHT$(HEX$(D),2);".";RIGHT$(HEX$(MM),2);".";HEX$(Y)
100 END
110 DATA 0B,80,FF,81,00,00,00,08,00,10,71,0D,20,04,00,00,00,00
120 DATA A9,47,8D,2F,D0,A9,53,8D,2F,D0,A9,00,8D,02,D7,A9
130 DATA 04,8D,01,D7,A9,00,8D,05,D7,60
\end{verbatim}
\end{tcolorbox}
This program works by setting up a DMA list in memory at 1,024 (\$0400) (unused normally on the C65), followed by a routine at 1,042 (\$0412) which ensures we have MEGA65 registers un-hidden, and then sets the DMA controller registers appropriately to trigger the DMA job, and then returns. The rest of the BASIC code PEEKs out the RTC registers that the DMA job copied to 1,024 - 1,032 (\$0400 -- \$0407), and interprets them appropriately to print the time.
The curious can use the MONITOR command, and then D1012 to see the routine.
If you want a running clock, you could replace line 100 with GOTO 10. Doing that, you will get a result something like the following:
\begin{tcolorbox}[colback=black,coltext=white]
\verbatimfont{\codefont}
\begin{verbatim}
THE TIME IS 10:05:36 PM
THE DATE IS 20.02.2020
THE TIME IS 10:05:36 PM
THE DATE IS 20.02.2020
THE TIME IS 10:05:36 PM
THE DATE IS 20.02.2020
THE TIME IS 10:05:36 PM
THE DATE IS 20.02.2020
...
\end{verbatim}
\end{tcolorbox}
If you first POKE0,65 to set the CPU to full speed, the whole program can run many times per second. There is an occasional glitch, if the RTC registers are read while being updated by the machine, so we really should de-bounce the values by reading the time a couple of times in succession, and if the values aren't the same both times, then repeat the process until they are. This is left as an exercise for the reader.
NOTE: These registers are not yet fully documented.
%\DONTinput{regtable_TARGETM65R2.MEGA65.tex}
\section{MEGAphone Handheld, Revisions 1 and 2}
The MEGAphone revision 1 and 2 contain a Real-Time Clock (RTC), however this RTC does not include a non-volatile memory (NVRAM)
area. Other specific features of the MEGAphone revisions 1 and 2 include a 3-axis accelerometer, including analog to digital
converters (ADCs), amplifier controller for loud speakers, and several I2C I/O expanders, that are used to connect the joy-pad and other peripherals. The I/O expanders are
fully integrated into the MEGAphone design, and thus there should be no normal need to read these registers directly. The I/O
expanders are, however, also responsible for power control of the various sub-systems of the MEGAphone.
NOTE: These registers are not yet fully documented.
%\DONTinput{regtable_TARGETMEGAPHONER1.MEGA65.tex}
\section{Nexys4 DDR FPGA Board}
NOTE: These registers are not yet fully documented.
%\DONTinput{regtable_TARGETN4DDR.MEGA65.tex}