From 3ea604f1d1f916c678707c12b764175e09e2d167 Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Wed, 25 Nov 2020 22:10:28 -0800
Subject: [PATCH 01/29] Initial Anet ET4 Board Support
---
Marlin/src/core/boards.h | 1 +
Marlin/src/pins/pins.h | 2 +
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 170 ++++++++
.../share/PlatformIO/boards/ANET_ET4.json | 46 ++
.../share/PlatformIO/ldscripts/anet_et4.ld | 186 +++++++++
.../share/PlatformIO/scripts/anet_et4.py | 12 +
.../variants/ANET_ET4/PeripheralPins.c | 395 ++++++++++++++++++
.../variants/ANET_ET4/PinNamesVar.h | 50 +++
.../variants/ANET_ET4/hal_conf_extra.h | 55 +++
.../PlatformIO/variants/ANET_ET4/ldscript.ld | 202 +++++++++
.../PlatformIO/variants/ANET_ET4/variant.cpp | 268 ++++++++++++
.../PlatformIO/variants/ANET_ET4/variant.h | 385 +++++++++++++++++
platformio.ini | 22 +
13 files changed, 1794 insertions(+)
create mode 100644 Marlin/src/pins/stm32f4/pins_ANET_ET4.h
create mode 100644 buildroot/share/PlatformIO/boards/ANET_ET4.json
create mode 100644 buildroot/share/PlatformIO/ldscripts/anet_et4.ld
create mode 100644 buildroot/share/PlatformIO/scripts/anet_et4.py
create mode 100644 buildroot/share/PlatformIO/variants/ANET_ET4/PeripheralPins.c
create mode 100644 buildroot/share/PlatformIO/variants/ANET_ET4/PinNamesVar.h
create mode 100644 buildroot/share/PlatformIO/variants/ANET_ET4/hal_conf_extra.h
create mode 100644 buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld
create mode 100644 buildroot/share/PlatformIO/variants/ANET_ET4/variant.cpp
create mode 100644 buildroot/share/PlatformIO/variants/ANET_ET4/variant.h
diff --git a/Marlin/src/core/boards.h b/Marlin/src/core/boards.h
index 1d1f3972d9d7..7aba2fd0a7c8 100644
--- a/Marlin/src/core/boards.h
+++ b/Marlin/src/core/boards.h
@@ -361,6 +361,7 @@
#define BOARD_FYSETC_S6_V2_0 4216 // FYSETC S6 v2.0 board
#define BOARD_FLYF407ZG 4217 // FLYF407ZG board (STM32F407ZG)
#define BOARD_MKS_ROBIN2 4218 // MKS_ROBIN2 (STM32F407ZE)
+#define BOARD_ANET_ET4 4219 // ANET_ET4 (STM32F407VGT6)
//
// ARM Cortex M7
diff --git a/Marlin/src/pins/pins.h b/Marlin/src/pins/pins.h
index 1660d16dd2da..06adc8f60fd5 100644
--- a/Marlin/src/pins/pins.h
+++ b/Marlin/src/pins/pins.h
@@ -646,6 +646,8 @@
#include "stm32f4/pins_MKS_ROBIN2.h" // STM32F4 env:MKS_ROBIN2
#elif MB(FYSETC_S6_V2_0)
#include "stm32f4/pins_FYSETC_S6_V2_0.h" // STM32F4 env:FYSETC_S6
+#elif MB(ANET_ET4)
+ #include "stm32f4/pins_ANET_ET4.h" // STM32F4 env:ANET_ET4
//
// ARM Cortex M7
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
new file mode 100644
index 000000000000..3d5ca06bc5cd
--- /dev/null
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -0,0 +1,170 @@
+/**
+ * Marlin 3D Printer Firmware
+ * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
+ *
+ * Based on Sprinter and grbl.
+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ *
+ */
+
+#pragma once
+
+#if NOT_TARGET(STM32F4)
+ #error "Oops! Select an STM32F4 board in 'Tools > Board.'"
+#elif HOTENDS > 1 || E_STEPPERS > 1
+ #error "Anet ET4 only supports one hotend / E-stepper. Comment out this line to continue."
+#endif
+
+#define BOARD_INFO_NAME "Anet ET4"
+
+//
+// EEPROM
+//
+// Use one of these or SDCard-based Emulation will be used
+#if NO_EEPROM_SELECTED
+ //#define SRAM_EEPROM_EMULATION // Use BackSRAM-based EEPROM emulation
+ #define FLASH_EEPROM_EMULATION // Use Flash-based EEPROM emulation
+ //#define IIC_BL24CXX_EEPROM // Use I2C EEPROM onboard IC (AT24C04C, Size 4KB, PageSize 16B)
+#endif
+
+#if ENABLED(FLASH_EEPROM_EMULATION)
+ // Decrease delays and flash wear by spreading writes across the
+ // 128 kB sector allocated for EEPROM emulation.
+ #define FLASH_EEPROM_LEVELING
+#elif ENABLED(IIC_BL24CXX_EEPROM)
+ #define IIC_EEPROM_SDA PB11
+ #define IIC_EEPROM_SCL PB10
+ #define EEPROM_DEVICE_ADDRESS 0xA0
+ #define MARLIN_EEPROM_SIZE 0x1000 // 4KB
+#endif
+
+//
+// Limit Switches
+//
+#define X_STOP_PIN PC13
+#define Y_STOP_PIN PE12
+#define Z_STOP_PIN PE11
+
+//
+// Z Probe
+//
+#ifndef Z_MIN_PROBE_PIN
+ #define Z_MIN_PROBE_PIN PC3
+#endif
+
+//
+// Filament Runout Sensor
+//
+#ifndef FIL_RUNOUT_PIN
+ #define FIL_RUNOUT_PIN PA2
+#endif
+
+//
+// Power Loss Detection
+//
+#ifndef POWER_LOSS_PIN
+ #define POWER_LOSS_PIN PA8
+#endif
+
+//
+// LED PIN
+//
+#define LED_PIN PD12
+
+//
+// Steppers
+//
+#define X_STEP_PIN PB6
+#define X_DIR_PIN PB5
+#define X_ENABLE_PIN PB7
+
+#define Y_STEP_PIN PB3
+#define Y_DIR_PIN PD6
+#define Y_ENABLE_PIN PB4
+
+#define Z_STEP_PIN PA12
+#define Z_DIR_PIN PA11
+#define Z_ENABLE_PIN PA15
+
+#define E0_STEP_PIN PB9
+#define E0_DIR_PIN PB8
+#define E0_ENABLE_PIN PE0
+
+//
+// Temperature Sensors
+//
+#define TEMP_0_PIN PA1
+#define TEMP_BED_PIN PA4
+
+//
+// Heaters / Fans
+//
+#define HEATER_0_PIN PA0
+#define HEATER_BED_PIN PE2
+#define FAN_PIN PE3
+#define FAN1_PIN PE1
+
+#ifndef E0_AUTO_FAN_PIN
+ #define E0_AUTO_FAN_PIN FAN1_PIN
+#endif
+
+//
+// LCD / Controller
+//
+#define TFT_DRIVER ST7789
+#define TFT_RESET_PIN PE6
+#define TFT_CS_PIN PD7
+#define TFT_RS_PIN PD13
+
+#if ENABLED(TOUCH_SCREEN)
+ #define TOUCH_CS_PIN PB2
+ #define TOUCH_SCK_PIN PB0
+ #define TOUCH_MOSI_PIN PE5
+ #define TOUCH_MISO_PIN PE4
+ #define TOUCH_INT_PIN PB1
+#endif
+
+//
+// SD Card
+//
+//#define SDIO_SUPPORT
+
+#ifndef SDCARD_CONNECTION
+ #define SDCARD_CONNECTION ONBOARD
+#endif
+
+#if ENABLED(SDSUPPORT)
+
+ #define SDIO_D0_PIN PC8
+ #define SDIO_D1_PIN PC9
+ #define SDIO_D2_PIN PC10
+ #define SDIO_D3_PIN PC11
+ #define SDIO_CK_PIN PC12
+ #define SDIO_CMD_PIN PD2
+
+ #if DISABLED(SDIO_SUPPORT)
+ #define SOFTWARE_SPI
+ #define SDSS SDIO_D3_PIN
+ #define SCK_PIN SDIO_CK_PIN
+ #define MISO_PIN SDIO_D0_PIN
+ #define MOSI_PIN SDIO_CMD_PIN
+ #endif
+
+ #ifndef SD_DETECT_PIN
+ #define SD_DETECT_PIN PD3
+ #endif
+
+#endif
diff --git a/buildroot/share/PlatformIO/boards/ANET_ET4.json b/buildroot/share/PlatformIO/boards/ANET_ET4.json
new file mode 100644
index 000000000000..1dfd58e4a371
--- /dev/null
+++ b/buildroot/share/PlatformIO/boards/ANET_ET4.json
@@ -0,0 +1,46 @@
+{
+ "build": {
+ "core": "stm32",
+ "cpu": "cortex-m4",
+ "extra_flags": "-DSTM32F4 -DSTM32F407xx -DSTM32F40_41xxx",
+ "f_cpu": "168000000L",
+ "hwids": [
+ [
+ "0x1EAF",
+ "0x0003"
+ ],
+ [
+ "0x0483",
+ "0x3748"
+ ]
+ ],
+ "mcu": "stm32f407vgt6",
+ "variant": "ANET_ET4"
+ },
+ "debug": {
+ "jlink_device": "STM32F407VG",
+ "openocd_target": "stm32f4x",
+ "svd_path": "STM32F40x.svd"
+ },
+ "frameworks": [
+ "arduino",
+ "stm32cube"
+ ],
+ "name": "STM32F407VG (192k RAM. 1024k Flash)",
+ "upload": {
+ "disable_flushing": false,
+ "maximum_ram_size": 196608,
+ "maximum_size": 1048576,
+ "protocol": "jlink",
+ "protocols": [
+ "stlink",
+ "dfu",
+ "jlink"
+ ],
+ "require_upload_port": true,
+ "use_1200bps_touch": false,
+ "wait_for_upload_port": false
+ },
+ "url": "http://www.st.com/en/microcontrollers/stm32f407vg.html",
+ "vendor": "Generic"
+}
diff --git a/buildroot/share/PlatformIO/ldscripts/anet_et4.ld b/buildroot/share/PlatformIO/ldscripts/anet_et4.ld
new file mode 100644
index 000000000000..aa0b1dd9cb36
--- /dev/null
+++ b/buildroot/share/PlatformIO/ldscripts/anet_et4.ld
@@ -0,0 +1,186 @@
+/*
+*****************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Abstract : Linker script for STM32F407VGTx Device with
+** 1024KByte FLASH, 128KByte RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+**
+** Distribution: The file is distributed as is, without any warranty
+** of any kind.
+**
+** (c)Copyright Ac6.
+** You may use this file as-is or modify it according to the needs of your
+** project. Distribution of this file (unmodified or modified) is not
+** permitted. Ac6 permit registered System Workbench for MCU users the
+** rights to distribute the assembled, compiled & linked contents of this
+** file as part of an application binary file, provided that it is built
+** using the System Workbench for MCU toolchain.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20010000; /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;; /* required amount of heap */
+_Min_Stack_Size = 0x400;; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
+}
+
+/* Define output sections */
+SECTIONS
+{
+ /* The startup code goes first into FLASH */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data goes into FLASH */
+ .text ALIGN(4):
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data goes into FLASH */
+ .rodata ALIGN(4):
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+ .ARM : {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ } >FLASH
+
+ .preinit_array :
+ {
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } >FLASH
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } >FLASH
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >FLASH
+
+ /* used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections goes into RAM, load LMA copy after code */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+ } >RAM AT> FLASH
+
+ _siccmram = LOADADDR(.ccmram);
+
+ /* CCM-RAM section
+ *
+ * IMPORTANT NOTE!
+ * If initialized variables will be placed in this section,
+ * the startup code needs to be modified to copy the init-values.
+ */
+ .ccmram :
+ {
+ . = ALIGN(4);
+ _sccmram = .; /* create a global symbol at ccmram start */
+ *(.ccmram)
+ *(.ccmram*)
+
+ . = ALIGN(4);
+ _eccmram = .; /* create a global symbol at ccmram end */
+ } >CCMRAM AT> FLASH
+
+
+ /* Uninitialized data section */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough RAM left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(4);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(4);
+ } >RAM
+
+
+
+ /* Remove information from the standard libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/buildroot/share/PlatformIO/scripts/anet_et4.py b/buildroot/share/PlatformIO/scripts/anet_et4.py
new file mode 100644
index 000000000000..41d21e30b4b8
--- /dev/null
+++ b/buildroot/share/PlatformIO/scripts/anet_et4.py
@@ -0,0 +1,12 @@
+import os,sys
+Import("env")
+
+from SCons.Script import DefaultEnvironment
+board = DefaultEnvironment().BoardConfig()
+
+custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/anet_et4.ld")
+for i, flag in enumerate(env["LINKFLAGS"]):
+ if "-Wl,-T" in flag:
+ env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
+ elif flag == "-T":
+ env["LINKFLAGS"][i + 1] = custom_ld_script
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/PeripheralPins.c b/buildroot/share/PlatformIO/variants/ANET_ET4/PeripheralPins.c
new file mode 100644
index 000000000000..d1fbc37a0be9
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/ANET_ET4/PeripheralPins.c
@@ -0,0 +1,395 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2020, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ * Automatically generated from STM32F407V(E-G)Tx.xml
+ */
+#include "Arduino.h"
+#include "PeripheralPins.h"
+
+/* =====
+ * Note: Commented lines are alternative possibilities which are not used per default.
+ * If you change them, you will have to know what you do
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+WEAK const PinMap PinMap_ADC[] = {
+ {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
+ {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
+ {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
+ {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
+ {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
+ {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
+ {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
+ {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
+ {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
+ {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
+ {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
+ {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
+ {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
+ {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
+ {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
+ {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
+ {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
+ {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
+ {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
+ {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
+ {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
+ {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
+ {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
+ {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
+ {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
+ {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
+ {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
+ {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
+ {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
+ {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
+ {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
+ {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
+ {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
+ {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
+ {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
+ {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
+ {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
+ {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
+ {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
+ {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
+ {NC, NP, 0}
+};
+#endif
+
+//*** DAC ***
+
+#ifdef HAL_DAC_MODULE_ENABLED
+WEAK const PinMap PinMap_DAC[] = {
+ {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
+ {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
+ {NC, NP, 0}
+};
+#endif
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SDA[] = {
+ {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+ {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SCL[] = {
+ {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+ {NC, NP, 0}
+};
+#endif
+
+//*** PWM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+WEAK const PinMap PinMap_PWM[] = {
+ {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+ {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+ {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+ {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+ {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+ {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
+ {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+ {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+ {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
+ {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+ {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+ {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+ {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+ {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+ {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+ {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+ {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+ {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+ {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+ {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+ {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+ {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+ {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+ {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+ {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+ {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+ {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+ {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+ {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+ {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+ {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+ {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+ {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+ {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+ {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+ {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+ {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+ {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+ {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+ {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+ {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+ {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+ {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+ {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
+ {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+ {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+ {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
+ {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+ {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+ {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+ {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+ {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+ {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
+ {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+ {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
+ {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+ {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+ {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+ {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+ {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+ {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+ {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+ {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+ {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+ {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+ {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+ {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+ {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+ {NC, NP, 0}
+};
+#endif
+
+//*** SERIAL ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_TX[] = {
+ {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+ {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+ {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+ {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RX[] = {
+ {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+ {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+ {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+ {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RTS[] = {
+ {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_CTS[] = {
+ {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {NC, NP, 0}
+};
+#endif
+
+//*** SPI ***
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MOSI[] = {
+ {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+ {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MISO[] = {
+ {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+ {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SCLK[] = {
+ {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+ {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SSEL[] = {
+ {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+ {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+ {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+ {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+ {NC, NP, 0}
+};
+#endif
+
+//*** CAN ***
+
+#ifdef HAL_CAN_MODULE_ENABLED
+WEAK const PinMap PinMap_CAN_RD[] = {
+ {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+ {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+ {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_CAN_MODULE_ENABLED
+WEAK const PinMap PinMap_CAN_TD[] = {
+ {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+ {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+ {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {NC, NP, 0}
+};
+#endif
+
+//*** ETHERNET ***
+
+#ifdef HAL_ETH_MODULE_ENABLED
+WEAK const PinMap PinMap_Ethernet[] = {
+ {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
+ {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK
+ {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
+ {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
+ {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV
+ {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
+ {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
+ {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
+ {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
+ {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
+ {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
+ {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
+ {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
+ {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
+ {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
+ {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
+ {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
+ {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
+ {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
+ {NC, NP, 0}
+};
+#endif
+
+//*** No QUADSPI ***
+
+//*** USB ***
+
+#ifdef HAL_PCD_MODULE_ENABLED
+WEAK const PinMap PinMap_USB_OTG_FS[] = {
+ {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
+ {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
+ {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
+ {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
+ {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
+ {NC, NP, 0}
+};
+#endif
+
+#ifdef HAL_PCD_MODULE_ENABLED
+WEAK const PinMap PinMap_USB_OTG_HS[] = {
+#ifdef USE_USB_HS_IN_FS
+ {PA_4, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF
+ {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
+ {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
+ {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
+ {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
+#else
+ {PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
+ {PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK
+ {PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
+ {PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
+ {PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
+ {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
+ {PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4
+ {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
+ {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
+ {PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
+ {PC_2, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
+ {PC_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
+#endif /* USE_USB_HS_IN_FS */
+ {NC, NP, 0}
+};
+#endif
+
+//*** SD ***
+
+#ifdef HAL_SD_MODULE_ENABLED
+WEAK const PinMap PinMap_SD[] = {
+ {PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4
+ {PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5
+ {PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6
+ {PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7
+ {PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
+ {PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1
+ {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2
+ {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3
+ {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK
+ {PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD
+ {NC, NP, 0}
+};
+#endif
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/PinNamesVar.h b/buildroot/share/PlatformIO/variants/ANET_ET4/PinNamesVar.h
new file mode 100644
index 000000000000..24248859373b
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/ANET_ET4/PinNamesVar.h
@@ -0,0 +1,50 @@
+/* SYS_WKUP */
+#ifdef PWR_WAKEUP_PIN1
+ SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+ SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+ SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+ SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+ SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+ SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+ SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+ SYS_WKUP8 = NC,
+#endif
+/* USB */
+#ifdef USBCON
+ USB_OTG_FS_SOF = PA_8,
+ USB_OTG_FS_VBUS = PA_9,
+ USB_OTG_FS_ID = PA_10,
+ USB_OTG_FS_DM = PA_11,
+ USB_OTG_FS_DP = PA_12,
+ USB_OTG_HS_ULPI_D0 = PA_3,
+ USB_OTG_HS_SOF = PA_4,
+ USB_OTG_HS_ULPI_CK = PA_5,
+ USB_OTG_HS_ULPI_D1 = PB_0,
+ USB_OTG_HS_ULPI_D2 = PB_1,
+ USB_OTG_HS_ULPI_D7 = PB_5,
+ USB_OTG_HS_ULPI_D3 = PB_10,
+ USB_OTG_HS_ULPI_D4 = PB_11,
+ USB_OTG_HS_ID = PB_12,
+ USB_OTG_HS_ULPI_D5 = PB_12,
+ USB_OTG_HS_ULPI_D6 = PB_13,
+ USB_OTG_HS_VBUS = PB_13,
+ USB_OTG_HS_DM = PB_14,
+ USB_OTG_HS_DP = PB_15,
+ USB_OTG_HS_ULPI_STP = PC_0,
+ USB_OTG_HS_ULPI_DIR = PC_2,
+ USB_OTG_HS_ULPI_NXT = PC_3,
+#endif
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/ANET_ET4/hal_conf_extra.h
new file mode 100644
index 000000000000..94b373396e2b
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/ANET_ET4/hal_conf_extra.h
@@ -0,0 +1,55 @@
+#pragma once
+
+#define HAL_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_CRC_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+//#define HAL_RTC_MODULE_ENABLED Real Time Clock...do we use it?
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_USART_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+//#define HAL_UART_MODULE_ENABLED // by default
+//#define HAL_PCD_MODULE_ENABLED // Since STM32 v3.10700.191028 this is automatically added if any type of USB is enabled (as in Arduino IDE)
+#define HAL_SD_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+
+#undef HAL_DAC_MODULE_ENABLED
+#undef HAL_FLASH_MODULE_ENABLED
+#undef HAL_CAN_MODULE_ENABLED
+#undef HAL_CAN_LEGACY_MODULE_ENABLED
+#undef HAL_CEC_MODULE_ENABLED
+#undef HAL_CRYP_MODULE_ENABLED
+#undef HAL_DCMI_MODULE_ENABLED
+#undef HAL_DMA2D_MODULE_ENABLED
+#undef HAL_ETH_MODULE_ENABLED
+#undef HAL_NAND_MODULE_ENABLED
+#undef HAL_NOR_MODULE_ENABLED
+#undef HAL_PCCARD_MODULE_ENABLED
+#undef HAL_SDRAM_MODULE_ENABLED
+#undef HAL_HASH_MODULE_ENABLED
+//#undef HAL_EXTI_MODULE_ENABLED
+#undef HAL_SMBUS_MODULE_ENABLED
+#undef HAL_I2S_MODULE_ENABLED
+#undef HAL_IWDG_MODULE_ENABLED
+#undef HAL_LTDC_MODULE_ENABLED
+#undef HAL_DSI_MODULE_ENABLED
+#undef HAL_QSPI_MODULE_ENABLED
+#undef HAL_RNG_MODULE_ENABLED
+#undef HAL_SAI_MODULE_ENABLED
+#undef HAL_IRDA_MODULE_ENABLED
+#undef HAL_SMARTCARD_MODULE_ENABLED
+#undef HAL_WWDG_MODULE_ENABLED
+#undef HAL_HCD_MODULE_ENABLED
+#undef HAL_FMPI2C_MODULE_ENABLED
+#undef HAL_SPDIFRX_MODULE_ENABLED
+#undef HAL_DFSDM_MODULE_ENABLED
+#undef HAL_LPTIM_MODULE_ENABLED
+#undef HAL_MMC_MODULE_ENABLED
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld b/buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld
new file mode 100644
index 000000000000..bb578cd08cc8
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld
@@ -0,0 +1,202 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32F407VGTx Device from stm32f4 series
+** 1024Kbytes FLASH
+** 64Kbytes CCMRAM
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2020 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM : {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/variant.cpp b/buildroot/share/PlatformIO/variants/ANET_ET4/variant.cpp
new file mode 100644
index 000000000000..218abeafa458
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/ANET_ET4/variant.cpp
@@ -0,0 +1,268 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Digital PinName array
+// This array allows to wrap Arduino pin number(Dx or x)
+// to STM32 PinName (PX_n)
+const PinName digitalPin[] = {
+#if STM32F4X_PIN_NUM >= 64 //64 pins mcu, 51 gpio
+ PC_13, //D0
+ PC_14, //D1 - OSC32_IN
+ PC_15, //D2 - OSC32_OUT
+ PH_0, //D3 - OSC_IN
+ PH_1, //D4 - OSC_OUT
+ PB_2, //D5 - BOOT1
+ PB_10, //D6 - 1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
+ PB_11, //D7 - 1:I2C2_SDA / USART3_RX / TIM2_CH4
+ PB_12, //D8 - 1:SPI2_NSS / OTG_HS_ID
+ PB_13, //D9 - 1:SPI2_SCK 2:OTG_HS_VBUS
+ PB_14, //D10 - 1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
+ PB_15, //D11 - SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
+ PC_6, //D12 - 1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
+ PC_7, //D13 - 1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
+ PC_8, //D14 - 1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
+ PC_9, //D15 - 1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
+ PA_8, //D16 - 1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
+ PA_9, //D17 - 1:USART1_TX / TIM1_CH2 2:OTG_FS_VBUS
+ PA_10, //D18 - 1:USART1_RX / TIM1_CH3 / OTG_FS_ID
+ PA_11, //D19 - 1:TIM1_CH4 / OTG_FS_DM
+ PA_12, //D20 - 1:OTG_FS_DP
+ PA_13, //D21 - 0:JTMS-SWDIO
+ PA_14, //D22 - 0:JTCK-SWCLK
+ PA_15, //D23 - 0:JTDI 1:SPI3_NSS / SPI1_NSS
+ PC_10, //D24 - 1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
+ PC_11, //D25 - 1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
+ PC_12, //D26 - 1:UART5_TX / SPI3_MOSI / SDIO_CK
+ PD_2, //D27 - 1:UART5_RX / SDIO_CMD
+ PB_3, //D28 - 0:JTDO 1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
+ PB_4, //D29 - 0:NJTRST 1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
+ PB_5, //D30 - 1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
+ PB_6, //D31 - 1:I2C1_SCL / TIM4_CH1 / USART1_TX
+ PB_7, //D32 - 1:I2C1_SDA / TIM4_CH2 / USART1_RX
+ PB_8, //D33 - 1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
+ PB_9, //D34 - 1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
+ PA_0, //D35/A0 - 1:UART4_TX / TIM5_CH1 2:ADC123_IN0
+ PA_1, //D36/A1 - 1:UART4_RX / TIM5_CH2 / TIM2_CH2 2:ADC123_IN1
+ PA_2, //D37/A2 - 1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3 2:ADC123_IN2
+ PA_3, //D38/A3 - 1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4 2:ADC123_IN3
+ PA_4, //D39/A4 - NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK 2:ADC12_IN4 / DAC_OUT1
+ PA_5, //D40/A5 - NOT FT 1:SPI1_SCK 2:ADC12_IN5 / DAC_OUT2
+ PA_6, //D41/A6 - 1:SPI1_MISO / TIM13_CH1 / TIM3_CH1 2:ADC12_IN6
+ PA_7, //D42/A7 - 1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2 2:ADC12_IN7
+ PB_0, //D43/A8 - 1:TIM3_CH3 2:ADC12_IN8
+ PB_1, //D44/A9 - 1:TIM3_CH4 2:ADC12_IN9
+ PC_0, //D45/A10 - 1: 2:ADC123_IN10
+ PC_1, //D46/A11 - 1: 2:ADC123_IN11
+ PC_2, //D47/A12 - 1:SPI2_MISO 2:ADC123_IN12
+ PC_3, //D48/A13 - 1:SPI2_MOSI 2:ADC123_IN13
+ PC_4, //D49/A14 - 1: 2:ADC12_IN14
+ PC_5, //D50/A15 - 1: 2:ADC12_IN15
+ #if STM32F4X_PIN_NUM >= 144
+ PF_3, //D51/A16 - 1:FSMC_A3 2:ADC3_IN9
+ PF_4, //D52/A17 - 1:FSMC_A4 2:ADC3_IN14
+ PF_5, //D53/A18 - 1:FSMC_A5 2:ADC3_IN15
+ PF_6, //D54/A19 - 1:TIM10_CH1 2:ADC3_IN4
+ PF_7, //D55/A20 - 1:TIM11_CH1 2:ADC3_IN5
+ PF_8, //D56/A21 - 1:TIM13_CH1 2:ADC3_IN6
+ PF_9, //D57/A22 - 1;TIM14_CH1 2:ADC3_IN7
+ PF_10, //D58/A23 - 2:ADC3_IN8
+ #endif
+#endif
+#if STM32F4X_PIN_NUM >= 100 //100 pins mcu, 82 gpio
+ PE_2, //D59 - 1:FSMC_A23
+ PE_3, //D60 - 1:FSMC_A19
+ PE_4, //D61 - 1:FSMC_A20
+ PE_5, //D62 - 1:FSMC_A21
+ PE_6, //D63 - 1:FSMC_A22
+ PE_7, //D64 - 1:FSMC_D4
+ PE_8, //D65 - 1:FSMC_D5
+ PE_9, //D66 - 1:FSMC_D6 / TIM1_CH1
+ PE_10, //D67 - 1:FSMC_D7
+ PE_11, //D68 - 1:FSMC_D8 / TIM1_CH2
+ PE_12, //D69 - 1:FSMC_D9
+ PE_13, //D70 - 1:FSMC_D10 / TIM1_CH3
+ PE_14, //D71 - 1:FSMC_D11 / TIM1_CH4
+ PE_15, //D72 - 1:FSMC_D12
+ PD_8, //D73 - 1:FSMC_D13 / USART3_TX
+ PD_9, //D74 - 1:FSMC_D14 / USART3_RX
+ PD_10, //D75 - 1:FSMC_D15
+ PD_11, //D76 - 1:FSMC_A16
+ PD_12, //D77 - 1:FSMC_A17 / TIM4_CH1
+ PD_13, //D78 - 1:FSMC_A18 / TIM4_CH2
+ PD_14, //D79 - 1:FSMC_D0 / TIM4_CH3
+ PD_15, //D80 - 1:FSMC_D1 / TIM4_CH4
+ PD_0, //D81 - 1:FSMC_D2
+ PD_1, //D82 - 1:FSMC_D3
+ PD_3, //D83 - 1:FSMC_CLK
+ PD_4, //D84 - 1:FSMC_NOE
+ PD_5, //D85 - 1:USART2_TX
+ PD_6, //D86 - 1:USART2_RX
+ PD_7, //D87
+ PE_0, //D88
+ PE_1, //D89
+#endif
+#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
+ PF_0, //D90 - 1:FSMC_A0 / I2C2_SDA
+ PF_1, //D91 - 1:FSMC_A1 / I2C2_SCL
+ PF_2, //D92 - 1:FSMC_A2
+ PF_11, //D93
+ PF_12, //D94 - 1:FSMC_A6
+ PF_13, //D95 - 1:FSMC_A7
+ PF_14, //D96 - 1:FSMC_A8
+ PF_15, //D97 - 1:FSMC_A9
+ PG_0, //D98 - 1:FSMC_A10
+ PG_1, //D99 - 1:FSMC_A11
+ PG_2, //D100 - 1:FSMC_A12
+ PG_3, //D101 - 1:FSMC_A13
+ PG_4, //D102 - 1:FSMC_A14
+ PG_5, //D103 - 1:FSMC_A15
+ PG_6, //D104
+ PG_7, //D105
+ PG_8, //D106
+ PG_9, //D107 - 1:USART6_RX
+ PG_10, //D108 - 1:FSMC_NE3
+ PG_11, //D109
+ PG_12, //D110 - 1:FSMC_NE4
+ PG_13, //D111 - 1:FSMC_A24
+ PG_14, //D112 - 1:FSMC_A25 / USART6_TX
+ PG_15, //D113
+#endif
+#if STM32F4X_PIN_NUM >= 176 //176 pins mcu, 140 gpio
+ PI_8, //D114
+ PI_9, //D115
+ PI_10, //D116
+ PI_11, //D117
+ PH_2, //D118
+ PH_3, //D119
+ PH_4, //D120 - 1:I2C2_SCL
+ PH_5, //D121 - 1:I2C2_SDA
+ PH_6, //D122 - 1:TIM12_CH1
+ PH_7, //D123 - 1:I2C3_SCL
+ PH_8, //D124 - 1:I2C3_SDA
+ PH_9, //D125 - 1:TIM12_CH2
+ PH_10, //D126 - 1:TIM5_CH1
+ PH_11, //D127 - 1:TIM5_CH2
+ PH_12, //D128 - 1:TIM5_CH3
+ PH_13, //D129
+ PH_14, //D130
+ PH_15, //D131
+ PI_0, //D132 - 1:TIM5_CH4 / SPI2_NSS
+ PI_1, //D133 - 1:SPI2_SCK
+ PI_2, //D134 - 1:TIM8_CH4 /SPI2_MISO
+ PI_3, //D135 - 1:SPI2_MOS
+ PI_4, //D136
+ PI_5, //D137 - 1:TIM8_CH1
+ PI_6, //D138 - 1:TIM8_CH2
+ PI_7, //D139 - 1:TIM8_CH3
+#endif
+};
+
+// If analog pins are not contiguous in the digitalPin array:
+// Add the analogInputPin array without defining NUM_ANALOG_FIRST
+// Analog (Ax) pin number array
+// where x is the index to retrieve the digital pin number
+//const uint32_t analogInputPin[] = {
+// //PXn, //Ax = Dx
+// 2, //A0 = Dx
+// 8, //A1 = Dy
+// 3 //A2 = Dz
+//}
+
+#ifdef __cplusplus
+}
+#endif
+
+// ----------------------------------------------------------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+/**
+ * @brief System Clock Configuration
+ * The system Clock is configured as follow :
+ * System Clock source = PLL (HSE)
+ * SYSCLK(Hz) = 168000000
+ * HCLK(Hz) = 168000000
+ * AHB Prescaler = 1
+ * APB1 Prescaler = 4
+ * APB2 Prescaler = 2
+ * HSI Frequency(Hz) = 16000000
+ * PLL_M = 8
+ * PLL_N = 336
+ * PLL_P = 2
+ * PLL_Q = 7
+ * VDD(V) = 3.3
+ * Main regulator output voltage = Scale2 mode
+ * Flash Latency(WS) = 2
+ * @param None
+ * @retval None
+ */
+WEAK void SystemClock_Config() {
+
+ RCC_OscInitTypeDef RCC_OscInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+ /**Configure the main internal regulator output voltage
+ */
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /**Initializes the CPU, AHB and APB busses clocks
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLM = 8;
+ RCC_OscInitStruct.PLL.PLLN = 336;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = 7;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ _Error_Handler(__FILE__, __LINE__);
+ }
+
+ /**Initializes the CPU, AHB and APB busses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+ _Error_Handler(__FILE__, __LINE__);
+ }
+
+ /**Configure the Systick interrupt time
+ */
+ HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
+
+ /**Configure the Systick
+ */
+ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+ /* SysTick_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/variant.h b/buildroot/share/PlatformIO/variants/ANET_ET4/variant.h
new file mode 100644
index 000000000000..ff48b8aebcaf
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/ANET_ET4/variant.h
@@ -0,0 +1,385 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+/*----------------------------------------------------------------------------
+ * Pins
+ *----------------------------------------------------------------------------*/
+
+// Define pin names to match digital pin number --> Dx
+// It could be used with preprocessor tests (e.g. #if PXn == 3)
+// so an enum will not work.
+#ifdef STM32F405RX
+ #define STM32F4X_PIN_NUM 64 //64 pins mcu, 51 gpio
+ #define STM32F4X_GPIO_NUM 51
+ #define STM32F4X_ADC_NUM 16
+#elif defined(STM32F407_5VX) || defined(STM32F407VG)
+ #define STM32F4X_PIN_NUM 100 //100 pins mcu, 82 gpio
+ #define STM32F4X_GPIO_NUM 82
+ #define STM32F4X_ADC_NUM 16
+#elif defined(STM32F407_5ZX)
+ #define STM32F4X_PIN_NUM 144 //144 pins mcu, 114 gpio
+ #define STM32F4X_GPIO_NUM 114
+ #define STM32F4X_ADC_NUM 24
+#elif defined(STM32F407IX)
+ #define STM32F4X_PIN_NUM 176 //176 pins mcu, 140 gpio
+ #define STM32F4X_GPIO_NUM 140
+ #define STM32F4X_ADC_NUM 24
+#else
+ #error "no match MCU defined"
+#endif
+
+// !!!
+// !!! Copy the digitalPin[] array from the variant.cpp
+// !!! and remove all '_': PX_n --> PXn
+// !!! For NC, comment the line to warn x pin number is NC
+// !!! // x is NC
+// !!! For duplicated pin name, comment the line to warn x pin number
+// !!! is PXn which is already defined with y pin number
+// !!! // x is PXn (y)
+// !!! Ex:
+// !!! ...
+// !!! #define PA4 20 // A14 <-- if NUM_ANALOG_FIRST not defined
+// !!! or
+// !!! #define PA4 A14 // 20 <-- if NUM_ANALOG_FIRST defined
+// !!! #define PB4 21
+// !!! #define PB5 22
+// !!! #define PB3 23
+// !!! // 24 is PA4 (20)
+// !!! // 25 is PB4 (21)
+// !!! #define PA2 26 // A15 <-- if NUM_ANALOG_FIRST not defined
+// !!! or
+// !!! #define PA2 A15 // 26 <-- if NUM_ANALOG_FIRST defined
+// !!! ...
+//#define PXn x
+
+#if STM32F4X_PIN_NUM >= 64 //64 pins mcu, 51 gpio
+ #define PC13 0
+ #define PC14 1 //OSC32_IN
+ #define PC15 2 //OSC32_OUT
+ #define PH0 3 //OSC_IN
+ #define PH1 4 //OSC_OUT
+ #define PB2 5 //BOOT1
+ #define PB10 6 //1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
+ #define PB11 7 //1:I2C2_SDA / USART3_RX / TIM2_CH4
+ #define PB12 8 //1:SPI2_NSS / OTG_HS_ID
+ #define PB13 9 //1:SPI2_SCK 2:OTG_HS_VBUS
+ #define PB14 10 //1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
+ #define PB15 11 //SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
+ #define PC6 12 //1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
+ #define PC7 13 //1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
+ #define PC8 14 //1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
+ #define PC9 15 //1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
+ #define PA8 16 //1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
+ #define PA9 17 //1:USART1_TX / TIM1_CH2 2:OTG_FS_VBUS
+ #define PA10 18 //1:USART1_RX / TIM1_CH3 / OTG_FS_ID
+ #define PA11 19 //1:TIM1_CH4 / OTG_FS_DM
+ #define PA12 20 //1:OTG_FS_DP
+ #define PA13 21 //0:JTMS-SWDIO
+ #define PA14 22 //0:JTCK-SWCLK
+ #define PA15 23 //0:JTDI 1:SPI3_NSS / SPI1_NSS
+ #define PC10 24 //1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
+ #define PC11 25 //1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
+ #define PC12 26 //1:UART5_TX / SPI3_MOSI / SDIO_CK
+ #define PD2 27 //1:UART5_RX / SDIO_CMD
+ #define PB3 28 //0:JTDO 1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
+ #define PB4 29 //0:NJTRST 1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
+ #define PB5 30 //1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
+ #define PB6 31 //1:I2C1_SCL / TIM4_CH1 / USART1_TX
+ #define PB7 32 //1:I2C1_SDA / TIM4_CH2 / USART1_RX
+ #define PB8 33 //1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
+ #define PB9 34 //1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
+ #define PA0 35 //1:UART4_TX / TIM5_CH1 2:ADC123_IN0
+ #define PA1 36 //1:UART4_RX / TIM5_CH2 / TIM2_CH2 2:ADC123_IN1
+ #define PA2 37 //1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3 2:ADC123_IN2
+ #define PA3 38 //1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4 2:ADC123_IN3
+ #define PA4 39 //NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK 2:ADC12_IN4 / DAC_OUT1
+ #define PA5 40 //NOT FT 1:SPI1_SCK 2:ADC12_IN5 / DAC_OUT2
+ #define PA6 41 //1:SPI1_MISO / TIM13_CH1 / TIM3_CH1 2:ADC12_IN6
+ #define PA7 42 //1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2 2:ADC12_IN7
+ #define PB0 43 //1:TIM3_CH3 2:ADC12_IN8
+ #define PB1 44 //1:TIM3_CH4 2:ADC12_IN9
+ #define PC0 45 //1: 2:ADC123_IN10
+ #define PC1 46 //1: 2:ADC123_IN11
+ #define PC2 47 //1:SPI2_MISO 2:ADC123_IN12
+ #define PC3 48 //1:SPI2_MOSI 2:ADC123_IN13
+ #define PC4 49 //1: 2:ADC12_IN14
+ #define PC5 50 //1: 2:ADC12_IN15
+ #if STM32F4X_PIN_NUM >= 144
+ #define PF3 51 //1:FSMC_A3 2:ADC3_IN9
+ #define PF4 52 //1:FSMC_A4 2:ADC3_IN14
+ #define PF5 53 //1:FSMC_A5 2:ADC3_IN15
+ #define PF6 54 //1:TIM10_CH1 2:ADC3_IN4
+ #define PF7 55 //1:TIM11_CH1 2:ADC3_IN5
+ #define PF8 56 //1:TIM13_CH1 2:ADC3_IN6
+ #define PF9 57 //1;TIM14_CH1 2:ADC3_IN7
+ #define PF10 58 //2:ADC3_IN8
+ #endif
+#endif
+#if STM32F4X_PIN_NUM >= 100 //100 pins mcu, 82 gpio
+ #define PE2 (35+STM32F4X_ADC_NUM) //1:FSMC_A23
+ #define PE3 (36+STM32F4X_ADC_NUM) //1:FSMC_A19
+ #define PE4 (37+STM32F4X_ADC_NUM) //1:FSMC_A20
+ #define PE5 (38+STM32F4X_ADC_NUM) //1:FSMC_A21
+ #define PE6 (39+STM32F4X_ADC_NUM) //1:FSMC_A22
+ #define PE7 (40+STM32F4X_ADC_NUM) //1:FSMC_D4
+ #define PE8 (41+STM32F4X_ADC_NUM) //1:FSMC_D5
+ #define PE9 (42+STM32F4X_ADC_NUM) //1:FSMC_D6 / TIM1_CH1
+ #define PE10 (43+STM32F4X_ADC_NUM) //1:FSMC_D7
+ #define PE11 (44+STM32F4X_ADC_NUM) //1:FSMC_D8 / TIM1_CH2
+ #define PE12 (45+STM32F4X_ADC_NUM) //1:FSMC_D9
+ #define PE13 (46+STM32F4X_ADC_NUM) //1:FSMC_D10 / TIM1_CH3
+ #define PE14 (47+STM32F4X_ADC_NUM) //1:FSMC_D11 / TIM1_CH4
+ #define PE15 (48+STM32F4X_ADC_NUM) //1:FSMC_D12
+ #define PD8 (49+STM32F4X_ADC_NUM) //1:FSMC_D13 / USART3_TX
+ #define PD9 (50+STM32F4X_ADC_NUM) //1:FSMC_D14 / USART3_RX
+ #define PD10 (51+STM32F4X_ADC_NUM) //1:FSMC_D15
+ #define PD11 (52+STM32F4X_ADC_NUM) //1:FSMC_A16
+ #define PD12 (53+STM32F4X_ADC_NUM) //1:FSMC_A17 / TIM4_CH1
+ #define PD13 (54+STM32F4X_ADC_NUM) //1:FSMC_A18 / TIM4_CH2
+ #define PD14 (55+STM32F4X_ADC_NUM) //1:FSMC_D0 / TIM4_CH3
+ #define PD15 (56+STM32F4X_ADC_NUM) //1:FSMC_D1 / TIM4_CH4
+ #define PD0 (57+STM32F4X_ADC_NUM) //1:FSMC_D2
+ #define PD1 (58+STM32F4X_ADC_NUM) //1:FSMC_D3
+ #define PD3 (59+STM32F4X_ADC_NUM) //1:FSMC_CLK
+ #define PD4 (60+STM32F4X_ADC_NUM) //1:FSMC_NOE
+ #define PD5 (61+STM32F4X_ADC_NUM) //1:USART2_TX
+ #define PD6 (62+STM32F4X_ADC_NUM) //1:USART2_RX
+ #define PD7 (63+STM32F4X_ADC_NUM)
+ #define PE0 (64+STM32F4X_ADC_NUM)
+ #define PE1 (65+STM32F4X_ADC_NUM)
+#endif
+#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
+ #define PF0 (66+STM32F4X_ADC_NUM) //1:FSMC_A0 / I2C2_SDA
+ #define PF1 (67+STM32F4X_ADC_NUM) //1:FSMC_A1 / I2C2_SCL
+ #define PF2 (68+STM32F4X_ADC_NUM) //1:FSMC_A2
+ #define PF11 (69+STM32F4X_ADC_NUM)
+ #define PF12 (70+STM32F4X_ADC_NUM) //1:FSMC_A6
+ #define PF13 (71+STM32F4X_ADC_NUM) //1:FSMC_A7
+ #define PF14 (72+STM32F4X_ADC_NUM) //1:FSMC_A8
+ #define PF15 (73+STM32F4X_ADC_NUM) //1:FSMC_A9
+ #define PG0 (74+STM32F4X_ADC_NUM) //1:FSMC_A10
+ #define PG1 (75+STM32F4X_ADC_NUM) //1:FSMC_A11
+ #define PG2 (76+STM32F4X_ADC_NUM) //1:FSMC_A12
+ #define PG3 (77+STM32F4X_ADC_NUM) //1:FSMC_A13
+ #define PG4 (78+STM32F4X_ADC_NUM) //1:FSMC_A14
+ #define PG5 (79+STM32F4X_ADC_NUM) //1:FSMC_A15
+ #define PG6 (80+STM32F4X_ADC_NUM)
+ #define PG7 (81+STM32F4X_ADC_NUM)
+ #define PG8 (82+STM32F4X_ADC_NUM)
+ #define PG9 (83+STM32F4X_ADC_NUM) //1:USART6_RX
+ #define PG10 (84+STM32F4X_ADC_NUM) //1:FSMC_NE3
+ #define PG11 (85+STM32F4X_ADC_NUM)
+ #define PG12 (86+STM32F4X_ADC_NUM) //1:FSMC_NE4
+ #define PG13 (87+STM32F4X_ADC_NUM) //1:FSMC_A24
+ #define PG14 (88+STM32F4X_ADC_NUM) //1:FSMC_A25 / USART6_TX
+ #define PG15 (89+STM32F4X_ADC_NUM)
+#endif
+#if STM32F4X_PIN_NUM >= 176 //176 pins mcu, 140 gpio
+ #define PI8 (90+STM32F4X_ADC_NUM)
+ #define PI9 (91+STM32F4X_ADC_NUM)
+ #define PI10 (92+STM32F4X_ADC_NUM)
+ #define PI11 (93+STM32F4X_ADC_NUM)
+ #define PH2 (94+STM32F4X_ADC_NUM)
+ #define PH3 (95+STM32F4X_ADC_NUM)
+ #define PH4 (96+STM32F4X_ADC_NUM) //1:I2C2_SCL
+ #define PH5 (97+STM32F4X_ADC_NUM) //1:I2C2_SDA
+ #define PH6 (98+STM32F4X_ADC_NUM) //1:TIM12_CH1
+ #define PH7 (99+STM32F4X_ADC_NUM) //1:I2C3_SCL
+ #define PH8 (100+STM32F4X_ADC_NUM) //1:I2C3_SDA
+ #define PH9 (101+STM32F4X_ADC_NUM) //1:TIM12_CH2
+ #define PH10 (102+STM32F4X_ADC_NUM) //1:TIM5_CH1
+ #define PH11 (103+STM32F4X_ADC_NUM) //1:TIM5_CH2
+ #define PH12 (104+STM32F4X_ADC_NUM) //1:TIM5_CH3
+ #define PH13 (105+STM32F4X_ADC_NUM)
+ #define PH14 (106+STM32F4X_ADC_NUM)
+ #define PH15 (107+STM32F4X_ADC_NUM)
+ #define PI0 (108+STM32F4X_ADC_NUM) //1:TIM5_CH4 / SPI2_NSS
+ #define PI1 (109+STM32F4X_ADC_NUM) //1:SPI2_SCK
+ #define PI2 (110+STM32F4X_ADC_NUM) //1:TIM8_CH4 /SPI2_MISO
+ #define PI3 (111+STM32F4X_ADC_NUM) //1:SPI2_MOS
+ #define PI4 (112+STM32F4X_ADC_NUM)
+ #define PI5 (113+STM32F4X_ADC_NUM) //1:TIM8_CH1
+ #define PI6 (114+STM32F4X_ADC_NUM) //1:TIM8_CH2
+ #define PI7 (115+STM32F4X_ADC_NUM) //1:TIM8_CH3
+#endif
+
+// This must be a literal
+// It is used with preprocessor tests (e.g. #if NUM_DIGITAL_PINS > 3)
+// so an enum will not work.
+#define NUM_DIGITAL_PINS (STM32F4X_GPIO_NUM)
+
+// Allow to define Arduino style alias for analog input pin number --> Ax
+// If no analog pin required then NUM_ANALOG_INPUTS could not be defined
+// or set to `0`
+// All pins are digital, analog inputs are a subset of digital pins.
+// This must be a literal
+// It is used with preprocessor tests (e.g. #if NUM_ANALOG_INPUTS > 3)
+// so an enum will not work.
+// !!!
+// !!! It must be aligned with the number of analog PinName
+// !!! defined in digitalPin[] array in variant.cpp
+// !!!
+#define NUM_ANALOG_INPUTS (STM32F4X_ADC_NUM)
+
+// They are 2 possibles way to define analog pins:
+//-------------------------------------------------------------------------------------------
+// - If they are contiguous in the digitalPin array:
+// Simply defined `NUM_ANALOG_FIRST` and all pins Ax will be automatically defined.
+// It define the digital pin number of the first analog input (i.e. which digital pin is A0)
+// First analog pin value (A0) must be greater than or equal to NUM_ANALOG_INPUTS
+// This must be a literal with a value less than or equal to MAX_ANALOG_INPUTS
+// defined in pin_arduino.h
+#define NUM_ANALOG_FIRST 35
+//------------------------------------OR------------------------------------------------------
+// - If they are not contiguous in the digitalPin array:
+// Add an analogInputPin array in the variant.cpp without defining NUM_ANALOG_FIRST
+// In that case the defined PYn for analog pin have to define the Ax definition instead of
+// index in digitalPin[] array:
+// #define PA4 A14
+//-------------------------------------------------------------------------------------------
+
+
+// Below ADC and PWM definitions already done in the core
+// Could be redefined here if needed
+// ADC resolution is 10 bits
+//#define ADC_RESOLUTION 10
+
+// PWM resolution
+//#define PWM_RESOLUTION 8
+//#define PWM_FREQUENCY 1000
+//#define PWM_MAX_DUTY_CYCLE 255
+
+// On-board LED pin number
+#define LED_BUILTIN PD12
+#define LED_GREEN LED_BUILTIN
+
+// On-board user button
+//#define USER_BTN
+
+// Below SPI and I2C definitions already done in the core
+// Could be redefined here if differs from the default one
+// SPI Definitions
+#define PIN_SPI_SS 8
+#define PIN_SPI_MOSI 11
+#define PIN_SPI_MISO 10
+#define PIN_SPI_SCK 9
+
+// I2C Definitions
+#define PIN_WIRE_SDA 7
+#define PIN_WIRE_SCL 6
+
+// I2C timing definitions (optional), avoid time spent to compute if defined
+// * I2C_TIMING_SM for Standard Mode (100kHz)
+// * I2C_TIMING_FM for Fast Mode (400kHz)
+// * I2C_TIMING_FMP for Fast Mode Plus (1000kHz)
+//#define I2C_TIMING_SM 0x00000000
+//#define I2C_TIMING_FM 0x00000000
+//#define I2C_TIMING_FMP 0x00000000
+
+// Timer Definitions (optional)
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#define TIMER_TONE TIM6
+#define TIMER_SERIAL TIM7
+
+// Do not use basic timer: OC is required
+#define TIMER_SERVO TIM2 //TODO: advanced-control timers don't work
+
+// UART Definitions
+// Define here Serial instance number to map on Serial generic name
+#define SERIAL_UART_INSTANCE 1 //ex: 2 for Serial2 (USART2)
+// DEBUG_UART could be redefined to print on another instance than 'Serial'
+//#define DEBUG_UART ((USART_TypeDef *) U(S)ARTX) // ex: USART3
+// DEBUG_UART baudrate, default: 9600 if not defined
+//#define DEBUG_UART_BAUDRATE x
+// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART
+//#define DEBUG_PINNAME_TX PX_n // PinName used for TX
+
+// Default pin used for 'Serial' instance (ex: ST-Link)
+// Mandatory for Firmata
+#define PIN_SERIAL_RX PA10
+#define PIN_SERIAL_TX PA9
+
+// Optional PIN_SERIALn_RX and PIN_SERIALn_TX where 'n' is the U(S)ART number
+// Used when user instanciate a hardware Serial using its peripheral name.
+// Example: HardwareSerial mySerial(USART3);
+// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
+//#define PIN_SERIALn_RX x // For U(S)ARTn RX
+//#define PIN_SERIALn_TX x // For U(S)ARTn TX
+//#define PIN_SERIALLP1_RX x // For LPUART1 RX
+//#define PIN_SERIALLP1_TX x // For LPUART1 TX
+
+// SD card slot Definitions
+// SD detect signal can be defined if required
+#define SD_DETECT_PIN PD3
+// SD Read/Write timeout, default value defined in STM32SD library
+//#define SD_DATATIMEOUT x
+
+// USB Vbus sensing. Require to have Vbus pin connected to Vbus signal.
+// Warning, pin is different depending on FullSpeed or High Speed mode used
+// See AN4879 https://www.st.com/content/st_com/en/search.html#q=AN4879-t=resources-page=1
+//#define USBD_VBUS_DETECTION_ENABLE
+
+// If the board has external USB pullup (on DP/DM depending on speed)
+// that can be controlled using a GPIO pin, define these:
+// - If the the pullup is disabled (USB detached) by default, define
+// USBD_ATTACH_PIN to the pin that, when written to
+// USBD_ATTACH_LEVEL, attaches the pullup.
+// - If the the pullup is enabled (attached) by default, define
+// USBD_DETACH_PIN to the pin that, when written to
+// USBD_DETACH_LEVEL, detaches the pullup.
+//#define USBD_ATTACH_PIN x
+//#define USBD_ATTACH_LEVEL LOW
+//#define USBD_DETACH_PIN x
+//#define USBD_DETACH_LEVEL LOW
+//
+// This indicates that there is an external and fixed 1.5k pullup
+// on the D+ line. This define is not normally needed, since a
+// fixed pullup is assumed by default. It is only required when
+// the USB peripheral has an internal pullup *and* an external
+// fixed pullup is present (which is actually a hardware bug, since just
+// the internal pullup is sufficient and having two pullups violates the
+// USB specification). In this case, defining this forces
+// the "write D+ LOW"-trick to be used. In the future, it might also
+// disable the internal pullups, but this is not currently implemented.
+// #define USBD_FIXED_PULLUP
+#ifdef __cplusplus
+} // extern "C"
+#endif
+/*----------------------------------------------------------------------------
+ * Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ // These serial port names are intended to allow libraries and architecture-neutral
+ // sketches to automatically default to the correct port name for a particular type
+ // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+ // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+ //
+ // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
+ //
+ // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
+ //
+ // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
+ //
+ // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
+ //
+ // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
+ // pins are NOT connected to anything by default.
+ #define SERIAL_PORT_MONITOR Serial
+ #define SERIAL_PORT_HARDWARE Serial1
+#endif
diff --git a/platformio.ini b/platformio.ini
index 062514c882e5..330363192556 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1230,6 +1230,28 @@ build_flags = ${common_stm32.build_flags}
extra_scripts = ${common.extra_scripts}
pre:buildroot/share/PlatformIO/scripts/generic_create_variant.py
+#
+# Anet ET4 (STM32F407VGT6 ARM Cortex-M4)
+#
+[env:ANET_ET4]
+#build_type = debug
+#debug_build_flags = -O0 -ggdb3 -g3
+platform = ${common_stm32.platform}
+extends = common_stm32
+board = ANET_ET4
+board_build.offset = 0x00000
+build_flags = ${common_stm32.build_flags}
+ -DDISABLE_GENERIC_SERIALUSB
+ -DSTM32F407VG -DARDUINO_ARCH_STM32 -DTARGET_STM32F4
+ -DHAS_GRAPHICAL_TFT -DHAS_FSMC_TFT -DTFT_320x240 -DTOUCH_SCREEN
+ #-DTRANSFER_CLOCK_DIV=8
+build_unflags = ${common_stm32.build_unflags}
+ -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
+extra_scripts = ${common.extra_scripts}
+ pre:buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py
+ buildroot/share/PlatformIO/scripts/stm32_bootloader.py
+ buildroot/share/PlatformIO/scripts/anet_et4.py
+
#
# BigTreeTech SKR Pro (STM32F407ZGT6 ARM Cortex-M4)
#
From 198659d348b21b606d0601a7cba1b64727fccc74 Mon Sep 17 00:00:00 2001
From: Scott Lahteine
Date: Thu, 26 Nov 2020 03:19:28 -0600
Subject: [PATCH 02/29] Cosmetic tweaks
---
Marlin/src/HAL/STM32/tft/tft_fsmc.cpp | 11 ++++++-----
Marlin/src/HAL/STM32/tft/xpt2046.h | 9 ++-------
Marlin/src/core/boards.h | 2 +-
Marlin/src/lcd/tft/tft_queue.cpp | 13 ++++++-------
Marlin/src/lcd/tft/ui_320x240.cpp | 14 +++++++-------
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 12 ++++++++----
buildroot/share/PlatformIO/ldscripts/anet_et4.ld | 6 ++----
.../share/PlatformIO/variants/ANET_ET4/ldscript.ld | 12 ++++++------
.../share/PlatformIO/variants/ANET_ET4/variant.h | 2 +-
9 files changed, 39 insertions(+), 42 deletions(-)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
index 3a080d5e271e..94bb113bebea 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
@@ -47,10 +47,11 @@ void TFT_FSMC::Init() {
uint32_t NSBank = (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
+ // Perform the SRAM1 memory initialization sequence
SRAMx.Instance = FSMC_NORSRAM_DEVICE;
SRAMx.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
- /* SRAMx.Init */
SRAMx.Init.NSBank = NSBank;
+ // SRAMx.Init
SRAMx.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
SRAMx.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
SRAMx.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
@@ -66,8 +67,8 @@ void TFT_FSMC::Init() {
#ifdef STM32F4xx
SRAMx.Init.PageSize = FSMC_PAGE_SIZE_NONE;
#endif
- /* Read Timing - relatively slow to ensure ID information is correctly read from TFT controller */
- /* Can be decreases from 15-15-24 to 4-4-8 with risk of stability loss */
+ // Read Timing - relatively slow to ensure ID information is correctly read from TFT controller
+ // Can be decreases from 15-15-24 to 4-4-8 with risk of stability loss
Timing.AddressSetupTime = 15;
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 24;
@@ -75,8 +76,8 @@ void TFT_FSMC::Init() {
Timing.CLKDivision = 16;
Timing.DataLatency = 17;
Timing.AccessMode = FSMC_ACCESS_MODE_A;
- /* Write Timing */
- /* Can be decreases from 8-15-8 to 0-0-1 with risk of stability loss */
+ // Write Timing
+ // Can be decreases from 8-15-8 to 0-0-1 with risk of stability loss
ExtTiming.AddressSetupTime = 8;
ExtTiming.AddressHoldTime = 15;
ExtTiming.DataSetupTime = 8;
diff --git a/Marlin/src/HAL/STM32/tft/xpt2046.h b/Marlin/src/HAL/STM32/tft/xpt2046.h
index 3acf3898a3b5..78cb7a4ba54a 100644
--- a/Marlin/src/HAL/STM32/tft/xpt2046.h
+++ b/Marlin/src/HAL/STM32/tft/xpt2046.h
@@ -23,8 +23,10 @@
#ifdef STM32F1xx
#include
+ #define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CCR & DMA_CCR_EN)
#elif defined(STM32F4xx)
#include
+ #define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR & DMA_SxCR_EN)
#endif
#include "../../../inc/MarlinConfig.h"
@@ -60,13 +62,6 @@ enum XPTCoordinate : uint8_t {
#define XPT2046_Z1_THRESHOLD 10
#endif
-#ifdef STM32F1xx
- #define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CCR & DMA_CCR_EN)
-#elif defined(STM32F4xx)
- #define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR & DMA_SxCR_EN)
-#endif
-
-
class XPT2046 {
private:
static SPI_HandleTypeDef SPIx;
diff --git a/Marlin/src/core/boards.h b/Marlin/src/core/boards.h
index 7a049450f915..f4a2b0be337c 100644
--- a/Marlin/src/core/boards.h
+++ b/Marlin/src/core/boards.h
@@ -363,7 +363,7 @@
#define BOARD_FYSETC_S6_V2_0 4216 // FYSETC S6 v2.0 board
#define BOARD_FLYF407ZG 4217 // FLYF407ZG board (STM32F407ZG)
#define BOARD_MKS_ROBIN2 4218 // MKS_ROBIN2 (STM32F407ZE)
-#define BOARD_ANET_ET4 4219 // ANET_ET4 (STM32F407VGT6)
+#define BOARD_ANET_ET4 4219 // ANET ET4 (STM32F407VGT6)
//
// ARM Cortex M7
diff --git a/Marlin/src/lcd/tft/tft_queue.cpp b/Marlin/src/lcd/tft/tft_queue.cpp
index 0b538ef4a87d..814ae2edefcb 100644
--- a/Marlin/src/lcd/tft/tft_queue.cpp
+++ b/Marlin/src/lcd/tft/tft_queue.cpp
@@ -261,17 +261,16 @@ void TFT_Queue::add_image(int16_t x, int16_t y, MarlinImage image, uint16_t *col
if (color_mode == HIGHCOLOR) return;
uint16_t *color = (uint16_t *)end_of_queue;
- uint8_t number_of_color = 0;
+ uint8_t color_count = 0;
switch (color_mode) {
- case GREYSCALE1: number_of_color = 1; break;
- case GREYSCALE2: number_of_color = 3; break;
- case GREYSCALE4: number_of_color = 15; break;
- default:
- break;
+ case GREYSCALE1: color_count = 1; break;
+ case GREYSCALE2: color_count = 3; break;
+ case GREYSCALE4: color_count = 15; break;
+ default: break;
}
- while (number_of_color--) {
+ while (color_count--) {
*color++ = *colors++;
}
diff --git a/Marlin/src/lcd/tft/ui_320x240.cpp b/Marlin/src/lcd/tft/ui_320x240.cpp
index 45a91cd5e5c2..8bbb3a575962 100644
--- a/Marlin/src/lcd/tft/ui_320x240.cpp
+++ b/Marlin/src/lcd/tft/ui_320x240.cpp
@@ -423,21 +423,21 @@ void MenuEditItemBase::draw_edit_screen(PGM_P const pstr, const char* const valu
extern screenFunc_t _manual_move_func_ptr;
if (ui.currentScreen != _manual_move_func_ptr && !ui.external_control) {
- #define SLIDER_LENGHT 224
+ #define SLIDER_LENGTH 224
#define SLIDER_Y_POSITION 140
- tft.canvas((TFT_WIDTH - SLIDER_LENGHT) / 2, SLIDER_Y_POSITION, SLIDER_LENGHT, 16);
+ tft.canvas((TFT_WIDTH - SLIDER_LENGTH) / 2, SLIDER_Y_POSITION, SLIDER_LENGTH, 16);
tft.set_background(COLOR_BACKGROUND);
- int16_t position = (SLIDER_LENGHT - 2) * ui.encoderPosition / maxEditValue;
+ int16_t position = (SLIDER_LENGTH - 2) * ui.encoderPosition / maxEditValue;
tft.add_bar(0, 7, 1, 2, ui.encoderPosition == 0 ? COLOR_SLIDER_INACTIVE : COLOR_SLIDER);
tft.add_bar(1, 6, position, 4, COLOR_SLIDER);
- tft.add_bar(position + 1, 6, SLIDER_LENGHT - 2 - position, 4, COLOR_SLIDER_INACTIVE);
- tft.add_bar(SLIDER_LENGHT - 1, 7, 1, 2, int32_t(ui.encoderPosition) == maxEditValue ? COLOR_SLIDER : COLOR_SLIDER_INACTIVE);
+ tft.add_bar(position + 1, 6, SLIDER_LENGTH - 2 - position, 4, COLOR_SLIDER_INACTIVE);
+ tft.add_bar(SLIDER_LENGTH - 1, 7, 1, 2, int32_t(ui.encoderPosition) == maxEditValue ? COLOR_SLIDER : COLOR_SLIDER_INACTIVE);
#if ENABLED(TOUCH_SCREEN)
- tft.add_image((SLIDER_LENGHT - 8) * ui.encoderPosition / maxEditValue, 0, imgSlider, COLOR_SLIDER);
- touch.add_control(SLIDER, (TFT_WIDTH - SLIDER_LENGHT) / 2, SLIDER_Y_POSITION - 8, SLIDER_LENGHT, 32, maxEditValue);
+ tft.add_image((SLIDER_LENGTH - 8) * ui.encoderPosition / maxEditValue, 0, imgSlider, COLOR_SLIDER);
+ touch.add_control(SLIDER, (TFT_WIDTH - SLIDER_LENGTH) / 2, SLIDER_Y_POSITION - 8, SLIDER_LENGTH, 32, maxEditValue);
#endif
}
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 3d5ca06bc5cd..25e924258ab1 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -62,7 +62,7 @@
// Z Probe
//
#ifndef Z_MIN_PROBE_PIN
- #define Z_MIN_PROBE_PIN PC3
+ #define Z_MIN_PROBE_PIN PC3
#endif
//
@@ -110,12 +110,16 @@
#define TEMP_BED_PIN PA4
//
-// Heaters / Fans
+// Heaters
//
#define HEATER_0_PIN PA0
#define HEATER_BED_PIN PE2
-#define FAN_PIN PE3
-#define FAN1_PIN PE1
+
+//
+// Fans
+//
+#define FAN_PIN PE3 // Layer fan
+#define FAN1_PIN PE1 // Hotend fan
#ifndef E0_AUTO_FAN_PIN
#define E0_AUTO_FAN_PIN FAN1_PIN
diff --git a/buildroot/share/PlatformIO/ldscripts/anet_et4.ld b/buildroot/share/PlatformIO/ldscripts/anet_et4.ld
index aa0b1dd9cb36..cbc058a71373 100644
--- a/buildroot/share/PlatformIO/ldscripts/anet_et4.ld
+++ b/buildroot/share/PlatformIO/ldscripts/anet_et4.ld
@@ -41,8 +41,8 @@ _Min_Stack_Size = 0x400;; /* required amount of stack */
MEMORY
{
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
+RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
}
/* Define output sections */
@@ -172,8 +172,6 @@ SECTIONS
. = ALIGN(4);
} >RAM
-
-
/* Remove information from the standard libraries */
/DISCARD/ :
{
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld b/buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld
index bb578cd08cc8..37904fe551e3 100644
--- a/buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld
+++ b/buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld
@@ -104,12 +104,12 @@ SECTIONS
. = ALIGN(4);
} >FLASH
- .ARM.extab : {
+ .ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH
-
+
.ARM : {
. = ALIGN(4);
__exidx_start = .;
@@ -126,7 +126,7 @@ SECTIONS
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH
-
+
.init_array :
{
. = ALIGN(4);
@@ -136,7 +136,7 @@ SECTIONS
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH
-
+
.fini_array :
{
. = ALIGN(4);
@@ -151,7 +151,7 @@ SECTIONS
_sidata = LOADADDR(.data);
/* Initialized data sections into "RAM" Ram type memory */
- .data :
+ .data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
@@ -160,7 +160,7 @@ SECTIONS
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
-
+
} >RAM AT> FLASH
/* Uninitialized data section into "RAM" Ram type memory */
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/variant.h b/buildroot/share/PlatformIO/variants/ANET_ET4/variant.h
index ff48b8aebcaf..61be256fae88 100644
--- a/buildroot/share/PlatformIO/variants/ANET_ET4/variant.h
+++ b/buildroot/share/PlatformIO/variants/ANET_ET4/variant.h
@@ -269,7 +269,7 @@ extern "C" {
#define LED_GREEN LED_BUILTIN
// On-board user button
-//#define USER_BTN
+//#define USER_BTN
// Below SPI and I2C definitions already done in the core
// Could be redefined here if differs from the default one
From 900927268e056bd11df1052490a87766594d2bec Mon Sep 17 00:00:00 2001
From: Scott Lahteine
Date: Thu, 26 Nov 2020 03:24:20 -0600
Subject: [PATCH 03/29] Endian color patch
---
Marlin/src/inc/Conditionals_LCD.h | 4 ++
Marlin/src/lcd/tft/canvas.cpp | 2 +-
Marlin/src/lcd/tft/tft.h | 6 +++
Marlin/src/lcd/tft/tft_queue.cpp | 14 ++++---
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 52 +++++++++++++++++++++++++
5 files changed, 71 insertions(+), 7 deletions(-)
diff --git a/Marlin/src/inc/Conditionals_LCD.h b/Marlin/src/inc/Conditionals_LCD.h
index 9c080ee2869d..6df4d57615d1 100644
--- a/Marlin/src/inc/Conditionals_LCD.h
+++ b/Marlin/src/inc/Conditionals_LCD.h
@@ -1189,3 +1189,7 @@
#define TOUCH_ORIENTATION TOUCH_ORIENTATION_NONE
#endif
#endif
+
+#if MB(ANET_ET4, ANET_ET5)
+ #define IS_ANET_ET 1
+#endif
diff --git a/Marlin/src/lcd/tft/canvas.cpp b/Marlin/src/lcd/tft/canvas.cpp
index 061f078b92bd..3c2cda4fd52d 100644
--- a/Marlin/src/lcd/tft/canvas.cpp
+++ b/Marlin/src/lcd/tft/canvas.cpp
@@ -95,7 +95,7 @@ void CANVAS::AddImage(int16_t x, int16_t y, MarlinImage image, uint16_t *colors)
if (line >= startLine && line < endLine) {
uint16_t *pixel = buffer + x + (line - startLine) * width;
for (int16_t j = 0; j < image_width; j++) {
- if ((x + j >= 0) && (x + j < width)) *pixel = *data;
+ if ((x + j >= 0) && (x + j < width)) *pixel = ENDIAN_COLOR(*data);
pixel++;
data++;
}
diff --git a/Marlin/src/lcd/tft/tft.h b/Marlin/src/lcd/tft/tft.h
index ed3d5e35c157..994cd36c9840 100644
--- a/Marlin/src/lcd/tft/tft.h
+++ b/Marlin/src/lcd/tft/tft.h
@@ -30,6 +30,12 @@
#include "../../inc/MarlinConfig.h"
+#if IS_ANET_ET
+ #define ENDIAN_COLOR(C) (((C) >> 8) | ((C) << 8))
+#else
+ #define ENDIAN_COLOR(C) (C)
+#endif
+
#if HAS_UI_320x240
#define TFT_WIDTH 320
#define TFT_HEIGHT 240
diff --git a/Marlin/src/lcd/tft/tft_queue.cpp b/Marlin/src/lcd/tft/tft_queue.cpp
index 814ae2edefcb..ea0bf0f00af9 100644
--- a/Marlin/src/lcd/tft/tft_queue.cpp
+++ b/Marlin/src/lcd/tft/tft_queue.cpp
@@ -158,7 +158,7 @@ void TFT_Queue::fill(uint16_t x, uint16_t y, uint16_t width, uint16_t height, ui
task_parameters->y = y;
task_parameters->width = width;
task_parameters->height = height;
- task_parameters->color = color;
+ task_parameters->color = ENDIAN_COLOR(color);
task_parameters->count = width * height;
*end_of_queue = TASK_END_OF_QUEUE;
@@ -200,7 +200,7 @@ void TFT_Queue::set_background(uint16_t color) {
last_parameter = end_of_queue;
parameters->type = CANVAS_SET_BACKGROUND;
- parameters->color = color;
+ parameters->color = ENDIAN_COLOR(color);
end_of_queue += sizeof(parametersCanvasBackground_t);
task_parameters->count++;
@@ -227,7 +227,7 @@ void TFT_Queue::add_text(uint16_t x, uint16_t y, uint16_t color, uint8_t *string
parameters->type = CANVAS_ADD_TEXT;
parameters->x = x;
parameters->y = y;
- parameters->color = color;
+ parameters->color = ENDIAN_COLOR(color);
parameters->stringLength = 0;
parameters->maxWidth = maxWidth;
@@ -270,8 +270,10 @@ void TFT_Queue::add_image(int16_t x, int16_t y, MarlinImage image, uint16_t *col
default: break;
}
+ uint16_t tmp;
while (color_count--) {
- *color++ = *colors++;
+ tmp = *colors++;
+ *color++ = ENDIAN_COLOR(tmp);
}
end_of_queue = (uint8_t *)color;
@@ -325,7 +327,7 @@ void TFT_Queue::add_bar(uint16_t x, uint16_t y, uint16_t width, uint16_t height,
parameters->y = y;
parameters->width = width;
parameters->height = height;
- parameters->color = color;
+ parameters->color = ENDIAN_COLOR(color);
end_of_queue += sizeof(parametersCanvasBar_t);
task_parameters->count++;
@@ -343,7 +345,7 @@ void TFT_Queue::add_rectangle(uint16_t x, uint16_t y, uint16_t width, uint16_t h
parameters->y = y;
parameters->width = width;
parameters->height = height;
- parameters->color = color;
+ parameters->color = ENDIAN_COLOR(color);
end_of_queue += sizeof(parametersCanvasRectangle_t);
task_parameters->count++;
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 25e924258ab1..19d4ca60d278 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -133,6 +133,58 @@
#define TFT_CS_PIN PD7
#define TFT_RS_PIN PD13
+//
+// Touch Screen
+//
+
+#define COLOR_ORANGEZ 0xFDE0
+#define COLOR_BACKGROUND 0x2124
+#define COLOR_SELECTION_BG COLOR_ORANGEZ
+#define COLOR_WEBSITE_URL 0x03B7
+
+#define COLOR_REDZ 0xF003
+
+#define COLOR_INACTIVE COLOR_GREY
+#define COLOR_COLD COLOR_ORANGEZ
+#define COLOR_HOTEND COLOR_REDZ
+#define COLOR_HEATED_BED COLOR_REDZ
+#define COLOR_CHAMBER COLOR_DARK_ORANGE
+#define COLOR_FAN COLOR_ORANGEZ
+
+#define COLOR_AXIS_HOMED COLOR_WHITE
+#define COLOR_AXIS_NOT_HOMED COLOR_ORANGEZ
+
+#define COLOR_RATE_100 0xA7E0
+#define COLOR_RATE_ALTERED COLOR_ORANGEZ
+
+#define COLOR_PRINT_TIME COLOR_WHITE
+
+#define COLOR_PROGRESS_FRAME COLOR_WHITE
+#define COLOR_PROGRESS_BAR COLOR_ORANGEZ
+#define COLOR_PROGRESS_BG COLOR_BLACK
+
+#define COLOR_STATUS_MESSAGE COLOR_ORANGEZ
+
+#define COLOR_CONTROL_ENABLED COLOR_ORANGEZ
+#define COLOR_CONTROL_DISABLED COLOR_GREY
+#define COLOR_CONTROL_CANCEL COLOR_SCARLET
+#define COLOR_CONTROL_CONFIRM COLOR_VIVID_GREEN
+#define COLOR_BUSY COLOR_SILVER
+
+#define COLOR_MENU_TEXT COLOR_WHITE
+#define COLOR_MENU_VALUE COLOR_WHITE
+#define COLOR_MENU_VALUE_FONT COLOR_ORANGEZ
+
+#define COLOR_SLIDER COLOR_WHITE
+#define COLOR_SLIDER_INACTIVE COLOR_GREY
+
+#define COLOR_UBL COLOR_WHITE
+
+#define COLOR_TOUCH_CALIBRATION COLOR_WHITE
+
+#define COLOR_KILL_SCREEN_BG COLOR_MAROON
+#define COLOR_KILL_SCREEN_TEXT COLOR_WHITE
+
#if ENABLED(TOUCH_SCREEN)
#define TOUCH_CS_PIN PB2
#define TOUCH_SCK_PIN PB0
From 583bd601d9b694abac0ae369d8482628b0dbc388 Mon Sep 17 00:00:00 2001
From: Scott Lahteine
Date: Thu, 26 Nov 2020 03:26:20 -0600
Subject: [PATCH 04/29] TFT FMSC patches
---
Marlin/src/HAL/STM32/tft/tft_fsmc.cpp | 75 +++++++++++++++++++--------
Marlin/src/HAL/STM32/tft/tft_fsmc.h | 60 ++++++++++++++-------
2 files changed, 92 insertions(+), 43 deletions(-)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
index 94bb113bebea..393577923766 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
@@ -29,10 +29,15 @@
SRAM_HandleTypeDef TFT_FSMC::SRAMx;
DMA_HandleTypeDef TFT_FSMC::DMAtx;
-LCD_CONTROLLER_TypeDef *TFT_FSMC::LCD;
+
+#if !IS_ANET_ET
+ LCD_CONTROLLER_TypeDef *TFT_FSMC::LCD;
+#endif
void TFT_FSMC::Init() {
- uint32_t controllerAddress;
+ #if !IS_ANET_ET
+ uint32_t controllerAddress;
+ #endif
#if PIN_EXISTS(TFT_RESET)
OUT_WRITE(TFT_RESET_PIN, HIGH);
@@ -45,23 +50,25 @@ void TFT_FSMC::Init() {
FSMC_NORSRAM_TimingTypeDef Timing, ExtTiming;
- uint32_t NSBank = (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
+ #if !IS_ANET_ET
+ const uint32_t NSBank = (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
+ #endif
// Perform the SRAM1 memory initialization sequence
SRAMx.Instance = FSMC_NORSRAM_DEVICE;
SRAMx.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
- SRAMx.Init.NSBank = NSBank;
// SRAMx.Init
+ SRAMx.Init.NSBank = TERN(IS_ANET_ET, FSMC_NORSRAM_BANK1, NSBank);
SRAMx.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
SRAMx.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
- SRAMx.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
+ SRAMx.Init.MemoryDataWidth = TERN(IS_ANET_ET, FSMC_NORSRAM_MEM_BUS_WIDTH_8, FSMC_NORSRAM_MEM_BUS_WIDTH_16);
SRAMx.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
SRAMx.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
SRAMx.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
SRAMx.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
SRAMx.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
SRAMx.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
- SRAMx.Init.ExtendedMode = FSMC_EXTENDED_MODE_ENABLE;
+ SRAMx.Init.ExtendedMode = TERN(IS_ANET_ET, FSMC_EXTENDED_MODE_DISABLE, FSMC_EXTENDED_MODE_ENABLE);
SRAMx.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
SRAMx.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
#ifdef STM32F4xx
@@ -73,8 +80,8 @@ void TFT_FSMC::Init() {
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 24;
Timing.BusTurnAroundDuration = 0;
- Timing.CLKDivision = 16;
- Timing.DataLatency = 17;
+ Timing.CLKDivision = TERN(IS_ANET_ET, 0, 16);
+ Timing.DataLatency = TERN(IS_ANET_ET, 0, 17);
Timing.AccessMode = FSMC_ACCESS_MODE_A;
// Write Timing
// Can be decreases from 8-15-8 to 0-0-1 with risk of stability loss
@@ -93,7 +100,10 @@ void TFT_FSMC::Init() {
pinmap_pinout(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
pinmap_pinout(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
- controllerAddress = FSMC_BANK1_1;
+ #if !IS_ANET_ET
+ controllerAddress = FSMC_BANK1_1;
+ #endif
+
#ifdef PF0
switch (NSBank) {
case FSMC_NORSRAM_BANK2: controllerAddress = FSMC_BANK1_2 ; break;
@@ -102,7 +112,9 @@ void TFT_FSMC::Init() {
}
#endif
- controllerAddress |= (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
+ #if !IS_ANET_ET
+ controllerAddress |= (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
+ #endif
HAL_SRAM_Init(&SRAMx, &Timing, &ExtTiming);
@@ -126,21 +138,33 @@ void TFT_FSMC::Init() {
DMAtx.Init.Mode = DMA_NORMAL;
DMAtx.Init.Priority = DMA_PRIORITY_HIGH;
- LCD = (LCD_CONTROLLER_TypeDef *)controllerAddress;
+ #if IS_ANET_ET
+ //controllerAddress = (uint32_t)0x60000000U;
+ //LCD = (LCD_CONTROLLER_TypeDef *)controllerAddress;
+ //LCD->RAM = (uint16_t *)LCD_RAM_ADR;
+ #else
+ LCD = (LCD_CONTROLLER_TypeDef *)controllerAddress;
+ #endif
}
uint32_t TFT_FSMC::GetID() {
- uint32_t id;
- WriteReg(0x0000);
- id = LCD->RAM;
-
- if (id == 0)
- id = ReadID(LCD_READ_ID);
- if ((id & 0xFFFF) == 0 || (id & 0xFFFF) == 0xFFFF)
- id = ReadID(LCD_READ_ID4);
- return id;
+ #if IS_ANET_ET
+ return 0x8552;
+ #else
+ uint32_t id;
+ WriteReg(0x0000);
+ id = LCD->RAM;
+
+ if (id == 0)
+ id = ReadID(LCD_READ_ID);
+ if ((id & 0xFFFF) == 0 || (id & 0xFFFF) == 0xFFFF)
+ id = ReadID(LCD_READ_ID4);
+ return id;
+ #endif
}
+#if !IS_ANET_ET
+
uint32_t TFT_FSMC::ReadID(uint16_t Reg) {
uint32_t id;
WriteReg(Reg);
@@ -148,10 +172,12 @@ uint32_t TFT_FSMC::GetID() {
id = Reg << 24;
id |= (LCD->RAM & 0x00FF) << 16;
id |= (LCD->RAM & 0x00FF) << 8;
- id |= LCD->RAM & 0x00FF;
+ id |= (LCD->RAM & 0x00FF);
return id;
}
+#endif
+
bool TFT_FSMC::isBusy() {
if (__IS_DMA_ENABLED(&DMAtx))
if (__HAL_DMA_GET_FLAG(&DMAtx, __HAL_DMA_GET_TC_FLAG_INDEX(&DMAtx)) != 0 || __HAL_DMA_GET_FLAG(&DMAtx, __HAL_DMA_GET_TE_FLAG_INDEX(&DMAtx)) != 0)
@@ -169,11 +195,14 @@ void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Cou
#ifdef STM32F1xx
DMAtx.Instance->CNDTR = Count;
DMAtx.Instance->CPAR = (uint32_t)Data;
- DMAtx.Instance->CMAR = (uint32_t)&(LCD->RAM);
+ DMAtx.Instance->CMAR = (uint32_t)&(LCD_RAM);
#elif defined(STM32F4xx)
+ //#if IS_ANET_ET
+ //DMAtx.Instance->NDTR = (Count*2);
+ //#endif
DMAtx.Instance->NDTR = Count;
DMAtx.Instance->PAR = (uint32_t)Data;
- DMAtx.Instance->M0AR = (uint32_t)&(LCD->RAM);
+ DMAtx.Instance->M0AR = (uint32_t)TERN(IS_ANET_ET, LCD_RAM_ADR, &LCD->RAM);
#endif
__HAL_DMA_ENABLE(&DMAtx);
}
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.h b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
index e2e0128c5efc..bdef3383beb4 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.h
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
@@ -49,6 +49,17 @@ typedef struct {
__IO uint16_t RAM;
} LCD_CONTROLLER_TypeDef;
+#if IS_ANET_ET
+ #define LCD_RAM_ADR 0x60040000
+ #define LCD_RAM *(__IO uint8_t *)LCD_RAM_ADR
+ #define LCD_REG *(__IO uint8_t *)0x60000000
+ #define LCD_REG_DATA(V) ((V) & 0xFF)
+#else
+ #define LCD_RAM LCD->RAM
+ #define LCD_REG LCD->REG
+ #define LCD_REG_DATA(V) (V)
+#endif
+
class TFT_FSMC {
private:
static SRAM_HandleTypeDef SRAMx;
@@ -56,8 +67,11 @@ class TFT_FSMC {
static LCD_CONTROLLER_TypeDef *LCD;
- static uint32_t ReadID(uint16_t Reg);
- static void Transmit(uint16_t Data) { LCD->RAM = Data; __DSB(); }
+ #if !IS_ANET_ET
+ static uint32_t ReadID(uint16_t Reg);
+ #endif
+
+ static void Transmit(uint8_t Data) { LCD_RAM = Data; __DSB(); }
static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
public:
@@ -66,11 +80,11 @@ class TFT_FSMC {
static bool isBusy();
static void Abort() { __HAL_DMA_DISABLE(&DMAtx); }
- static void DataTransferBegin(uint16_t DataWidth = DATASIZE_16BIT) {}
+ static void DataTransferBegin(uint16_t DataWidth = TERN(IS_ANET_ET, DATASIZE_8BIT, DATASIZE_16BIT)) {}
static void DataTransferEnd() {};
- static void WriteData(uint16_t Data) { Transmit(Data); }
- static void WriteReg(uint16_t Reg) { LCD->REG = Reg; __DSB(); }
+ static void WriteData(uint16_t Data) { Transmit(LCD_REG_DATA(Data)); }
+ static void WriteReg(uint16_t Reg) { LCD_REG = LCD_REG_DATA(Reg); __DSB(); }
static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
@@ -98,14 +112,16 @@ const PinMap PinMap_FSMC[] = {
{PE_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D05
{PE_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D06
{PE_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D07
- {PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
- {PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
- {PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
- {PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
- {PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
- {PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
- {PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
- {PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
+ #if !IS_ANET_ET
+ {PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
+ {PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
+ {PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
+ {PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
+ {PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
+ {PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
+ {PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
+ {PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
+ #endif
{PD_4, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NOE
{PD_5, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NWE
{NC, NP, 0}
@@ -142,14 +158,18 @@ const PinMap PinMap_FSMC_RS[] = {
{PG_4, FSMC_RS(14), FSMC_PIN_DATA}, // FSMC_A14
{PG_5, FSMC_RS(15), FSMC_PIN_DATA}, // FSMC_A15
#endif
- {PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
- {PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
+ #if !IS_ANET_ET
+ {PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
+ {PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
+ #endif
{PD_13, FSMC_RS(18), FSMC_PIN_DATA}, // FSMC_A18
- {PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
- {PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
- {PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
- {PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
- {PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
+ #if !IS_ANET_ET
+ {PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
+ {PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
+ {PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
+ {PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
+ {PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
+ #endif
#ifdef PF0
{PG_13, FSMC_RS(24), FSMC_PIN_DATA}, // FSMC_A24
{PG_14, FSMC_RS(25), FSMC_PIN_DATA}, // FSMC_A25
From df7daa7af88df0e25dd80311031f8c34168bc7e8 Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Tue, 1 Dec 2020 11:22:06 -0800
Subject: [PATCH 05/29] For use with davidtgbe's OpenBLT bootloader
https://github.com/davidtgbe/openblt
---
Marlin/src/pins/pins.h | 2 +-
platformio.ini | 7 ++++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/Marlin/src/pins/pins.h b/Marlin/src/pins/pins.h
index c920736b8f3f..8765367c7e1c 100644
--- a/Marlin/src/pins/pins.h
+++ b/Marlin/src/pins/pins.h
@@ -651,7 +651,7 @@
#elif MB(FYSETC_S6_V2_0)
#include "stm32f4/pins_FYSETC_S6_V2_0.h" // STM32F4 env:FYSETC_S6
#elif MB(ANET_ET4)
- #include "stm32f4/pins_ANET_ET4.h" // STM32F4 env:ANET_ET4
+ #include "stm32f4/pins_ANET_ET4.h" // STM32F4 env:ANET_ET4_OPENBLT
//
// ARM Cortex M7
diff --git a/platformio.ini b/platformio.ini
index 330363192556..aac9005f8239 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1232,16 +1232,17 @@ extra_scripts = ${common.extra_scripts}
#
# Anet ET4 (STM32F407VGT6 ARM Cortex-M4)
+# For use with with davidtgbe's OpenBLT bootloader https://github.com/davidtgbe/openblt
#
-[env:ANET_ET4]
+[env:ANET_ET4_OPENBLT]
#build_type = debug
#debug_build_flags = -O0 -ggdb3 -g3
platform = ${common_stm32.platform}
extends = common_stm32
board = ANET_ET4
-board_build.offset = 0x00000
+board_build.offset = 0x10000
build_flags = ${common_stm32.build_flags}
- -DDISABLE_GENERIC_SERIALUSB
+ -DDISABLE_GENERIC_SERIALUSB
-DSTM32F407VG -DARDUINO_ARCH_STM32 -DTARGET_STM32F4
-DHAS_GRAPHICAL_TFT -DHAS_FSMC_TFT -DTFT_320x240 -DTOUCH_SCREEN
#-DTRANSFER_CLOCK_DIV=8
From 78bd559211084392a57462781b8d3e8d1a62cf24 Mon Sep 17 00:00:00 2001
From: Scott Lahteine
Date: Fri, 4 Dec 2020 06:31:13 -0600
Subject: [PATCH 06/29] Get closer to Sebazzz branch
---
Marlin/src/HAL/STM32/tft/tft_fsmc.cpp | 88 +++++++------------
Marlin/src/HAL/STM32/tft/tft_fsmc.h | 52 ++++-------
Marlin/src/lcd/tft_io/tft_io.cpp | 2 +-
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 77 ++++++----------
.../share/PlatformIO/boards/ANET_ET4.json | 2 +-
.../share/PlatformIO/scripts/anet_et4.py | 10 ++-
platformio.ini | 2 -
7 files changed, 86 insertions(+), 147 deletions(-)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
index 789d98ceeca2..0adbb2fad469 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
@@ -30,15 +30,10 @@
SRAM_HandleTypeDef TFT_FSMC::SRAMx;
DMA_HandleTypeDef TFT_FSMC::DMAtx;
-
-#if !IS_ANET_ET
- LCD_CONTROLLER_TypeDef *TFT_FSMC::LCD;
-#endif
+LCD_CONTROLLER_TypeDef *TFT_FSMC::LCD;
void TFT_FSMC::Init() {
- #if !IS_ANET_ET
- uint32_t controllerAddress;
- #endif
+ uint32_t controllerAddress;
#if PIN_EXISTS(TFT_RESET)
OUT_WRITE(TFT_RESET_PIN, HIGH);
@@ -51,25 +46,23 @@ void TFT_FSMC::Init() {
FSMC_NORSRAM_TimingTypeDef Timing, ExtTiming;
- #if !IS_ANET_ET
- const uint32_t NSBank = (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
- #endif
+ uint32_t NSBank = (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
// Perform the SRAM1 memory initialization sequence
SRAMx.Instance = FSMC_NORSRAM_DEVICE;
SRAMx.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
// SRAMx.Init
- SRAMx.Init.NSBank = TERN(IS_ANET_ET, FSMC_NORSRAM_BANK1, NSBank);
+ SRAMx.Init.NSBank = NSBank;
SRAMx.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
SRAMx.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
- SRAMx.Init.MemoryDataWidth = TERN(IS_ANET_ET, FSMC_NORSRAM_MEM_BUS_WIDTH_8, FSMC_NORSRAM_MEM_BUS_WIDTH_16);
+ SRAMx.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
SRAMx.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
SRAMx.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
SRAMx.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
SRAMx.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
SRAMx.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
SRAMx.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
- SRAMx.Init.ExtendedMode = TERN(IS_ANET_ET, FSMC_EXTENDED_MODE_DISABLE, FSMC_EXTENDED_MODE_ENABLE);
+ SRAMx.Init.ExtendedMode = FSMC_EXTENDED_MODE_ENABLE;
SRAMx.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
SRAMx.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
#ifdef STM32F4xx
@@ -101,10 +94,7 @@ void TFT_FSMC::Init() {
pinmap_pinout(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
pinmap_pinout(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
- #if !IS_ANET_ET
- controllerAddress = FSMC_BANK1_1;
- #endif
-
+ controllerAddress = FSMC_BANK1_1;
#ifdef PF0
switch (NSBank) {
case FSMC_NORSRAM_BANK2: controllerAddress = FSMC_BANK1_2 ; break;
@@ -113,9 +103,7 @@ void TFT_FSMC::Init() {
}
#endif
- #if !IS_ANET_ET
- controllerAddress |= (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
- #endif
+ controllerAddress |= (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
HAL_SRAM_Init(&SRAMx, &Timing, &ExtTiming);
@@ -139,45 +127,31 @@ void TFT_FSMC::Init() {
DMAtx.Init.Mode = DMA_NORMAL;
DMAtx.Init.Priority = DMA_PRIORITY_HIGH;
- #if IS_ANET_ET
- //controllerAddress = (uint32_t)0x60000000U;
- //LCD = (LCD_CONTROLLER_TypeDef *)controllerAddress;
- //LCD->RAM = (uint16_t *)LCD_RAM_ADR;
- #else
- LCD = (LCD_CONTROLLER_TypeDef *)controllerAddress;
- #endif
+ LCD = (LCD_CONTROLLER_TypeDef *)controllerAddress;
}
uint32_t TFT_FSMC::GetID() {
- #if IS_ANET_ET
- return 0x8552;
- #else
- uint32_t id;
- WriteReg(0x0000);
- id = LCD->RAM;
-
- if (id == 0)
- id = ReadID(LCD_READ_ID);
- if ((id & 0xFFFF) == 0 || (id & 0xFFFF) == 0xFFFF)
- id = ReadID(LCD_READ_ID4);
- return id;
- #endif
+ uint32_t id;
+ WriteReg(0);
+ id = LCD->RAM;
+
+ if (id == 0)
+ id = ReadID(LCD_READ_ID);
+ if ((id & 0xFFFF) == 0 || (id & 0xFFFF) == 0xFFFF)
+ id = ReadID(LCD_READ_ID4);
+ return id;
}
-#if !IS_ANET_ET
-
- uint32_t TFT_FSMC::ReadID(uint16_t Reg) {
- uint32_t id;
- WriteReg(Reg);
- id = LCD->RAM; // dummy read
- id = Reg << 24;
- id |= (LCD->RAM & 0x00FF) << 16;
- id |= (LCD->RAM & 0x00FF) << 8;
- id |= (LCD->RAM & 0x00FF);
- return id;
- }
-
-#endif
+uint32_t TFT_FSMC::ReadID(ctrl_data_t Reg) {
+ uint32_t id;
+ WriteReg(Reg);
+ id = LCD->RAM; // dummy read
+ id = Reg << 24;
+ id |= (LCD->RAM & 0x00FF) << 16;
+ id |= (LCD->RAM & 0x00FF) << 8;
+ id |= LCD->RAM & 0x00FF;
+ return id;
+}
bool TFT_FSMC::isBusy() {
if (__IS_DMA_ENABLED(&DMAtx))
@@ -186,7 +160,7 @@ bool TFT_FSMC::isBusy() {
return __IS_DMA_ENABLED(&DMAtx);
}
-void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
+void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, ctrl_data_t *Data, uint16_t Count) {
DMAtx.Init.PeriphInc = MemoryIncrease;
HAL_DMA_Init(&DMAtx);
@@ -196,14 +170,14 @@ void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Cou
#ifdef STM32F1xx
DMAtx.Instance->CNDTR = Count;
DMAtx.Instance->CPAR = (uint32_t)Data;
- DMAtx.Instance->CMAR = (uint32_t)&(LCD_RAM);
+ DMAtx.Instance->CMAR = (uint32_t)&(LCD->RAM);
#elif defined(STM32F4xx)
//#if IS_ANET_ET
//DMAtx.Instance->NDTR = (Count*2);
//#endif
DMAtx.Instance->NDTR = Count;
DMAtx.Instance->PAR = (uint32_t)Data;
- DMAtx.Instance->M0AR = (uint32_t)TERN(IS_ANET_ET, LCD_RAM_ADR, &LCD->RAM);
+ DMAtx.Instance->M0AR = (uint32_t)&(LCD->RAM);
#endif
__HAL_DMA_ENABLE(&DMAtx);
}
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.h b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
index bdef3383beb4..adca7bc0495b 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.h
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
@@ -44,22 +44,13 @@
#define DATASIZE_16BIT SPI_DATASIZE_16BIT
#define TFT_IO_DRIVER TFT_FSMC
+typedef IF::type ctrl_data_t;
+
typedef struct {
- __IO uint16_t REG;
- __IO uint16_t RAM;
+ __IO ctrl_data_t REG;
+ __IO ctrl_data_t RAM;
} LCD_CONTROLLER_TypeDef;
-#if IS_ANET_ET
- #define LCD_RAM_ADR 0x60040000
- #define LCD_RAM *(__IO uint8_t *)LCD_RAM_ADR
- #define LCD_REG *(__IO uint8_t *)0x60000000
- #define LCD_REG_DATA(V) ((V) & 0xFF)
-#else
- #define LCD_RAM LCD->RAM
- #define LCD_REG LCD->REG
- #define LCD_REG_DATA(V) (V)
-#endif
-
class TFT_FSMC {
private:
static SRAM_HandleTypeDef SRAMx;
@@ -67,12 +58,9 @@ class TFT_FSMC {
static LCD_CONTROLLER_TypeDef *LCD;
- #if !IS_ANET_ET
- static uint32_t ReadID(uint16_t Reg);
- #endif
-
- static void Transmit(uint8_t Data) { LCD_RAM = Data; __DSB(); }
- static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
+ static uint32_t ReadID(ctrl_data_t Reg);
+ static void Transmit(uint8_t Data) { LCD->RAM = Data; __DSB(); }
+ static void TransmitDMA(uint32_t MemoryIncrease, ctrl_data_t *Data, uint16_t Count);
public:
static void Init();
@@ -83,8 +71,8 @@ class TFT_FSMC {
static void DataTransferBegin(uint16_t DataWidth = TERN(IS_ANET_ET, DATASIZE_8BIT, DATASIZE_16BIT)) {}
static void DataTransferEnd() {};
- static void WriteData(uint16_t Data) { Transmit(LCD_REG_DATA(Data)); }
- static void WriteReg(uint16_t Reg) { LCD_REG = LCD_REG_DATA(Reg); __DSB(); }
+ static void WriteData(ctrl_data_t Data) { Transmit(Data); }
+ static void WriteReg(ctrl_data_t Reg) { LCD->REG = Reg; __DSB(); }
static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
@@ -137,7 +125,7 @@ const PinMap PinMap_FSMC_CS[] = {
{NC, NP, 0}
};
-#define FSMC_RS(A) (void *)((2 << A) - 2)
+#define FSMC_RS(A) (void *)((2 << (A-1)) - 1)
const PinMap PinMap_FSMC_RS[] = {
#ifdef PF0
@@ -158,18 +146,14 @@ const PinMap PinMap_FSMC_RS[] = {
{PG_4, FSMC_RS(14), FSMC_PIN_DATA}, // FSMC_A14
{PG_5, FSMC_RS(15), FSMC_PIN_DATA}, // FSMC_A15
#endif
- #if !IS_ANET_ET
- {PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
- {PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
- #endif
- {PD_13, FSMC_RS(18), FSMC_PIN_DATA}, // FSMC_A18
- #if !IS_ANET_ET
- {PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
- {PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
- {PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
- {PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
- {PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
- #endif
+ {PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
+ {PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
+ {PD_13, FSMC_RS(18), FSMC_PIN_DATA}, // FSMC_A18
+ {PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
+ {PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
+ {PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
+ {PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
+ {PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
#ifdef PF0
{PG_13, FSMC_RS(24), FSMC_PIN_DATA}, // FSMC_A24
{PG_14, FSMC_RS(25), FSMC_PIN_DATA}, // FSMC_A25
diff --git a/Marlin/src/lcd/tft_io/tft_io.cpp b/Marlin/src/lcd/tft_io/tft_io.cpp
index cd535458a181..641bb04a65c2 100644
--- a/Marlin/src/lcd/tft_io/tft_io.cpp
+++ b/Marlin/src/lcd/tft_io/tft_io.cpp
@@ -213,7 +213,7 @@ void TFT_IO::write_esc_sequence(const uint16_t *Sequence) {
data = *Sequence++;
if (data == 0x7FFF) return;
if (data == 0xFFFF)
- io.WriteData(0xFFFF);
+ io.WriteData(TERN(IS_ANET_ET, 0xFF, 0xFFFF));
else if (data & 0x8000)
delay(data & 0x7FFF);
else if ((data & 0xFF00) == 0)
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 19d4ca60d278..40d5326e470a 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -33,6 +33,12 @@
//
// EEPROM
//
+
+/**
+ * Status: Working.
+ * Hardware: AT24C04C (ATMLH744 04CM) 4 Kb => http://ww1.microchip.com/downloads/en/DeviceDoc/AT24C04C-AT24C08C-I2C-Compatible-%20Two-Wire-Serial-EEPROM-4-Kbit-8-Kbit-20006127A.pdf
+ */
+
// Use one of these or SDCard-based Emulation will be used
#if NO_EEPROM_SELECTED
//#define SRAM_EEPROM_EMULATION // Use BackSRAM-based EEPROM emulation
@@ -61,7 +67,9 @@
//
// Z Probe
//
-#ifndef Z_MIN_PROBE_PIN
+#if ENABLED(BLTOUCH)
+ #define SERVO0_PIN PC3
+#elif !defined(Z_MIN_PROBE_PIN)
#define Z_MIN_PROBE_PIN PC3
#endif
@@ -128,7 +136,18 @@
//
// LCD / Controller
//
-#define TFT_DRIVER ST7789
+
+/**
+ * Status: Working. Merged FSMC/DMA implementation for stm32f4 from jmz52 fork.
+ * Hardware: IC ST7789V | STP320240_0280E2T (40P/1,5): ST7789 (YT280S008) => https://a.aliexpress.com/_dV4Bghv
+ * Notes:
+ * - Defined PINS: CSX, DCX, WRX, RESX, RDX, DB[8:15]
+ * - FSMC/DMA and 8080-8 interface
+ */
+
+#ifndef TFT_DRIVER
+ #define TFT_DRIVER AUTO
+#endif
#define TFT_RESET_PIN PE6
#define TFT_CS_PIN PD7
#define TFT_RS_PIN PD13
@@ -136,54 +155,10 @@
//
// Touch Screen
//
-
-#define COLOR_ORANGEZ 0xFDE0
-#define COLOR_BACKGROUND 0x2124
-#define COLOR_SELECTION_BG COLOR_ORANGEZ
-#define COLOR_WEBSITE_URL 0x03B7
-
-#define COLOR_REDZ 0xF003
-
-#define COLOR_INACTIVE COLOR_GREY
-#define COLOR_COLD COLOR_ORANGEZ
-#define COLOR_HOTEND COLOR_REDZ
-#define COLOR_HEATED_BED COLOR_REDZ
-#define COLOR_CHAMBER COLOR_DARK_ORANGE
-#define COLOR_FAN COLOR_ORANGEZ
-
-#define COLOR_AXIS_HOMED COLOR_WHITE
-#define COLOR_AXIS_NOT_HOMED COLOR_ORANGEZ
-
-#define COLOR_RATE_100 0xA7E0
-#define COLOR_RATE_ALTERED COLOR_ORANGEZ
-
-#define COLOR_PRINT_TIME COLOR_WHITE
-
-#define COLOR_PROGRESS_FRAME COLOR_WHITE
-#define COLOR_PROGRESS_BAR COLOR_ORANGEZ
-#define COLOR_PROGRESS_BG COLOR_BLACK
-
-#define COLOR_STATUS_MESSAGE COLOR_ORANGEZ
-
-#define COLOR_CONTROL_ENABLED COLOR_ORANGEZ
-#define COLOR_CONTROL_DISABLED COLOR_GREY
-#define COLOR_CONTROL_CANCEL COLOR_SCARLET
-#define COLOR_CONTROL_CONFIRM COLOR_VIVID_GREEN
-#define COLOR_BUSY COLOR_SILVER
-
-#define COLOR_MENU_TEXT COLOR_WHITE
-#define COLOR_MENU_VALUE COLOR_WHITE
-#define COLOR_MENU_VALUE_FONT COLOR_ORANGEZ
-
-#define COLOR_SLIDER COLOR_WHITE
-#define COLOR_SLIDER_INACTIVE COLOR_GREY
-
-#define COLOR_UBL COLOR_WHITE
-
-#define COLOR_TOUCH_CALIBRATION COLOR_WHITE
-
-#define COLOR_KILL_SCREEN_BG COLOR_MAROON
-#define COLOR_KILL_SCREEN_TEXT COLOR_WHITE
+/**
+ * Status: Working. Merged implementation from jmz52 fork.
+ * Hardware: TOUCH: XPT2046 => https://ldm-systems.ru/f/doc/catalog/HY-TFT-2,8/XPT2046.pdf
+ */
#if ENABLED(TOUCH_SCREEN)
#define TOUCH_CS_PIN PB2
@@ -199,7 +174,7 @@
//#define SDIO_SUPPORT
#ifndef SDCARD_CONNECTION
- #define SDCARD_CONNECTION ONBOARD
+ #define SDCARD_CONNECTION CUSTOM_CABLE
#endif
#if ENABLED(SDSUPPORT)
diff --git a/buildroot/share/PlatformIO/boards/ANET_ET4.json b/buildroot/share/PlatformIO/boards/ANET_ET4.json
index 1dfd58e4a371..3b746f01e04b 100644
--- a/buildroot/share/PlatformIO/boards/ANET_ET4.json
+++ b/buildroot/share/PlatformIO/boards/ANET_ET4.json
@@ -31,7 +31,7 @@
"disable_flushing": false,
"maximum_ram_size": 196608,
"maximum_size": 1048576,
- "protocol": "jlink",
+ "protocol": "stlink",
"protocols": [
"stlink",
"dfu",
diff --git a/buildroot/share/PlatformIO/scripts/anet_et4.py b/buildroot/share/PlatformIO/scripts/anet_et4.py
index 41d21e30b4b8..cfb0c55c2c40 100644
--- a/buildroot/share/PlatformIO/scripts/anet_et4.py
+++ b/buildroot/share/PlatformIO/scripts/anet_et4.py
@@ -2,7 +2,7 @@
Import("env")
from SCons.Script import DefaultEnvironment
-board = DefaultEnvironment().BoardConfig()
+from os.path import join
custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/anet_et4.ld")
for i, flag in enumerate(env["LINKFLAGS"]):
@@ -10,3 +10,11 @@
env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
elif flag == "-T":
env["LINKFLAGS"][i + 1] = custom_ld_script
+
+env.AddPostAction(
+ "$BUILD_DIR/${PROGNAME}.elf",
+ env.VerboseAction(" ".join([
+ "$OBJCOPY", "-O", "srec",
+ "\"$BUILD_DIR/${PROGNAME}.elf\"", "\"$BUILD_DIR/${PROGNAME}.srec\""
+ ]), "Building " + join("$BUILD_DIR","${PROGNAME}.srec"))
+)
diff --git a/platformio.ini b/platformio.ini
index 40398f427629..4a6c697c9ad8 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1242,8 +1242,6 @@ board_build.offset = 0x10000
build_flags = ${common_stm32.build_flags}
-DDISABLE_GENERIC_SERIALUSB
-DSTM32F407VG -DARDUINO_ARCH_STM32 -DTARGET_STM32F4
- -DHAS_GRAPHICAL_TFT -DHAS_FSMC_TFT -DTFT_320x240 -DTOUCH_SCREEN
- #-DTRANSFER_CLOCK_DIV=8
build_unflags = ${common_stm32.build_unflags}
-DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
extra_scripts = ${common.extra_scripts}
From 653d35a6a20975a8c9955eef59ff95d6580d90b6 Mon Sep 17 00:00:00 2001
From: Scott Lahteine
Date: Sun, 6 Dec 2020 17:18:19 -0600
Subject: [PATCH 07/29] Fewer comments
---
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 22 ++--------------------
1 file changed, 2 insertions(+), 20 deletions(-)
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 40d5326e470a..d4d7a98f3bee 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -34,11 +34,6 @@
// EEPROM
//
-/**
- * Status: Working.
- * Hardware: AT24C04C (ATMLH744 04CM) 4 Kb => http://ww1.microchip.com/downloads/en/DeviceDoc/AT24C04C-AT24C08C-I2C-Compatible-%20Two-Wire-Serial-EEPROM-4-Kbit-8-Kbit-20006127A.pdf
- */
-
// Use one of these or SDCard-based Emulation will be used
#if NO_EEPROM_SELECTED
//#define SRAM_EEPROM_EMULATION // Use BackSRAM-based EEPROM emulation
@@ -136,17 +131,8 @@
//
// LCD / Controller
//
-
-/**
- * Status: Working. Merged FSMC/DMA implementation for stm32f4 from jmz52 fork.
- * Hardware: IC ST7789V | STP320240_0280E2T (40P/1,5): ST7789 (YT280S008) => https://a.aliexpress.com/_dV4Bghv
- * Notes:
- * - Defined PINS: CSX, DCX, WRX, RESX, RDX, DB[8:15]
- * - FSMC/DMA and 8080-8 interface
- */
-
#ifndef TFT_DRIVER
- #define TFT_DRIVER AUTO
+ #define TFT_DRIVER AUTO // ST7789
#endif
#define TFT_RESET_PIN PE6
#define TFT_CS_PIN PD7
@@ -154,12 +140,8 @@
//
// Touch Screen
+// https://ldm-systems.ru/f/doc/catalog/HY-TFT-2,8/XPT2046.pdf
//
-/**
- * Status: Working. Merged implementation from jmz52 fork.
- * Hardware: TOUCH: XPT2046 => https://ldm-systems.ru/f/doc/catalog/HY-TFT-2,8/XPT2046.pdf
- */
-
#if ENABLED(TOUCH_SCREEN)
#define TOUCH_CS_PIN PB2
#define TOUCH_SCK_PIN PB0
From 861d729ce7a03fb9baa0d0f45e7313818cd27831 Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Sun, 6 Dec 2020 21:20:18 -0300
Subject: [PATCH 08/29] Rollback FSMC changes
---
Marlin/src/HAL/STM32/tft/tft_fsmc.cpp | 13 +++----
Marlin/src/HAL/STM32/tft/tft_fsmc.h | 50 ++++++++++++---------------
2 files changed, 28 insertions(+), 35 deletions(-)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
index 0adbb2fad469..9994bc7c68b8 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
@@ -55,7 +55,7 @@ void TFT_FSMC::Init() {
SRAMx.Init.NSBank = NSBank;
SRAMx.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
SRAMx.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
- SRAMx.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
+ SRAMx.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
SRAMx.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
SRAMx.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
SRAMx.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
@@ -74,8 +74,8 @@ void TFT_FSMC::Init() {
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 24;
Timing.BusTurnAroundDuration = 0;
- Timing.CLKDivision = TERN(IS_ANET_ET, 0, 16);
- Timing.DataLatency = TERN(IS_ANET_ET, 0, 17);
+ Timing.CLKDivision = 16;
+ Timing.DataLatency = 17;
Timing.AccessMode = FSMC_ACCESS_MODE_A;
// Write Timing
// Can be decreases from 8-15-8 to 0-0-1 with risk of stability loss
@@ -142,7 +142,7 @@ uint32_t TFT_FSMC::GetID() {
return id;
}
-uint32_t TFT_FSMC::ReadID(ctrl_data_t Reg) {
+uint32_t TFT_FSMC::ReadID(uint16_t Reg) {
uint32_t id;
WriteReg(Reg);
id = LCD->RAM; // dummy read
@@ -160,7 +160,7 @@ bool TFT_FSMC::isBusy() {
return __IS_DMA_ENABLED(&DMAtx);
}
-void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, ctrl_data_t *Data, uint16_t Count) {
+void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
DMAtx.Init.PeriphInc = MemoryIncrease;
HAL_DMA_Init(&DMAtx);
@@ -172,9 +172,6 @@ void TFT_FSMC::TransmitDMA(uint32_t MemoryIncrease, ctrl_data_t *Data, uint16_t
DMAtx.Instance->CPAR = (uint32_t)Data;
DMAtx.Instance->CMAR = (uint32_t)&(LCD->RAM);
#elif defined(STM32F4xx)
- //#if IS_ANET_ET
- //DMAtx.Instance->NDTR = (Count*2);
- //#endif
DMAtx.Instance->NDTR = Count;
DMAtx.Instance->PAR = (uint32_t)Data;
DMAtx.Instance->M0AR = (uint32_t)&(LCD->RAM);
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.h b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
index adca7bc0495b..ea1d7f8fb3d4 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.h
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
@@ -44,11 +44,9 @@
#define DATASIZE_16BIT SPI_DATASIZE_16BIT
#define TFT_IO_DRIVER TFT_FSMC
-typedef IF::type ctrl_data_t;
-
typedef struct {
- __IO ctrl_data_t REG;
- __IO ctrl_data_t RAM;
+ __IO uint16_t REG;
+ __IO uint16_t RAM;
} LCD_CONTROLLER_TypeDef;
class TFT_FSMC {
@@ -58,9 +56,9 @@ class TFT_FSMC {
static LCD_CONTROLLER_TypeDef *LCD;
- static uint32_t ReadID(ctrl_data_t Reg);
+ static uint32_t ReadID(uint16_t Reg);
static void Transmit(uint8_t Data) { LCD->RAM = Data; __DSB(); }
- static void TransmitDMA(uint32_t MemoryIncrease, ctrl_data_t *Data, uint16_t Count);
+ static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
public:
static void Init();
@@ -71,8 +69,8 @@ class TFT_FSMC {
static void DataTransferBegin(uint16_t DataWidth = TERN(IS_ANET_ET, DATASIZE_8BIT, DATASIZE_16BIT)) {}
static void DataTransferEnd() {};
- static void WriteData(ctrl_data_t Data) { Transmit(Data); }
- static void WriteReg(ctrl_data_t Reg) { LCD->REG = Reg; __DSB(); }
+ static void WriteData(uint16_t Data) { Transmit(Data); }
+ static void WriteReg(uint16_t Reg) { LCD->REG = Reg; __DSB(); }
static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
@@ -100,16 +98,14 @@ const PinMap PinMap_FSMC[] = {
{PE_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D05
{PE_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D06
{PE_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D07
- #if !IS_ANET_ET
- {PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
- {PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
- {PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
- {PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
- {PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
- {PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
- {PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
- {PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
- #endif
+ {PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
+ {PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
+ {PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
+ {PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
+ {PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
+ {PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
+ {PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
+ {PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
{PD_4, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NOE
{PD_5, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NWE
{NC, NP, 0}
@@ -125,7 +121,7 @@ const PinMap PinMap_FSMC_CS[] = {
{NC, NP, 0}
};
-#define FSMC_RS(A) (void *)((2 << (A-1)) - 1)
+#define FSMC_RS(A) (void *)((2 << A) - 2)
const PinMap PinMap_FSMC_RS[] = {
#ifdef PF0
@@ -146,14 +142,14 @@ const PinMap PinMap_FSMC_RS[] = {
{PG_4, FSMC_RS(14), FSMC_PIN_DATA}, // FSMC_A14
{PG_5, FSMC_RS(15), FSMC_PIN_DATA}, // FSMC_A15
#endif
- {PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
- {PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
- {PD_13, FSMC_RS(18), FSMC_PIN_DATA}, // FSMC_A18
- {PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
- {PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
- {PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
- {PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
- {PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
+ {PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
+ {PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
+ {PD_13, FSMC_RS(18), FSMC_PIN_DATA}, // FSMC_A18
+ {PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
+ {PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
+ {PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
+ {PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
+ {PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
#ifdef PF0
{PG_13, FSMC_RS(24), FSMC_PIN_DATA}, // FSMC_A24
{PG_14, FSMC_RS(25), FSMC_PIN_DATA}, // FSMC_A25
From 549a9618e0c86e991aebd39461d73635acf63948 Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Sun, 6 Dec 2020 21:23:19 -0300
Subject: [PATCH 09/29] More FSMC Rollback
---
Marlin/src/HAL/STM32/tft/tft_fsmc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.h b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
index ea1d7f8fb3d4..e2e0128c5efc 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.h
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
@@ -57,7 +57,7 @@ class TFT_FSMC {
static LCD_CONTROLLER_TypeDef *LCD;
static uint32_t ReadID(uint16_t Reg);
- static void Transmit(uint8_t Data) { LCD->RAM = Data; __DSB(); }
+ static void Transmit(uint16_t Data) { LCD->RAM = Data; __DSB(); }
static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
public:
@@ -66,7 +66,7 @@ class TFT_FSMC {
static bool isBusy();
static void Abort() { __HAL_DMA_DISABLE(&DMAtx); }
- static void DataTransferBegin(uint16_t DataWidth = TERN(IS_ANET_ET, DATASIZE_8BIT, DATASIZE_16BIT)) {}
+ static void DataTransferBegin(uint16_t DataWidth = DATASIZE_16BIT) {}
static void DataTransferEnd() {};
static void WriteData(uint16_t Data) { Transmit(Data); }
From 493417da523b1c2aa2b3b6cab67ffaee914202a0 Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Sun, 6 Dec 2020 23:26:26 -0300
Subject: [PATCH 10/29] ANET_ET4_TFT28 and ANET_ET5_TFT35 support + FSMC 8bit
for SMT32
---
Marlin/Configuration.h | 10 ++
Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp | 183 ++++++++++++++++++++++++
Marlin/src/HAL/STM32/tft/tft_fsmc8.h | 160 +++++++++++++++++++++
Marlin/src/core/macros.h | 4 +-
Marlin/src/inc/Conditionals_LCD.h | 10 ++
Marlin/src/inc/SanityCheck.h | 4 +-
Marlin/src/lcd/tft_io/tft_io.cpp | 2 +-
Marlin/src/lcd/tft_io/tft_io.h | 6 +-
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 4 +-
9 files changed, 375 insertions(+), 8 deletions(-)
create mode 100644 Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp
create mode 100644 Marlin/src/HAL/STM32/tft/tft_fsmc8.h
diff --git a/Marlin/Configuration.h b/Marlin/Configuration.h
index ebc3311d9eda..257494a08d0e 100644
--- a/Marlin/Configuration.h
+++ b/Marlin/Configuration.h
@@ -2310,6 +2310,16 @@
//
//#define LONGER_LK_TFT28
+//
+// 320x240, 2.8", FSMC Stock Display from ET4
+//
+#define ANET_ET4_TFT28
+
+//
+// 480x320, 3.5", FSMC Stock Display from ET5
+//
+//#define ANET_ET5_TFT35
+
//
// Generic TFT with detailed options
//
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp
new file mode 100644
index 000000000000..ea65ff7cc0f4
--- /dev/null
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp
@@ -0,0 +1,183 @@
+/**
+ * Marlin 3D Printer Firmware
+ * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
+ *
+ * Based on Sprinter and grbl.
+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ *
+ */
+
+#include "../../../inc/MarlinConfig.h"
+
+#if ENABLED(TFT_INTERFACE_FSMC_8BIT)
+
+#include "tft_fsmc8.h"
+#include "pinconfig.h"
+
+SRAM_HandleTypeDef TFT_FSMC_8BIT::SRAMx;
+DMA_HandleTypeDef TFT_FSMC_8BIT::DMAtx;
+LCD_CONTROLLER_TypeDef *TFT_FSMC_8BIT::LCD;
+
+void TFT_FSMC_8BIT::Init() {
+ uint32_t controllerAddress;
+
+ #if PIN_EXISTS(TFT_RESET)
+ OUT_WRITE(TFT_RESET_PIN, HIGH);
+ HAL_Delay(100);
+ #endif
+
+ #if PIN_EXISTS(TFT_BACKLIGHT)
+ OUT_WRITE(TFT_BACKLIGHT_PIN, HIGH);
+ #endif
+
+ FSMC_NORSRAM_TimingTypeDef Timing, ExtTiming;
+
+ uint32_t NSBank = (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
+
+ /** Perform the SRAM1 memory initialization sequence
+ */
+ SRAMx.Instance = FSMC_NORSRAM_DEVICE;
+ SRAMx.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
+ /* SRAMx.Init */
+ SRAMx.Init.NSBank = NSBank;
+ SRAMx.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
+ SRAMx.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
+ SRAMx.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
+ SRAMx.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
+ SRAMx.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
+ SRAMx.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
+ SRAMx.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
+ SRAMx.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
+ SRAMx.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
+ SRAMx.Init.ExtendedMode = FSMC_EXTENDED_MODE_ENABLE;
+ SRAMx.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
+ SRAMx.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
+ #ifdef STM32F4xx
+ SRAMx.Init.PageSize = FSMC_PAGE_SIZE_NONE;
+ #endif
+ /* Read Timing - relatively slow to ensure ID information is correctly read from TFT controller */
+ /* Can be decreases from 15-15-24 to 4-4-8 with risk of stability loss */
+ Timing.AddressSetupTime = 15;
+ Timing.AddressHoldTime = 15;
+ Timing.DataSetupTime = 24;
+ Timing.BusTurnAroundDuration = 0;
+ Timing.CLKDivision = 0;
+ Timing.DataLatency = 0;
+ Timing.AccessMode = FSMC_ACCESS_MODE_A;
+ /* Write Timing */
+ /* Can be decreases from 8-15-8 to 0-0-1 with risk of stability loss */
+ ExtTiming.AddressSetupTime = 8;
+ ExtTiming.AddressHoldTime = 15;
+ ExtTiming.DataSetupTime = 8;
+ ExtTiming.BusTurnAroundDuration = 0;
+ ExtTiming.CLKDivision = 16;
+ ExtTiming.DataLatency = 17;
+ ExtTiming.AccessMode = FSMC_ACCESS_MODE_A;
+
+ __HAL_RCC_FSMC_CLK_ENABLE();
+
+ for (uint16_t i = 0; PinMap_FSMC[i].pin != NC; i++)
+ pinmap_pinout(PinMap_FSMC[i].pin, PinMap_FSMC);
+ pinmap_pinout(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
+ pinmap_pinout(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
+
+ controllerAddress = FSMC_BANK1_1;
+ #ifdef PF0
+ switch (NSBank) {
+ case FSMC_NORSRAM_BANK2: controllerAddress = FSMC_BANK1_2 ; break;
+ case FSMC_NORSRAM_BANK3: controllerAddress = FSMC_BANK1_3 ; break;
+ case FSMC_NORSRAM_BANK4: controllerAddress = FSMC_BANK1_4 ; break;
+ }
+ #endif
+
+ controllerAddress |= (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
+
+ HAL_SRAM_Init(&SRAMx, &Timing, &ExtTiming);
+
+ __HAL_RCC_DMA2_CLK_ENABLE();
+
+ #ifdef STM32F1xx
+ DMAtx.Instance = DMA2_Channel1;
+ #elif defined(STM32F4xx)
+ DMAtx.Instance = DMA2_Stream0;
+ DMAtx.Init.Channel = DMA_CHANNEL_0;
+ DMAtx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
+ DMAtx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
+ DMAtx.Init.MemBurst = DMA_MBURST_SINGLE;
+ DMAtx.Init.PeriphBurst = DMA_PBURST_SINGLE;
+ #endif
+
+ DMAtx.Init.Direction = DMA_MEMORY_TO_MEMORY;
+ DMAtx.Init.MemInc = DMA_MINC_DISABLE;
+ DMAtx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+ DMAtx.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+ DMAtx.Init.Mode = DMA_NORMAL;
+ DMAtx.Init.Priority = DMA_PRIORITY_HIGH;
+
+ LCD = (LCD_CONTROLLER_TypeDef *)controllerAddress;
+}
+
+uint32_t TFT_FSMC_8BIT::GetID() {
+ uint32_t id;
+ WriteReg(0x00);
+ id = LCD->RAM;
+
+ if (id == 0)
+ id = ReadID(LCD_READ_ID);
+ if ((id & 0xFFFF) == 0 || (id & 0xFFFF) == 0xFFFF)
+ id = ReadID(LCD_READ_ID4);
+ return id;
+}
+
+uint32_t TFT_FSMC_8BIT::ReadID(uint8_t Reg) {
+ uint32_t id;
+ WriteReg(Reg);
+ id = LCD->RAM; // dummy read
+ id = Reg << 24;
+ id |= (LCD->RAM & 0x00FF) << 16;
+ id |= (LCD->RAM & 0x00FF) << 8;
+ id |= LCD->RAM & 0x00FF;
+ return id;
+}
+
+bool TFT_FSMC_8BIT::isBusy() {
+ if (__IS_DMA_ENABLED(&DMAtx))
+ if (__HAL_DMA_GET_FLAG(&DMAtx, __HAL_DMA_GET_TC_FLAG_INDEX(&DMAtx)) != 0 || __HAL_DMA_GET_FLAG(&DMAtx, __HAL_DMA_GET_TE_FLAG_INDEX(&DMAtx)) != 0)
+ Abort();
+ return __IS_DMA_ENABLED(&DMAtx);
+}
+
+void TFT_FSMC_8BIT::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
+ DMAtx.Init.PeriphInc = MemoryIncrease;
+ HAL_DMA_Init(&DMAtx);
+
+ __HAL_DMA_CLEAR_FLAG(&DMAtx, __HAL_DMA_GET_TC_FLAG_INDEX(&DMAtx));
+ __HAL_DMA_CLEAR_FLAG(&DMAtx, __HAL_DMA_GET_TE_FLAG_INDEX(&DMAtx));
+
+ #ifdef STM32F1xx
+ DMAtx.Instance->CNDTR = Count;
+ DMAtx.Instance->CPAR = (uint32_t)Data;
+ DMAtx.Instance->CMAR = (uint32_t)&(LCD->RAM);
+ #elif defined(STM32F4xx)
+ //DMAtx.Instance->NDTR = (Count*2);
+ DMAtx.Instance->NDTR = Count;
+ DMAtx.Instance->PAR = (uint32_t)Data;
+ DMAtx.Instance->M0AR = (uint32_t)&(LCD->RAM);
+ #endif
+ __HAL_DMA_ENABLE(&DMAtx);
+}
+
+#endif // ENABLED(TFT_INTERFACE_FSMC_8BIT)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc8.h b/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
new file mode 100644
index 000000000000..6d56bc83c87e
--- /dev/null
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
@@ -0,0 +1,160 @@
+/**
+ * Marlin 3D Printer Firmware
+ * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
+ *
+ * Based on Sprinter and grbl.
+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ *
+ */
+#pragma once
+
+#ifdef STM32F1xx
+ #include "stm32f1xx_hal.h"
+#elif defined(STM32F4xx)
+ #include "stm32f4xx_hal.h"
+#else
+ #error FSMC TFT is currently only supported on STM32F1 and STM32F4 hardware.
+#endif
+
+#ifndef LCD_READ_ID
+ #define LCD_READ_ID 0x04 // Read display identification information (0xD3 on ILI9341)
+#endif
+#ifndef LCD_READ_ID4
+ #define LCD_READ_ID4 0xD3 // Read display identification information (0xD3 on ILI9341)
+#endif
+
+#define DATASIZE_8BIT SPI_DATASIZE_8BIT
+#define DATASIZE_16BIT SPI_DATASIZE_16BIT
+#define TFT_IO_DRIVER TFT_FSMC_8BIT
+
+#ifdef STM32F1xx
+ #define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CCR & DMA_CCR_EN)
+#elif defined(STM32F4xx)
+ #define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR & DMA_SxCR_EN)
+#endif
+
+typedef struct {
+ __IO uint8_t REG;
+ __IO uint8_t RAM;
+} LCD_CONTROLLER_TypeDef;
+
+class TFT_FSMC_8BIT {
+private:
+ static SRAM_HandleTypeDef SRAMx;
+ static DMA_HandleTypeDef DMAtx;
+
+ static LCD_CONTROLLER_TypeDef *LCD;
+
+ static uint32_t ReadID(uint8_t Reg);
+ static void Transmit(uint8_t Data) { LCD->RAM = Data; __DSB(); }
+ static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
+
+public:
+ static void Init();
+ static uint32_t GetID();
+ static bool isBusy();
+ static void Abort() { __HAL_DMA_DISABLE(&DMAtx); }
+
+ static void DataTransferBegin(uint16_t DataWidth = DATASIZE_8BIT) {}
+ static void DataTransferEnd() {};
+
+ static void WriteData(uint8_t Data) { Transmit(Data); }
+ static void WriteReg(uint8_t Reg) { LCD->REG = Reg; __DSB(); }
+
+ static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
+ static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
+};
+
+
+#ifdef STM32F1xx
+ #define FSMC_PIN_DATA STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)
+#elif defined(STM32F4xx)
+ #define FSMC_PIN_DATA STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FSMC)
+ #define FSMC_BANK1_1 0x60000000U
+ #define FSMC_BANK1_2 0x64000000U
+ #define FSMC_BANK1_3 0x68000000U
+ #define FSMC_BANK1_4 0x6C000000U
+#else
+ #error No configuration for this MCU
+#endif
+
+const PinMap PinMap_FSMC[] = {
+ {PD_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D00
+ {PD_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D01
+ {PD_0, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D02
+ {PD_1, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D03
+ {PE_7, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D04
+ {PE_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D05
+ {PE_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D06
+ {PE_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D07
+ // {PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
+ // {PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
+ // {PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
+ // {PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
+ // {PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
+ // {PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
+ // {PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
+ // {PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
+ {PD_4, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NOE
+ {PD_5, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NWE
+ {NC, NP, 0}
+};
+
+const PinMap PinMap_FSMC_CS[] = {
+ {PD_7, (void *)FSMC_NORSRAM_BANK1, FSMC_PIN_DATA}, // FSMC_NE1
+ #ifdef PF0
+ {PG_9, (void *)FSMC_NORSRAM_BANK2, FSMC_PIN_DATA}, // FSMC_NE2
+ {PG_10, (void *)FSMC_NORSRAM_BANK3, FSMC_PIN_DATA}, // FSMC_NE3
+ {PG_12, (void *)FSMC_NORSRAM_BANK4, FSMC_PIN_DATA}, // FSMC_NE4
+ #endif
+ {NC, NP, 0}
+};
+
+#define FSMC_RS(A) (void *)((2 << (A-1)) - 1)
+
+const PinMap PinMap_FSMC_RS[] = {
+ #ifdef PF0
+ {PF_0, FSMC_RS( 0), FSMC_PIN_DATA}, // FSMC_A0
+ {PF_1, FSMC_RS( 1), FSMC_PIN_DATA}, // FSMC_A1
+ {PF_2, FSMC_RS( 2), FSMC_PIN_DATA}, // FSMC_A2
+ {PF_3, FSMC_RS( 3), FSMC_PIN_DATA}, // FSMC_A3
+ {PF_4, FSMC_RS( 4), FSMC_PIN_DATA}, // FSMC_A4
+ {PF_5, FSMC_RS( 5), FSMC_PIN_DATA}, // FSMC_A5
+ {PF_12, FSMC_RS( 6), FSMC_PIN_DATA}, // FSMC_A6
+ {PF_13, FSMC_RS( 7), FSMC_PIN_DATA}, // FSMC_A7
+ {PF_14, FSMC_RS( 8), FSMC_PIN_DATA}, // FSMC_A8
+ {PF_15, FSMC_RS( 9), FSMC_PIN_DATA}, // FSMC_A9
+ {PG_0, FSMC_RS(10), FSMC_PIN_DATA}, // FSMC_A10
+ {PG_1, FSMC_RS(11), FSMC_PIN_DATA}, // FSMC_A11
+ {PG_2, FSMC_RS(12), FSMC_PIN_DATA}, // FSMC_A12
+ {PG_3, FSMC_RS(13), FSMC_PIN_DATA}, // FSMC_A13
+ {PG_4, FSMC_RS(14), FSMC_PIN_DATA}, // FSMC_A14
+ {PG_5, FSMC_RS(15), FSMC_PIN_DATA}, // FSMC_A15
+ #endif
+ {PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
+ {PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
+ {PD_13, FSMC_RS(18), FSMC_PIN_DATA}, // FSMC_A18
+ {PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
+ {PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
+ {PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
+ {PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
+ {PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
+ #ifdef PF0
+ {PG_13, FSMC_RS(24), FSMC_PIN_DATA}, // FSMC_A24
+ {PG_14, FSMC_RS(25), FSMC_PIN_DATA}, // FSMC_A25
+ #endif
+ {NC, NP, 0}
+};
diff --git a/Marlin/src/core/macros.h b/Marlin/src/core/macros.h
index 2e38fad30ef6..76e55ad3d241 100644
--- a/Marlin/src/core/macros.h
+++ b/Marlin/src/core/macros.h
@@ -151,7 +151,7 @@
#endif
-// Macros to chain up to 12 conditions
+// Macros to chain up to 14 conditions
#define _DO_1(W,C,A) (_##W##_1(A))
#define _DO_2(W,C,A,B) (_##W##_1(A) C _##W##_1(B))
#define _DO_3(W,C,A,V...) (_##W##_1(A) C _DO_2(W,C,V))
@@ -164,6 +164,8 @@
#define _DO_10(W,C,A,V...) (_##W##_1(A) C _DO_9(W,C,V))
#define _DO_11(W,C,A,V...) (_##W##_1(A) C _DO_10(W,C,V))
#define _DO_12(W,C,A,V...) (_##W##_1(A) C _DO_11(W,C,V))
+#define _DO_13(W,C,A,V...) (_##W##_1(A) C _DO_12(W,C,V))
+#define _DO_14(W,C,A,V...) (_##W##_1(A) C _DO_13(W,C,V))
#define __DO_N(W,C,N,V...) _DO_##N(W,C,V)
#define _DO_N(W,C,N,V...) __DO_N(W,C,N,V)
#define DO(W,C,V...) (_DO_N(W,C,NUM_ARGS(V),V))
diff --git a/Marlin/src/inc/Conditionals_LCD.h b/Marlin/src/inc/Conditionals_LCD.h
index 6df4d57615d1..b5d71ac77567 100644
--- a/Marlin/src/inc/Conditionals_LCD.h
+++ b/Marlin/src/inc/Conditionals_LCD.h
@@ -1101,6 +1101,16 @@
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_X | TFT_INVERT_Y)
#define TFT_RES_320x240
#define TFT_INTERFACE_FSMC
+#elif ENABLED(ANET_ET4_TFT28)
+ //ST7789
+ #define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_Y)
+ #define TFT_RES_320x240
+ #define TFT_INTERFACE_FSMC
+#elif ENABLED(ANET_ET5_TFT35)
+ //ST7796
+ #define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY)
+ #define TFT_RES_480x320
+ #define TFT_INTERFACE_FSMC
#elif ENABLED(TFT_GENERIC)
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_X | TFT_INVERT_Y)
#if NONE(TFT_RES_320x240, TFT_RES_480x272, TFT_RES_480x320)
diff --git a/Marlin/src/inc/SanityCheck.h b/Marlin/src/inc/SanityCheck.h
index eec9ff084464..2e961231a661 100644
--- a/Marlin/src/inc/SanityCheck.h
+++ b/Marlin/src/inc/SanityCheck.h
@@ -2289,7 +2289,7 @@ static_assert(hbm[Z_AXIS] >= 0, "HOMING_BUMP_MM.Z must be greater than or equal
+ COUNT_ENABLED(FYSETC_MINI_12864_X_X, FYSETC_MINI_12864_1_2, FYSETC_MINI_12864_2_0, FYSETC_MINI_12864_2_1, FYSETC_GENERIC_12864_1_1) \
+ COUNT_ENABLED(LCD_SAINSMART_I2C_1602, LCD_SAINSMART_I2C_2004) \
+ COUNT_ENABLED(MKS_12864OLED, MKS_12864OLED_SSD1306) \
- + COUNT_ENABLED(MKS_TS35_V2_0, MKS_ROBIN_TFT24, MKS_ROBIN_TFT28, MKS_ROBIN_TFT32, MKS_ROBIN_TFT35, MKS_ROBIN_TFT43, MKS_ROBIN_TFT_V1_1R) \
+ + COUNT_ENABLED(MKS_TS35_V2_0, MKS_ROBIN_TFT24, MKS_ROBIN_TFT28, MKS_ROBIN_TFT32, MKS_ROBIN_TFT35, MKS_ROBIN_TFT43, MKS_ROBIN_TFT_V1_1R, ANET_ET4_TFT28, ANET_ET5_TFT35) \
+ COUNT_ENABLED(TFTGLCD_PANEL_SPI, TFTGLCD_PANEL_I2C) \
+ COUNT_ENABLED(VIKI2, miniVIKI) \
+ COUNT_ENABLED(ZONESTAR_12864LCD, ZONESTAR_12864OLED, ZONESTAR_12864OLED_SSD1306) \
@@ -2333,7 +2333,7 @@ static_assert(hbm[Z_AXIS] >= 0, "HOMING_BUMP_MM.Z must be greater than or equal
#undef IS_EXTUI
#undef IS_LEGACY_TFT
-#if ANY(TFT_GENERIC, MKS_TS35_V2_0, MKS_ROBIN_TFT24, MKS_ROBIN_TFT28, MKS_ROBIN_TFT32, MKS_ROBIN_TFT35, MKS_ROBIN_TFT43, MKS_ROBIN_TFT_V1_1R, TFT_TRONXY_X5SA, ANYCUBIC_TFT35, ANYCUBIC_TFT35, LONGER_LK_TFT28)
+#if ANY(TFT_GENERIC, MKS_TS35_V2_0, MKS_ROBIN_TFT24, MKS_ROBIN_TFT28, MKS_ROBIN_TFT32, MKS_ROBIN_TFT35, MKS_ROBIN_TFT43, MKS_ROBIN_TFT_V1_1R, TFT_TRONXY_X5SA, ANYCUBIC_TFT35, ANYCUBIC_TFT35, LONGER_LK_TFT28, ANET_ET4_TFT28, ANET_ET5_TFT35)
#if NONE(TFT_COLOR_UI, TFT_CLASSIC_UI, TFT_LVGL_UI)
#error "TFT_COLOR_UI, TFT_CLASSIC_UI, TFT_LVGL_UI is required for your TFT. Please enable one."
#elif 1 < ENABLED(TFT_COLOR_UI) + ENABLED(TFT_CLASSIC_UI) + ENABLED(TFT_LVGL_UI)
diff --git a/Marlin/src/lcd/tft_io/tft_io.cpp b/Marlin/src/lcd/tft_io/tft_io.cpp
index 641bb04a65c2..cd535458a181 100644
--- a/Marlin/src/lcd/tft_io/tft_io.cpp
+++ b/Marlin/src/lcd/tft_io/tft_io.cpp
@@ -213,7 +213,7 @@ void TFT_IO::write_esc_sequence(const uint16_t *Sequence) {
data = *Sequence++;
if (data == 0x7FFF) return;
if (data == 0xFFFF)
- io.WriteData(TERN(IS_ANET_ET, 0xFF, 0xFFFF));
+ io.WriteData(0xFFFF);
else if (data & 0x8000)
delay(data & 0x7FFF);
else if ((data & 0xFF00) == 0)
diff --git a/Marlin/src/lcd/tft_io/tft_io.h b/Marlin/src/lcd/tft_io/tft_io.h
index 50b0ce446383..2a9170c560ad 100644
--- a/Marlin/src/lcd/tft_io/tft_io.h
+++ b/Marlin/src/lcd/tft_io/tft_io.h
@@ -28,7 +28,11 @@
#if HAS_SPI_TFT
#include HAL_PATH(../../HAL, tft/tft_spi.h)
#elif HAS_FSMC_TFT
- #include HAL_PATH(../../HAL, tft/tft_fsmc.h)
+ #if ENABLED(TFT_INTERFACE_FSMC_8BIT)
+ #include HAL_PATH(../../HAL, tft/tft_fsmc8.h)
+ #else
+ #include HAL_PATH(../../HAL, tft/tft_fsmc.h)
+ #endif
#else
#error "TFT IO only supports SPI or FSMC interface"
#endif
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index d4d7a98f3bee..ca3a04f8a31e 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -131,12 +131,10 @@
//
// LCD / Controller
//
-#ifndef TFT_DRIVER
- #define TFT_DRIVER AUTO // ST7789
-#endif
#define TFT_RESET_PIN PE6
#define TFT_CS_PIN PD7
#define TFT_RS_PIN PD13
+#define TFT_INTERFACE_FSMC_8BIT
//
// Touch Screen
From b3d9eea36fb0f7946a3ce459a7864bb769bfdbce Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Sun, 6 Dec 2020 23:26:26 -0300
Subject: [PATCH 11/29] ANET_ET4_TFT28 and ANET_ET5_TFT35 support + FSMC 8bit
for SMT32
---
Marlin/Configuration.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Marlin/Configuration.h b/Marlin/Configuration.h
index 257494a08d0e..7be051e71e96 100644
--- a/Marlin/Configuration.h
+++ b/Marlin/Configuration.h
@@ -2313,7 +2313,7 @@
//
// 320x240, 2.8", FSMC Stock Display from ET4
//
-#define ANET_ET4_TFT28
+//#define ANET_ET4_TFT28
//
// 480x320, 3.5", FSMC Stock Display from ET5
From af0c72182e401380ab04eadf51d4d76b25627d7f Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Sun, 6 Dec 2020 19:40:56 -0800
Subject: [PATCH 12/29] Add BLTouch warning
---
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index ca3a04f8a31e..82bf7f5d7c13 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -63,6 +63,7 @@
// Z Probe
//
#if ENABLED(BLTOUCH)
+ #error "You will need to use 24V to 5V converter and remove one resistor and capacitor from the motherboard. See https://github.com/davidtgbe/Marlin/blob/bugfix-2.0.x/docs/Tutorials/bltouch-en.md for more information. Comment out this line to proceed at your own risk."
#define SERVO0_PIN PC3
#elif !defined(Z_MIN_PROBE_PIN)
#define Z_MIN_PROBE_PIN PC3
From 85adc45e95e6a21ee01a35d76c39f060a34816e2 Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Sun, 6 Dec 2020 20:05:20 -0800
Subject: [PATCH 13/29] Hard code ANET_ET5_TFT35 calibration values
TOUCH_SCREEN_CALIBRATION generates wildly inaccurate values, so hardcode known-good/tested values.
---
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 82bf7f5d7c13..696e6945ab14 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -149,6 +149,19 @@
#define TOUCH_INT_PIN PB1
#endif
+#if ENABLED(ANET_ET5_TFT35)
+
+ #if ENABLED(TOUCH_SCREEN_CALIBRATION) // Touchscreen calibration does not work correctly with ANET_ET5_TFT35
+ #undef TOUCH_SCREEN_CALIBRATION
+ #endif
+
+ #define TOUCH_CALIBRATION_X 17125
+ #define TOUCH_CALIBRATION_Y -11307
+ #define TOUCH_OFFSET_X -26
+ #define TOUCH_OFFSET_Y 337
+ #define TOUCH_ORIENTATION TOUCH_PORTRAIT
+#endif
+
//
// SD Card
//
From cc645b51bb36da88419bc0279806995f9ddf7b91 Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Sun, 6 Dec 2020 20:25:25 -0800
Subject: [PATCH 14/29] Hard code ANET_ET4_TFT28 calibration values too
---
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 44 ++++++++++++++++++++-----
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 696e6945ab14..042d5a539e7e 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -149,17 +149,43 @@
#define TOUCH_INT_PIN PB1
#endif
-#if ENABLED(ANET_ET5_TFT35)
+// Touchscreen calibration does not work correctly with ANET_ET5_TFT35 or ANET_ET4_TFT28
+#if ENABLED(TOUCH_SCREEN_CALIBRATION)
+ #undef TOUCH_SCREEN_CALIBRATION
+#endif
- #if ENABLED(TOUCH_SCREEN_CALIBRATION) // Touchscreen calibration does not work correctly with ANET_ET5_TFT35
- #undef TOUCH_SCREEN_CALIBRATION
+#if ENABLED(ANET_ET5_TFT35)
+ #ifndef TOUCH_CALIBRATION_X
+ #define TOUCH_CALIBRATION_X 17125
+ #endif
+ #ifndef TOUCH_CALIBRATION_Y
+ #define TOUCH_CALIBRATION_Y -11307
+ #endif
+ #ifndef TOUCH_OFFSET_X
+ #define TOUCH_OFFSET_X -26
+ #endif
+ #ifndef TOUCH_OFFSET_Y
+ #define TOUCH_OFFSET_Y 337
+ #endif
+ #ifndef TOUCH_ORIENTATION
+ #define TOUCH_ORIENTATION TOUCH_PORTRAIT
+ #endif
+#elif ENABLED(ANET_ET4_TFT28)
+ #ifndef TOUCH_CALIBRATION_X
+ #define TOUCH_CALIBRATION_X 11303
+ #endif
+ #ifndef TOUCH_CALIBRATION_Y
+ #define TOUCH_CALIBRATION_Y -8480
+ #endif
+ #ifndef TOUCH_OFFSET_X
+ #define TOUCH_OFFSET_X -17
+ #endif
+ #ifndef TOUCH_OFFSET_Y
+ #define TOUCH_OFFSET_Y 253
+ #endif
+ #ifndef TOUCH_ORIENTATION
+ #define TOUCH_ORIENTATION TOUCH_PORTRAIT
#endif
-
- #define TOUCH_CALIBRATION_X 17125
- #define TOUCH_CALIBRATION_Y -11307
- #define TOUCH_OFFSET_X -26
- #define TOUCH_OFFSET_Y 337
- #define TOUCH_ORIENTATION TOUCH_PORTRAIT
#endif
//
From 73deb4a24d4718cb5824fb144d4d8c02a4a3a874 Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Mon, 7 Dec 2020 01:31:12 -0300
Subject: [PATCH 15/29] Allow touch calibration values on PINs file again
---
Marlin/Configuration.h | 2 +-
Marlin/src/inc/Conditionals_LCD.h | 6 ------
Marlin/src/lcd/tft_io/tft_io.h | 14 +++++++++++++-
3 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/Marlin/Configuration.h b/Marlin/Configuration.h
index 7be051e71e96..727f67d7a5b4 100644
--- a/Marlin/Configuration.h
+++ b/Marlin/Configuration.h
@@ -121,7 +121,7 @@
*
* :[2400, 9600, 19200, 38400, 57600, 115200, 250000, 500000, 1000000]
*/
-#define BAUDRATE 250000
+#define BAUDRATE 115200
// Enable the Bluetooth serial interface on AT90USB devices
//#define BLUETOOTH
diff --git a/Marlin/src/inc/Conditionals_LCD.h b/Marlin/src/inc/Conditionals_LCD.h
index b5d71ac77567..d948afafd9fa 100644
--- a/Marlin/src/inc/Conditionals_LCD.h
+++ b/Marlin/src/inc/Conditionals_LCD.h
@@ -1191,12 +1191,6 @@
#define TOUCH_OFFSET_X XPT2046_X_OFFSET
#define TOUCH_OFFSET_Y XPT2046_Y_OFFSET
#define TOUCH_ORIENTATION TOUCH_LANDSCAPE
- #else
- #define TOUCH_CALIBRATION_X 0
- #define TOUCH_CALIBRATION_Y 0
- #define TOUCH_OFFSET_X 0
- #define TOUCH_OFFSET_Y 0
- #define TOUCH_ORIENTATION TOUCH_ORIENTATION_NONE
#endif
#endif
diff --git a/Marlin/src/lcd/tft_io/tft_io.h b/Marlin/src/lcd/tft_io/tft_io.h
index 2a9170c560ad..ddf44fa4a627 100644
--- a/Marlin/src/lcd/tft_io/tft_io.h
+++ b/Marlin/src/lcd/tft_io/tft_io.h
@@ -79,8 +79,20 @@
#define TOUCH_LANDSCAPE 1
#define TOUCH_PORTRAIT 2
+#ifndef TOUCH_CALIBRATION_X
+ #define TOUCH_CALIBRATION_X 0
+#endif
+#ifndef TOUCH_CALIBRATION_Y
+ #define TOUCH_CALIBRATION_Y 0
+#endif
+#ifndef TOUCH_OFFSET_X
+ #define TOUCH_OFFSET_X 0
+#endif
+#ifndef TOUCH_OFFSET_Y
+ #define TOUCH_OFFSET_Y 0
+#endif
#ifndef TOUCH_ORIENTATION
- #define TOUCH_ORIENTATION TOUCH_LANDSCAPE
+ #define TOUCH_ORIENTATION TOUCH_LANDSCAPE
#endif
#define SSD1963 0x5761
From 487257dd920b8834d23aa0758fd384487411d62e Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Sun, 6 Dec 2020 20:50:57 -0800
Subject: [PATCH 16/29] Use ET4_TFT28 calibration values from davidtgbe/Marlin
https://github.com/davidtgbe/Marlin/blob/dd1afe86809efb8fe82bb541fd9393c81a26c175/Marlin/Configuration.h#L2339-L2344
---
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 042d5a539e7e..3bcba3267c8c 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -172,16 +172,16 @@
#endif
#elif ENABLED(ANET_ET4_TFT28)
#ifndef TOUCH_CALIBRATION_X
- #define TOUCH_CALIBRATION_X 11303
+ #define TOUCH_CALIBRATION_X -11838
#endif
#ifndef TOUCH_CALIBRATION_Y
- #define TOUCH_CALIBRATION_Y -8480
+ #define TOUCH_CALIBRATION_Y 8776
#endif
#ifndef TOUCH_OFFSET_X
- #define TOUCH_OFFSET_X -17
+ #define TOUCH_OFFSET_X 333
#endif
#ifndef TOUCH_OFFSET_Y
- #define TOUCH_OFFSET_Y 253
+ #define TOUCH_OFFSET_Y -17
#endif
#ifndef TOUCH_ORIENTATION
#define TOUCH_ORIENTATION TOUCH_PORTRAIT
From fc3ff39c280d59333a0017697e51ffb15d3422ea Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Sun, 6 Dec 2020 21:02:24 -0800
Subject: [PATCH 17/29] Update motherboard name based off silkscreen
---
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 3bcba3267c8c..a604fec5c59c 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -28,7 +28,7 @@
#error "Anet ET4 only supports one hotend / E-stepper. Comment out this line to continue."
#endif
-#define BOARD_INFO_NAME "Anet ET4"
+#define BOARD_INFO_NAME "Anet ET4-MB_V1.x"
//
// EEPROM
From b90c6b18126410c7e568cf34038b3238303af687 Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Sun, 6 Dec 2020 21:10:54 -0800
Subject: [PATCH 18/29] Update motherboard name in platformio.ini too
---
platformio.ini | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/platformio.ini b/platformio.ini
index 4a6c697c9ad8..50975a20ea4c 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1229,7 +1229,7 @@ extra_scripts = ${common.extra_scripts}
pre:buildroot/share/PlatformIO/scripts/generic_create_variant.py
#
-# Anet ET4 (STM32F407VGT6 ARM Cortex-M4)
+# Anet ET4-MB_V1.x (STM32F407VGT6 ARM Cortex-M4)
# For use with with davidtgbe's OpenBLT bootloader https://github.com/davidtgbe/openblt
#
[env:ANET_ET4_OPENBLT]
From e858dd5ddfb3bedac8499971aa36f75a8140209a Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Sun, 6 Dec 2020 21:47:55 -0800
Subject: [PATCH 19/29] Revert baudrate change
---
Marlin/Configuration.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Marlin/Configuration.h b/Marlin/Configuration.h
index 727f67d7a5b4..7be051e71e96 100644
--- a/Marlin/Configuration.h
+++ b/Marlin/Configuration.h
@@ -121,7 +121,7 @@
*
* :[2400, 9600, 19200, 38400, 57600, 115200, 250000, 500000, 1000000]
*/
-#define BAUDRATE 115200
+#define BAUDRATE 250000
// Enable the Bluetooth serial interface on AT90USB devices
//#define BLUETOOTH
From e7288c1603d7213c37ae4889c7a4f6ec6ed6ff6b Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Sun, 6 Dec 2020 22:26:10 -0800
Subject: [PATCH 20/29] Add Anet ET4P motherboard
The ET4P uses TMC2208_STANDALONE drivers and this will now show the proper board name in the About Printer section.
---
Marlin/src/core/boards.h | 3 ++-
Marlin/src/pins/pins.h | 2 ++
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 4 ++-
Marlin/src/pins/stm32f4/pins_ANET_ET4P.h | 34 ++++++++++++++++++++++++
platformio.ini | 2 +-
5 files changed, 42 insertions(+), 3 deletions(-)
create mode 100644 Marlin/src/pins/stm32f4/pins_ANET_ET4P.h
diff --git a/Marlin/src/core/boards.h b/Marlin/src/core/boards.h
index c9f876515cc3..9ba5797f3f81 100644
--- a/Marlin/src/core/boards.h
+++ b/Marlin/src/core/boards.h
@@ -365,7 +365,8 @@
#define BOARD_FYSETC_S6_V2_0 4216 // FYSETC S6 v2.0 board
#define BOARD_FLYF407ZG 4217 // FLYF407ZG board (STM32F407ZG)
#define BOARD_MKS_ROBIN2 4218 // MKS_ROBIN2 (STM32F407ZE)
-#define BOARD_ANET_ET4 4219 // ANET ET4 (STM32F407VGT6)
+#define BOARD_ANET_ET4 4219 // ANET ET4-MB_V1.x (STM32F407VGT6)
+#define BOARD_ANET_ET4P 4220 // ANET ET4P-MB_V1.x (STM32F407VGT6)
//
// ARM Cortex M7
diff --git a/Marlin/src/pins/pins.h b/Marlin/src/pins/pins.h
index e744d30a4a37..64ae1c7a412f 100644
--- a/Marlin/src/pins/pins.h
+++ b/Marlin/src/pins/pins.h
@@ -590,6 +590,8 @@
#include "stm32f4/pins_MKS_ROBIN2.h" // STM32F4 env:MKS_ROBIN2
#elif MB(ANET_ET4)
#include "stm32f4/pins_ANET_ET4.h" // STM32F4 env:ANET_ET4_OPENBLT
+#elif MB(ANET_ET4P)
+ #include "stm32f4/pins_ANET_ET4P.h" // STM32F4 env:ANET_ET4_OPENBLT
//
// ARM Cortex M7
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index a604fec5c59c..8f5574f3085d 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -28,7 +28,9 @@
#error "Anet ET4 only supports one hotend / E-stepper. Comment out this line to continue."
#endif
-#define BOARD_INFO_NAME "Anet ET4-MB_V1.x"
+#ifndef BOARD_INFO_NAME
+ #define BOARD_INFO_NAME "Anet ET4-MB_V1.x"
+#endif
//
// EEPROM
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4P.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4P.h
new file mode 100644
index 000000000000..a6deaaf83464
--- /dev/null
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4P.h
@@ -0,0 +1,34 @@
+/**
+ * Marlin 3D Printer Firmware
+ * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
+ *
+ * Based on Sprinter and grbl.
+ * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ *
+ */
+
+#pragma once
+
+#define BOARD_INFO_NAME "Anet ET4P-MB_V1.x"
+
+//
+// TMC2208 Configuration_adv defaults for Anet ET4P-MB_V1.x
+//
+#if !AXIS_DRIVER_TYPE_X(TMC2208_STANDALONE) || !AXIS_DRIVER_TYPE_Y(TMC2208_STANDALONE) || !AXIS_DRIVER_TYPE_Z(TMC2208_STANDALONE) || !AXIS_DRIVER_TYPE_E0(TMC2208_STANDALONE)
+ #error "You must set ([XYZ]|E0)_DRIVER_TYPE to TMC2208_STANDALONE in Configuration.h for ET4P-MB_V1.x."
+#endif
+
+#include "pins_ANET_ET4.h"
diff --git a/platformio.ini b/platformio.ini
index ac8a1dedd734..6f04f434c351 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1229,7 +1229,7 @@ extra_scripts = ${common.extra_scripts}
pre:buildroot/share/PlatformIO/scripts/generic_create_variant.py
#
-# Anet ET4-MB_V1.x (STM32F407VGT6 ARM Cortex-M4)
+# Anet ET4-MB_V1.x/ET4P-MB_V1.x (STM32F407VGT6 ARM Cortex-M4)
# For use with with davidtgbe's OpenBLT bootloader https://github.com/davidtgbe/openblt
#
[env:ANET_ET4_OPENBLT]
From 74622dc895678aad1f0322d2726cee79d03ca5fc Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Mon, 7 Dec 2020 23:35:42 -0800
Subject: [PATCH 21/29] There is no ET5 motherboard
The Anet ET5 series uses the Anet ET4 or Anet ET4P motherboard (yes, naming is confusing).
---
Marlin/src/inc/Conditionals_LCD.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Marlin/src/inc/Conditionals_LCD.h b/Marlin/src/inc/Conditionals_LCD.h
index d948afafd9fa..5f42239509a9 100644
--- a/Marlin/src/inc/Conditionals_LCD.h
+++ b/Marlin/src/inc/Conditionals_LCD.h
@@ -1194,6 +1194,6 @@
#endif
#endif
-#if MB(ANET_ET4, ANET_ET5)
+#if MB(ANET_ET4, ANET_ET4P)
#define IS_ANET_ET 1
#endif
From 4986377dd3d53b4990b170bc1e0f112561ec3ebb Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Fri, 11 Dec 2020 23:40:05 -0300
Subject: [PATCH 22/29] Fix compiling warning, keep interface standard
---
Marlin/src/HAL/STM32/tft/tft_fsmc8.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc8.h b/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
index 6d56bc83c87e..449ac96038f9 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
@@ -71,8 +71,8 @@ class TFT_FSMC_8BIT {
static void DataTransferBegin(uint16_t DataWidth = DATASIZE_8BIT) {}
static void DataTransferEnd() {};
- static void WriteData(uint8_t Data) { Transmit(Data); }
- static void WriteReg(uint8_t Reg) { LCD->REG = Reg; __DSB(); }
+ static void WriteData(uint16_t Data) { Transmit((uint8_t)Data); }
+ static void WriteReg(uint16_t Reg) { LCD->REG = (uint8_t)Reg; __DSB(); }
static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
From efad04f4355a0f6f64ff7024a44b346fdc612e50 Mon Sep 17 00:00:00 2001
From: Scott Lahteine
Date: Tue, 15 Dec 2020 01:37:42 -0600
Subject: [PATCH 23/29] Adjustments
---
Marlin/src/HAL/STM32/tft/tft_fsmc8.h | 16 +++++------
Marlin/src/inc/Conditionals_LCD.h | 26 ++++++-----------
Marlin/src/pins/pins.h | 4 +--
Marlin/src/pins/stm32f4/pins_ANET_ET4.h | 22 +++++++--------
Marlin/src/pins/stm32f4/pins_ANET_ET4P.h | 4 +--
.../share/PlatformIO/boards/ANET_ET4.json | 2 +-
.../PeripheralPins.c | 0
.../PinNamesVar.h | 0
.../hal_conf_extra.h | 0
.../{ANET_ET4 => MARLIN_ANET_ET4}/ldscript.ld | 0
.../{ANET_ET4 => MARLIN_ANET_ET4}/variant.cpp | 0
.../{ANET_ET4 => MARLIN_ANET_ET4}/variant.h | 0
platformio.ini | 28 +++++++++----------
13 files changed, 47 insertions(+), 55 deletions(-)
rename buildroot/share/PlatformIO/variants/{ANET_ET4 => MARLIN_ANET_ET4}/PeripheralPins.c (100%)
rename buildroot/share/PlatformIO/variants/{ANET_ET4 => MARLIN_ANET_ET4}/PinNamesVar.h (100%)
rename buildroot/share/PlatformIO/variants/{ANET_ET4 => MARLIN_ANET_ET4}/hal_conf_extra.h (100%)
rename buildroot/share/PlatformIO/variants/{ANET_ET4 => MARLIN_ANET_ET4}/ldscript.ld (100%)
rename buildroot/share/PlatformIO/variants/{ANET_ET4 => MARLIN_ANET_ET4}/variant.cpp (100%)
rename buildroot/share/PlatformIO/variants/{ANET_ET4 => MARLIN_ANET_ET4}/variant.h (100%)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc8.h b/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
index 449ac96038f9..1e36e9bc14e4 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
@@ -100,14 +100,14 @@ const PinMap PinMap_FSMC[] = {
{PE_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D05
{PE_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D06
{PE_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D07
- // {PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
- // {PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
- // {PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
- // {PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
- // {PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
- // {PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
- // {PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
- // {PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
+ //{PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
+ //{PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
+ //{PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
+ //{PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
+ //{PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
+ //{PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
+ //{PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
+ //{PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
{PD_4, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NOE
{PD_5, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NWE
{NC, NP, 0}
diff --git a/Marlin/src/inc/Conditionals_LCD.h b/Marlin/src/inc/Conditionals_LCD.h
index 5f42239509a9..271d4411a5b2 100644
--- a/Marlin/src/inc/Conditionals_LCD.h
+++ b/Marlin/src/inc/Conditionals_LCD.h
@@ -1057,28 +1057,23 @@
* - TFT_COLOR
* - GRAPHICAL_TFT_UPSCALE
*/
-#if ENABLED(MKS_TS35_V2_0)
- // Most common: ST7796
+#if ENABLED(MKS_TS35_V2_0) // Most common: ST7796
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY)
#define TFT_RES_480x320
#define TFT_INTERFACE_SPI
-#elif ENABLED(MKS_ROBIN_TFT24)
- // Most common: ST7789
+#elif ENABLED(MKS_ROBIN_TFT24) // Most common: ST7789
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_Y)
#define TFT_RES_320x240
#define TFT_INTERFACE_FSMC
-#elif ENABLED(MKS_ROBIN_TFT28)
- // Most common: ST7789
+#elif ENABLED(MKS_ROBIN_TFT28) // Most common: ST7789
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_Y)
#define TFT_RES_320x240
#define TFT_INTERFACE_FSMC
-#elif ENABLED(MKS_ROBIN_TFT32)
- // Most common: ST7789
+#elif ENABLED(MKS_ROBIN_TFT32) // Most common: ST7789
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_Y)
#define TFT_RES_320x240
#define TFT_INTERFACE_FSMC
-#elif ENABLED(MKS_ROBIN_TFT35)
- // Most common: ILI9488
+#elif ENABLED(MKS_ROBIN_TFT35) // Most common: ILI9488
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_X | TFT_INVERT_Y)
#define TFT_RES_480x320
#define TFT_INTERFACE_FSMC
@@ -1087,12 +1082,11 @@
#define TFT_DRIVER SSD1963
#define TFT_RES_480x272
#define TFT_INTERFACE_FSMC
-#elif ENABLED(MKS_ROBIN_TFT_V1_1R)
- // ILI9328 or R61505
+#elif ENABLED(MKS_ROBIN_TFT_V1_1R) // ILI9328 or R61505
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_X | TFT_INVERT_Y)
#define TFT_RES_320x240
#define TFT_INTERFACE_FSMC
-#elif EITHER(TFT_TRONXY_X5SA, ANYCUBIC_TFT35)
+#elif EITHER(TFT_TRONXY_X5SA, ANYCUBIC_TFT35) // ILI9488
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_X | TFT_INVERT_Y)
#define TFT_DRIVER ILI9488
#define TFT_RES_480x320
@@ -1101,13 +1095,11 @@
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_X | TFT_INVERT_Y)
#define TFT_RES_320x240
#define TFT_INTERFACE_FSMC
-#elif ENABLED(ANET_ET4_TFT28)
- //ST7789
+#elif ENABLED(ANET_ET4_TFT28) // ST7789
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY | TFT_INVERT_Y)
#define TFT_RES_320x240
#define TFT_INTERFACE_FSMC
-#elif ENABLED(ANET_ET5_TFT35)
- //ST7796
+#elif ENABLED(ANET_ET5_TFT35) // ST7796
#define TFT_DEFAULT_ORIENTATION (TFT_EXCHANGE_XY)
#define TFT_RES_480x320
#define TFT_INTERFACE_FSMC
diff --git a/Marlin/src/pins/pins.h b/Marlin/src/pins/pins.h
index b21ad237a2a3..c72d46db51d0 100644
--- a/Marlin/src/pins/pins.h
+++ b/Marlin/src/pins/pins.h
@@ -591,9 +591,9 @@
#elif MB(MKS_ROBIN_PRO_V2)
#include "stm32f4/pins_MKS_ROBIN_PRO_V2.h" // STM32F4 env:mks_robin_pro2
#elif MB(ANET_ET4)
- #include "stm32f4/pins_ANET_ET4.h" // STM32F4 env:ANET_ET4_OPENBLT
+ #include "stm32f4/pins_ANET_ET4.h" // STM32F4 env:Anet_ET4_OpenBLT
#elif MB(ANET_ET4P)
- #include "stm32f4/pins_ANET_ET4P.h" // STM32F4 env:ANET_ET4_OPENBLT
+ #include "stm32f4/pins_ANET_ET4P.h" // STM32F4 env:Anet_ET4_OpenBLT
//
// ARM Cortex M7
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
index 8f5574f3085d..c0bbe2f423f9 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4.h
@@ -29,7 +29,7 @@
#endif
#ifndef BOARD_INFO_NAME
- #define BOARD_INFO_NAME "Anet ET4-MB_V1.x"
+ #define BOARD_INFO_NAME "Anet ET4 1.x"
#endif
//
@@ -158,35 +158,35 @@
#if ENABLED(ANET_ET5_TFT35)
#ifndef TOUCH_CALIBRATION_X
- #define TOUCH_CALIBRATION_X 17125
+ #define TOUCH_CALIBRATION_X 17125
#endif
#ifndef TOUCH_CALIBRATION_Y
- #define TOUCH_CALIBRATION_Y -11307
+ #define TOUCH_CALIBRATION_Y -11307
#endif
#ifndef TOUCH_OFFSET_X
- #define TOUCH_OFFSET_X -26
+ #define TOUCH_OFFSET_X -26
#endif
#ifndef TOUCH_OFFSET_Y
- #define TOUCH_OFFSET_Y 337
+ #define TOUCH_OFFSET_Y 337
#endif
#ifndef TOUCH_ORIENTATION
- #define TOUCH_ORIENTATION TOUCH_PORTRAIT
+ #define TOUCH_ORIENTATION TOUCH_PORTRAIT
#endif
#elif ENABLED(ANET_ET4_TFT28)
#ifndef TOUCH_CALIBRATION_X
- #define TOUCH_CALIBRATION_X -11838
+ #define TOUCH_CALIBRATION_X -11838
#endif
#ifndef TOUCH_CALIBRATION_Y
- #define TOUCH_CALIBRATION_Y 8776
+ #define TOUCH_CALIBRATION_Y 8776
#endif
#ifndef TOUCH_OFFSET_X
- #define TOUCH_OFFSET_X 333
+ #define TOUCH_OFFSET_X 333
#endif
#ifndef TOUCH_OFFSET_Y
- #define TOUCH_OFFSET_Y -17
+ #define TOUCH_OFFSET_Y -17
#endif
#ifndef TOUCH_ORIENTATION
- #define TOUCH_ORIENTATION TOUCH_PORTRAIT
+ #define TOUCH_ORIENTATION TOUCH_PORTRAIT
#endif
#endif
diff --git a/Marlin/src/pins/stm32f4/pins_ANET_ET4P.h b/Marlin/src/pins/stm32f4/pins_ANET_ET4P.h
index a6deaaf83464..eecabbaf9866 100644
--- a/Marlin/src/pins/stm32f4/pins_ANET_ET4P.h
+++ b/Marlin/src/pins/stm32f4/pins_ANET_ET4P.h
@@ -22,13 +22,13 @@
#pragma once
-#define BOARD_INFO_NAME "Anet ET4P-MB_V1.x"
+#define BOARD_INFO_NAME "Anet ET4P 1.x"
//
// TMC2208 Configuration_adv defaults for Anet ET4P-MB_V1.x
//
#if !AXIS_DRIVER_TYPE_X(TMC2208_STANDALONE) || !AXIS_DRIVER_TYPE_Y(TMC2208_STANDALONE) || !AXIS_DRIVER_TYPE_Z(TMC2208_STANDALONE) || !AXIS_DRIVER_TYPE_E0(TMC2208_STANDALONE)
- #error "You must set ([XYZ]|E0)_DRIVER_TYPE to TMC2208_STANDALONE in Configuration.h for ET4P-MB_V1.x."
+ #error "ANET_ET4P requires ([XYZ]|E0)_DRIVER_TYPE set to TMC2208_STANDALONE."
#endif
#include "pins_ANET_ET4.h"
diff --git a/buildroot/share/PlatformIO/boards/ANET_ET4.json b/buildroot/share/PlatformIO/boards/ANET_ET4.json
index 3b746f01e04b..ffc3a6e31d47 100644
--- a/buildroot/share/PlatformIO/boards/ANET_ET4.json
+++ b/buildroot/share/PlatformIO/boards/ANET_ET4.json
@@ -15,7 +15,7 @@
]
],
"mcu": "stm32f407vgt6",
- "variant": "ANET_ET4"
+ "variant": "MARLIN_ANET_ET4"
},
"debug": {
"jlink_device": "STM32F407VG",
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PeripheralPins.c
similarity index 100%
rename from buildroot/share/PlatformIO/variants/ANET_ET4/PeripheralPins.c
rename to buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PeripheralPins.c
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/PinNamesVar.h b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PinNamesVar.h
similarity index 100%
rename from buildroot/share/PlatformIO/variants/ANET_ET4/PinNamesVar.h
rename to buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PinNamesVar.h
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/hal_conf_extra.h
similarity index 100%
rename from buildroot/share/PlatformIO/variants/ANET_ET4/hal_conf_extra.h
rename to buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/hal_conf_extra.h
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/ldscript.ld
similarity index 100%
rename from buildroot/share/PlatformIO/variants/ANET_ET4/ldscript.ld
rename to buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/ldscript.ld
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.cpp
similarity index 100%
rename from buildroot/share/PlatformIO/variants/ANET_ET4/variant.cpp
rename to buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.cpp
diff --git a/buildroot/share/PlatformIO/variants/ANET_ET4/variant.h b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.h
similarity index 100%
rename from buildroot/share/PlatformIO/variants/ANET_ET4/variant.h
rename to buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.h
diff --git a/platformio.ini b/platformio.ini
index 7e8da0238160..c5292ea08ea8 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1232,22 +1232,22 @@ extra_scripts = ${common.extra_scripts}
# Anet ET4-MB_V1.x/ET4P-MB_V1.x (STM32F407VGT6 ARM Cortex-M4)
# For use with with davidtgbe's OpenBLT bootloader https://github.com/davidtgbe/openblt
#
-[env:ANET_ET4_OPENBLT]
+[env:Anet_ET4_OpenBLT]
#build_type = debug
#debug_build_flags = -O0 -ggdb3 -g3
-platform = ${common_stm32.platform}
-extends = common_stm32
-board = ANET_ET4
-board_build.offset = 0x10000
-build_flags = ${common_stm32.build_flags}
- -DDISABLE_GENERIC_SERIALUSB
- -DSTM32F407VG -DARDUINO_ARCH_STM32 -DTARGET_STM32F4
-build_unflags = ${common_stm32.build_unflags}
- -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
-extra_scripts = ${common.extra_scripts}
- pre:buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py
- buildroot/share/PlatformIO/scripts/stm32_bootloader.py
- buildroot/share/PlatformIO/scripts/anet_et4.py
+platform = ${common_stm32.platform}
+extends = common_stm32
+board = ANET_ET4
+board_build.offset = 0x10000
+build_flags = ${common_stm32.build_flags}
+ -DDISABLE_GENERIC_SERIALUSB
+ -DSTM32F407VG -DARDUINO_ARCH_STM32 -DTARGET_STM32F4
+build_unflags = ${common_stm32.build_unflags}
+ -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
+extra_scripts = ${common.extra_scripts}
+ pre:buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py
+ buildroot/share/PlatformIO/scripts/stm32_bootloader.py
+ buildroot/share/PlatformIO/scripts/anet_et4.py
#
# BigTreeTech SKR Pro (STM32F407ZGT6 ARM Cortex-M4)
From d0694bf19292d36b08536228fc604740f5ec6e38 Mon Sep 17 00:00:00 2001
From: Scott Lahteine
Date: Tue, 15 Dec 2020 02:03:03 -0600
Subject: [PATCH 24/29] Tweak pio.ini spacing
---
platformio.ini | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/platformio.ini b/platformio.ini
index 3b71f8c9cdc4..2c3d47aaf509 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1240,14 +1240,14 @@ extends = common_stm32
board = ANET_ET4
board_build.offset = 0x10000
build_flags = ${common_stm32.build_flags}
- -DDISABLE_GENERIC_SERIALUSB
- -DSTM32F407VG -DARDUINO_ARCH_STM32 -DTARGET_STM32F4
+ -DDISABLE_GENERIC_SERIALUSB
+ -DSTM32F407VG -DARDUINO_ARCH_STM32 -DTARGET_STM32F4
build_unflags = ${common_stm32.build_unflags}
- -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
+ -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
extra_scripts = ${common.extra_scripts}
- pre:buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py
- buildroot/share/PlatformIO/scripts/stm32_bootloader.py
- buildroot/share/PlatformIO/scripts/anet_et4.py
+ pre:buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py
+ buildroot/share/PlatformIO/scripts/stm32_bootloader.py
+ buildroot/share/PlatformIO/scripts/anet_et4.py
#
# BigTreeTech SKR Pro (STM32F407ZGT6 ARM Cortex-M4)
From 2224d92fb0bbb5da2148f0e7c52025094ff4c537 Mon Sep 17 00:00:00 2001
From: Scott Lahteine
Date: Tue, 15 Dec 2020 05:41:55 -0600
Subject: [PATCH 25/29] Fewer tft_fsmc files
---
Marlin/src/HAL/STM32/tft/tft_fsmc.cpp | 8 +-
Marlin/src/HAL/STM32/tft/tft_fsmc.h | 41 +++---
Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp | 183 -------------------------
Marlin/src/HAL/STM32/tft/tft_fsmc8.h | 160 ---------------------
Marlin/src/lcd/tft_io/tft_io.h | 6 +-
5 files changed, 30 insertions(+), 368 deletions(-)
delete mode 100644 Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp
delete mode 100644 Marlin/src/HAL/STM32/tft/tft_fsmc8.h
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
index 9994bc7c68b8..d6a1277ea641 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
@@ -55,7 +55,7 @@ void TFT_FSMC::Init() {
SRAMx.Init.NSBank = NSBank;
SRAMx.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
SRAMx.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
- SRAMx.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
+ SRAMx.Init.MemoryDataWidth = TERN(TFT_INTERFACE_FSMC_8BIT, FSMC_NORSRAM_MEM_BUS_WIDTH_8, FSMC_NORSRAM_MEM_BUS_WIDTH_16);
SRAMx.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
SRAMx.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
SRAMx.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
@@ -74,8 +74,8 @@ void TFT_FSMC::Init() {
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 24;
Timing.BusTurnAroundDuration = 0;
- Timing.CLKDivision = 16;
- Timing.DataLatency = 17;
+ Timing.CLKDivision = TERN(TFT_INTERFACE_FSMC_8BIT, 0, 16);
+ Timing.DataLatency = TERN(TFT_INTERFACE_FSMC_8BIT, 0, 17);
Timing.AccessMode = FSMC_ACCESS_MODE_A;
// Write Timing
// Can be decreases from 8-15-8 to 0-0-1 with risk of stability loss
@@ -142,7 +142,7 @@ uint32_t TFT_FSMC::GetID() {
return id;
}
-uint32_t TFT_FSMC::ReadID(uint16_t Reg) {
+uint32_t TFT_FSMC::ReadID(tft_data_t Reg) {
uint32_t id;
WriteReg(Reg);
id = LCD->RAM; // dummy read
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.h b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
index e2e0128c5efc..ad39d10d632d 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.h
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.h
@@ -44,9 +44,12 @@
#define DATASIZE_16BIT SPI_DATASIZE_16BIT
#define TFT_IO_DRIVER TFT_FSMC
+#define TFT_DATASIZE TERN(TFT_INTERFACE_FSMC_8BIT, DATASIZE_8BIT, DATASIZE_16BIT)
+typedef TERN(TFT_INTERFACE_FSMC_8BIT, uint8_t, uint16_t) tft_data_t;
+
typedef struct {
- __IO uint16_t REG;
- __IO uint16_t RAM;
+ __IO tft_data_t REG;
+ __IO tft_data_t RAM;
} LCD_CONTROLLER_TypeDef;
class TFT_FSMC {
@@ -56,8 +59,8 @@ class TFT_FSMC {
static LCD_CONTROLLER_TypeDef *LCD;
- static uint32_t ReadID(uint16_t Reg);
- static void Transmit(uint16_t Data) { LCD->RAM = Data; __DSB(); }
+ static uint32_t ReadID(tft_data_t Reg);
+ static void Transmit(tft_data_t Data) { LCD->RAM = Data; __DSB(); }
static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
public:
@@ -66,11 +69,11 @@ class TFT_FSMC {
static bool isBusy();
static void Abort() { __HAL_DMA_DISABLE(&DMAtx); }
- static void DataTransferBegin(uint16_t DataWidth = DATASIZE_16BIT) {}
+ static void DataTransferBegin(uint16_t DataWidth = TFT_DATASIZE) {}
static void DataTransferEnd() {};
- static void WriteData(uint16_t Data) { Transmit(Data); }
- static void WriteReg(uint16_t Reg) { LCD->REG = Reg; __DSB(); }
+ static void WriteData(uint16_t Data) { Transmit(tft_data_t(Data)); }
+ static void WriteReg(uint16_t Reg) { LCD->REG = tft_data_t(Reg); __DSB(); }
static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
@@ -98,14 +101,16 @@ const PinMap PinMap_FSMC[] = {
{PE_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D05
{PE_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D06
{PE_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D07
- {PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
- {PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
- {PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
- {PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
- {PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
- {PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
- {PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
- {PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
+ #if DISABLED(TFT_INTERFACE_FSMC_8BIT)
+ {PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
+ {PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
+ {PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
+ {PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
+ {PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
+ {PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
+ {PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
+ {PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
+ #endif
{PD_4, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NOE
{PD_5, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NWE
{NC, NP, 0}
@@ -121,7 +126,11 @@ const PinMap PinMap_FSMC_CS[] = {
{NC, NP, 0}
};
-#define FSMC_RS(A) (void *)((2 << A) - 2)
+#if ENABLED(TFT_INTERFACE_FSMC_8BIT)
+ #define FSMC_RS(A) (void *)((2 << (A-1)) - 1)
+#else
+ #define FSMC_RS(A) (void *)((2 << A) - 2)
+#endif
const PinMap PinMap_FSMC_RS[] = {
#ifdef PF0
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp
deleted file mode 100644
index ea65ff7cc0f4..000000000000
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc8.cpp
+++ /dev/null
@@ -1,183 +0,0 @@
-/**
- * Marlin 3D Printer Firmware
- * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
- *
- * Based on Sprinter and grbl.
- * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- *
- */
-
-#include "../../../inc/MarlinConfig.h"
-
-#if ENABLED(TFT_INTERFACE_FSMC_8BIT)
-
-#include "tft_fsmc8.h"
-#include "pinconfig.h"
-
-SRAM_HandleTypeDef TFT_FSMC_8BIT::SRAMx;
-DMA_HandleTypeDef TFT_FSMC_8BIT::DMAtx;
-LCD_CONTROLLER_TypeDef *TFT_FSMC_8BIT::LCD;
-
-void TFT_FSMC_8BIT::Init() {
- uint32_t controllerAddress;
-
- #if PIN_EXISTS(TFT_RESET)
- OUT_WRITE(TFT_RESET_PIN, HIGH);
- HAL_Delay(100);
- #endif
-
- #if PIN_EXISTS(TFT_BACKLIGHT)
- OUT_WRITE(TFT_BACKLIGHT_PIN, HIGH);
- #endif
-
- FSMC_NORSRAM_TimingTypeDef Timing, ExtTiming;
-
- uint32_t NSBank = (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
-
- /** Perform the SRAM1 memory initialization sequence
- */
- SRAMx.Instance = FSMC_NORSRAM_DEVICE;
- SRAMx.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
- /* SRAMx.Init */
- SRAMx.Init.NSBank = NSBank;
- SRAMx.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_DISABLE;
- SRAMx.Init.MemoryType = FSMC_MEMORY_TYPE_SRAM;
- SRAMx.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
- SRAMx.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
- SRAMx.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
- SRAMx.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
- SRAMx.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
- SRAMx.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
- SRAMx.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
- SRAMx.Init.ExtendedMode = FSMC_EXTENDED_MODE_ENABLE;
- SRAMx.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
- SRAMx.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
- #ifdef STM32F4xx
- SRAMx.Init.PageSize = FSMC_PAGE_SIZE_NONE;
- #endif
- /* Read Timing - relatively slow to ensure ID information is correctly read from TFT controller */
- /* Can be decreases from 15-15-24 to 4-4-8 with risk of stability loss */
- Timing.AddressSetupTime = 15;
- Timing.AddressHoldTime = 15;
- Timing.DataSetupTime = 24;
- Timing.BusTurnAroundDuration = 0;
- Timing.CLKDivision = 0;
- Timing.DataLatency = 0;
- Timing.AccessMode = FSMC_ACCESS_MODE_A;
- /* Write Timing */
- /* Can be decreases from 8-15-8 to 0-0-1 with risk of stability loss */
- ExtTiming.AddressSetupTime = 8;
- ExtTiming.AddressHoldTime = 15;
- ExtTiming.DataSetupTime = 8;
- ExtTiming.BusTurnAroundDuration = 0;
- ExtTiming.CLKDivision = 16;
- ExtTiming.DataLatency = 17;
- ExtTiming.AccessMode = FSMC_ACCESS_MODE_A;
-
- __HAL_RCC_FSMC_CLK_ENABLE();
-
- for (uint16_t i = 0; PinMap_FSMC[i].pin != NC; i++)
- pinmap_pinout(PinMap_FSMC[i].pin, PinMap_FSMC);
- pinmap_pinout(digitalPinToPinName(TFT_CS_PIN), PinMap_FSMC_CS);
- pinmap_pinout(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
-
- controllerAddress = FSMC_BANK1_1;
- #ifdef PF0
- switch (NSBank) {
- case FSMC_NORSRAM_BANK2: controllerAddress = FSMC_BANK1_2 ; break;
- case FSMC_NORSRAM_BANK3: controllerAddress = FSMC_BANK1_3 ; break;
- case FSMC_NORSRAM_BANK4: controllerAddress = FSMC_BANK1_4 ; break;
- }
- #endif
-
- controllerAddress |= (uint32_t)pinmap_peripheral(digitalPinToPinName(TFT_RS_PIN), PinMap_FSMC_RS);
-
- HAL_SRAM_Init(&SRAMx, &Timing, &ExtTiming);
-
- __HAL_RCC_DMA2_CLK_ENABLE();
-
- #ifdef STM32F1xx
- DMAtx.Instance = DMA2_Channel1;
- #elif defined(STM32F4xx)
- DMAtx.Instance = DMA2_Stream0;
- DMAtx.Init.Channel = DMA_CHANNEL_0;
- DMAtx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
- DMAtx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
- DMAtx.Init.MemBurst = DMA_MBURST_SINGLE;
- DMAtx.Init.PeriphBurst = DMA_PBURST_SINGLE;
- #endif
-
- DMAtx.Init.Direction = DMA_MEMORY_TO_MEMORY;
- DMAtx.Init.MemInc = DMA_MINC_DISABLE;
- DMAtx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
- DMAtx.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
- DMAtx.Init.Mode = DMA_NORMAL;
- DMAtx.Init.Priority = DMA_PRIORITY_HIGH;
-
- LCD = (LCD_CONTROLLER_TypeDef *)controllerAddress;
-}
-
-uint32_t TFT_FSMC_8BIT::GetID() {
- uint32_t id;
- WriteReg(0x00);
- id = LCD->RAM;
-
- if (id == 0)
- id = ReadID(LCD_READ_ID);
- if ((id & 0xFFFF) == 0 || (id & 0xFFFF) == 0xFFFF)
- id = ReadID(LCD_READ_ID4);
- return id;
-}
-
-uint32_t TFT_FSMC_8BIT::ReadID(uint8_t Reg) {
- uint32_t id;
- WriteReg(Reg);
- id = LCD->RAM; // dummy read
- id = Reg << 24;
- id |= (LCD->RAM & 0x00FF) << 16;
- id |= (LCD->RAM & 0x00FF) << 8;
- id |= LCD->RAM & 0x00FF;
- return id;
-}
-
-bool TFT_FSMC_8BIT::isBusy() {
- if (__IS_DMA_ENABLED(&DMAtx))
- if (__HAL_DMA_GET_FLAG(&DMAtx, __HAL_DMA_GET_TC_FLAG_INDEX(&DMAtx)) != 0 || __HAL_DMA_GET_FLAG(&DMAtx, __HAL_DMA_GET_TE_FLAG_INDEX(&DMAtx)) != 0)
- Abort();
- return __IS_DMA_ENABLED(&DMAtx);
-}
-
-void TFT_FSMC_8BIT::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
- DMAtx.Init.PeriphInc = MemoryIncrease;
- HAL_DMA_Init(&DMAtx);
-
- __HAL_DMA_CLEAR_FLAG(&DMAtx, __HAL_DMA_GET_TC_FLAG_INDEX(&DMAtx));
- __HAL_DMA_CLEAR_FLAG(&DMAtx, __HAL_DMA_GET_TE_FLAG_INDEX(&DMAtx));
-
- #ifdef STM32F1xx
- DMAtx.Instance->CNDTR = Count;
- DMAtx.Instance->CPAR = (uint32_t)Data;
- DMAtx.Instance->CMAR = (uint32_t)&(LCD->RAM);
- #elif defined(STM32F4xx)
- //DMAtx.Instance->NDTR = (Count*2);
- DMAtx.Instance->NDTR = Count;
- DMAtx.Instance->PAR = (uint32_t)Data;
- DMAtx.Instance->M0AR = (uint32_t)&(LCD->RAM);
- #endif
- __HAL_DMA_ENABLE(&DMAtx);
-}
-
-#endif // ENABLED(TFT_INTERFACE_FSMC_8BIT)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc8.h b/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
deleted file mode 100644
index 1e36e9bc14e4..000000000000
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc8.h
+++ /dev/null
@@ -1,160 +0,0 @@
-/**
- * Marlin 3D Printer Firmware
- * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
- *
- * Based on Sprinter and grbl.
- * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see .
- *
- */
-#pragma once
-
-#ifdef STM32F1xx
- #include "stm32f1xx_hal.h"
-#elif defined(STM32F4xx)
- #include "stm32f4xx_hal.h"
-#else
- #error FSMC TFT is currently only supported on STM32F1 and STM32F4 hardware.
-#endif
-
-#ifndef LCD_READ_ID
- #define LCD_READ_ID 0x04 // Read display identification information (0xD3 on ILI9341)
-#endif
-#ifndef LCD_READ_ID4
- #define LCD_READ_ID4 0xD3 // Read display identification information (0xD3 on ILI9341)
-#endif
-
-#define DATASIZE_8BIT SPI_DATASIZE_8BIT
-#define DATASIZE_16BIT SPI_DATASIZE_16BIT
-#define TFT_IO_DRIVER TFT_FSMC_8BIT
-
-#ifdef STM32F1xx
- #define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CCR & DMA_CCR_EN)
-#elif defined(STM32F4xx)
- #define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR & DMA_SxCR_EN)
-#endif
-
-typedef struct {
- __IO uint8_t REG;
- __IO uint8_t RAM;
-} LCD_CONTROLLER_TypeDef;
-
-class TFT_FSMC_8BIT {
-private:
- static SRAM_HandleTypeDef SRAMx;
- static DMA_HandleTypeDef DMAtx;
-
- static LCD_CONTROLLER_TypeDef *LCD;
-
- static uint32_t ReadID(uint8_t Reg);
- static void Transmit(uint8_t Data) { LCD->RAM = Data; __DSB(); }
- static void TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count);
-
-public:
- static void Init();
- static uint32_t GetID();
- static bool isBusy();
- static void Abort() { __HAL_DMA_DISABLE(&DMAtx); }
-
- static void DataTransferBegin(uint16_t DataWidth = DATASIZE_8BIT) {}
- static void DataTransferEnd() {};
-
- static void WriteData(uint16_t Data) { Transmit((uint8_t)Data); }
- static void WriteReg(uint16_t Reg) { LCD->REG = (uint8_t)Reg; __DSB(); }
-
- static void WriteSequence(uint16_t *Data, uint16_t Count) { TransmitDMA(DMA_PINC_ENABLE, Data, Count); }
- static void WriteMultiple(uint16_t Color, uint16_t Count) { static uint16_t Data; Data = Color; TransmitDMA(DMA_PINC_DISABLE, &Data, Count); }
-};
-
-
-#ifdef STM32F1xx
- #define FSMC_PIN_DATA STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)
-#elif defined(STM32F4xx)
- #define FSMC_PIN_DATA STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FSMC)
- #define FSMC_BANK1_1 0x60000000U
- #define FSMC_BANK1_2 0x64000000U
- #define FSMC_BANK1_3 0x68000000U
- #define FSMC_BANK1_4 0x6C000000U
-#else
- #error No configuration for this MCU
-#endif
-
-const PinMap PinMap_FSMC[] = {
- {PD_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D00
- {PD_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D01
- {PD_0, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D02
- {PD_1, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D03
- {PE_7, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D04
- {PE_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D05
- {PE_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D06
- {PE_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D07
- //{PE_11, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D08
- //{PE_12, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D09
- //{PE_13, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D10
- //{PE_14, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D11
- //{PE_15, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D12
- //{PD_8, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D13
- //{PD_9, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D14
- //{PD_10, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_D15
- {PD_4, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NOE
- {PD_5, FSMC_NORSRAM_DEVICE, FSMC_PIN_DATA}, // FSMC_NWE
- {NC, NP, 0}
-};
-
-const PinMap PinMap_FSMC_CS[] = {
- {PD_7, (void *)FSMC_NORSRAM_BANK1, FSMC_PIN_DATA}, // FSMC_NE1
- #ifdef PF0
- {PG_9, (void *)FSMC_NORSRAM_BANK2, FSMC_PIN_DATA}, // FSMC_NE2
- {PG_10, (void *)FSMC_NORSRAM_BANK3, FSMC_PIN_DATA}, // FSMC_NE3
- {PG_12, (void *)FSMC_NORSRAM_BANK4, FSMC_PIN_DATA}, // FSMC_NE4
- #endif
- {NC, NP, 0}
-};
-
-#define FSMC_RS(A) (void *)((2 << (A-1)) - 1)
-
-const PinMap PinMap_FSMC_RS[] = {
- #ifdef PF0
- {PF_0, FSMC_RS( 0), FSMC_PIN_DATA}, // FSMC_A0
- {PF_1, FSMC_RS( 1), FSMC_PIN_DATA}, // FSMC_A1
- {PF_2, FSMC_RS( 2), FSMC_PIN_DATA}, // FSMC_A2
- {PF_3, FSMC_RS( 3), FSMC_PIN_DATA}, // FSMC_A3
- {PF_4, FSMC_RS( 4), FSMC_PIN_DATA}, // FSMC_A4
- {PF_5, FSMC_RS( 5), FSMC_PIN_DATA}, // FSMC_A5
- {PF_12, FSMC_RS( 6), FSMC_PIN_DATA}, // FSMC_A6
- {PF_13, FSMC_RS( 7), FSMC_PIN_DATA}, // FSMC_A7
- {PF_14, FSMC_RS( 8), FSMC_PIN_DATA}, // FSMC_A8
- {PF_15, FSMC_RS( 9), FSMC_PIN_DATA}, // FSMC_A9
- {PG_0, FSMC_RS(10), FSMC_PIN_DATA}, // FSMC_A10
- {PG_1, FSMC_RS(11), FSMC_PIN_DATA}, // FSMC_A11
- {PG_2, FSMC_RS(12), FSMC_PIN_DATA}, // FSMC_A12
- {PG_3, FSMC_RS(13), FSMC_PIN_DATA}, // FSMC_A13
- {PG_4, FSMC_RS(14), FSMC_PIN_DATA}, // FSMC_A14
- {PG_5, FSMC_RS(15), FSMC_PIN_DATA}, // FSMC_A15
- #endif
- {PD_11, FSMC_RS(16), FSMC_PIN_DATA}, // FSMC_A16
- {PD_12, FSMC_RS(17), FSMC_PIN_DATA}, // FSMC_A17
- {PD_13, FSMC_RS(18), FSMC_PIN_DATA}, // FSMC_A18
- {PE_3, FSMC_RS(19), FSMC_PIN_DATA}, // FSMC_A19
- {PE_4, FSMC_RS(20), FSMC_PIN_DATA}, // FSMC_A20
- {PE_5, FSMC_RS(21), FSMC_PIN_DATA}, // FSMC_A21
- {PE_6, FSMC_RS(22), FSMC_PIN_DATA}, // FSMC_A22
- {PE_2, FSMC_RS(23), FSMC_PIN_DATA}, // FSMC_A23
- #ifdef PF0
- {PG_13, FSMC_RS(24), FSMC_PIN_DATA}, // FSMC_A24
- {PG_14, FSMC_RS(25), FSMC_PIN_DATA}, // FSMC_A25
- #endif
- {NC, NP, 0}
-};
diff --git a/Marlin/src/lcd/tft_io/tft_io.h b/Marlin/src/lcd/tft_io/tft_io.h
index ddf44fa4a627..aa081be486bc 100644
--- a/Marlin/src/lcd/tft_io/tft_io.h
+++ b/Marlin/src/lcd/tft_io/tft_io.h
@@ -28,11 +28,7 @@
#if HAS_SPI_TFT
#include HAL_PATH(../../HAL, tft/tft_spi.h)
#elif HAS_FSMC_TFT
- #if ENABLED(TFT_INTERFACE_FSMC_8BIT)
- #include HAL_PATH(../../HAL, tft/tft_fsmc8.h)
- #else
- #include HAL_PATH(../../HAL, tft/tft_fsmc.h)
- #endif
+ #include HAL_PATH(../../HAL, tft/tft_fsmc.h)
#else
#error "TFT IO only supports SPI or FSMC interface"
#endif
From c51434679ed76d081e3d2dcf9b570277a7b7fb31 Mon Sep 17 00:00:00 2001
From: thisiskeithb <13375512+thisiskeithb@users.noreply.github.com>
Date: Wed, 16 Dec 2020 01:26:55 -0800
Subject: [PATCH 26/29] Point to the Anet OpenBLT releases & update env comment
---
platformio.ini | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/platformio.ini b/platformio.ini
index 2c3d47aaf509..7978b2c1806d 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1230,7 +1230,8 @@ extra_scripts = ${common.extra_scripts}
#
# Anet ET4-MB_V1.x/ET4P-MB_V1.x (STM32F407VGT6 ARM Cortex-M4)
-# For use with with davidtgbe's OpenBLT bootloader https://github.com/davidtgbe/openblt
+# For use with with davidtgbe's OpenBLT bootloader https://github.com/davidtgbe/openblt/releases
+# Comment out board_build.offset = 0x10000 if you don't plan to use OpenBLT/flashing directly to 0x08000000.
#
[env:Anet_ET4_OpenBLT]
#build_type = debug
From c4418c2847bc1bc9659dd5b005c7ab07c6df1dd8 Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Mon, 21 Dec 2020 01:00:48 -0300
Subject: [PATCH 27/29] those values work on both 8 and 16 bit
---
Marlin/src/HAL/STM32/tft/tft_fsmc.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
index d6a1277ea641..2a5ad4595b71 100644
--- a/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
+++ b/Marlin/src/HAL/STM32/tft/tft_fsmc.cpp
@@ -74,8 +74,8 @@ void TFT_FSMC::Init() {
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 24;
Timing.BusTurnAroundDuration = 0;
- Timing.CLKDivision = TERN(TFT_INTERFACE_FSMC_8BIT, 0, 16);
- Timing.DataLatency = TERN(TFT_INTERFACE_FSMC_8BIT, 0, 17);
+ Timing.CLKDivision = 16;
+ Timing.DataLatency = 17;
Timing.AccessMode = FSMC_ACCESS_MODE_A;
// Write Timing
// Can be decreases from 8-15-8 to 0-0-1 with risk of stability loss
From b3d944658da9ad081da7c2f2be5ff7b149589195 Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Mon, 21 Dec 2020 01:05:59 -0300
Subject: [PATCH 28/29] we dont need custom variant for anet et4, use generic
instead
---
.../share/PlatformIO/boards/ANET_ET4.json | 46 --
.../share/PlatformIO/ldscripts/anet_et4.ld | 184 --------
.../share/PlatformIO/scripts/anet_et4.py | 20 -
.../variants/MARLIN_ANET_ET4/PeripheralPins.c | 395 ------------------
.../variants/MARLIN_ANET_ET4/PinNamesVar.h | 50 ---
.../variants/MARLIN_ANET_ET4/hal_conf_extra.h | 55 ---
.../variants/MARLIN_ANET_ET4/ldscript.ld | 202 ---------
.../variants/MARLIN_ANET_ET4/variant.cpp | 268 ------------
.../variants/MARLIN_ANET_ET4/variant.h | 385 -----------------
platformio.ini | 29 +-
10 files changed, 15 insertions(+), 1619 deletions(-)
delete mode 100644 buildroot/share/PlatformIO/boards/ANET_ET4.json
delete mode 100644 buildroot/share/PlatformIO/ldscripts/anet_et4.ld
delete mode 100644 buildroot/share/PlatformIO/scripts/anet_et4.py
delete mode 100644 buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PeripheralPins.c
delete mode 100644 buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PinNamesVar.h
delete mode 100644 buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/hal_conf_extra.h
delete mode 100644 buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/ldscript.ld
delete mode 100644 buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.cpp
delete mode 100644 buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.h
diff --git a/buildroot/share/PlatformIO/boards/ANET_ET4.json b/buildroot/share/PlatformIO/boards/ANET_ET4.json
deleted file mode 100644
index ffc3a6e31d47..000000000000
--- a/buildroot/share/PlatformIO/boards/ANET_ET4.json
+++ /dev/null
@@ -1,46 +0,0 @@
-{
- "build": {
- "core": "stm32",
- "cpu": "cortex-m4",
- "extra_flags": "-DSTM32F4 -DSTM32F407xx -DSTM32F40_41xxx",
- "f_cpu": "168000000L",
- "hwids": [
- [
- "0x1EAF",
- "0x0003"
- ],
- [
- "0x0483",
- "0x3748"
- ]
- ],
- "mcu": "stm32f407vgt6",
- "variant": "MARLIN_ANET_ET4"
- },
- "debug": {
- "jlink_device": "STM32F407VG",
- "openocd_target": "stm32f4x",
- "svd_path": "STM32F40x.svd"
- },
- "frameworks": [
- "arduino",
- "stm32cube"
- ],
- "name": "STM32F407VG (192k RAM. 1024k Flash)",
- "upload": {
- "disable_flushing": false,
- "maximum_ram_size": 196608,
- "maximum_size": 1048576,
- "protocol": "stlink",
- "protocols": [
- "stlink",
- "dfu",
- "jlink"
- ],
- "require_upload_port": true,
- "use_1200bps_touch": false,
- "wait_for_upload_port": false
- },
- "url": "http://www.st.com/en/microcontrollers/stm32f407vg.html",
- "vendor": "Generic"
-}
diff --git a/buildroot/share/PlatformIO/ldscripts/anet_et4.ld b/buildroot/share/PlatformIO/ldscripts/anet_et4.ld
deleted file mode 100644
index cbc058a71373..000000000000
--- a/buildroot/share/PlatformIO/ldscripts/anet_et4.ld
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
-*****************************************************************************
-**
-** File : LinkerScript.ld
-**
-** Abstract : Linker script for STM32F407VGTx Device with
-** 1024KByte FLASH, 128KByte RAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-**
-** Distribution: The file is distributed as is, without any warranty
-** of any kind.
-**
-** (c)Copyright Ac6.
-** You may use this file as-is or modify it according to the needs of your
-** project. Distribution of this file (unmodified or modified) is not
-** permitted. Ac6 permit registered System Workbench for MCU users the
-** rights to distribute the assembled, compiled & linked contents of this
-** file as part of an application binary file, provided that it is built
-** using the System Workbench for MCU toolchain.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20010000; /* end of RAM */
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;; /* required amount of heap */
-_Min_Stack_Size = 0x400;; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
-RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
-CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
-}
-
-/* Define output sections */
-SECTIONS
-{
- /* The startup code goes first into FLASH */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data goes into FLASH */
- .text ALIGN(4):
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data goes into FLASH */
- .rodata ALIGN(4):
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
- .ARM : {
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- } >FLASH
-
- .preinit_array :
- {
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- } >FLASH
- .init_array :
- {
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- } >FLASH
- .fini_array :
- {
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- } >FLASH
-
- /* used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections goes into RAM, load LMA copy after code */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
-
- _siccmram = LOADADDR(.ccmram);
-
- /* CCM-RAM section
- *
- * IMPORTANT NOTE!
- * If initialized variables will be placed in this section,
- * the startup code needs to be modified to copy the init-values.
- */
- .ccmram :
- {
- . = ALIGN(4);
- _sccmram = .; /* create a global symbol at ccmram start */
- *(.ccmram)
- *(.ccmram*)
-
- . = ALIGN(4);
- _eccmram = .; /* create a global symbol at ccmram end */
- } >CCMRAM AT> FLASH
-
-
- /* Uninitialized data section */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss secion */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough RAM left */
- ._user_heap_stack :
- {
- . = ALIGN(4);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(4);
- } >RAM
-
- /* Remove information from the standard libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/buildroot/share/PlatformIO/scripts/anet_et4.py b/buildroot/share/PlatformIO/scripts/anet_et4.py
deleted file mode 100644
index cfb0c55c2c40..000000000000
--- a/buildroot/share/PlatformIO/scripts/anet_et4.py
+++ /dev/null
@@ -1,20 +0,0 @@
-import os,sys
-Import("env")
-
-from SCons.Script import DefaultEnvironment
-from os.path import join
-
-custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/anet_et4.ld")
-for i, flag in enumerate(env["LINKFLAGS"]):
- if "-Wl,-T" in flag:
- env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
- elif flag == "-T":
- env["LINKFLAGS"][i + 1] = custom_ld_script
-
-env.AddPostAction(
- "$BUILD_DIR/${PROGNAME}.elf",
- env.VerboseAction(" ".join([
- "$OBJCOPY", "-O", "srec",
- "\"$BUILD_DIR/${PROGNAME}.elf\"", "\"$BUILD_DIR/${PROGNAME}.srec\""
- ]), "Building " + join("$BUILD_DIR","${PROGNAME}.srec"))
-)
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PeripheralPins.c
deleted file mode 100644
index d1fbc37a0be9..000000000000
--- a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PeripheralPins.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- *******************************************************************************
- * Copyright (c) 2020, STMicroelectronics
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- *******************************************************************************
- * Automatically generated from STM32F407V(E-G)Tx.xml
- */
-#include "Arduino.h"
-#include "PeripheralPins.h"
-
-/* =====
- * Note: Commented lines are alternative possibilities which are not used per default.
- * If you change them, you will have to know what you do
- * =====
- */
-
-//*** ADC ***
-
-#ifdef HAL_ADC_MODULE_ENABLED
-WEAK const PinMap PinMap_ADC[] = {
- {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
- {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
- {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
- {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
- {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
- {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
- {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
- {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
- {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
- {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
- {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
- {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
- {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
- {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
- {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
- {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
- {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
- {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
- {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
- {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
- {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
- {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
- {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
- {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
- {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
- {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
- {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
- {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
- {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
- {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
- {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
- {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
- {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
- {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
- {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
- {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
- {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
- {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
- {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
- {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
- {NC, NP, 0}
-};
-#endif
-
-//*** DAC ***
-
-#ifdef HAL_DAC_MODULE_ENABLED
-WEAK const PinMap PinMap_DAC[] = {
- {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
- {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
- {NC, NP, 0}
-};
-#endif
-
-//*** I2C ***
-
-#ifdef HAL_I2C_MODULE_ENABLED
-WEAK const PinMap PinMap_I2C_SDA[] = {
- {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
- {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
- {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
- {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_I2C_MODULE_ENABLED
-WEAK const PinMap PinMap_I2C_SCL[] = {
- {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
- {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
- {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
- {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
- {NC, NP, 0}
-};
-#endif
-
-//*** PWM ***
-
-#ifdef HAL_TIM_MODULE_ENABLED
-WEAK const PinMap PinMap_PWM[] = {
- {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
- {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
- {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
- {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
- {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
- {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
- {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
- {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
- {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
- {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
- {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
- {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
- {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
- {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
- {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
- {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
- {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
- {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
- {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
- {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
- {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
- {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
- {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
- {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
- {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
- {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
- {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
- {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
- {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
- {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
- {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
- {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
- {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
- {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
- {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
- {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
- {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
- {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
- {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
- {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
- {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
- {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
- {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
- {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
- {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
- {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
- {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
- {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
- {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
- {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
- {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
- {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
- {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
- {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
- {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
- {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
- {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
- {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
- {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
- {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
- {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
- {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
- {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
- {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
- {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
- {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
- {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
- {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
- {NC, NP, 0}
-};
-#endif
-
-//*** SERIAL ***
-
-#ifdef HAL_UART_MODULE_ENABLED
-WEAK const PinMap PinMap_UART_TX[] = {
- {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
- {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
- {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
- {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
- {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_UART_MODULE_ENABLED
-WEAK const PinMap PinMap_UART_RX[] = {
- {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
- {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
- {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
- {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
- {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_UART_MODULE_ENABLED
-WEAK const PinMap PinMap_UART_RTS[] = {
- {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_UART_MODULE_ENABLED
-WEAK const PinMap PinMap_UART_CTS[] = {
- {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
- {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
- {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
- {NC, NP, 0}
-};
-#endif
-
-//*** SPI ***
-
-#ifdef HAL_SPI_MODULE_ENABLED
-WEAK const PinMap PinMap_SPI_MOSI[] = {
- {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
- {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
- {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
- {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_SPI_MODULE_ENABLED
-WEAK const PinMap PinMap_SPI_MISO[] = {
- {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
- {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
- {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
- {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_SPI_MODULE_ENABLED
-WEAK const PinMap PinMap_SPI_SCLK[] = {
- {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
- {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
- {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
- {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_SPI_MODULE_ENABLED
-WEAK const PinMap PinMap_SPI_SSEL[] = {
- {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
- {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
- {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
- {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
- {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
- {NC, NP, 0}
-};
-#endif
-
-//*** CAN ***
-
-#ifdef HAL_CAN_MODULE_ENABLED
-WEAK const PinMap PinMap_CAN_RD[] = {
- {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
- {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
- {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
- {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
- {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_CAN_MODULE_ENABLED
-WEAK const PinMap PinMap_CAN_TD[] = {
- {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
- {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
- {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
- {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
- {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
- {NC, NP, 0}
-};
-#endif
-
-//*** ETHERNET ***
-
-#ifdef HAL_ETH_MODULE_ENABLED
-WEAK const PinMap PinMap_Ethernet[] = {
- {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
- {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK
- {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
- {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
- {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV
- {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
- {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
- {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
- {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
- {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
- {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
- {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
- {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
- {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
- {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
- {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
- {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
- {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
- {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
- {NC, NP, 0}
-};
-#endif
-
-//*** No QUADSPI ***
-
-//*** USB ***
-
-#ifdef HAL_PCD_MODULE_ENABLED
-WEAK const PinMap PinMap_USB_OTG_FS[] = {
- {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF
- {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
- {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID
- {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM
- {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP
- {NC, NP, 0}
-};
-#endif
-
-#ifdef HAL_PCD_MODULE_ENABLED
-WEAK const PinMap PinMap_USB_OTG_HS[] = {
-#ifdef USE_USB_HS_IN_FS
- {PA_4, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_SOF
- {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_ID
- {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
- {PB_14, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DM
- {PB_15, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG_HS_FS)}, // USB_OTG_HS_DP
-#else
- {PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D0
- {PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_CK
- {PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D1
- {PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D2
- {PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D7
- {PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D3
- {PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D4
- {PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D5
- {PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_D6
- {PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_STP
- {PC_2, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_DIR
- {PC_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_HS)}, // USB_OTG_HS_ULPI_NXT
-#endif /* USE_USB_HS_IN_FS */
- {NC, NP, 0}
-};
-#endif
-
-//*** SD ***
-
-#ifdef HAL_SD_MODULE_ENABLED
-WEAK const PinMap PinMap_SD[] = {
- {PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D4
- {PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D5
- {PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D6
- {PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D7
- {PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D0
- {PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D1
- {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D2
- {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO)}, // SDIO_D3
- {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CK
- {PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO)}, // SDIO_CMD
- {NC, NP, 0}
-};
-#endif
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PinNamesVar.h b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PinNamesVar.h
deleted file mode 100644
index 24248859373b..000000000000
--- a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/PinNamesVar.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* SYS_WKUP */
-#ifdef PWR_WAKEUP_PIN1
- SYS_WKUP1 = PA_0,
-#endif
-#ifdef PWR_WAKEUP_PIN2
- SYS_WKUP2 = NC,
-#endif
-#ifdef PWR_WAKEUP_PIN3
- SYS_WKUP3 = NC,
-#endif
-#ifdef PWR_WAKEUP_PIN4
- SYS_WKUP4 = NC,
-#endif
-#ifdef PWR_WAKEUP_PIN5
- SYS_WKUP5 = NC,
-#endif
-#ifdef PWR_WAKEUP_PIN6
- SYS_WKUP6 = NC,
-#endif
-#ifdef PWR_WAKEUP_PIN7
- SYS_WKUP7 = NC,
-#endif
-#ifdef PWR_WAKEUP_PIN8
- SYS_WKUP8 = NC,
-#endif
-/* USB */
-#ifdef USBCON
- USB_OTG_FS_SOF = PA_8,
- USB_OTG_FS_VBUS = PA_9,
- USB_OTG_FS_ID = PA_10,
- USB_OTG_FS_DM = PA_11,
- USB_OTG_FS_DP = PA_12,
- USB_OTG_HS_ULPI_D0 = PA_3,
- USB_OTG_HS_SOF = PA_4,
- USB_OTG_HS_ULPI_CK = PA_5,
- USB_OTG_HS_ULPI_D1 = PB_0,
- USB_OTG_HS_ULPI_D2 = PB_1,
- USB_OTG_HS_ULPI_D7 = PB_5,
- USB_OTG_HS_ULPI_D3 = PB_10,
- USB_OTG_HS_ULPI_D4 = PB_11,
- USB_OTG_HS_ID = PB_12,
- USB_OTG_HS_ULPI_D5 = PB_12,
- USB_OTG_HS_ULPI_D6 = PB_13,
- USB_OTG_HS_VBUS = PB_13,
- USB_OTG_HS_DM = PB_14,
- USB_OTG_HS_DP = PB_15,
- USB_OTG_HS_ULPI_STP = PC_0,
- USB_OTG_HS_ULPI_DIR = PC_2,
- USB_OTG_HS_ULPI_NXT = PC_3,
-#endif
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/hal_conf_extra.h b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/hal_conf_extra.h
deleted file mode 100644
index 94b373396e2b..000000000000
--- a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/hal_conf_extra.h
+++ /dev/null
@@ -1,55 +0,0 @@
-#pragma once
-
-#define HAL_MODULE_ENABLED
-#define HAL_ADC_MODULE_ENABLED
-#define HAL_CRC_MODULE_ENABLED
-#define HAL_DMA_MODULE_ENABLED
-#define HAL_GPIO_MODULE_ENABLED
-#define HAL_I2C_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-//#define HAL_RTC_MODULE_ENABLED Real Time Clock...do we use it?
-#define HAL_SPI_MODULE_ENABLED
-#define HAL_TIM_MODULE_ENABLED
-#define HAL_USART_MODULE_ENABLED
-#define HAL_CORTEX_MODULE_ENABLED
-//#define HAL_UART_MODULE_ENABLED // by default
-//#define HAL_PCD_MODULE_ENABLED // Since STM32 v3.10700.191028 this is automatically added if any type of USB is enabled (as in Arduino IDE)
-#define HAL_SD_MODULE_ENABLED
-#define HAL_EXTI_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_SRAM_MODULE_ENABLED
-
-#undef HAL_DAC_MODULE_ENABLED
-#undef HAL_FLASH_MODULE_ENABLED
-#undef HAL_CAN_MODULE_ENABLED
-#undef HAL_CAN_LEGACY_MODULE_ENABLED
-#undef HAL_CEC_MODULE_ENABLED
-#undef HAL_CRYP_MODULE_ENABLED
-#undef HAL_DCMI_MODULE_ENABLED
-#undef HAL_DMA2D_MODULE_ENABLED
-#undef HAL_ETH_MODULE_ENABLED
-#undef HAL_NAND_MODULE_ENABLED
-#undef HAL_NOR_MODULE_ENABLED
-#undef HAL_PCCARD_MODULE_ENABLED
-#undef HAL_SDRAM_MODULE_ENABLED
-#undef HAL_HASH_MODULE_ENABLED
-//#undef HAL_EXTI_MODULE_ENABLED
-#undef HAL_SMBUS_MODULE_ENABLED
-#undef HAL_I2S_MODULE_ENABLED
-#undef HAL_IWDG_MODULE_ENABLED
-#undef HAL_LTDC_MODULE_ENABLED
-#undef HAL_DSI_MODULE_ENABLED
-#undef HAL_QSPI_MODULE_ENABLED
-#undef HAL_RNG_MODULE_ENABLED
-#undef HAL_SAI_MODULE_ENABLED
-#undef HAL_IRDA_MODULE_ENABLED
-#undef HAL_SMARTCARD_MODULE_ENABLED
-#undef HAL_WWDG_MODULE_ENABLED
-#undef HAL_HCD_MODULE_ENABLED
-#undef HAL_FMPI2C_MODULE_ENABLED
-#undef HAL_SPDIFRX_MODULE_ENABLED
-#undef HAL_DFSDM_MODULE_ENABLED
-#undef HAL_LPTIM_MODULE_ENABLED
-#undef HAL_MMC_MODULE_ENABLED
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/ldscript.ld b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/ldscript.ld
deleted file mode 100644
index 37904fe551e3..000000000000
--- a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/ldscript.ld
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
-******************************************************************************
-**
-** File : LinkerScript.ld
-**
-** Author : Auto-generated by STM32CubeIDE
-**
-** Abstract : Linker script for STM32F407VGTx Device from stm32f4 series
-** 1024Kbytes FLASH
-** 64Kbytes CCMRAM
-** 128Kbytes RAM
-**
-** Set heap size, stack size and stack location according
-** to application requirements.
-**
-** Set memory bank area and size if external memory is used.
-**
-** Target : STMicroelectronics STM32
-**
-** Distribution: The file is distributed as is without any warranty
-** of any kind.
-**
-*****************************************************************************
-** @attention
-**
-** © COPYRIGHT(c) 2020 STMicroelectronics
-**
-** Redistribution and use in source and binary forms, with or without modification,
-** are permitted provided that the following conditions are met:
-** 1. Redistributions of source code must retain the above copyright notice,
-** this list of conditions and the following disclaimer.
-** 2. Redistributions in binary form must reproduce the above copyright notice,
-** this list of conditions and the following disclaimer in the documentation
-** and/or other materials provided with the distribution.
-** 3. Neither the name of STMicroelectronics nor the names of its contributors
-** may be used to endorse or promote products derived from this software
-** without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
-
-_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Memories definition */
-MEMORY
-{
- CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
- RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
- FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
-}
-
-/* Sections */
-SECTIONS
-{
- /* The startup code into "FLASH" Rom type memory */
- .isr_vector :
- {
- . = ALIGN(4);
- KEEP(*(.isr_vector)) /* Startup code */
- . = ALIGN(4);
- } >FLASH
-
- /* The program code and other data into "FLASH" Rom type memory */
- .text :
- {
- . = ALIGN(4);
- *(.text) /* .text sections (code) */
- *(.text*) /* .text* sections (code) */
- *(.glue_7) /* glue arm to thumb code */
- *(.glue_7t) /* glue thumb to arm code */
- *(.eh_frame)
-
- KEEP (*(.init))
- KEEP (*(.fini))
-
- . = ALIGN(4);
- _etext = .; /* define a global symbols at end of code */
- } >FLASH
-
- /* Constant data into "FLASH" Rom type memory */
- .rodata :
- {
- . = ALIGN(4);
- *(.rodata) /* .rodata sections (constants, strings, etc.) */
- *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
- . = ALIGN(4);
- } >FLASH
-
- .ARM.extab : {
- . = ALIGN(4);
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- . = ALIGN(4);
- } >FLASH
-
- .ARM : {
- . = ALIGN(4);
- __exidx_start = .;
- *(.ARM.exidx*)
- __exidx_end = .;
- . = ALIGN(4);
- } >FLASH
-
- .preinit_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP (*(.preinit_array*))
- PROVIDE_HIDDEN (__preinit_array_end = .);
- . = ALIGN(4);
- } >FLASH
-
- .init_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array*))
- PROVIDE_HIDDEN (__init_array_end = .);
- . = ALIGN(4);
- } >FLASH
-
- .fini_array :
- {
- . = ALIGN(4);
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP (*(SORT(.fini_array.*)))
- KEEP (*(.fini_array*))
- PROVIDE_HIDDEN (__fini_array_end = .);
- . = ALIGN(4);
- } >FLASH
-
- /* Used by the startup to initialize data */
- _sidata = LOADADDR(.data);
-
- /* Initialized data sections into "RAM" Ram type memory */
- .data :
- {
- . = ALIGN(4);
- _sdata = .; /* create a global symbol at data start */
- *(.data) /* .data sections */
- *(.data*) /* .data* sections */
-
- . = ALIGN(4);
- _edata = .; /* define a global symbol at data end */
-
- } >RAM AT> FLASH
-
- /* Uninitialized data section into "RAM" Ram type memory */
- . = ALIGN(4);
- .bss :
- {
- /* This is used by the startup in order to initialize the .bss section */
- _sbss = .; /* define a global symbol at bss start */
- __bss_start__ = _sbss;
- *(.bss)
- *(.bss*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = .; /* define a global symbol at bss end */
- __bss_end__ = _ebss;
- } >RAM
-
- /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
- ._user_heap_stack :
- {
- . = ALIGN(8);
- PROVIDE ( end = . );
- PROVIDE ( _end = . );
- . = . + _Min_Heap_Size;
- . = . + _Min_Stack_Size;
- . = ALIGN(8);
- } >RAM
-
- /* Remove information from the compiler libraries */
- /DISCARD/ :
- {
- libc.a ( * )
- libm.a ( * )
- libgcc.a ( * )
- }
-
- .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.cpp
deleted file mode 100644
index 218abeafa458..000000000000
--- a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.cpp
+++ /dev/null
@@ -1,268 +0,0 @@
-/*
- *******************************************************************************
- * Copyright (c) 2019, STMicroelectronics
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- *******************************************************************************
- */
-
-#include "pins_arduino.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// Digital PinName array
-// This array allows to wrap Arduino pin number(Dx or x)
-// to STM32 PinName (PX_n)
-const PinName digitalPin[] = {
-#if STM32F4X_PIN_NUM >= 64 //64 pins mcu, 51 gpio
- PC_13, //D0
- PC_14, //D1 - OSC32_IN
- PC_15, //D2 - OSC32_OUT
- PH_0, //D3 - OSC_IN
- PH_1, //D4 - OSC_OUT
- PB_2, //D5 - BOOT1
- PB_10, //D6 - 1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
- PB_11, //D7 - 1:I2C2_SDA / USART3_RX / TIM2_CH4
- PB_12, //D8 - 1:SPI2_NSS / OTG_HS_ID
- PB_13, //D9 - 1:SPI2_SCK 2:OTG_HS_VBUS
- PB_14, //D10 - 1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
- PB_15, //D11 - SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
- PC_6, //D12 - 1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
- PC_7, //D13 - 1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
- PC_8, //D14 - 1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
- PC_9, //D15 - 1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
- PA_8, //D16 - 1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
- PA_9, //D17 - 1:USART1_TX / TIM1_CH2 2:OTG_FS_VBUS
- PA_10, //D18 - 1:USART1_RX / TIM1_CH3 / OTG_FS_ID
- PA_11, //D19 - 1:TIM1_CH4 / OTG_FS_DM
- PA_12, //D20 - 1:OTG_FS_DP
- PA_13, //D21 - 0:JTMS-SWDIO
- PA_14, //D22 - 0:JTCK-SWCLK
- PA_15, //D23 - 0:JTDI 1:SPI3_NSS / SPI1_NSS
- PC_10, //D24 - 1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
- PC_11, //D25 - 1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
- PC_12, //D26 - 1:UART5_TX / SPI3_MOSI / SDIO_CK
- PD_2, //D27 - 1:UART5_RX / SDIO_CMD
- PB_3, //D28 - 0:JTDO 1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
- PB_4, //D29 - 0:NJTRST 1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
- PB_5, //D30 - 1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
- PB_6, //D31 - 1:I2C1_SCL / TIM4_CH1 / USART1_TX
- PB_7, //D32 - 1:I2C1_SDA / TIM4_CH2 / USART1_RX
- PB_8, //D33 - 1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
- PB_9, //D34 - 1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
- PA_0, //D35/A0 - 1:UART4_TX / TIM5_CH1 2:ADC123_IN0
- PA_1, //D36/A1 - 1:UART4_RX / TIM5_CH2 / TIM2_CH2 2:ADC123_IN1
- PA_2, //D37/A2 - 1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3 2:ADC123_IN2
- PA_3, //D38/A3 - 1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4 2:ADC123_IN3
- PA_4, //D39/A4 - NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK 2:ADC12_IN4 / DAC_OUT1
- PA_5, //D40/A5 - NOT FT 1:SPI1_SCK 2:ADC12_IN5 / DAC_OUT2
- PA_6, //D41/A6 - 1:SPI1_MISO / TIM13_CH1 / TIM3_CH1 2:ADC12_IN6
- PA_7, //D42/A7 - 1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2 2:ADC12_IN7
- PB_0, //D43/A8 - 1:TIM3_CH3 2:ADC12_IN8
- PB_1, //D44/A9 - 1:TIM3_CH4 2:ADC12_IN9
- PC_0, //D45/A10 - 1: 2:ADC123_IN10
- PC_1, //D46/A11 - 1: 2:ADC123_IN11
- PC_2, //D47/A12 - 1:SPI2_MISO 2:ADC123_IN12
- PC_3, //D48/A13 - 1:SPI2_MOSI 2:ADC123_IN13
- PC_4, //D49/A14 - 1: 2:ADC12_IN14
- PC_5, //D50/A15 - 1: 2:ADC12_IN15
- #if STM32F4X_PIN_NUM >= 144
- PF_3, //D51/A16 - 1:FSMC_A3 2:ADC3_IN9
- PF_4, //D52/A17 - 1:FSMC_A4 2:ADC3_IN14
- PF_5, //D53/A18 - 1:FSMC_A5 2:ADC3_IN15
- PF_6, //D54/A19 - 1:TIM10_CH1 2:ADC3_IN4
- PF_7, //D55/A20 - 1:TIM11_CH1 2:ADC3_IN5
- PF_8, //D56/A21 - 1:TIM13_CH1 2:ADC3_IN6
- PF_9, //D57/A22 - 1;TIM14_CH1 2:ADC3_IN7
- PF_10, //D58/A23 - 2:ADC3_IN8
- #endif
-#endif
-#if STM32F4X_PIN_NUM >= 100 //100 pins mcu, 82 gpio
- PE_2, //D59 - 1:FSMC_A23
- PE_3, //D60 - 1:FSMC_A19
- PE_4, //D61 - 1:FSMC_A20
- PE_5, //D62 - 1:FSMC_A21
- PE_6, //D63 - 1:FSMC_A22
- PE_7, //D64 - 1:FSMC_D4
- PE_8, //D65 - 1:FSMC_D5
- PE_9, //D66 - 1:FSMC_D6 / TIM1_CH1
- PE_10, //D67 - 1:FSMC_D7
- PE_11, //D68 - 1:FSMC_D8 / TIM1_CH2
- PE_12, //D69 - 1:FSMC_D9
- PE_13, //D70 - 1:FSMC_D10 / TIM1_CH3
- PE_14, //D71 - 1:FSMC_D11 / TIM1_CH4
- PE_15, //D72 - 1:FSMC_D12
- PD_8, //D73 - 1:FSMC_D13 / USART3_TX
- PD_9, //D74 - 1:FSMC_D14 / USART3_RX
- PD_10, //D75 - 1:FSMC_D15
- PD_11, //D76 - 1:FSMC_A16
- PD_12, //D77 - 1:FSMC_A17 / TIM4_CH1
- PD_13, //D78 - 1:FSMC_A18 / TIM4_CH2
- PD_14, //D79 - 1:FSMC_D0 / TIM4_CH3
- PD_15, //D80 - 1:FSMC_D1 / TIM4_CH4
- PD_0, //D81 - 1:FSMC_D2
- PD_1, //D82 - 1:FSMC_D3
- PD_3, //D83 - 1:FSMC_CLK
- PD_4, //D84 - 1:FSMC_NOE
- PD_5, //D85 - 1:USART2_TX
- PD_6, //D86 - 1:USART2_RX
- PD_7, //D87
- PE_0, //D88
- PE_1, //D89
-#endif
-#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
- PF_0, //D90 - 1:FSMC_A0 / I2C2_SDA
- PF_1, //D91 - 1:FSMC_A1 / I2C2_SCL
- PF_2, //D92 - 1:FSMC_A2
- PF_11, //D93
- PF_12, //D94 - 1:FSMC_A6
- PF_13, //D95 - 1:FSMC_A7
- PF_14, //D96 - 1:FSMC_A8
- PF_15, //D97 - 1:FSMC_A9
- PG_0, //D98 - 1:FSMC_A10
- PG_1, //D99 - 1:FSMC_A11
- PG_2, //D100 - 1:FSMC_A12
- PG_3, //D101 - 1:FSMC_A13
- PG_4, //D102 - 1:FSMC_A14
- PG_5, //D103 - 1:FSMC_A15
- PG_6, //D104
- PG_7, //D105
- PG_8, //D106
- PG_9, //D107 - 1:USART6_RX
- PG_10, //D108 - 1:FSMC_NE3
- PG_11, //D109
- PG_12, //D110 - 1:FSMC_NE4
- PG_13, //D111 - 1:FSMC_A24
- PG_14, //D112 - 1:FSMC_A25 / USART6_TX
- PG_15, //D113
-#endif
-#if STM32F4X_PIN_NUM >= 176 //176 pins mcu, 140 gpio
- PI_8, //D114
- PI_9, //D115
- PI_10, //D116
- PI_11, //D117
- PH_2, //D118
- PH_3, //D119
- PH_4, //D120 - 1:I2C2_SCL
- PH_5, //D121 - 1:I2C2_SDA
- PH_6, //D122 - 1:TIM12_CH1
- PH_7, //D123 - 1:I2C3_SCL
- PH_8, //D124 - 1:I2C3_SDA
- PH_9, //D125 - 1:TIM12_CH2
- PH_10, //D126 - 1:TIM5_CH1
- PH_11, //D127 - 1:TIM5_CH2
- PH_12, //D128 - 1:TIM5_CH3
- PH_13, //D129
- PH_14, //D130
- PH_15, //D131
- PI_0, //D132 - 1:TIM5_CH4 / SPI2_NSS
- PI_1, //D133 - 1:SPI2_SCK
- PI_2, //D134 - 1:TIM8_CH4 /SPI2_MISO
- PI_3, //D135 - 1:SPI2_MOS
- PI_4, //D136
- PI_5, //D137 - 1:TIM8_CH1
- PI_6, //D138 - 1:TIM8_CH2
- PI_7, //D139 - 1:TIM8_CH3
-#endif
-};
-
-// If analog pins are not contiguous in the digitalPin array:
-// Add the analogInputPin array without defining NUM_ANALOG_FIRST
-// Analog (Ax) pin number array
-// where x is the index to retrieve the digital pin number
-//const uint32_t analogInputPin[] = {
-// //PXn, //Ax = Dx
-// 2, //A0 = Dx
-// 8, //A1 = Dy
-// 3 //A2 = Dz
-//}
-
-#ifdef __cplusplus
-}
-#endif
-
-// ----------------------------------------------------------------------------
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-/**
- * @brief System Clock Configuration
- * The system Clock is configured as follow :
- * System Clock source = PLL (HSE)
- * SYSCLK(Hz) = 168000000
- * HCLK(Hz) = 168000000
- * AHB Prescaler = 1
- * APB1 Prescaler = 4
- * APB2 Prescaler = 2
- * HSI Frequency(Hz) = 16000000
- * PLL_M = 8
- * PLL_N = 336
- * PLL_P = 2
- * PLL_Q = 7
- * VDD(V) = 3.3
- * Main regulator output voltage = Scale2 mode
- * Flash Latency(WS) = 2
- * @param None
- * @retval None
- */
-WEAK void SystemClock_Config() {
-
- RCC_OscInitTypeDef RCC_OscInitStruct;
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
-
- /**Configure the main internal regulator output voltage
- */
- __HAL_RCC_PWR_CLK_ENABLE();
-
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
- /**Initializes the CPU, AHB and APB busses clocks
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLM = 8;
- RCC_OscInitStruct.PLL.PLLN = 336;
- RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- RCC_OscInitStruct.PLL.PLLQ = 7;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- _Error_Handler(__FILE__, __LINE__);
- }
-
- /**Initializes the CPU, AHB and APB busses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
- | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
- _Error_Handler(__FILE__, __LINE__);
- }
-
- /**Configure the Systick interrupt time
- */
- HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
-
- /**Configure the Systick
- */
- HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
-
- /* SysTick_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
-}
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.h b/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.h
deleted file mode 100644
index 61be256fae88..000000000000
--- a/buildroot/share/PlatformIO/variants/MARLIN_ANET_ET4/variant.h
+++ /dev/null
@@ -1,385 +0,0 @@
-/*
- *******************************************************************************
- * Copyright (c) 2019, STMicroelectronics
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- *******************************************************************************
- */
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif // __cplusplus
-
-/*----------------------------------------------------------------------------
- * Pins
- *----------------------------------------------------------------------------*/
-
-// Define pin names to match digital pin number --> Dx
-// It could be used with preprocessor tests (e.g. #if PXn == 3)
-// so an enum will not work.
-#ifdef STM32F405RX
- #define STM32F4X_PIN_NUM 64 //64 pins mcu, 51 gpio
- #define STM32F4X_GPIO_NUM 51
- #define STM32F4X_ADC_NUM 16
-#elif defined(STM32F407_5VX) || defined(STM32F407VG)
- #define STM32F4X_PIN_NUM 100 //100 pins mcu, 82 gpio
- #define STM32F4X_GPIO_NUM 82
- #define STM32F4X_ADC_NUM 16
-#elif defined(STM32F407_5ZX)
- #define STM32F4X_PIN_NUM 144 //144 pins mcu, 114 gpio
- #define STM32F4X_GPIO_NUM 114
- #define STM32F4X_ADC_NUM 24
-#elif defined(STM32F407IX)
- #define STM32F4X_PIN_NUM 176 //176 pins mcu, 140 gpio
- #define STM32F4X_GPIO_NUM 140
- #define STM32F4X_ADC_NUM 24
-#else
- #error "no match MCU defined"
-#endif
-
-// !!!
-// !!! Copy the digitalPin[] array from the variant.cpp
-// !!! and remove all '_': PX_n --> PXn
-// !!! For NC, comment the line to warn x pin number is NC
-// !!! // x is NC
-// !!! For duplicated pin name, comment the line to warn x pin number
-// !!! is PXn which is already defined with y pin number
-// !!! // x is PXn (y)
-// !!! Ex:
-// !!! ...
-// !!! #define PA4 20 // A14 <-- if NUM_ANALOG_FIRST not defined
-// !!! or
-// !!! #define PA4 A14 // 20 <-- if NUM_ANALOG_FIRST defined
-// !!! #define PB4 21
-// !!! #define PB5 22
-// !!! #define PB3 23
-// !!! // 24 is PA4 (20)
-// !!! // 25 is PB4 (21)
-// !!! #define PA2 26 // A15 <-- if NUM_ANALOG_FIRST not defined
-// !!! or
-// !!! #define PA2 A15 // 26 <-- if NUM_ANALOG_FIRST defined
-// !!! ...
-//#define PXn x
-
-#if STM32F4X_PIN_NUM >= 64 //64 pins mcu, 51 gpio
- #define PC13 0
- #define PC14 1 //OSC32_IN
- #define PC15 2 //OSC32_OUT
- #define PH0 3 //OSC_IN
- #define PH1 4 //OSC_OUT
- #define PB2 5 //BOOT1
- #define PB10 6 //1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
- #define PB11 7 //1:I2C2_SDA / USART3_RX / TIM2_CH4
- #define PB12 8 //1:SPI2_NSS / OTG_HS_ID
- #define PB13 9 //1:SPI2_SCK 2:OTG_HS_VBUS
- #define PB14 10 //1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
- #define PB15 11 //SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
- #define PC6 12 //1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
- #define PC7 13 //1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
- #define PC8 14 //1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
- #define PC9 15 //1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
- #define PA8 16 //1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
- #define PA9 17 //1:USART1_TX / TIM1_CH2 2:OTG_FS_VBUS
- #define PA10 18 //1:USART1_RX / TIM1_CH3 / OTG_FS_ID
- #define PA11 19 //1:TIM1_CH4 / OTG_FS_DM
- #define PA12 20 //1:OTG_FS_DP
- #define PA13 21 //0:JTMS-SWDIO
- #define PA14 22 //0:JTCK-SWCLK
- #define PA15 23 //0:JTDI 1:SPI3_NSS / SPI1_NSS
- #define PC10 24 //1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
- #define PC11 25 //1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
- #define PC12 26 //1:UART5_TX / SPI3_MOSI / SDIO_CK
- #define PD2 27 //1:UART5_RX / SDIO_CMD
- #define PB3 28 //0:JTDO 1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
- #define PB4 29 //0:NJTRST 1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
- #define PB5 30 //1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
- #define PB6 31 //1:I2C1_SCL / TIM4_CH1 / USART1_TX
- #define PB7 32 //1:I2C1_SDA / TIM4_CH2 / USART1_RX
- #define PB8 33 //1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
- #define PB9 34 //1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
- #define PA0 35 //1:UART4_TX / TIM5_CH1 2:ADC123_IN0
- #define PA1 36 //1:UART4_RX / TIM5_CH2 / TIM2_CH2 2:ADC123_IN1
- #define PA2 37 //1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3 2:ADC123_IN2
- #define PA3 38 //1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4 2:ADC123_IN3
- #define PA4 39 //NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK 2:ADC12_IN4 / DAC_OUT1
- #define PA5 40 //NOT FT 1:SPI1_SCK 2:ADC12_IN5 / DAC_OUT2
- #define PA6 41 //1:SPI1_MISO / TIM13_CH1 / TIM3_CH1 2:ADC12_IN6
- #define PA7 42 //1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2 2:ADC12_IN7
- #define PB0 43 //1:TIM3_CH3 2:ADC12_IN8
- #define PB1 44 //1:TIM3_CH4 2:ADC12_IN9
- #define PC0 45 //1: 2:ADC123_IN10
- #define PC1 46 //1: 2:ADC123_IN11
- #define PC2 47 //1:SPI2_MISO 2:ADC123_IN12
- #define PC3 48 //1:SPI2_MOSI 2:ADC123_IN13
- #define PC4 49 //1: 2:ADC12_IN14
- #define PC5 50 //1: 2:ADC12_IN15
- #if STM32F4X_PIN_NUM >= 144
- #define PF3 51 //1:FSMC_A3 2:ADC3_IN9
- #define PF4 52 //1:FSMC_A4 2:ADC3_IN14
- #define PF5 53 //1:FSMC_A5 2:ADC3_IN15
- #define PF6 54 //1:TIM10_CH1 2:ADC3_IN4
- #define PF7 55 //1:TIM11_CH1 2:ADC3_IN5
- #define PF8 56 //1:TIM13_CH1 2:ADC3_IN6
- #define PF9 57 //1;TIM14_CH1 2:ADC3_IN7
- #define PF10 58 //2:ADC3_IN8
- #endif
-#endif
-#if STM32F4X_PIN_NUM >= 100 //100 pins mcu, 82 gpio
- #define PE2 (35+STM32F4X_ADC_NUM) //1:FSMC_A23
- #define PE3 (36+STM32F4X_ADC_NUM) //1:FSMC_A19
- #define PE4 (37+STM32F4X_ADC_NUM) //1:FSMC_A20
- #define PE5 (38+STM32F4X_ADC_NUM) //1:FSMC_A21
- #define PE6 (39+STM32F4X_ADC_NUM) //1:FSMC_A22
- #define PE7 (40+STM32F4X_ADC_NUM) //1:FSMC_D4
- #define PE8 (41+STM32F4X_ADC_NUM) //1:FSMC_D5
- #define PE9 (42+STM32F4X_ADC_NUM) //1:FSMC_D6 / TIM1_CH1
- #define PE10 (43+STM32F4X_ADC_NUM) //1:FSMC_D7
- #define PE11 (44+STM32F4X_ADC_NUM) //1:FSMC_D8 / TIM1_CH2
- #define PE12 (45+STM32F4X_ADC_NUM) //1:FSMC_D9
- #define PE13 (46+STM32F4X_ADC_NUM) //1:FSMC_D10 / TIM1_CH3
- #define PE14 (47+STM32F4X_ADC_NUM) //1:FSMC_D11 / TIM1_CH4
- #define PE15 (48+STM32F4X_ADC_NUM) //1:FSMC_D12
- #define PD8 (49+STM32F4X_ADC_NUM) //1:FSMC_D13 / USART3_TX
- #define PD9 (50+STM32F4X_ADC_NUM) //1:FSMC_D14 / USART3_RX
- #define PD10 (51+STM32F4X_ADC_NUM) //1:FSMC_D15
- #define PD11 (52+STM32F4X_ADC_NUM) //1:FSMC_A16
- #define PD12 (53+STM32F4X_ADC_NUM) //1:FSMC_A17 / TIM4_CH1
- #define PD13 (54+STM32F4X_ADC_NUM) //1:FSMC_A18 / TIM4_CH2
- #define PD14 (55+STM32F4X_ADC_NUM) //1:FSMC_D0 / TIM4_CH3
- #define PD15 (56+STM32F4X_ADC_NUM) //1:FSMC_D1 / TIM4_CH4
- #define PD0 (57+STM32F4X_ADC_NUM) //1:FSMC_D2
- #define PD1 (58+STM32F4X_ADC_NUM) //1:FSMC_D3
- #define PD3 (59+STM32F4X_ADC_NUM) //1:FSMC_CLK
- #define PD4 (60+STM32F4X_ADC_NUM) //1:FSMC_NOE
- #define PD5 (61+STM32F4X_ADC_NUM) //1:USART2_TX
- #define PD6 (62+STM32F4X_ADC_NUM) //1:USART2_RX
- #define PD7 (63+STM32F4X_ADC_NUM)
- #define PE0 (64+STM32F4X_ADC_NUM)
- #define PE1 (65+STM32F4X_ADC_NUM)
-#endif
-#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
- #define PF0 (66+STM32F4X_ADC_NUM) //1:FSMC_A0 / I2C2_SDA
- #define PF1 (67+STM32F4X_ADC_NUM) //1:FSMC_A1 / I2C2_SCL
- #define PF2 (68+STM32F4X_ADC_NUM) //1:FSMC_A2
- #define PF11 (69+STM32F4X_ADC_NUM)
- #define PF12 (70+STM32F4X_ADC_NUM) //1:FSMC_A6
- #define PF13 (71+STM32F4X_ADC_NUM) //1:FSMC_A7
- #define PF14 (72+STM32F4X_ADC_NUM) //1:FSMC_A8
- #define PF15 (73+STM32F4X_ADC_NUM) //1:FSMC_A9
- #define PG0 (74+STM32F4X_ADC_NUM) //1:FSMC_A10
- #define PG1 (75+STM32F4X_ADC_NUM) //1:FSMC_A11
- #define PG2 (76+STM32F4X_ADC_NUM) //1:FSMC_A12
- #define PG3 (77+STM32F4X_ADC_NUM) //1:FSMC_A13
- #define PG4 (78+STM32F4X_ADC_NUM) //1:FSMC_A14
- #define PG5 (79+STM32F4X_ADC_NUM) //1:FSMC_A15
- #define PG6 (80+STM32F4X_ADC_NUM)
- #define PG7 (81+STM32F4X_ADC_NUM)
- #define PG8 (82+STM32F4X_ADC_NUM)
- #define PG9 (83+STM32F4X_ADC_NUM) //1:USART6_RX
- #define PG10 (84+STM32F4X_ADC_NUM) //1:FSMC_NE3
- #define PG11 (85+STM32F4X_ADC_NUM)
- #define PG12 (86+STM32F4X_ADC_NUM) //1:FSMC_NE4
- #define PG13 (87+STM32F4X_ADC_NUM) //1:FSMC_A24
- #define PG14 (88+STM32F4X_ADC_NUM) //1:FSMC_A25 / USART6_TX
- #define PG15 (89+STM32F4X_ADC_NUM)
-#endif
-#if STM32F4X_PIN_NUM >= 176 //176 pins mcu, 140 gpio
- #define PI8 (90+STM32F4X_ADC_NUM)
- #define PI9 (91+STM32F4X_ADC_NUM)
- #define PI10 (92+STM32F4X_ADC_NUM)
- #define PI11 (93+STM32F4X_ADC_NUM)
- #define PH2 (94+STM32F4X_ADC_NUM)
- #define PH3 (95+STM32F4X_ADC_NUM)
- #define PH4 (96+STM32F4X_ADC_NUM) //1:I2C2_SCL
- #define PH5 (97+STM32F4X_ADC_NUM) //1:I2C2_SDA
- #define PH6 (98+STM32F4X_ADC_NUM) //1:TIM12_CH1
- #define PH7 (99+STM32F4X_ADC_NUM) //1:I2C3_SCL
- #define PH8 (100+STM32F4X_ADC_NUM) //1:I2C3_SDA
- #define PH9 (101+STM32F4X_ADC_NUM) //1:TIM12_CH2
- #define PH10 (102+STM32F4X_ADC_NUM) //1:TIM5_CH1
- #define PH11 (103+STM32F4X_ADC_NUM) //1:TIM5_CH2
- #define PH12 (104+STM32F4X_ADC_NUM) //1:TIM5_CH3
- #define PH13 (105+STM32F4X_ADC_NUM)
- #define PH14 (106+STM32F4X_ADC_NUM)
- #define PH15 (107+STM32F4X_ADC_NUM)
- #define PI0 (108+STM32F4X_ADC_NUM) //1:TIM5_CH4 / SPI2_NSS
- #define PI1 (109+STM32F4X_ADC_NUM) //1:SPI2_SCK
- #define PI2 (110+STM32F4X_ADC_NUM) //1:TIM8_CH4 /SPI2_MISO
- #define PI3 (111+STM32F4X_ADC_NUM) //1:SPI2_MOS
- #define PI4 (112+STM32F4X_ADC_NUM)
- #define PI5 (113+STM32F4X_ADC_NUM) //1:TIM8_CH1
- #define PI6 (114+STM32F4X_ADC_NUM) //1:TIM8_CH2
- #define PI7 (115+STM32F4X_ADC_NUM) //1:TIM8_CH3
-#endif
-
-// This must be a literal
-// It is used with preprocessor tests (e.g. #if NUM_DIGITAL_PINS > 3)
-// so an enum will not work.
-#define NUM_DIGITAL_PINS (STM32F4X_GPIO_NUM)
-
-// Allow to define Arduino style alias for analog input pin number --> Ax
-// If no analog pin required then NUM_ANALOG_INPUTS could not be defined
-// or set to `0`
-// All pins are digital, analog inputs are a subset of digital pins.
-// This must be a literal
-// It is used with preprocessor tests (e.g. #if NUM_ANALOG_INPUTS > 3)
-// so an enum will not work.
-// !!!
-// !!! It must be aligned with the number of analog PinName
-// !!! defined in digitalPin[] array in variant.cpp
-// !!!
-#define NUM_ANALOG_INPUTS (STM32F4X_ADC_NUM)
-
-// They are 2 possibles way to define analog pins:
-//-------------------------------------------------------------------------------------------
-// - If they are contiguous in the digitalPin array:
-// Simply defined `NUM_ANALOG_FIRST` and all pins Ax will be automatically defined.
-// It define the digital pin number of the first analog input (i.e. which digital pin is A0)
-// First analog pin value (A0) must be greater than or equal to NUM_ANALOG_INPUTS
-// This must be a literal with a value less than or equal to MAX_ANALOG_INPUTS
-// defined in pin_arduino.h
-#define NUM_ANALOG_FIRST 35
-//------------------------------------OR------------------------------------------------------
-// - If they are not contiguous in the digitalPin array:
-// Add an analogInputPin array in the variant.cpp without defining NUM_ANALOG_FIRST
-// In that case the defined PYn for analog pin have to define the Ax definition instead of
-// index in digitalPin[] array:
-// #define PA4 A14
-//-------------------------------------------------------------------------------------------
-
-
-// Below ADC and PWM definitions already done in the core
-// Could be redefined here if needed
-// ADC resolution is 10 bits
-//#define ADC_RESOLUTION 10
-
-// PWM resolution
-//#define PWM_RESOLUTION 8
-//#define PWM_FREQUENCY 1000
-//#define PWM_MAX_DUTY_CYCLE 255
-
-// On-board LED pin number
-#define LED_BUILTIN PD12
-#define LED_GREEN LED_BUILTIN
-
-// On-board user button
-//#define USER_BTN
-
-// Below SPI and I2C definitions already done in the core
-// Could be redefined here if differs from the default one
-// SPI Definitions
-#define PIN_SPI_SS 8
-#define PIN_SPI_MOSI 11
-#define PIN_SPI_MISO 10
-#define PIN_SPI_SCK 9
-
-// I2C Definitions
-#define PIN_WIRE_SDA 7
-#define PIN_WIRE_SCL 6
-
-// I2C timing definitions (optional), avoid time spent to compute if defined
-// * I2C_TIMING_SM for Standard Mode (100kHz)
-// * I2C_TIMING_FM for Fast Mode (400kHz)
-// * I2C_TIMING_FMP for Fast Mode Plus (1000kHz)
-//#define I2C_TIMING_SM 0x00000000
-//#define I2C_TIMING_FM 0x00000000
-//#define I2C_TIMING_FMP 0x00000000
-
-// Timer Definitions (optional)
-// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
-#define TIMER_TONE TIM6
-#define TIMER_SERIAL TIM7
-
-// Do not use basic timer: OC is required
-#define TIMER_SERVO TIM2 //TODO: advanced-control timers don't work
-
-// UART Definitions
-// Define here Serial instance number to map on Serial generic name
-#define SERIAL_UART_INSTANCE 1 //ex: 2 for Serial2 (USART2)
-// DEBUG_UART could be redefined to print on another instance than 'Serial'
-//#define DEBUG_UART ((USART_TypeDef *) U(S)ARTX) // ex: USART3
-// DEBUG_UART baudrate, default: 9600 if not defined
-//#define DEBUG_UART_BAUDRATE x
-// DEBUG_UART Tx pin name, default: the first one found in PinMap_UART_TX for DEBUG_UART
-//#define DEBUG_PINNAME_TX PX_n // PinName used for TX
-
-// Default pin used for 'Serial' instance (ex: ST-Link)
-// Mandatory for Firmata
-#define PIN_SERIAL_RX PA10
-#define PIN_SERIAL_TX PA9
-
-// Optional PIN_SERIALn_RX and PIN_SERIALn_TX where 'n' is the U(S)ART number
-// Used when user instanciate a hardware Serial using its peripheral name.
-// Example: HardwareSerial mySerial(USART3);
-// will use PIN_SERIAL3_RX and PIN_SERIAL3_TX if defined.
-//#define PIN_SERIALn_RX x // For U(S)ARTn RX
-//#define PIN_SERIALn_TX x // For U(S)ARTn TX
-//#define PIN_SERIALLP1_RX x // For LPUART1 RX
-//#define PIN_SERIALLP1_TX x // For LPUART1 TX
-
-// SD card slot Definitions
-// SD detect signal can be defined if required
-#define SD_DETECT_PIN PD3
-// SD Read/Write timeout, default value defined in STM32SD library
-//#define SD_DATATIMEOUT x
-
-// USB Vbus sensing. Require to have Vbus pin connected to Vbus signal.
-// Warning, pin is different depending on FullSpeed or High Speed mode used
-// See AN4879 https://www.st.com/content/st_com/en/search.html#q=AN4879-t=resources-page=1
-//#define USBD_VBUS_DETECTION_ENABLE
-
-// If the board has external USB pullup (on DP/DM depending on speed)
-// that can be controlled using a GPIO pin, define these:
-// - If the the pullup is disabled (USB detached) by default, define
-// USBD_ATTACH_PIN to the pin that, when written to
-// USBD_ATTACH_LEVEL, attaches the pullup.
-// - If the the pullup is enabled (attached) by default, define
-// USBD_DETACH_PIN to the pin that, when written to
-// USBD_DETACH_LEVEL, detaches the pullup.
-//#define USBD_ATTACH_PIN x
-//#define USBD_ATTACH_LEVEL LOW
-//#define USBD_DETACH_PIN x
-//#define USBD_DETACH_LEVEL LOW
-//
-// This indicates that there is an external and fixed 1.5k pullup
-// on the D+ line. This define is not normally needed, since a
-// fixed pullup is assumed by default. It is only required when
-// the USB peripheral has an internal pullup *and* an external
-// fixed pullup is present (which is actually a hardware bug, since just
-// the internal pullup is sufficient and having two pullups violates the
-// USB specification). In this case, defining this forces
-// the "write D+ LOW"-trick to be used. In the future, it might also
-// disable the internal pullups, but this is not currently implemented.
-// #define USBD_FIXED_PULLUP
-#ifdef __cplusplus
-} // extern "C"
-#endif
-/*----------------------------------------------------------------------------
- * Arduino objects - C++ only
- *----------------------------------------------------------------------------*/
-
-#ifdef __cplusplus
- // These serial port names are intended to allow libraries and architecture-neutral
- // sketches to automatically default to the correct port name for a particular type
- // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
- // the first hardware serial port whose RX/TX pins are not dedicated to another use.
- //
- // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
- //
- // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
- //
- // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
- //
- // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
- //
- // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
- // pins are NOT connected to anything by default.
- #define SERIAL_PORT_MONITOR Serial
- #define SERIAL_PORT_HARDWARE Serial1
-#endif
diff --git a/platformio.ini b/platformio.ini
index 5f2f98812442..0440148f3d73 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -1247,21 +1247,22 @@ extra_scripts = ${common.extra_scripts}
# Comment out board_build.offset = 0x10000 if you don't plan to use OpenBLT/flashing directly to 0x08000000.
#
[env:Anet_ET4_OpenBLT]
-#build_type = debug
-#debug_build_flags = -O0 -ggdb3 -g3
-platform = ${common_stm32.platform}
-extends = common_stm32
-board = ANET_ET4
-board_build.offset = 0x10000
-build_flags = ${common_stm32.build_flags}
- -DDISABLE_GENERIC_SERIALUSB
- -DSTM32F407VG -DARDUINO_ARCH_STM32 -DTARGET_STM32F4
-build_unflags = ${common_stm32.build_unflags}
- -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
-extra_scripts = ${common.extra_scripts}
- pre:buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py
+platform = ${common_stm32.platform}
+extends = common_stm32
+build_flags = ${common_stm32.build_flags} -DHAL_SD_MODULE_ENABLED -DHAL_SRAM_MODULE_ENABLED
+board = genericSTM32F407VGT6
+board_build.core = stm32
+board_build.variant = MARLIN_F4x7Vx
+board_build.ldscript = ldscript.ld
+board_build.firmware = firmware.srec
+board_build.offset = 0x10000
+board_upload.offset_address = 0x08010000
+build_unflags = ${common_stm32.build_unflags} -DUSBCON -DUSBD_USE_CDC -DUSBD_VID=0x0483
+debug_tool = jlink
+upload_protocol = jlink
+extra_scripts = ${common.extra_scripts}
+ pre:buildroot/share/PlatformIO/scripts/generic_create_variant.py
buildroot/share/PlatformIO/scripts/stm32_bootloader.py
- buildroot/share/PlatformIO/scripts/anet_et4.py
#
# BigTreeTech SKR Pro (STM32F407ZGT6 ARM Cortex-M4)
From 0738f1bfb84d01571e94bf8cc67501f17a069bf5 Mon Sep 17 00:00:00 2001
From: Victor Mateus Oliveira
Date: Mon, 21 Dec 2020 01:20:58 -0300
Subject: [PATCH 29/29] the endian byte inversion is for all 8 bit interfaces
(currently, only fsmc 8 bit)
---
Marlin/src/lcd/tft/tft.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Marlin/src/lcd/tft/tft.h b/Marlin/src/lcd/tft/tft.h
index 994cd36c9840..159d0e1c196d 100644
--- a/Marlin/src/lcd/tft/tft.h
+++ b/Marlin/src/lcd/tft/tft.h
@@ -30,7 +30,8 @@
#include "../../inc/MarlinConfig.h"
-#if IS_ANET_ET
+#if TFT_INTERFACE_FSMC_8BIT
+ // When we have a 8 bit interface, we need to invert the bytes of the color
#define ENDIAN_COLOR(C) (((C) >> 8) | ((C) << 8))
#else
#define ENDIAN_COLOR(C) (C)