Qemu virt smp #1820
Qemu virt smp #1820
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Due to #1821 the CI status is incorrect. There is a compile-time assert with |
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core/arch/arm/plat-vexpress/main.c
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| @@ -180,3 +188,36 @@ static TEE_Result init_tzc400(void) | |||
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| service_init(init_tzc400); | |||
| #endif /*CFG_TZC400*/ | |||
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| #if defined(PLATFORM_FLAVOR_qemu_virt) | |||
| int psci_cpu_on(uint32_t core_idx, uint32_t entry, uint32_t context_id __unused) | |||
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Minor: I suggest cpu_id rather than core_idx because this is not an index (I know this name is used in some platform code, but the common code uses cpu_id which IMO is better).
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| sec_entry_addrs[pos] = CFG_TEE_RAM_START; | ||
| dsb_ishst(); | ||
| sev(); |
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Would it work with a single call to dsb_ishst()? I mean:
ns_entry_addrs[pos] = entry;
sec_entry_addrs[pos] = CFG_TEE_RAM_START;
dsb_ishst();
sev();There was a problem hiding this comment.
I guess it would but it's more correct to make sure that the updated value of sec_entry_addrs[pos] can't be read before ns_entry_addrs[pos].
The second write will release core from the loop at https://github.com/linaro-swg/bios_qemu_tz_arm/blob/master/bios/entry.S#L139
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As I wrote above: |
reset_secondary() and dependencies has to be unpaged as most of it is executed before the core has been properly configured to use the pager. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Initialize GIC on secondary cores if not configured with ARM-TF. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Changes number of supported cores for variant qemu_virt to 4. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
If configured with device tree and PSCI update the FDT with PSCI nodes and other information needed by the kernel to start up the secondary cores. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Enables SMP boot of the plat-vexpress qemu_virt flavor. This includes PSCI support and coherent memory shared with bios. Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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Enables SMP for QEMU virt.
To be able to start qemu with
-smp 4https://github.com/jenswi-linaro/bios_qemu_tz_arm/tree/smp is needed. This however depends on some patches in linaro-swg/bios_qemu_tz_arm#13. I'll create another bios PR once linaro-swg/bios_qemu_tz_arm#13 is merged. In the meantime, please review this.