From b5027c58a22447bc005f1a1bef0c795550b1e288 Mon Sep 17 00:00:00 2001 From: "Andrew F. Davis" Date: Sat, 19 Aug 2017 02:34:12 +0000 Subject: [PATCH] plat-ti: Configure and enable Secure Data Path by default Enable SDP by default on TI platforms and reserve 4 MiB from the end of the TZDRAM area that is already reserved for OP-TEE and firewalled. Signed-off-by: Andrew F. Davis Acked-by: Etienne Carriere Acked-by: Jerome Forissier --- core/arch/arm/plat-ti/conf.mk | 7 +++++++ core/arch/arm/plat-ti/platform_config.h | 11 ++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/core/arch/arm/plat-ti/conf.mk b/core/arch/arm/plat-ti/conf.mk index 6cfbbe30c9a..250a0a20f79 100644 --- a/core/arch/arm/plat-ti/conf.mk +++ b/core/arch/arm/plat-ti/conf.mk @@ -3,6 +3,13 @@ PLATFORM_FLAVOR ?= dra7xx CFG_WITH_STACK_CANARIES ?= y CFG_WITH_STATS ?= y CFG_WITH_SOFTWARE_PRNG ?= n +CFG_SECURE_DATA_PATH ?= y + +ifeq ($(CFG_SECURE_DATA_PATH),y) +CFG_TEE_SDP_MEM_SIZE ?= 0x00400000 +else +CFG_TEE_SDP_MEM_SIZE ?= 0x0 +endif $(call force,CFG_8250_UART,y) $(call force,CFG_ARM32_core,y) diff --git a/core/arch/arm/plat-ti/platform_config.h b/core/arch/arm/plat-ti/platform_config.h index d9f4556892c..df696ece19c 100644 --- a/core/arch/arm/plat-ti/platform_config.h +++ b/core/arch/arm/plat-ti/platform_config.h @@ -153,9 +153,18 @@ #endif /* CFG_WITH_PAGER */ +#if defined(CFG_SECURE_DATA_PATH) +/* Locate SDP memory at the end of TZDRAM */ +#define CFG_TEE_SDP_MEM_BASE (TZDRAM_BASE + \ + TZDRAM_SIZE - \ + CFG_TEE_SDP_MEM_SIZE) +#endif + #define CFG_TA_RAM_START ROUNDUP((TZDRAM_BASE + CFG_TEE_RAM_VA_SIZE), \ CORE_MMU_DEVICE_SIZE) -#define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \ + +#define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE) - \ + CFG_TEE_SDP_MEM_SIZE, \ CORE_MMU_DEVICE_SIZE) /* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */