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Fixed adc config, to read internal reference voltage to get cpu temperature #13152
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Looks good. Do you have plans to expose this somewhere it can be logged? |
boards/px4/fmu-v5/src/board_config.h
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@@ -260,6 +260,8 @@ | |||
#define ADC_HW_REV_SENSE_CHANNEL /* PC3 */ ADC1_CH(13) | |||
#define ADC1_SPARE_1_CHANNEL /* PC4 */ ADC1_CH(14) | |||
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#define ADC_INTERNAL_TEMP_SENSOR_CHANNEL (18) /* No Gpio assigned, internal channel*/ |
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nit - Comment is missing trailing space
I think we should look at putting this in <px4_platform/adc.h>
This is a chip dependent as to what ADC and what channel and is not not a board attribute.
F4:
Temperature sensor, VREFINT and VBAT internal channels
• For the STM32F40x and STM32F41x devices, the temperature sensor is internally
connected to channel ADC1_IN16.
The internal reference voltage VREFINT is connected to ADC1_IN17.
• For the STM32F42x and STM32F43x devices, the temperature sensor is internally
connected to ADC1_IN18 channel which is shared with VBAT. Only one conversion,
temperature sensor or VBAT, must be selected at a time. When the temperature sensor
and VBAT conversion are set simultaneously, only the VBAT conversion is performed.
The internal reference voltage VREFINT is connected to ADC1_IN17.
The VBAT channel (connected to channel ADC1_IN18) can also be converted as an injected
or regular channel.
Note: The temperature sensor, VREFINT and the VBAT channel are available only on the master
ADC1 peripheral
F7:
• The temperature sensor is internally connected to ADC1_IN18 channel which is shared
with VBAT. Only one conversion, temperature sensor or VBAT, must be selected at a
time. When the temperature sensor and VBAT conversion are set simultaneously, only
the VBAT conversion is performed.
The internal reference voltage VREFINT is connected to ADC1_IN17.
The VBAT channel is connected to ADC1_IN18 channel. It can also be converted as an
injected or regular channel.
H7:
The ADCs are connected to 5 internal analog inputs:
– the internal temperature sensor (VSENSE) is connected to ADC3 VINP/VINN[18]
– the internal reference voltage (VREFINT) is connected to ADC3 VINP/VINN[19]
– the VBAT monitoring channel (VBAT/4) is connected to ADC3 VINP/VINN[17]
– DAC internal channel 1, connected to ADC2 VINP/VINN[16]
This issue has been automatically marked as stale because it has not had recent activity. Thank you for your contributions. |
This issue has been automatically marked as stale because it has not had recent activity. Thank you for your contributions. |
Needs a rebase. |
Next steps
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Rebased, thanks to @dinomani for the nice collaboration 👍 |
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This is the composition: BOARD has CHIP, CHIP has ADC
Once the board select the chip the the ADC should be configured.
Since this is an attribute of the SoC it goes in the micro hal.
If it is in all micro hal's, then the Top of file #if !defined
goes away.
@@ -237,7 +237,7 @@ uint32_t px4_arch_adc_temp_sensor_mask() | |||
{ | |||
#ifdef ADC_INTERNAL_TEMP_SENSOR_CHANNEL |
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Please consider this:
Top of File
#if !defined(ADC_INTERNAL_TEMP_SENSOR_CHANNEL)
# define ADC_INTERNAL_TEMP_SENSOR_CHANNEL 16
#end
in code
return 1 << ADC_INTERNAL_TEMP_SENSOR_CHANNEL;
In micro_hal for IC
#define ADC_INTERNAL_TEMP_SENSOR_CHANNEL nn
Can we get the data captured somewhere so it can actually be monitored? Either added to Line 3 in f45b67a
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@dinomani Could you please take the review comments into consideration? Let's wrap this up and get your fix in! |
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@dinomani do you have any updates on this PR, do you have time to continue working on this feature or would you rather someone from the team help you take this to the finish line? |
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@dinomani See in line - I am assuming the updates we discussed on the call today are coming. If not, let me know and I can can finish this.
@@ -65,5 +65,6 @@ int stm32h7_flash_lock(size_t addr); | |||
int stm32h7_flash_unlock(size_t addr); | |||
int stm32h7_flash_writeprotect(size_t block, bool enabled); | |||
#define stm32_flash_lock() stm32h7_flash_lock(PX4_FLASH_BASE) | |||
#define APX4_ADC_INTERNAL_TEMP_SENSOR_CHANNEL 17 //Valid for ADC3 on H7x3 |
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Once this is corrected and the code to support it is added this should come in.
@dagar said add the temperature to top
for the next PR. From there as a subcategory of system integrity like we discussed today.
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I was talking about either ORB_ID(cpuload)
or a new standalone topic (if there's more relevant data).
PX4-Autopilot/src/modules/load_mon/LoadMon.cpp
Lines 220 to 229 in 3ad0da5
cpuload.load = interval_spent_time / interval; | |
#elif defined(__PX4_NUTTX) | |
// get ram usage | |
struct mallinfo mem = mallinfo(); | |
cpuload.ram_usage = (float)mem.uordblks / mem.arena; | |
cpuload.load = 1.f - interval_idletime / interval; | |
#endif | |
cpuload.timestamp = hrt_absolute_time(); | |
_cpuload_pub.publish(cpuload); |
@@ -65,6 +65,8 @@ int stm32h7_flash_lock(size_t addr); | |||
int stm32h7_flash_unlock(size_t addr); | |||
int stm32h7_flash_writeprotect(size_t block, bool enabled); | |||
#define stm32_flash_lock() stm32h7_flash_lock(PX4_FLASH_BASE) | |||
#define APX4_ADC_INTERNAL_TEMP_SENSOR_CHANNEL 17 //Valid for ADC3 on H7x3 | |||
#define PX4_ADC_ADC3_CHANNEL_OFFSET 7 |
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This is artificial. We should just compare for == PX4_ADC_INTERNAL_TEMP_SENSOR_CHANNEL
platforms/nuttx/src/px4/stm/stm32h7/include/px4_arch/micro_hal.h
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@dinomani - Thank you
one delete
…channels were verified with ST_CUBE header files. For the H7 its a simplification for the current used H7x3. Other devices in that family expect the temperarture on channel 18. F1: channel 16 F3: channel 16 F4: channel 18 F7: channel 18 H7: channel 17, on STMf32Hx3
Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
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Tested on fmuv5, reading channel 18 gives now plausible values.