diff --git a/orchagent/portsorch.cpp b/orchagent/portsorch.cpp index 68028e2c21..ce6f117f7d 100755 --- a/orchagent/portsorch.cpp +++ b/orchagent/portsorch.cpp @@ -468,6 +468,7 @@ PortsOrch::PortsOrch(DBConnector *db, DBConnector *stateDb, vectorfirst) == m_availablePortSet.end()) + { + string tmp_lane_str = ""; + for (auto s : it->first) + { + tmp_lane_str += to_string(s) + " "; + } + tmp_lane_str = tmp_lane_str.substr(0, tmp_lane_str.size() - 1); + + SWSS_LOG_WARN("The lane set %s isn't available in ASIC", tmp_lane_str.c_str()); + it++; + continue; + } + if (m_portListLaneMap.find(it->first) == m_portListLaneMap.end()) { if (!addPort(it->first, get<1>(it->second), get<2>(it->second), get<3>(it->second))) diff --git a/orchagent/portsorch.h b/orchagent/portsorch.h index 9ae26242ce..60dbc381a8 100755 --- a/orchagent/portsorch.h +++ b/orchagent/portsorch.h @@ -213,8 +213,11 @@ class PortsOrch : public Orch, public Subject port_config_state_t m_portConfigState = PORT_CONFIG_MISSING; sai_uint32_t m_portCount; + // m_portListLaneMap is the current enabled port list map, sai_object_id_t> m_portListLaneMap; map, tuple> m_lanesAliasSpeedMap; + // m_availablePortSet is the available port list read from ASIC by SAI + set> m_availablePortSet; map m_portList; unordered_map m_portOidToIndex; map m_port_ref_count;