From 6c9f0e837d93246682b3e2a3d6698cf7490bf488 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joakim=20Nohlg=C3=A5rd?= <joakim.nohlgard@eistec.se>
Date: Mon, 5 Jun 2017 08:30:52 +0200
Subject: [PATCH] squash PIT combined

---
 boards/frdm-kw41z/include/periph_conf.h |  1 -
 cpu/kinetis_common/isr_kinetis.c        |  1 +
 cpu/kinetis_common/periph/timer.c       | 16 ++++++++++++++++
 3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/boards/frdm-kw41z/include/periph_conf.h b/boards/frdm-kw41z/include/periph_conf.h
index baa4a83b0720f..1d2fb57b9081b 100644
--- a/boards/frdm-kw41z/include/periph_conf.h
+++ b/boards/frdm-kw41z/include/periph_conf.h
@@ -65,7 +65,6 @@ extern "C"
 #define TIMER_NUMOF             ((PIT_NUMOF) + (LPTMR_NUMOF))
 
 #define PIT_BASECLOCK           (CLOCK_BUSCLOCK)
-#define PIT_ISR_0               isr_pit
 #define LPTMR_ISR_0             isr_lptmr0
 
 /** @} */
diff --git a/cpu/kinetis_common/isr_kinetis.c b/cpu/kinetis_common/isr_kinetis.c
index 8dbceb52c286b..10d60a9ee542d 100644
--- a/cpu/kinetis_common/isr_kinetis.c
+++ b/cpu/kinetis_common/isr_kinetis.c
@@ -111,6 +111,7 @@ WEAK_DEFAULT void isr_ltc(void);
 WEAK_DEFAULT void isr_mcg(void);
 WEAK_DEFAULT void isr_mcm(void);
 WEAK_DEFAULT void isr_pdb0(void);
+WEAK_DEFAULT void isr_pit(void);
 WEAK_DEFAULT void isr_pit0(void);
 WEAK_DEFAULT void isr_pit1(void);
 WEAK_DEFAULT void isr_pit2(void);
diff --git a/cpu/kinetis_common/periph/timer.c b/cpu/kinetis_common/periph/timer.c
index 47ce3b36d16c1..2deb17661fd6c 100644
--- a/cpu/kinetis_common/periph/timer.c
+++ b/cpu/kinetis_common/periph/timer.c
@@ -724,6 +724,22 @@ void timer_stop(tim_t dev)
 
 /* ****** ISR instances ****** */
 
+void isr_pit(void)
+{
+    /* Some of the lower end Kinetis CPUs combine the individual PIT interrupt
+     * flags into a single NVIC IRQ signal. This means that software needs to
+     * test which timer(s) went off when an IRQ occurs. */
+    for (size_t i = 0; i < PIT_NUMOF; ++i) {
+        if (PIT->CHANNEL[pit_config[i].count_ch].TCTRL & PIT_TCTRL_TIE_MASK) {
+            /* Interrupt is enabled */
+            if (PIT->CHANNEL[pit_config[i].count_ch].TFLG) {
+                /* Timer interrupt flag is set */
+                pit_irq_handler(_pit_tim_t(i));
+            }
+        }
+    }
+}
+
 #ifdef PIT_ISR_0
 void PIT_ISR_0(void)
 {