make: use of immediate value of variables before they have their final value #8913
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Labels
Area: build system
Area: Build system
Type: bug
The issue reports a bug / The PR fixes a bug (including spelling errors)
Type: cleanup
The issue proposes a clean-up / The PR cleans-up parts of the codebase / documentation
Type: tracking
The issue tracks and organizes the sub-tasks of a larger effort
Description
Some makefiles use variables with their immediate value before they get the final one.
It's not problematic for build flags but for variables containing files/path.
The root of the problem is that the makefiles do not follow a pattern of defining all variables first/including sub makefiles, and then only after define the rules using the variables as file target or file dependency.
This issue will be the central one to reference sub pull requests to fix this uses.
Debugging
The problem can be seen by using
$(info debug VARIABLE $(VARIABLE))
before usage.TODO list:
PKG_BUILDDIR
board/cpu Makefile.include
Some boards and cpus Makefile.include have different behaviors depending on the modules.
However, modules dependencies are only resolved after including these files.
Some even include
Makefile.dep
to fix issues (other for no reason)https://github.com/RIOT-OS/RIOT/blob/master/boards/common/nrf52xxxdk/Makefile.include#L21-L27
Dependencies need to be processed before including any other
Makefile.include
.Also referenced in #9811
pkg/
PKG_BUILDDIR
Some packages makefile use
$(PKG_BUILDDIR)
with its immediate value when defining targets before it is defined by includingpkg/pkg.mk
.It is mitigated because then they are treated as non file targets, and because the command repeats the variable and does not use the automatic make variables like
$@
. #8509 (comment)Done
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