From 9e4c2a68cd2de2853ab9843e57d1d75a68f40996 Mon Sep 17 00:00:00 2001 From: alistair Date: Wed, 13 Jul 2022 00:47:12 +0000 Subject: [PATCH 1/8] fix lognot --- plugins/arm/semantics/aarch64-vector.lisp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/plugins/arm/semantics/aarch64-vector.lisp b/plugins/arm/semantics/aarch64-vector.lisp index 4ac16dc38..7e8d512ea 100644 --- a/plugins/arm/semantics/aarch64-vector.lisp +++ b/plugins/arm/semantics/aarch64-vector.lisp @@ -79,15 +79,15 @@ (defun EORv16i8 (vd vn vm) (set$ vd (logxor vn vm))) ;; the ISA says NOT acts element-wise, but this is -;; equivalent to just (lognot vn). Not sure why it does this. -(defun NOTv8i8 (vd vn) (set$ vd (lognot vn))) -(defun NOTv16i8 (vd vn) (set$ vd (lognot vn))) +;; equivalent to just (lnot vn). Not sure why it does this. +(defun NOTv8i8 (vd vn) (set$ vd (lnot vn))) +(defun NOTv16i8 (vd vn) (set$ vd (lnot vn))) (defun ORRv8i8 (vd vn vm) (set$ vd (logor vn vm))) (defun ORRv16i8 (vd vn vm) (set$ vd (logor vn vm))) -(defun ORNv8i8 (vd vn vm) (set$ vd (logor vn (lognot vm)))) -(defun ORNv16i8 (vd vn vm) (set$ vd (logor vn (lognot vm)))) +(defun ORNv8i8 (vd vn vm) (set$ vd (logor vn (lnot vm)))) +(defun ORNv16i8 (vd vn vm) (set$ vd (logor vn (lnot vm)))) ;;; INS From 4a64053efbefe4ee3615d99fc1cef69007273828 Mon Sep 17 00:00:00 2001 From: alistair Date: Wed, 13 Jul 2022 00:51:30 +0000 Subject: [PATCH 2/8] add SMADDL --- plugins/arm/semantics/aarch64-arithmetic.lisp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/plugins/arm/semantics/aarch64-arithmetic.lisp b/plugins/arm/semantics/aarch64-arithmetic.lisp index 59478ee35..4c1139370 100644 --- a/plugins/arm/semantics/aarch64-arithmetic.lisp +++ b/plugins/arm/semantics/aarch64-arithmetic.lisp @@ -98,6 +98,8 @@ (defun UMADDLrrr (rd rn rm ra) (set$ rd (cast-low 64 (+ ra (* rn rm))))) +(defun SMADDLrrr (rd rn rm ra) (set$ rd (cast-signed 64 (+ ra (* (cast-signed 64 rn) (cast-signed 64 rm)))))) + (defun UMULHrr (rd rn rm) "multiplies rn and rm together and stores the high 64 bits of the resulting 128-bit value to the register rd" From e5dac8648fb196c65b088476a1b3e782630bf72d Mon Sep 17 00:00:00 2001 From: alistair Date: Wed, 13 Jul 2022 01:39:43 +0000 Subject: [PATCH 3/8] add LDURHH,LDURSB,LDURSH,LDURSW --- .../arm/semantics/aarch64-data-movement.lisp | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/plugins/arm/semantics/aarch64-data-movement.lisp b/plugins/arm/semantics/aarch64-data-movement.lisp index dac5aa466..e11734214 100644 --- a/plugins/arm/semantics/aarch64-data-movement.lisp +++ b/plugins/arm/semantics/aarch64-data-movement.lisp @@ -173,6 +173,37 @@ "(LDURBBi wt base simm) loads a byte from the address calculated from a base register and signed immediate offset and stores it in the 32 bit destination register. NOTE: does not HaveMTE2Ext(), SetTagCheckedInstruction(), CheckSPAlignment()" (setw wt (load-byte (+ base simm)))) +;; LDURH + +(defun LDURHHi (rt rn simm) + (setw rt (cast-unsigned 32 (load-dbyte (+ rn simm))))) + +;; LDURSB + +(defun LDURSBWi (rt rn simm) + "LDURSBWi loads a byte from the address (rn + simm) and sign-extends it to write it to rt" + (setw rt (cast-signed 32 (load-byte (+ rn simm))))) + +(defun LDURSBXi (rt rn simm) + "LDURSBXi loads a byte from the address (rn + simm) and sign-extends it to write it to rt" + (set$ rt (cast-signed 64 (load-byte (+ rn simm))))) + +;; LDURSH + +(defun LDURSHWi (rt rn simm) + "LDURSBWi loads a halfword from the address (rn + simm) and sign-extends it to write it to rt" + (setw rt (cast-signed 32 (load-dbyte (+ rn simm))))) + +(defun LDURSHXi (rt rn simm) + "LDURSBXi loads a halfword from the address (rn + simm) and sign-extends it to write it to rt" + (set$ rt (cast-signed 64 (load-dbyte (+ rn simm))))) + +;; LDURSW + +(defun LDURSWi (rt rn simm) + "LDURSBXi loads a word from the address (rn + simm) and sign-extends it to write it to rt" + (set$ rt (cast-signed 64 (load-hword (+ rn simm))))) + ;; LDUR (defmacro LDUR*i (rt base simm setf mem-load) From a6e5d61b393137152424490676b211f5e20151a5 Mon Sep 17 00:00:00 2001 From: alistair Date: Wed, 13 Jul 2022 01:46:47 +0000 Subject: [PATCH 4/8] redo brk --- plugins/arm/semantics/aarch64-special.lisp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plugins/arm/semantics/aarch64-special.lisp b/plugins/arm/semantics/aarch64-special.lisp index fff10893e..6cae908eb 100644 --- a/plugins/arm/semantics/aarch64-special.lisp +++ b/plugins/arm/semantics/aarch64-special.lisp @@ -26,4 +26,4 @@ (intrinsic 'undefined-instruction)) (defun BRK (option) - (intrinsic (symbol-concat 'software-breakpoint- (bitvec-to-symbol option '0x)))) + (intrinsic 'software-breakpoint option)) From a4247fafb60ffacf4a002464f6d243e248ea6f4d Mon Sep 17 00:00:00 2001 From: alistair Date: Wed, 13 Jul 2022 01:52:43 +0000 Subject: [PATCH 5/8] add UMSUBL --- plugins/arm/semantics/aarch64-arithmetic.lisp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/plugins/arm/semantics/aarch64-arithmetic.lisp b/plugins/arm/semantics/aarch64-arithmetic.lisp index 4c1139370..f8b073202 100644 --- a/plugins/arm/semantics/aarch64-arithmetic.lisp +++ b/plugins/arm/semantics/aarch64-arithmetic.lisp @@ -100,6 +100,8 @@ (defun SMADDLrrr (rd rn rm ra) (set$ rd (cast-signed 64 (+ ra (* (cast-signed 64 rn) (cast-signed 64 rm)))))) +(defun UMSUBLrrr (rd rn rm ra) (set$ rd (cast-low 64 (- ra (* (cast-signed 64 rn) (cast-signed 64 rm)))))) + (defun UMULHrr (rd rn rm) "multiplies rn and rm together and stores the high 64 bits of the resulting 128-bit value to the register rd" From ec0fa99aae9684c44e0328f1b0f57c5622a46e88 Mon Sep 17 00:00:00 2001 From: alistair Date: Wed, 13 Jul 2022 01:54:15 +0000 Subject: [PATCH 6/8] add SMSUBL --- plugins/arm/semantics/aarch64-arithmetic.lisp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/plugins/arm/semantics/aarch64-arithmetic.lisp b/plugins/arm/semantics/aarch64-arithmetic.lisp index f8b073202..634fe82a1 100644 --- a/plugins/arm/semantics/aarch64-arithmetic.lisp +++ b/plugins/arm/semantics/aarch64-arithmetic.lisp @@ -102,6 +102,9 @@ (defun UMSUBLrrr (rd rn rm ra) (set$ rd (cast-low 64 (- ra (* (cast-signed 64 rn) (cast-signed 64 rm)))))) + +(defun SMSUBLrrr (rd rn rm ra) (set$ rd (cast-signed 64 (- ra (* (cast-signed 64 rn) (cast-signed 64 rm)))))) + (defun UMULHrr (rd rn rm) "multiplies rn and rm together and stores the high 64 bits of the resulting 128-bit value to the register rd" From 6bf46bdac6f036578a0fc6e8b26627bc6798249c Mon Sep 17 00:00:00 2001 From: alistair Date: Wed, 13 Jul 2022 03:36:51 +0000 Subject: [PATCH 7/8] add RBIT --- plugins/arm/semantics/aarch64-arithmetic.lisp | 1 - plugins/arm/semantics/aarch64-helper.lisp | 5 +++++ plugins/arm/semantics/aarch64-logical.lisp | 3 +++ 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/plugins/arm/semantics/aarch64-arithmetic.lisp b/plugins/arm/semantics/aarch64-arithmetic.lisp index 634fe82a1..7632eab0d 100644 --- a/plugins/arm/semantics/aarch64-arithmetic.lisp +++ b/plugins/arm/semantics/aarch64-arithmetic.lisp @@ -102,7 +102,6 @@ (defun UMSUBLrrr (rd rn rm ra) (set$ rd (cast-low 64 (- ra (* (cast-signed 64 rn) (cast-signed 64 rm)))))) - (defun SMSUBLrrr (rd rn rm ra) (set$ rd (cast-signed 64 (- ra (* (cast-signed 64 rn) (cast-signed 64 rm)))))) (defun UMULHrr (rd rn rm) diff --git a/plugins/arm/semantics/aarch64-helper.lisp b/plugins/arm/semantics/aarch64-helper.lisp index 58736b35d..d4cf40550 100644 --- a/plugins/arm/semantics/aarch64-helper.lisp +++ b/plugins/arm/semantics/aarch64-helper.lisp @@ -9,6 +9,11 @@ (defun word () (word-width)) +(defun reverse-bits (bits) + (if (> (word-width bits) 1) + (concat (cast-low 1 bits) (reverse-bits (cast-high (- (word-width bits) 1) bits))) + bits)) + (defun shift-encoded (rm off) "(shift-encoded rm off) decodes the 8-bit shift value into its type and offset, and shifts rm accordingly." diff --git a/plugins/arm/semantics/aarch64-logical.lisp b/plugins/arm/semantics/aarch64-logical.lisp index 094d02221..7969c8552 100644 --- a/plugins/arm/semantics/aarch64-logical.lisp +++ b/plugins/arm/semantics/aarch64-logical.lisp @@ -146,3 +146,6 @@ (defun RORVXr (rd rn rm) (SHIFT*r set$ rotate-right 64 rd rn rm)) (defun RORVWr (rd rn rm) (SHIFT*r setw rotate-right 32 rd rn rm)) + +(defun RBITXr (rd rn) (set$ rd (reverse-bits rn))) +(defun RBITWr (rd rn) (setw rd (reverse-bits rn))) From 5ff9426e4e4d041481c1842956ffb59593a7ee9c Mon Sep 17 00:00:00 2001 From: alistair Date: Wed, 20 Jul 2022 02:31:49 +0000 Subject: [PATCH 8/8] make RBIT bil better --- plugins/arm/semantics/aarch64-helper.lisp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/plugins/arm/semantics/aarch64-helper.lisp b/plugins/arm/semantics/aarch64-helper.lisp index d4cf40550..0ef4459f9 100644 --- a/plugins/arm/semantics/aarch64-helper.lisp +++ b/plugins/arm/semantics/aarch64-helper.lisp @@ -9,10 +9,13 @@ (defun word () (word-width)) +(defun _reverse-bits (bits i) + (if (> i 0) + (concat (_reverse-bits bits (- i 1)) (select i bits)) + (select i bits))) + (defun reverse-bits (bits) - (if (> (word-width bits) 1) - (concat (cast-low 1 bits) (reverse-bits (cast-high (- (word-width bits) 1) bits))) - bits)) + (_reverse-bits bits (- (word-width bits) 1))) (defun shift-encoded (rm off) "(shift-encoded rm off) decodes the 8-bit shift value