No UART output on unsupported board

[machdyne]

Hi. I've been trying to port RISCBoy to the Riegel FPGA computer without much luck so far.

I'm wondering if this repo is still supposed to be in a working state as I had to change a reference from hazard5_cpu to hazard5_cpu_1port to get it to build.

With the nextpnr --placer sa option it seems to be hanging here:

nextpnr-ice40 -- Next Generation Place and Route (Version nextpnr-0.3-31-g997af6d7)
Info: Creating initial placement for remaining 4287 cells.
Info:   initial placement placed 500/4287 cells
Info:   initial placement placed 1000/4287 cells
Info:   initial placement placed 1500/4287 cells
Info:   initial placement placed 2000/4287 cells
Info:   initial placement placed 2500/4287 cells

Or maybe I'm not being patient enough. I was able to get it to build with the heap placer and blinky works but I'm not seeing anything on the UART. Unfortunately I don't have any of the supported boards to test this on. Any tips would be appreciated.

The fork with (non-working) Riegel support is here: https://github.com/machdyne/RISCBoy

[Wren6991]

Yes I think this repo has suffered from the fact that the "tests" for libfpga live here, and I possibly bumped libfpga at some point without re-running the RISCBoy system-level tests. Let's see if I can find anything obvious.

[Wren6991]

This should now be fixed by 77de506. At least, I can now run the demos on my test platform, and couldn't before this commit.

[machdyne]

Thanks. It's exciting to see activity on this project again.

I'm still not seeing any bootloader output to the UART so I'm probably doing something wrong. I'll keep testing your updates and debugging the issue because it would be great to have this working on Riegel, Eis and Keks. In the meantime I'm keeping my fork up-to-date in case you'd like to have a look.