xtheadbb.adoc

Basic bit-manipulation (XTheadBb)

Frozen

The XTheadBb extension is stable.

The XTheadBb ISA extension provides conditional basic bit-manipulation instructions.

Extension version: 1.0.

The table below gives an overview of the instructions:

RV32	RV64	Mnemonic	Instruction
Y	Y	th.srri rd, rs1, imm6	[xtheadbb-insns-srri]
N	Y	th.srriw rd, rs1, imm5	[xtheadbb-insns-srriw]
Y	Y	th.ext rd, rs1, imm1, imm2	[xtheadbb-insns-ext]
Y	Y	th.extu rd, rs1, imm1, imm2	[xtheadbb-insns-extu]
Y	Y	th.ff0 rd, rs1	[xtheadbb-insns-ff0]
Y	Y	th.ff1 rd, rs1	[xtheadbb-insns-ff1]
Y	Y	th.rev rd, rs1	[xtheadbb-insns-rev]
N	Y	th.revw rd, rs1	[xtheadbb-insns-revw]
Y	Y	th.tstnbz rd, rs1	[xtheadbb-insns-tstnbz]

Availability

The XTheadBb extension’s availability can be probed via the th.sxstatus.THEADISAEE bit (bit 22). The XTheadBb extension is available if and only if this bit is 1. Refer to [xtheadsxstatus] for more information about the th.sxstatus CSR.

Instructions

xtheadbb/srri.adoc <<< xtheadbb/srriw.adoc <<< xtheadbb/ext.adoc <<< xtheadbb/extu.adoc <<< xtheadbb/ff0.adoc <<< xtheadbb/ff1.adoc <<< xtheadbb/rev.adoc <<< xtheadbb/revw.adoc <<< xtheadbb/tstnbz.adoc