From 622c415080a58f7b355268c97f59b4ea0031a2d4 Mon Sep 17 00:00:00 2001 From: majin2020 Date: Mon, 13 Nov 2023 16:14:33 +0800 Subject: [PATCH] Fmv: fix incorrect operands and encoding for th.fmv.hw.x and th.fmv.x.hw --- xtheadfmv.adoc | 2 +- xtheadfmv/fmv_hw_x.adoc | 12 ++++++------ xtheadfmv/fmv_x_hw.adoc | 2 +- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xtheadfmv.adoc b/xtheadfmv.adoc index eaf28f2..90abdab 100644 --- a/xtheadfmv.adoc +++ b/xtheadfmv.adoc @@ -15,7 +15,7 @@ The table below gives an overview of the instructions: [cols="^3,^3,12,18",stripes=even,options="header"] |=== | RV32 | RV64 | Mnemonic | Instruction -| Y | N | th.fmv.hw.x _rd_, _fs1_ | <<#xtheadfmv-insns-fmv_hw_x>> +| Y | N | th.fmv.hw.x _fd_, _rs1_ | <<#xtheadfmv-insns-fmv_hw_x>> | Y | N | th.fmv.x.hw _rd_, _fs1_ | <<#xtheadfmv-insns-fmv_x_hw>> |=== diff --git a/xtheadfmv/fmv_hw_x.adoc b/xtheadfmv/fmv_hw_x.adoc index 291a985..e89989f 100644 --- a/xtheadfmv/fmv_hw_x.adoc +++ b/xtheadfmv/fmv_hw_x.adoc @@ -5,28 +5,28 @@ Synopsis:: Write double-precision floating-point high-bit data Mnemonic:: -th.fmv.hw.x _rd_, _fs1_ +th.fmv.hw.x _fd_, _rs1_ Encoding:: [wavedrom, , svg] .... {reg:[ { bits: 7, name: 0xb, attr: ['custom-0, 32 bit'] }, - { bits: 5, name: 'rd' }, + { bits: 5, name: 'fd' }, { bits: 3, name: 0x1 }, - { bits: 5, name: 'fs1' }, + { bits: 5, name: 'rs1' }, { bits: 5, name: 0x0 }, - { bits: 7, name: 0x50 }, + { bits: 7, name: 0x60 }, ]} .... Description:: -This instruction stores the contents of the specified 32-bit GP register _rd_ in the upper 32-bit of the specified double-precision FP register _fs1_. +This instruction stores the contents of the specified 32-bit GP register _fd_ in the upper 32-bit of the specified double-precision FP register _rs1_. Operation:: [source,sail] -- -fs1[63:32] := rd +fd[63:32] := rs1 -- Permission:: diff --git a/xtheadfmv/fmv_x_hw.adoc b/xtheadfmv/fmv_x_hw.adoc index e52ef1c..c1283c8 100644 --- a/xtheadfmv/fmv_x_hw.adoc +++ b/xtheadfmv/fmv_x_hw.adoc @@ -16,7 +16,7 @@ Encoding:: { bits: 3, name: 0x1 }, { bits: 5, name: 'fs1' }, { bits: 5, name: 0x0 }, - { bits: 7, name: 0x60 }, + { bits: 7, name: 0x50 }, ]} ....