Merge pull request #118 from YuzukiHD/dev

[board] longanpi3h enable neon

board/longanpi-3h/board.c

@@ -80,6 +80,41 @@ void neon_enable(void) {
     asm volatile("MCR p10, 7, r3, c8, c0, 0");
 }
 
+const uint32_t dram_para[32] = {
+        0x2d0,     // dram_para[0]
+        0x8,       // dram_para[1]
+        0xc0c0c0c, // dram_para[2]
+        0xe0e0e0e, // dram_para[3]
+        0xa0e,     // dram_para[4]
+        0x7887ffff,// dram_para[5]
+        0x30fa,    // dram_para[6]
+        0x4000000, // dram_para[7]
+        0x0,       // dram_para[8]
+        0x34,      // dram_para[9]
+        0x1b,      // dram_para[10]
+        0x33,      // dram_para[11]
+        0x3,       // dram_para[12]
+        0x0,       // dram_para[13]
+        0x0,       // dram_para[14]
+        0x4,       // dram_para[15]
+        0x72,      // dram_para[16]
+        0x0,       // dram_para[17]
+        0x9,       // dram_para[18]
+        0x0,       // dram_para[19]
+        0x0,       // dram_para[20]
+        0x24,      // dram_para[21]
+        0x0,       // dram_para[22]
+        0x0,       // dram_para[23]
+        0x0,       // dram_para[24]
+        0x0,       // dram_para[25]
+        0x39808080,// dram_para[26]
+        0x402f6603,// dram_para[27]
+        0x20262620,// dram_para[28]
+        0xe0e0f0f, // dram_para[29]
+        0x1024,    // dram_para[30]
+        0x0        // dram_para[31]
+};
+
 void set_cpu_down(unsigned int cpu) {
     clrbits_le32(SUNXI_CPUXCFG_BASE + SUNXI_DBG_REG1, 1 << cpu);
     udelay(10);

board/longanpi-3h/load_bl31/main.c

@@ -54,6 +54,8 @@ extern sunxi_serial_t uart_dbg;
 
 extern sunxi_i2c_t i2c_pmu;
 
+extern uint32_t dram_para[32];
+
 extern sdhci_t sdhci0;
 
 typedef struct atf_head {
@@ -244,7 +246,7 @@ int main(void) {
     set_pmu_fin_voltage("dcdc3", 1100);
 
     /* Initialize the DRAM and enable memory management unit (MMU). */
-    uint64_t dram_size = sunxi_dram_init(NULL);
+    uint64_t dram_size = sunxi_dram_init(&dram_para);
 
     arm32_mmu_enable(SDRAM_BASE, dram_size);
 

board/longanpi-3h/start.S

@@ -163,6 +163,8 @@ reset:
 
 	bl set_timer_count
 
+	bl neon_enable
+
 	bl main
 
 clear_bss:

board/longanpi-3h/syter_boot/main.c

@@ -60,6 +60,8 @@ extern sunxi_serial_t uart_dbg;
 
 extern sunxi_i2c_t i2c_pmu;
 
+extern uint32_t dram_para[32];
+
 extern sdhci_t sdhci0;
 
 image_info_t image;
@@ -280,7 +282,7 @@ int main(void) {
     set_pmu_fin_voltage("dcdc3", 1100);
 
     /* Initialize the DRAM and enable memory management unit (MMU). */
-    uint64_t dram_size = sunxi_dram_init(NULL);
+    uint64_t dram_size = sunxi_dram_init(&dram_para);
     arm32_mmu_enable(SDRAM_BASE, dram_size);
 
     /* Initialize the small memory allocator. */

board/longanpi-3h/tinymaix/main.c

@@ -22,6 +22,8 @@
 
 extern sunxi_serial_t uart_dbg;
 
+extern uint32_t dram_para[32];
+
 extern sunxi_i2c_t i2c_pmu;
 
 extern void set_cpu_poweroff(void);
@@ -299,7 +301,7 @@ int main(void) {
     pmu_axp1530_dump(&i2c_pmu);
 
     /* Initialize the DRAM and enable memory management unit (MMU). */
-    uint64_t dram_size = sunxi_dram_init(NULL);
+    uint64_t dram_size = sunxi_dram_init(&dram_para);
 
     arm32_mmu_enable(SDRAM_BASE, dram_size);
 

cmake/board/longanpi-3h.cmake

@@ -25,7 +25,7 @@ set(CROSS_COMPILE ${CROSS_COMPILE} CACHE STRING "CROSS_COMPILE Toolchain")
 set(CMAKE_C_COMPILER "${CROSS_COMPILE}gcc")
 set(CMAKE_CXX_COMPILER "${CROSS_COMPILE}g++")
 
-set(CMAKE_COMMON_FLAGS "-nostdlib -nostdinc -Os -mcpu=cortex-a53 -mno-unaligned-access")
+set(CMAKE_COMMON_FLAGS "-nostdinc -nostdlib -Os -mthumb-interwork -mthumb -march=armv8-a -Wno-builtin-declaration-mismatch -fno-short-enums -mfpu=neon -mfloat-abi=softfp -pipe")
 
 # Disable specific warning flags for C and C++ compilers
 set(CMAKE_C_DISABLE_WARN_FLAGS "-Wno-int-to-pointer-cast -Wno-discarded-qualifiers -Wno-implicit-function-declaration")

src/drivers/sun50iw9/sys-dram.c

@@ -28,6 +28,17 @@ uint64_t sunxi_dram_init(void *para) {
     uint8_t *src = __ddr_bin_start;
     uint8_t *dst = (uint8_t *) INIT_DRAM_BIN_BASE;
 
+    if (para == NULL) {
+        printk_error("DRAM: please provide DRAM para\n");
+    }
+
+    uint32_t *para_data = (uint32_t *) para;
+
+    /* Set DRAM driver clk and training data to */
+    if (para_data[0] != 0x0) {
+        rtc_set_dram_para((uint32_t) para);
+    }
+
     printk_debug("DRAM: load dram init from 0x%08x -> 0x%08x size: %08x\n", src, dst, __ddr_bin_end - __ddr_bin_start);
     memcpy(dst, src, __ddr_bin_end - __ddr_bin_start);