Questions about the meaning of cache configuration parameters

[weijizhen]

<nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry>
-gpgpu_cache:dl1  S:1:128:512,L:L:s:N:L,A:256:8,16:0,32
-gpgpu_cache:dl2 S:64:128:16,L:B:m:L:P,A:192:4,32:0,32

The above are the cache configuration files for RTX2060. Based on the existing reference files, I cannot 100% determine the meaning of each parameter.
Can you give me an answer? Thank you!

[JRPan]

From beginning:
S: sector cache?
1: number of sets
128: cache line size
512: association
L: replacement policy
L: write policy
s: allocation policy
N: write allocation policy
L: hash function
A: mshr type
256: mshr size

The line is parsed here
https://github.com/accel-sim/gpgpu-sim_distribution/blob/3f94337ad69e51e793e1583233bbe28dd04af9d8/src/gpgpu-sim/gpu-cache.h#L602

Which one exact are you looking for