From 2769e2240933e8fbb54b6bb728c9f5eff5c09727 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?S=C3=A9bastien=20Morais?= <146729917+SMoraisAnsys@users.noreply.github.com> Date: Mon, 10 Jun 2024 14:47:20 +0200 Subject: [PATCH] DOCS: Fix path to resoures figures (#562) --- doc/source/getting_started/about.rst | 2 +- .../edb_information_queries/get_layout_bounding_box.rst | 6 +++--- .../excitations/create_circuit_ports_on_component.rst | 6 +++--- .../excitations/create_coax_port_on_component.rst | 6 +++--- doc/source/user_guide/excitations/create_current_source.rst | 6 +++--- .../user_guide/excitations/create_edge_port_on_polygon.rst | 6 +++--- .../excitations/create_port_between_pin_and_layer.rst | 6 +++--- .../user_guide/layer_stackup/define_layer_stackup.rst | 6 +++--- 8 files changed, 22 insertions(+), 22 deletions(-) diff --git a/doc/source/getting_started/about.rst b/doc/source/getting_started/about.rst index 625237a2e9..8a6ddb1011 100644 --- a/doc/source/getting_started/about.rst +++ b/doc/source/getting_started/about.rst @@ -49,7 +49,7 @@ and edit projects, run simulations, or perform postprocessing. AEDB files are pr meaning that ready-to-solve projects can be written with PyEDB. Therefore Ansys solvers can directly load AEDB files graphically or in batch non-graphically to support submission for job scheduling on a cluster. -.. image:: ../Resources/aedt_3.png +.. image:: ../resources/aedt_3.png :width: 800 :alt: AEDT Applications :target: https://www.ansys.com/products/electronics diff --git a/doc/source/user_guide/edb_information_queries/get_layout_bounding_box.rst b/doc/source/user_guide/edb_information_queries/get_layout_bounding_box.rst index bf9c0a286c..2022a99e44 100644 --- a/doc/source/user_guide/edb_information_queries/get_layout_bounding_box.rst +++ b/doc/source/user_guide/edb_information_queries/get_layout_bounding_box.rst @@ -20,6 +20,6 @@ This tutorial shows how to retrieve the layout size by getting the bounding box. edbapp.get_bounding_box() -.. .. image:: ../../Resources/layout_bbox.png -.. :width: 800 -.. :alt: Layout bounding box +.. image:: ../../resources/layout_bbox.png + :width: 800 + :alt: Layout bounding box diff --git a/doc/source/user_guide/excitations/create_circuit_ports_on_component.rst b/doc/source/user_guide/excitations/create_circuit_ports_on_component.rst index 5344146b7c..2f614c0cfb 100644 --- a/doc/source/user_guide/excitations/create_circuit_ports_on_component.rst +++ b/doc/source/user_guide/excitations/create_circuit_ports_on_component.rst @@ -37,6 +37,6 @@ This page shows how to retrieve pins and create a circuit port on a component. edbapp.close_edb() -.. image:: ../../Resources/create_circuit_ports_on_component.png -.. :width: 800 -.. :alt: Circuit port created on a component \ No newline at end of file +.. image:: ../../resources/create_circuit_ports_on_component.png + :width: 800 + :alt: Circuit port created on a component \ No newline at end of file diff --git a/doc/source/user_guide/excitations/create_coax_port_on_component.rst b/doc/source/user_guide/excitations/create_coax_port_on_component.rst index 1d4a21f8f4..0d742286c8 100644 --- a/doc/source/user_guide/excitations/create_coax_port_on_component.rst +++ b/doc/source/user_guide/excitations/create_coax_port_on_component.rst @@ -31,6 +31,6 @@ This page shows how to create an HFSS coaxial port on a component. The preceding code creates a coaxial port on nets ``DDR4_DSQ0_P`` and ``DDR4_DSQ0_N`` from component ``U1``: -.. image:: ../../Resources/create_port_on_component_simple.png -.. :width: 800 -.. :alt: HFSS coaxial port created on a component \ No newline at end of file +.. image:: ../../resources/create_port_on_component_simple.png + :width: 800 + :alt: HFSS coaxial port created on a component \ No newline at end of file diff --git a/doc/source/user_guide/excitations/create_current_source.rst b/doc/source/user_guide/excitations/create_current_source.rst index bdbe976c6a..15414284a4 100644 --- a/doc/source/user_guide/excitations/create_current_source.rst +++ b/doc/source/user_guide/excitations/create_current_source.rst @@ -64,6 +64,6 @@ This page shows how to create current and voltage sources on a component. edbapp.close_edb() -.. image:: ../../Resources/create_sources_and_probes.png -.. :width: 800 -.. :alt: Current and voltage sources created on a component +.. image:: ../../resources/create_sources_and_probes.png + :width: 800 + :alt: Current and voltage sources created on a component diff --git a/doc/source/user_guide/excitations/create_edge_port_on_polygon.rst b/doc/source/user_guide/excitations/create_edge_port_on_polygon.rst index 196e83228d..bf1eeefbef 100644 --- a/doc/source/user_guide/excitations/create_edge_port_on_polygon.rst +++ b/doc/source/user_guide/excitations/create_edge_port_on_polygon.rst @@ -96,6 +96,6 @@ This page shows how to create an edge port on a polygon and trace. edbapp.save_edb() edbapp.close_edb() -.. image:: ../../Resources/create_edge_port_on_polygon_and_trace.png -.. :width: 800 -.. :alt: Edge port created on a polygon and trace \ No newline at end of file +.. image:: ../../resources/create_edge_port_on_polygon_and_trace.png + :width: 800 + :alt: Edge port created on a polygon and trace \ No newline at end of file diff --git a/doc/source/user_guide/excitations/create_port_between_pin_and_layer.rst b/doc/source/user_guide/excitations/create_port_between_pin_and_layer.rst index 9ebb87a724..cfb41afd3a 100644 --- a/doc/source/user_guide/excitations/create_port_between_pin_and_layer.rst +++ b/doc/source/user_guide/excitations/create_port_between_pin_and_layer.rst @@ -35,6 +35,6 @@ This page shows how to create a port between a pin and a layer. edbapp.save_edb() edbapp.close_edb() -.. image:: ../../Resources/create_port_between_pin_and_layer.png -.. :width: 800 -.. :alt: Port created between a pin and layer +.. image:: ../../resources/create_port_between_pin_and_layer.png + :width: 800 + :alt: Port created between a pin and layer diff --git a/doc/source/user_guide/layer_stackup/define_layer_stackup.rst b/doc/source/user_guide/layer_stackup/define_layer_stackup.rst index 1a9dac741c..621a0cdb62 100644 --- a/doc/source/user_guide/layer_stackup/define_layer_stackup.rst +++ b/doc/source/user_guide/layer_stackup/define_layer_stackup.rst @@ -28,6 +28,6 @@ This page shows how to add a layer in the current layer stackup. ) edb.close() -.. image:: ../../Resources/define_layer_stackup.png -.. :width: 800 -.. :alt: Layer added to the layer stackup +.. image:: ../../resources/define_layer_stackup.png + :width: 800 + :alt: Layer added to the layer stackup