From 1df26cb37e45d6e0a1094b64733854e5d4ef062d Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Fri, 21 Jun 2024 15:40:33 +0200 Subject: [PATCH 1/9] hfsspi SimsetupInfo bug fixed --- .../edb_core/edb_data/hfss_pi_simulation_setup_data.py | 2 +- src/pyedb/dotnet/edb_core/utilities/simulation_setup.py | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/pyedb/dotnet/edb_core/edb_data/hfss_pi_simulation_setup_data.py b/src/pyedb/dotnet/edb_core/edb_data/hfss_pi_simulation_setup_data.py index 299f839c7f..8d7e5d9e10 100644 --- a/src/pyedb/dotnet/edb_core/edb_data/hfss_pi_simulation_setup_data.py +++ b/src/pyedb/dotnet/edb_core/edb_data/hfss_pi_simulation_setup_data.py @@ -39,7 +39,7 @@ def __init__(self, pedb, edb_object=None): def create(self, name=None): """Create an HFSS setup.""" self._name = name - self._create(name) + self._create(name=name, simulation_setup_type=self._setup_type) return self @property diff --git a/src/pyedb/dotnet/edb_core/utilities/simulation_setup.py b/src/pyedb/dotnet/edb_core/utilities/simulation_setup.py index 4408f14fab..4bf44e4a78 100644 --- a/src/pyedb/dotnet/edb_core/utilities/simulation_setup.py +++ b/src/pyedb/dotnet/edb_core/utilities/simulation_setup.py @@ -100,7 +100,11 @@ def __init__(self, pedb, edb_object=None): @property def sim_setup_info(self): - return SimSetupInfo(self._pedb, sim_setup=self, edb_object=self._edb_object.GetSimSetupInfo()) + if self.type not in ["hfss_pi", "raptor_x"]: + return SimSetupInfo(self._pedb, sim_setup=self, edb_object=self._edb_object.GetSimSetupInfo()) + else: + if self._edb_setup_info: + return SimSetupInfo(self._pedb, sim_setup=self, edb_object=self._edb_setup_info) @sim_setup_info.setter def sim_setup_info(self, sim_setup_info): From 19355561b973aa5de048dc47d0e27c105b858932 Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Tue, 25 Jun 2024 20:12:45 +0200 Subject: [PATCH 2/9] temp --- .../dotnet/edb_core/edb_data/hfss_pi_simulation_setup_data.py | 0 1 file changed, 0 insertions(+), 0 deletions(-) delete mode 100644 src/pyedb/dotnet/edb_core/edb_data/hfss_pi_simulation_setup_data.py diff --git a/src/pyedb/dotnet/edb_core/edb_data/hfss_pi_simulation_setup_data.py b/src/pyedb/dotnet/edb_core/edb_data/hfss_pi_simulation_setup_data.py deleted file mode 100644 index e69de29bb2..0000000000 From a791a61a346b0ab3726528a7b7cefeda734a1a5b Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Wed, 24 Jul 2024 14:53:05 +0200 Subject: [PATCH 3/9] reverting extending ref pins search --- src/pyedb/dotnet/edb_core/components.py | 33 +++++++++---------------- 1 file changed, 11 insertions(+), 22 deletions(-) diff --git a/src/pyedb/dotnet/edb_core/components.py b/src/pyedb/dotnet/edb_core/components.py index 3a1f6340ef..6a06aa58b1 100644 --- a/src/pyedb/dotnet/edb_core/components.py +++ b/src/pyedb/dotnet/edb_core/components.py @@ -964,9 +964,8 @@ def create_port_on_component( ] if not ref_pins: self._logger.error( - "No reference pins found on component. You might consider" - "using Circuit port instead since reference pins can be extended" - "outside the component automatically when not found." + "No reference pins found on component, no current return path which will defined causing wrong " + "results. Please check your design." ) return False pad_params = self._padstack.get_pad_parameters(pin=cmp_pins[0], layername=pin_layers[0], pad_type=0) @@ -1005,7 +1004,7 @@ def create_port_on_component( shape=sball_shape, ) for pin in cmp_pins: - self._padstack.create_coax_port(padstackinstance=pin, name=port_name) + return self._padstack.create_coax_port(padstackinstance=pin, name=port_name) elif port_type == SourceType.CircPort: # pragma no cover ref_pins = [ @@ -1017,8 +1016,10 @@ def create_port_on_component( if not p.IsLayoutPin(): p.SetIsLayoutPin(True) if not ref_pins: - self._logger.warning("No reference pins found on component, the closest pin will be selected.") - do_pingroup = False + self._logger.warning( + f"No reference pins found on component {component.GetName()}. Please check your" f"design." + ) + return False if do_pingroup: if len(ref_pins) == 1: ref_pins.is_pin = True @@ -1043,7 +1044,7 @@ def create_port_on_component( if len(pins) == 1: pin_term = self._create_terminal(pins[0]) if pin_term: - pin_term.SetReferenceTerminal(ref_pin_group_term) + return pin_term.SetReferenceTerminal(ref_pin_group_term) else: pin_group = self.create_pingroup_from_pins(pins) if not pin_group: @@ -1051,27 +1052,15 @@ def create_port_on_component( pin_group = self._pedb.siwave.pin_groups[pin_group.GetName()] pin_group_term = self._create_pin_group_terminal(pin_group) if pin_group_term: - pin_group_term.SetReferenceTerminal(ref_pin_group_term) + return pin_group_term.SetReferenceTerminal(ref_pin_group_term) else: self._logger.info("No pins found on component {} for the net {}".format(component, net)) else: for net in net_list: pins = [pin for pin in cmp_pins if pin.GetNet().GetName() == net] for pin in pins: - if ref_pins: - self.create_port_on_pins(component, pin, ref_pins) - else: - _pin = EDBPadstackInstance(pin, self._pedb) - ref_pin = _pin.get_reference_pins( - reference_net=reference_net[0], max_limit=1, component_only=False, search_radius=3e-3 - ) - if ref_pin: - self.create_port_on_pins( - component, - [EDBPadstackInstance(pin, self._pedb).name], - [EDBPadstackInstance(ref_pin[0], self._pedb).id], - ) - return True + return self.create_port_on_pins(component, pin, ref_pins) + return False def _create_terminal(self, pin, term_name=None): """Create terminal on component pin. From d89c7fb92143ddcfa88324b5206acadfa8c3cd09 Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Wed, 24 Jul 2024 15:00:01 +0200 Subject: [PATCH 4/9] reverting extending ref pins search --- tests/legacy/system/test_edb.py | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/tests/legacy/system/test_edb.py b/tests/legacy/system/test_edb.py index dca761bef5..b4715e0ce6 100644 --- a/tests/legacy/system/test_edb.py +++ b/tests/legacy/system/test_edb.py @@ -1656,33 +1656,6 @@ def test_workflow(self, edb_examples): assert path_bom.exists() edbapp.close() - def test_create_port_ob_component_no_ref_pins_in_component(self, edb_examples): - edbapp = edb_examples.get_no_ref_pins_component() - sim_setup = edbapp.new_simulation_configuration() - sim_setup.signal_nets = [ - "net1", - "net2", - "net3", - "net4", - "net5", - "net6", - "net7", - "net8", - "net9", - "net10", - "net11", - "net12", - "net13", - "net14", - "net15", - ] - sim_setup.power_nets = ["GND"] - sim_setup.solver_type = 7 - sim_setup.components = ["J2E2"] - sim_setup.do_cutout_subdesign = False - edbapp.build_simulation_project(sim_setup) - assert len(edbapp.ports) == 15 - def test_create_ping_group(self, edb_examples): edbapp = edb_examples.get_si_verse() assert edbapp.modeler.create_pin_group( From 86a8e3f1351dbfb5c05a49b2e1514d161b03d1be Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Wed, 24 Jul 2024 15:01:00 +0200 Subject: [PATCH 5/9] reverting extending ref pins search --- src/pyedb/dotnet/edb_core/components.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/pyedb/dotnet/edb_core/components.py b/src/pyedb/dotnet/edb_core/components.py index 6a06aa58b1..a7eb1db734 100644 --- a/src/pyedb/dotnet/edb_core/components.py +++ b/src/pyedb/dotnet/edb_core/components.py @@ -1017,7 +1017,7 @@ def create_port_on_component( p.SetIsLayoutPin(True) if not ref_pins: self._logger.warning( - f"No reference pins found on component {component.GetName()}. Please check your" f"design." + f"No reference pins found on component {component.GetName()}. Please check your design." ) return False if do_pingroup: From 2f99873209dc8c006ae0f6226d2b36ced8bb46cf Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Wed, 24 Jul 2024 15:08:36 +0200 Subject: [PATCH 6/9] reverting extending ref pins search --- src/pyedb/dotnet/edb_core/components.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/pyedb/dotnet/edb_core/components.py b/src/pyedb/dotnet/edb_core/components.py index a7eb1db734..659fb03dfb 100644 --- a/src/pyedb/dotnet/edb_core/components.py +++ b/src/pyedb/dotnet/edb_core/components.py @@ -1004,7 +1004,7 @@ def create_port_on_component( shape=sball_shape, ) for pin in cmp_pins: - return self._padstack.create_coax_port(padstackinstance=pin, name=port_name) + self._padstack.create_coax_port(padstackinstance=pin, name=port_name) elif port_type == SourceType.CircPort: # pragma no cover ref_pins = [ @@ -1052,15 +1052,15 @@ def create_port_on_component( pin_group = self._pedb.siwave.pin_groups[pin_group.GetName()] pin_group_term = self._create_pin_group_terminal(pin_group) if pin_group_term: - return pin_group_term.SetReferenceTerminal(ref_pin_group_term) + pin_group_term.SetReferenceTerminal(ref_pin_group_term) else: self._logger.info("No pins found on component {} for the net {}".format(component, net)) else: for net in net_list: pins = [pin for pin in cmp_pins if pin.GetNet().GetName() == net] for pin in pins: - return self.create_port_on_pins(component, pin, ref_pins) - return False + self.create_port_on_pins(component, pin, ref_pins) + return True def _create_terminal(self, pin, term_name=None): """Create terminal on component pin. From 6950ea796452c84e38f2d3acfc2e4a23c0c55e4f Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Wed, 24 Jul 2024 17:10:42 +0200 Subject: [PATCH 7/9] Revert "reverting extending ref pins search" This reverts commit a791a61a --- src/pyedb/dotnet/edb_core/components.py | 27 +++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/src/pyedb/dotnet/edb_core/components.py b/src/pyedb/dotnet/edb_core/components.py index 659fb03dfb..3a1f6340ef 100644 --- a/src/pyedb/dotnet/edb_core/components.py +++ b/src/pyedb/dotnet/edb_core/components.py @@ -964,8 +964,9 @@ def create_port_on_component( ] if not ref_pins: self._logger.error( - "No reference pins found on component, no current return path which will defined causing wrong " - "results. Please check your design." + "No reference pins found on component. You might consider" + "using Circuit port instead since reference pins can be extended" + "outside the component automatically when not found." ) return False pad_params = self._padstack.get_pad_parameters(pin=cmp_pins[0], layername=pin_layers[0], pad_type=0) @@ -1016,10 +1017,8 @@ def create_port_on_component( if not p.IsLayoutPin(): p.SetIsLayoutPin(True) if not ref_pins: - self._logger.warning( - f"No reference pins found on component {component.GetName()}. Please check your design." - ) - return False + self._logger.warning("No reference pins found on component, the closest pin will be selected.") + do_pingroup = False if do_pingroup: if len(ref_pins) == 1: ref_pins.is_pin = True @@ -1044,7 +1043,7 @@ def create_port_on_component( if len(pins) == 1: pin_term = self._create_terminal(pins[0]) if pin_term: - return pin_term.SetReferenceTerminal(ref_pin_group_term) + pin_term.SetReferenceTerminal(ref_pin_group_term) else: pin_group = self.create_pingroup_from_pins(pins) if not pin_group: @@ -1059,7 +1058,19 @@ def create_port_on_component( for net in net_list: pins = [pin for pin in cmp_pins if pin.GetNet().GetName() == net] for pin in pins: - self.create_port_on_pins(component, pin, ref_pins) + if ref_pins: + self.create_port_on_pins(component, pin, ref_pins) + else: + _pin = EDBPadstackInstance(pin, self._pedb) + ref_pin = _pin.get_reference_pins( + reference_net=reference_net[0], max_limit=1, component_only=False, search_radius=3e-3 + ) + if ref_pin: + self.create_port_on_pins( + component, + [EDBPadstackInstance(pin, self._pedb).name], + [EDBPadstackInstance(ref_pin[0], self._pedb).id], + ) return True def _create_terminal(self, pin, term_name=None): From 406592a7b5de939737935ab354334b374e763bb1 Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Wed, 24 Jul 2024 17:10:54 +0200 Subject: [PATCH 8/9] Revert "reverting extending ref pins search" This reverts commit d89c7fb92143ddcfa88324b5206acadfa8c3cd09. --- tests/legacy/system/test_edb.py | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/tests/legacy/system/test_edb.py b/tests/legacy/system/test_edb.py index b4715e0ce6..dca761bef5 100644 --- a/tests/legacy/system/test_edb.py +++ b/tests/legacy/system/test_edb.py @@ -1656,6 +1656,33 @@ def test_workflow(self, edb_examples): assert path_bom.exists() edbapp.close() + def test_create_port_ob_component_no_ref_pins_in_component(self, edb_examples): + edbapp = edb_examples.get_no_ref_pins_component() + sim_setup = edbapp.new_simulation_configuration() + sim_setup.signal_nets = [ + "net1", + "net2", + "net3", + "net4", + "net5", + "net6", + "net7", + "net8", + "net9", + "net10", + "net11", + "net12", + "net13", + "net14", + "net15", + ] + sim_setup.power_nets = ["GND"] + sim_setup.solver_type = 7 + sim_setup.components = ["J2E2"] + sim_setup.do_cutout_subdesign = False + edbapp.build_simulation_project(sim_setup) + assert len(edbapp.ports) == 15 + def test_create_ping_group(self, edb_examples): edbapp = edb_examples.get_si_verse() assert edbapp.modeler.create_pin_group( From ec2cbb55c706df83dc8d6877eeb01df15f9d3612 Mon Sep 17 00:00:00 2001 From: svandenb-dev Date: Wed, 24 Jul 2024 17:30:41 +0200 Subject: [PATCH 9/9] adding flag --- src/pyedb/dotnet/edb_core/components.py | 40 ++++++++++++++------- tests/legacy/system/test_edb.py | 48 +++++++++++++------------ 2 files changed, 53 insertions(+), 35 deletions(-) diff --git a/src/pyedb/dotnet/edb_core/components.py b/src/pyedb/dotnet/edb_core/components.py index 3a1f6340ef..fa27edb224 100644 --- a/src/pyedb/dotnet/edb_core/components.py +++ b/src/pyedb/dotnet/edb_core/components.py @@ -876,6 +876,7 @@ def create_port_on_component( solder_balls_height=None, solder_balls_size=None, solder_balls_mid_size=None, + extend_reference_pins_outside_component=False, ): """Create ports on a component. @@ -908,6 +909,9 @@ def create_port_on_component( solder_balls_mid_size : float, optional Solder balls mid-diameter. When provided if value is different than solder balls size, spheroid shape will be switched. + extend_reference_pins_outside_component : bool + When no reference pins are found on the component extend the pins search with taking the closest one. If + `do_pingroup` is `True` will be set to `False`. Default value is `False`. Returns ------- @@ -966,7 +970,7 @@ def create_port_on_component( self._logger.error( "No reference pins found on component. You might consider" "using Circuit port instead since reference pins can be extended" - "outside the component automatically when not found." + "outside the component when not found if argument extend_reference_pins_outside_component is True." ) return False pad_params = self._padstack.get_pad_parameters(pin=cmp_pins[0], layername=pin_layers[0], pad_type=0) @@ -1017,8 +1021,14 @@ def create_port_on_component( if not p.IsLayoutPin(): p.SetIsLayoutPin(True) if not ref_pins: - self._logger.warning("No reference pins found on component, the closest pin will be selected.") - do_pingroup = False + self._logger.warning("No reference pins found on component") + if not extend_reference_pins_outside_component: + self._logger.warning( + "argument extend_reference_pins_outside_component is False. You might want " + "setting to True to extend the reference pin search outside the component" + ) + else: + do_pingroup = False if do_pingroup: if len(ref_pins) == 1: ref_pins.is_pin = True @@ -1061,16 +1071,22 @@ def create_port_on_component( if ref_pins: self.create_port_on_pins(component, pin, ref_pins) else: - _pin = EDBPadstackInstance(pin, self._pedb) - ref_pin = _pin.get_reference_pins( - reference_net=reference_net[0], max_limit=1, component_only=False, search_radius=3e-3 - ) - if ref_pin: - self.create_port_on_pins( - component, - [EDBPadstackInstance(pin, self._pedb).name], - [EDBPadstackInstance(ref_pin[0], self._pedb).id], + if extend_reference_pins_outside_component: + _pin = EDBPadstackInstance(pin, self._pedb) + ref_pin = _pin.get_reference_pins( + reference_net=reference_net[0], + max_limit=1, + component_only=False, + search_radius=3e-3, ) + if ref_pin: + self.create_port_on_pins( + component, + [EDBPadstackInstance(pin, self._pedb).name], + [EDBPadstackInstance(ref_pin[0], self._pedb).id], + ) + else: + self._logger.error("Skipping port creation no reference pin found.") return True def _create_terminal(self, pin, term_name=None): diff --git a/tests/legacy/system/test_edb.py b/tests/legacy/system/test_edb.py index dca761bef5..925f0cc926 100644 --- a/tests/legacy/system/test_edb.py +++ b/tests/legacy/system/test_edb.py @@ -1657,30 +1657,32 @@ def test_workflow(self, edb_examples): edbapp.close() def test_create_port_ob_component_no_ref_pins_in_component(self, edb_examples): + from pyedb.generic.constants import SourceType + edbapp = edb_examples.get_no_ref_pins_component() - sim_setup = edbapp.new_simulation_configuration() - sim_setup.signal_nets = [ - "net1", - "net2", - "net3", - "net4", - "net5", - "net6", - "net7", - "net8", - "net9", - "net10", - "net11", - "net12", - "net13", - "net14", - "net15", - ] - sim_setup.power_nets = ["GND"] - sim_setup.solver_type = 7 - sim_setup.components = ["J2E2"] - sim_setup.do_cutout_subdesign = False - edbapp.build_simulation_project(sim_setup) + edbapp.components.create_port_on_component( + component="J2E2", + net_list=[ + "net1", + "net2", + "net3", + "net4", + "net5", + "net6", + "net7", + "net8", + "net9", + "net10", + "net11", + "net12", + "net13", + "net14", + "net15", + ], + port_type=SourceType.CircPort, + reference_net=["GND"], + extend_reference_pins_outside_component=True, + ) assert len(edbapp.ports) == 15 def test_create_ping_group(self, edb_examples):