From 71d5c8176bf309bc2e1e1d95dcccd312ec6ca307 Mon Sep 17 00:00:00 2001 From: Zhouqi Jiang Date: Mon, 21 Oct 2024 21:08:27 +0800 Subject: [PATCH 1/4] feat: use RustSBI 0.4.0 proc macros to simplify VCpu SBI implementation Ref: https://github.com/KuangjuX/hypercraft/pull/3/files Signed-off-by: Zhouqi Jiang --- Cargo.toml | 5 +- src/detect.rs | 3 +- src/lib.rs | 2 - src/sbi/base.rs | 35 ---------- src/sbi/dbcn.rs | 11 --- src/sbi/mod.rs | 96 ------------------------- src/sbi/pmu.rs | 35 ---------- src/sbi/rfnc.rs | 45 ------------ src/sbi/srst.rs | 84 ---------------------- src/vcpu.rs | 181 ++++++++++++------------------------------------ 10 files changed, 47 insertions(+), 450 deletions(-) delete mode 100644 src/sbi/base.rs delete mode 100644 src/sbi/dbcn.rs delete mode 100644 src/sbi/mod.rs delete mode 100644 src/sbi/pmu.rs delete mode 100644 src/sbi/rfnc.rs delete mode 100644 src/sbi/srst.rs diff --git a/Cargo.toml b/Cargo.toml index 3f844c6..af917f9 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -11,8 +11,9 @@ bit_field = "0.10" riscv = { git = "https://github.com/rcore-os/riscv", features = ["inline-asm"] } riscv-decode = { git = "https://github.com/KuangjuX/riscv-decode.git" } -sbi-spec = { version = "0.0.6", features = ["legacy"] } -sbi-rt = { version = "0.0.2", features = ["integer-impls", "legacy"] } +rustsbi = { version = "0.4.0", features = ["forward"] } +sbi-spec = { version = "0.0.7", features = ["legacy"] } +sbi-rt = { version = "0.0.3", features = ["integer-impls", "legacy"] } tock-registers = "0.8.1" memoffset = { version = ">=0.6.5", features = ["unstable_const"] } diff --git a/src/detect.rs b/src/detect.rs index 2849b54..3f78f5b 100644 --- a/src/detect.rs +++ b/src/detect.rs @@ -147,7 +147,7 @@ struct TrapFrame { // handle exceptions only rather than interrupts. #[naked] unsafe extern "C" fn on_detect_trap() -> ! { - asm!( + core::arch::naked_asm!( ".p2align 2", "addi sp, sp, -8*21", "sd ra, 0*8(sp)", @@ -205,6 +205,5 @@ unsafe extern "C" fn on_detect_trap() -> ! { "addi sp, sp, 8*21", "sret", rust_detect_trap = sym rust_detect_trap, - options(noreturn), ) } diff --git a/src/lib.rs b/src/lib.rs index 41cb2ee..41b3677 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -2,7 +2,6 @@ #![feature(doc_cfg)] #![feature(naked_functions)] #![feature(riscv_ext_intrinsics)] -#![feature(asm_const)] #![doc = include_str!("../README.md")] #[macro_use] @@ -12,7 +11,6 @@ pub mod csrs; mod detect; mod percpu; mod regs; -pub mod sbi; mod vcpu; pub use self::percpu::RISCVPerCpu; diff --git a/src/sbi/base.rs b/src/sbi/base.rs deleted file mode 100644 index 4fe4ba9..0000000 --- a/src/sbi/base.rs +++ /dev/null @@ -1,35 +0,0 @@ -use axerrno::{AxError, AxResult}; - -/// Functions defined for the Base extension -#[derive(Clone, Copy, Debug)] -pub enum BaseFunction { - /// Returns the implemented version of the SBI standard. - GetSepcificationVersion, - /// Returns the ID of the SBI implementation. - GetImplementationID, - /// Returns the version of the SBI implementation. - GetImplementationVersion, - /// Checks if the given SBI extension is supported. - ProbeSbiExtension(u64), - /// Returns the vendor that produced this machine(`mvendorid`). - GetMachineVendorID, - /// Returns the architecture implementation ID of this machine(`marchid`). - GetMachineArchitectureID, - /// Returns the ID of this machine(`mimpid`). - GetMachineImplementationID, -} - -impl BaseFunction { - pub(crate) fn from_regs(args: &[usize]) -> AxResult { - match args[6] { - 0 => Ok(BaseFunction::GetSepcificationVersion), - 1 => Ok(BaseFunction::GetImplementationID), - 2 => Ok(BaseFunction::GetImplementationVersion), - 3 => Ok(BaseFunction::ProbeSbiExtension(args[0] as u64)), - 4 => Ok(BaseFunction::GetMachineVendorID), - 5 => Ok(BaseFunction::GetMachineArchitectureID), - 6 => Ok(BaseFunction::GetMachineImplementationID), - _ => Err(AxError::NotFound), - } - } -} diff --git a/src/sbi/dbcn.rs b/src/sbi/dbcn.rs deleted file mode 100644 index cde1246..0000000 --- a/src/sbi/dbcn.rs +++ /dev/null @@ -1,11 +0,0 @@ -/// Functions for the Debug Console extension -#[derive(Copy, Clone, Debug)] -pub enum DebugConsoleFunction { - /// Prints the given string to the system console. - PutString { - /// The length of the string to print. - len: u64, - /// The address of the string. - addr: u64, - }, -} diff --git a/src/sbi/mod.rs b/src/sbi/mod.rs deleted file mode 100644 index 2a4f63e..0000000 --- a/src/sbi/mod.rs +++ /dev/null @@ -1,96 +0,0 @@ -mod base; -mod dbcn; -mod pmu; -mod rfnc; -mod srst; - -use axerrno::{AxError, AxResult}; -pub use base::BaseFunction; -use dbcn::DebugConsoleFunction; -pub use pmu::PmuFunction; -pub use rfnc::RemoteFenceFunction; -use sbi_spec; -pub use srst::ResetFunction; - -// The values returned from an SBI function call. -/// Success. -pub const SBI_SUCCESS: usize = 0; -/// Failure. -pub const SBI_ERR_FAILUER: isize = -1; -/// Not supported. -pub const SBI_ERR_NOT_SUPPORTED: isize = -2; -/// Invalid parameter. -pub const SBI_ERR_INAVLID_PARAM: isize = -3; -/// Denied. -pub const SBI_ERR_DENIED: isize = -4; -/// Invalid address. -pub const SBI_ERR_INVALID_ADDRESS: isize = -5; -/// Already available. -pub const SBI_ERR_ALREADY_AVAILABLE: isize = -6; - -/// The values returned from an SBI function call. -#[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub struct SbiReturn { - /// The error code(0 for success) - pub error_code: i64, - /// The return value if the operation is successful - pub return_value: i64, -} - -/// SBI return value conventions -#[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SbiReturnTyoe { - /// Legacy(v0.1) extensions return a single value in A0, usually with the convention that 0 - /// is success and < 0 is an implementation defined error code. - Legacy(u64), - /// Modern extensions use the standard error code values enumerated above. - Standard(SbiReturn), -} - -/// SBI Message used to invoke the specfified SBI extension in the firmware. -#[derive(Clone, Copy, Debug)] -pub enum SbiMessage { - /// The base SBI extension functions. - Base(BaseFunction), - /// The legacy GetChar extension. - GetChar, - /// The legacy PutChar extension. - PutChar(usize), - /// The SetTimer Extension - SetTimer(usize), - /// Handles output to the console for debug - DebugConsole(DebugConsoleFunction), - /// Handles system reset - Reset(ResetFunction), - /// The RemoteFence Extension. - RemoteFence(RemoteFenceFunction), - /// The PMU Extension - PMU(PmuFunction), -} - -impl SbiMessage { - /// Creates an SbiMessage struct from the given GPRs. Intended for use from the ECALL handler - /// and passed the saved register state from the calling OS. A7 must contain a valid SBI - /// extension and the other A* registers will be interpreted based on the extension A7 selects. - pub fn from_regs(args: &[usize]) -> AxResult { - match args[7] { - sbi_spec::base::EID_BASE => BaseFunction::from_regs(args).map(SbiMessage::Base), - sbi_spec::legacy::LEGACY_CONSOLE_PUTCHAR => Ok(SbiMessage::PutChar(args[0])), - sbi_spec::legacy::LEGACY_CONSOLE_GETCHAR => Ok(SbiMessage::GetChar), - sbi_spec::legacy::LEGACY_SET_TIMER => Ok(SbiMessage::SetTimer(args[0])), - sbi_spec::legacy::LEGACY_SHUTDOWN => Ok(SbiMessage::Reset(ResetFunction::shutdown())), - sbi_spec::time::EID_TIME => Ok(SbiMessage::SetTimer(args[0])), - sbi_spec::srst::EID_SRST => ResetFunction::from_regs(args).map(SbiMessage::Reset), - sbi_spec::rfnc::EID_RFNC => { - RemoteFenceFunction::from_args(args).map(SbiMessage::RemoteFence) - } - sbi_spec::pmu::EID_PMU => PmuFunction::from_regs(args).map(SbiMessage::PMU), - _ => { - error!("args: {:?}", args); - error!("args[7]: {:#x}", args[7]); - error!("EID_RFENCE: {:#x}", sbi_spec::rfnc::EID_RFNC); - Err(AxError::NotFound) - } - } - } -} diff --git a/src/sbi/pmu.rs b/src/sbi/pmu.rs deleted file mode 100644 index f14d9b2..0000000 --- a/src/sbi/pmu.rs +++ /dev/null @@ -1,35 +0,0 @@ -use axerrno::AxResult; - -/// Performance Monitor Unit (PMU) function. -#[derive(Clone, Copy, Debug)] -pub enum PmuFunction { - /// Returns the total of performance counters (hardware and fireware). - GetNumCounters, - /// Returns information about hardware counter specified by the inner value. - GetCounterInfo(u64), - /// Stops the couters selected by counter_index and counter_mask. - /// See the sbi_pmu_counter_stop documentation for details. - StopCounter { - /// Countert index base. - counter_index: u64, - /// Counter index mask. - counter_mask: u64, - /// Counter stop flags. - stop_flags: u64, - }, -} - -impl PmuFunction { - pub(crate) fn from_regs(args: &[usize]) -> AxResult { - match args[6] { - 0 => Ok(Self::GetNumCounters), - 1 => Ok(Self::GetCounterInfo(args[0] as u64)), - 4 => Ok(Self::StopCounter { - counter_index: args[0] as u64, - counter_mask: args[1] as u64, - stop_flags: args[2] as u64, - }), - _ => panic!("Unsupported yet!"), - } - } -} diff --git a/src/sbi/rfnc.rs b/src/sbi/rfnc.rs deleted file mode 100644 index 0ada790..0000000 --- a/src/sbi/rfnc.rs +++ /dev/null @@ -1,45 +0,0 @@ -use sbi_spec::rfnc::{REMOTE_FENCE_I, REMOTE_SFENCE_VMA}; - -use axerrno::AxResult; - -/// A remote fence function. -#[derive(Clone, Copy, Debug)] -pub enum RemoteFenceFunction { - /// FenceI - FenceI { - /// The hart mask. - hart_mask: u64, - /// The hart mask base. - hart_mask_base: u64, - }, - /// RemoteSFenceVMA - RemoteSFenceVMA { - /// The hart mask. - hart_mask: u64, - /// The hart mask base. - hart_mask_base: u64, - /// The start address. - start_addr: u64, - /// The size. - size: u64, - }, -} - -impl RemoteFenceFunction { - /// Parse the arguments to the function. - pub fn from_args(args: &[usize]) -> AxResult { - match args[6] { - REMOTE_FENCE_I => Ok(Self::FenceI { - hart_mask: args[0] as u64, - hart_mask_base: args[1] as u64, - }), - REMOTE_SFENCE_VMA => Ok(Self::RemoteSFenceVMA { - hart_mask: args[0] as u64, - hart_mask_base: args[1] as u64, - start_addr: args[2] as u64, - size: args[3] as u64, - }), - _ => panic!("Unsupported yet!"), - } - } -} diff --git a/src/sbi/srst.rs b/src/sbi/srst.rs deleted file mode 100644 index d6512ae..0000000 --- a/src/sbi/srst.rs +++ /dev/null @@ -1,84 +0,0 @@ -use axerrno::{AxError, AxResult}; - -/// Functions for the Reset extension -#[derive(Copy, Clone, Debug)] -pub enum ResetFunction { - /// Performs a system reset. - Reset { - /// Determines the type of reset to perform. - reset_type: ResetType, - /// Represents the reason for system reset. - reason: ResetReason, - }, -} - -/// The types of reset a supervisor can request. -#[repr(usize)] -#[derive(Copy, Clone, Debug, Eq, PartialEq)] -pub enum ResetType { - /// Powers down the system. - Shutdown = 0, - /// Powers down, then reboots. - ColdReset = 1, - /// Reboots, doesn't power down. - WarmReset = 2, -} - -impl ResetType { - // Creates a reset type from the a0 register value or returns an error if no mapping is - // known for the given value. - fn from_reg(a0: usize) -> AxResult { - use ResetType::*; - Ok(match a0 { - 0 => Shutdown, - 1 => ColdReset, - 2 => WarmReset, - _ => return Err(AxError::InvalidInput), - }) - } -} - -/// Reasons why a supervisor requests a reset. -#[repr(u64)] -#[derive(Copy, Clone, Debug, Eq, PartialEq)] -pub enum ResetReason { - /// Used for normal resets. - NoReason = 0, - /// Used when the system has failed. - SystemFailure = 1, -} - -impl ResetReason { - // Creates a reset reason from the a1 register value or returns an error if no mapping is - // known for the given value. - fn from_reg(a1: usize) -> AxResult { - use ResetReason::*; - Ok(match a1 { - 0 => NoReason, - 1 => SystemFailure, - _ => return Err(AxError::InvalidInput), - }) - } -} -impl ResetFunction { - /// Attempts to parse `Self` from the passed in `a0-a7`. - pub(crate) fn from_regs(args: &[usize]) -> AxResult { - use ResetFunction::*; - - Ok(match args[6] { - 0 => Reset { - reset_type: ResetType::from_reg(args[0])?, - reason: ResetReason::from_reg(args[1])?, - }, - _ => return Err(AxError::InvalidInput), - }) - } - - /// Creates an operation to shutdown the machine. - pub fn shutdown() -> Self { - ResetFunction::Reset { - reset_type: ResetType::Shutdown, - reason: ResetReason::NoReason, - } - } -} diff --git a/src/vcpu.rs b/src/vcpu.rs index edf5ada..283d5e4 100644 --- a/src/vcpu.rs +++ b/src/vcpu.rs @@ -3,7 +3,7 @@ use core::mem::size_of; use memoffset::offset_of; use riscv::register::{htinst, htval, scause, sstatus, stval}; -use sbi_rt::{pmu_counter_get_info, pmu_counter_stop}; +use rustsbi::{Forward, RustSBI}; use tock_registers::LocalRegisterCopy; use axaddrspace::{GuestPhysAddr, HostPhysAddr, MappingFlags}; @@ -12,7 +12,6 @@ use axvcpu::AxVCpuExitReason; use super::csrs::defs::hstatus; use super::csrs::{traps, RiscvCsrTrait, CSR}; -use super::sbi::{BaseFunction, PmuFunction, RemoteFenceFunction, SbiMessage}; use super::regs::{GeneralPurposeRegisters, GprIndex}; @@ -207,6 +206,39 @@ pub struct VCpuConfig {} /// A virtual CPU within a guest pub struct RISCVVCpu { regs: VmCpuRegisters, + sbi: RISCVVCpuSbi, +} + +#[derive(RustSBI)] +struct RISCVVCpuSbi { + timer: RISCVVCpuSbiTimer, + #[rustsbi(pmu, fence, reset, info)] + forward: Forward, +} + +impl Default for RISCVVCpuSbi { + #[inline] + fn default() -> Self { + Self { + timer: RISCVVCpuSbiTimer, + forward: Forward, + } + } +} + +struct RISCVVCpuSbiTimer; + +impl rustsbi::Timer for RISCVVCpuSbiTimer { + #[inline] + fn set_timer(&self, stime_value: u64) { + sbi_rt::set_timer(stime_value); + // Clear guest timer interrupt + CSR.hvip + .read_and_clear_bits(traps::interrupt::VIRTUAL_SUPERVISOR_TIMER); + // Enable host timer interrupt + CSR.sie + .read_and_set_bits(traps::interrupt::SUPERVISOR_TIMER); + } } impl axvcpu::AxArchVCpu for RISCVVCpu { @@ -234,7 +266,8 @@ impl axvcpu::AxArchVCpu for RISCVVCpu { regs.guest_regs.gprs.set_reg(GprIndex::A0, 0); regs.guest_regs.gprs.set_reg(GprIndex::A1, 0x9000_0000); - Ok(Self { regs }) + let sbi = RISCVVCpuSbi::default(); + Ok(Self { regs, sbi }) } fn setup(&mut self, _config: Self::SetupConfig) -> AxResult { @@ -318,44 +351,13 @@ impl RISCVVCpu { use scause::{Exception, Interrupt, Trap}; match scause.cause() { Trap::Exception(Exception::VirtualSupervisorEnvCall) => { - let sbi_msg = SbiMessage::from_regs(self.regs.guest_regs.gprs.a_regs()).ok(); - if let Some(sbi_msg) = sbi_msg { - match sbi_msg { - SbiMessage::Base(base) => { - self.handle_base_function(base).unwrap(); - } - SbiMessage::GetChar => { - let c = sbi_rt::legacy::console_getchar(); - self.set_gpr_from_gpr_index(GprIndex::A0, c); - } - SbiMessage::PutChar(c) => { - sbi_rt::legacy::console_putchar(c); - } - SbiMessage::SetTimer(timer) => { - sbi_rt::set_timer(timer as u64); - // Clear guest timer interrupt - CSR.hvip - .read_and_clear_bits(traps::interrupt::VIRTUAL_SUPERVISOR_TIMER); - // Enable host timer interrupt - CSR.sie - .read_and_set_bits(traps::interrupt::SUPERVISOR_TIMER); - } - SbiMessage::Reset(_) => { - sbi_rt::system_reset(sbi_rt::Shutdown, sbi_rt::SystemFailure); - } - SbiMessage::RemoteFence(rfnc) => { - self.handle_rfnc_function(rfnc).unwrap(); - } - SbiMessage::PMU(pmu) => { - self.handle_pmu_function(pmu).unwrap(); - } - _ => todo!(), - } - self.advance_pc(4); - Ok(AxVCpuExitReason::Nothing) - } else { - panic!() - } + let a = self.regs.guest_regs.gprs.a_regs(); + let param = [a[0], a[1], a[2], a[3], a[4], a[5]]; + let ret = self.sbi.handle_ecall(a[7], a[6], param); + self.set_gpr_from_gpr_index(GprIndex::A0, ret.error); + self.set_gpr_from_gpr_index(GprIndex::A1, ret.value); + self.advance_pc(4); + Ok(AxVCpuExitReason::Nothing) } Trap::Interrupt(Interrupt::SupervisorTimer) => { // debug!("timer irq emulation"); @@ -388,101 +390,4 @@ impl RISCVVCpu { } } } - - fn handle_base_function(&mut self, base: BaseFunction) -> AxResult<()> { - match base { - BaseFunction::GetSepcificationVersion => { - let version = sbi_rt::get_spec_version(); - self.set_gpr_from_gpr_index(GprIndex::A1, version.major() << 24 | version.minor()); - debug!( - "GetSepcificationVersion: {}", - version.major() << 24 | version.minor() - ); - } - BaseFunction::GetImplementationID => { - let id = sbi_rt::get_sbi_impl_id(); - self.set_gpr_from_gpr_index(GprIndex::A1, id); - } - BaseFunction::GetImplementationVersion => { - let impl_version = sbi_rt::get_sbi_impl_version(); - self.set_gpr_from_gpr_index(GprIndex::A1, impl_version); - } - BaseFunction::ProbeSbiExtension(extension) => { - let extension = sbi_rt::probe_extension(extension as usize).raw; - self.set_gpr_from_gpr_index(GprIndex::A1, extension); - } - BaseFunction::GetMachineVendorID => { - let mvendorid = sbi_rt::get_mvendorid(); - self.set_gpr_from_gpr_index(GprIndex::A1, mvendorid); - } - BaseFunction::GetMachineArchitectureID => { - let marchid = sbi_rt::get_marchid(); - self.set_gpr_from_gpr_index(GprIndex::A1, marchid); - } - BaseFunction::GetMachineImplementationID => { - let mimpid = sbi_rt::get_mimpid(); - self.set_gpr_from_gpr_index(GprIndex::A1, mimpid); - } - } - self.set_gpr_from_gpr_index(GprIndex::A0, 0); - Ok(()) - } - - fn handle_rfnc_function(&mut self, rfnc: RemoteFenceFunction) -> AxResult<()> { - self.set_gpr_from_gpr_index(GprIndex::A0, 0); - match rfnc { - RemoteFenceFunction::FenceI { - hart_mask, - hart_mask_base, - } => { - let sbi_ret = sbi_rt::remote_fence_i(hart_mask as usize, hart_mask_base as usize); - self.set_gpr_from_gpr_index(GprIndex::A0, sbi_ret.error); - self.set_gpr_from_gpr_index(GprIndex::A1, sbi_ret.value); - } - RemoteFenceFunction::RemoteSFenceVMA { - hart_mask, - hart_mask_base, - start_addr, - size, - } => { - let sbi_ret = sbi_rt::remote_sfence_vma( - hart_mask as usize, - hart_mask_base as usize, - start_addr as usize, - size as usize, - ); - self.set_gpr_from_gpr_index(GprIndex::A0, sbi_ret.error); - self.set_gpr_from_gpr_index(GprIndex::A1, sbi_ret.value); - } - } - Ok(()) - } - - fn handle_pmu_function(&mut self, pmu: PmuFunction) -> AxResult<()> { - self.set_gpr_from_gpr_index(GprIndex::A0, 0); - match pmu { - PmuFunction::GetNumCounters => { - self.set_gpr_from_gpr_index(GprIndex::A1, sbi_rt::pmu_num_counters()) - } - PmuFunction::GetCounterInfo(counter_index) => { - let sbi_ret = pmu_counter_get_info(counter_index as usize); - self.set_gpr_from_gpr_index(GprIndex::A0, sbi_ret.error); - self.set_gpr_from_gpr_index(GprIndex::A1, sbi_ret.value); - } - PmuFunction::StopCounter { - counter_index, - counter_mask, - stop_flags, - } => { - let sbi_ret = pmu_counter_stop( - counter_index as usize, - counter_mask as usize, - stop_flags as usize, - ); - self.set_gpr_from_gpr_index(GprIndex::A0, sbi_ret.error); - self.set_gpr_from_gpr_index(GprIndex::A1, sbi_ret.value); - } - } - Ok(()) - } } From cd71ac3cf73470b52fb483d584d17bbd56d0298c Mon Sep 17 00:00:00 2001 From: Zhouqi Jiang Date: Mon, 21 Oct 2024 21:10:38 +0800 Subject: [PATCH 2/4] fix: forward console extension as well for RISCVVCpuSbi Signed-off-by: Zhouqi Jiang --- src/vcpu.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/vcpu.rs b/src/vcpu.rs index 283d5e4..0b46f12 100644 --- a/src/vcpu.rs +++ b/src/vcpu.rs @@ -212,7 +212,7 @@ pub struct RISCVVCpu { #[derive(RustSBI)] struct RISCVVCpuSbi { timer: RISCVVCpuSbiTimer, - #[rustsbi(pmu, fence, reset, info)] + #[rustsbi(console, pmu, fence, reset, info)] forward: Forward, } From e2a1a3ec2c7c0f4dd76bd07fa8b09d1a5d902a5f Mon Sep 17 00:00:00 2001 From: Zhouqi Jiang Date: Mon, 21 Oct 2024 21:17:44 +0800 Subject: [PATCH 3/4] fix: remove unused dependencies Signed-off-by: Zhouqi Jiang --- Cargo.toml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index af917f9..9087581 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -12,8 +12,7 @@ bit_field = "0.10" riscv = { git = "https://github.com/rcore-os/riscv", features = ["inline-asm"] } riscv-decode = { git = "https://github.com/KuangjuX/riscv-decode.git" } rustsbi = { version = "0.4.0", features = ["forward"] } -sbi-spec = { version = "0.0.7", features = ["legacy"] } -sbi-rt = { version = "0.0.3", features = ["integer-impls", "legacy"] } +sbi-rt = { version = "0.0.3", features = ["integer-impls"] } tock-registers = "0.8.1" memoffset = { version = ">=0.6.5", features = ["unstable_const"] } From a7207d8b812036423d9a5cffbfd173164fdeb887 Mon Sep 17 00:00:00 2001 From: Zhouqi Jiang Date: Wed, 23 Oct 2024 23:06:00 +0800 Subject: [PATCH 4/4] fix: repair code to build under nightly 2024-05-02 for ArceOS project Signed-off-by: Zhouqi Jiang --- src/detect.rs | 3 ++- src/lib.rs | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/detect.rs b/src/detect.rs index 3f78f5b..2849b54 100644 --- a/src/detect.rs +++ b/src/detect.rs @@ -147,7 +147,7 @@ struct TrapFrame { // handle exceptions only rather than interrupts. #[naked] unsafe extern "C" fn on_detect_trap() -> ! { - core::arch::naked_asm!( + asm!( ".p2align 2", "addi sp, sp, -8*21", "sd ra, 0*8(sp)", @@ -205,5 +205,6 @@ unsafe extern "C" fn on_detect_trap() -> ! { "addi sp, sp, 8*21", "sret", rust_detect_trap = sym rust_detect_trap, + options(noreturn), ) } diff --git a/src/lib.rs b/src/lib.rs index 41b3677..3ac113c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -2,6 +2,7 @@ #![feature(doc_cfg)] #![feature(naked_functions)] #![feature(riscv_ext_intrinsics)] +#![feature(asm_const)] #![doc = include_str!("../README.md")] #[macro_use]