diff --git a/patch/u-boot/u-boot-sunxi/arm64-sun50i-h313-add-x96q-lpddr3-defconfig.patch b/patch/u-boot/u-boot-sunxi/board_x96-mate/arm64-sun50i-h313-add-x96q-lpddr3-defconfig.patch similarity index 100% rename from patch/u-boot/u-boot-sunxi/arm64-sun50i-h313-add-x96q-lpddr3-defconfig.patch rename to patch/u-boot/u-boot-sunxi/board_x96-mate/arm64-sun50i-h313-add-x96q-lpddr3-defconfig.patch diff --git a/patch/u-boot/u-boot-sunxi/board_x96-mate/sunsi-add-h616-internal-eth-phy-support.patch b/patch/u-boot/u-boot-sunxi/board_x96-mate/sunsi-add-h616-internal-eth-phy-support.patch new file mode 100644 index 000000000000..2c3cc6fdbf8f --- /dev/null +++ b/patch/u-boot/u-boot-sunxi/board_x96-mate/sunsi-add-h616-internal-eth-phy-support.patch @@ -0,0 +1,205 @@ +diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi +index 74aed0d232a..091d52be962 100644 +--- a/arch/arm/dts/sun50i-h616.dtsi ++++ b/arch/arm/dts/sun50i-h616.dtsi +@@ -209,6 +209,14 @@ + bias-pull-up; + }; + ++ /omit-if-no-ref/ ++ rmii_pins: rmii-pins { ++ pins = "PA0", "PA1", "PA2", "PA3", "PA4", ++ "PA5", "PA6", "PA7", "PA8", "PA9"; ++ function = "emac1"; ++ drive-strength = <40>; ++ }; ++ + /omit-if-no-ref/ + spi0_pins: spi0-pins { + pins = "PC0", "PC2", "PC4"; +@@ -504,6 +512,25 @@ + }; + }; + ++ emac1: ethernet@5030000 { ++ compatible = "allwinner,sun50i-h616-emac1"; ++ syscon = <&syscon 1>; ++ reg = <0x05030000 0x10000>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC1>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC1>; ++ clock-names = "stmmaceth"; ++ status = "disabled"; ++ ++ mdio1: mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ + usbotg: usb@5100000 { + compatible = "allwinner,sun50i-h616-musb", + "allwinner,sun8i-h3-musb"; +diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h b/arch/arm/include/asm/arch-sunxi/i2c.h +index f0da46d863c..914f16b2c46 100644 +--- a/arch/arm/include/asm/arch-sunxi/i2c.h ++++ b/arch/arm/include/asm/arch-sunxi/i2c.h +@@ -13,6 +13,9 @@ + #ifdef CONFIG_I2C1_ENABLE + #define CFG_I2C_MVTWSI_BASE1 SUNXI_TWI1_BASE + #endif ++#ifdef CONFIG_I2C3_ENABLE ++#define CONFIG_I2C_MVTWSI_BASE3 SUNXI_TWI3_BASE ++#endif + #ifdef CONFIG_R_I2C_ENABLE + #define CFG_I2C_MVTWSI_BASE2 SUNXI_R_TWI_BASE + #endif +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index 6dcbb096f74..fa9d67e09a0 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -771,6 +771,15 @@ config I2C1_ENABLE + ---help--- + See I2C0_ENABLE help text. + ++if MACH_SUN50I_H616 ++config I2C3_ENABLE ++ bool "Enable I2C/TWI controller 3" ++ default n ++ select CMD_I2C ++ ---help--- ++ See I2C0_ENABLE help text. ++endif ++ + if SUNXI_GEN_SUN6I || SUN50I_GEN_H6 + config R_I2C_ENABLE + bool "Enable the PRCM I2C/TWI controller" +diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c +index 391a65a5495..b44e741627e 100644 +--- a/arch/arm/mach-sunxi/board.c ++++ b/arch/arm/mach-sunxi/board.c +@@ -460,6 +460,7 @@ void board_init_f(ulong dummy) + /* Needed early by sunxi_board_init if PMU is enabled */ + i2c_init_board(); + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); ++ i2c_set_bus_num(0); + #endif + sunxi_board_init(); + } +diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c +index 7926394cf76..7c84d731f84 100644 +--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c ++++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c +@@ -46,6 +46,10 @@ void clock_init_safe(void) + * DRAM initialization code. + */ + writel(MBUS_CLK_SRC_PLL6X2 | MBUS_CLK_M(3), &ccm->mbus_cfg); ++ ++ writel(0x10001, 0x030017ac); ++ writel(0x50, 0x0300a028); ++ writel(0x20, 0x0300a040); + } + #endif + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index f321cd58a6e..d5633ad5ca6 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -107,6 +108,17 @@ void i2c_init_board(void) + #endif + #endif + ++#ifdef CONFIG_I2C3_ENABLE ++#if defined(CONFIG_MACH_SUN50I_H616) ++ sunxi_gpio_set_cfgpin(SUNXI_GPA(10), 2); ++ sunxi_gpio_set_cfgpin(SUNXI_GPA(11), 2); ++ sunxi_gpio_set_cfgpin(SUNXI_GPA(12), 2); ++ sunxi_gpio_set_pull(SUNXI_GPA(10), SUNXI_GPIO_PULL_UP); ++ sunxi_gpio_set_pull(SUNXI_GPA(11), SUNXI_GPIO_PULL_UP); ++ clock_twi_onoff(3, 1); ++#endif ++#endif ++ + #ifdef CONFIG_R_I2C_ENABLE + #ifdef CONFIG_MACH_SUN50I + clock_twi_onoff(5, 1); +@@ -572,6 +584,7 @@ static void sunxi_spl_store_dram_size(phys_addr_t dram_size) + void sunxi_board_init(void) + { + int power_failed = 0; ++ u8 data[2]; + + #ifdef CONFIG_LED_STATUS + if (IS_ENABLED(CONFIG_SPL_DRIVERS_MISC)) +@@ -666,6 +679,23 @@ void sunxi_board_init(void) + clock_set_pll1(get_board_sys_clk()); + else + printf("Failed to set core voltage! Can't set CPU frequency\n"); ++ ++ i2c_set_bus_num(1); ++ data[0] = 0; ++ data[1] = 0; ++ i2c_write(0x10, 0xfe, 1, data, 2); ++ i2c_write(0x10, 2, 1, data, 2); ++ data[1] = 1; ++ i2c_write(0x10, 2, 1, data, 2); ++ data[1] = 0xf; ++ i2c_write(0x10, 0x16, 1, data, 2); ++ data[1] = 3; ++ i2c_write(0x10, 0x14, 1, data, 2); ++ data[1] = 0x60; ++ i2c_write(0x10, 0xfe, 1, data, 2); ++ data[0] = 0x08; ++ data[1] = 0x14; ++ i2c_write(0x10, 0, 1, data, 2); + } + #endif /* CONFIG_SPL_BUILD */ + +diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c +index 04c3274fbe1..d0b80d4cec1 100644 +--- a/drivers/net/sun8i_emac.c ++++ b/drivers/net/sun8i_emac.c +@@ -909,6 +909,11 @@ static const struct emac_variant emac_variant_h6 = { + .support_rmii = true, + }; + ++static const struct emac_variant emac_variant_h616_1 = { ++ .syscon_offset = 0x34, ++ .support_rmii = true, ++}; ++ + static const struct udevice_id sun8i_emac_eth_ids[] = { + { .compatible = "allwinner,sun8i-a83t-emac", + .data = (ulong)&emac_variant_a83t }, +@@ -920,6 +925,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = { + .data = (ulong)&emac_variant_a64 }, + { .compatible = "allwinner,sun50i-h6-emac", + .data = (ulong)&emac_variant_h6 }, ++ { .compatible = "allwinner,sun50i-h616-emac1", ++ .data = (ulong)&emac_variant_h616_1 }, + { } + }; + +diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c +index e5102180902..8f4517c177f 100644 +--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c ++++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c +@@ -710,6 +710,7 @@ static const struct sunxi_pinctrl_desc __maybe_unused sun50i_h6_r_pinctrl_desc = + + static const struct sunxi_pinctrl_function sun50i_h616_pinctrl_functions[] = { + { "emac0", 2 }, /* PI0-PI16 */ ++ { "emac1", 2 }, /* PA0-PA9 */ + { "gpio_in", 0 }, + { "gpio_out", 1 }, + { "mmc0", 2 }, /* PF0-PF5 */ diff --git a/patch/u-boot/u-boot-sunxi/board_x96q/arm64-sun50i-h313-add-x96q-lpddr3-defconfig.patch b/patch/u-boot/u-boot-sunxi/board_x96q/arm64-sun50i-h313-add-x96q-lpddr3-defconfig.patch new file mode 100644 index 000000000000..167229ff9aeb --- /dev/null +++ b/patch/u-boot/u-boot-sunxi/board_x96q/arm64-sun50i-h313-add-x96q-lpddr3-defconfig.patch @@ -0,0 +1,215 @@ +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -836,6 +836,7 @@ + dtb-$(CONFIG_MACH_SUN50I_H616) += \ + sun50i-h616-orangepi-zero2.dtb \ + sun50i-h618-orangepi-zero3.dtb \ ++ sun50i-h313-x96q-lpddr3.dtb \ + sun50i-h616-x96-mate.dtb + + +diff --git a/configs/x96q_lpddr3_defconfig b/configs/x96q_lpddr3_defconfig ++ new file mode 100755 ++ index 000000000..306157b84 ++++ b/configs/x96q_lpddr3_defconfig +@@ -0,0 +1,31 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_DEFAULT_DEVICE_TREE="sun50i-h313-x96q-lpddr3" ++CONFIG_SPL=y ++CONFIG_SUNXI_DRAM_H616_LPDDR3=y ++CONFIG_DRAM_CLK=600 ++CONFIG_DRAM_SUN50I_H616_DX_ODT=0x06060606 ++CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0d0d0d0d ++CONFIG_DRAM_SUN50I_H616_CA_DRI=0x00000d0d ++CONFIG_DRAM_SUN50I_H616_ODT_EN=0x00000001 ++CONFIG_DRAM_SUN50I_H616_TPR0=0x0 ++CONFIG_DRAM_SUN50I_H616_TPR2=0x00000000 ++CONFIG_DRAM_SUN50I_H616_TPR10=0x002f3359 ++CONFIG_DRAM_SUN50I_H616_TPR11=0xaa889967 ++CONFIG_DRAM_SUN50I_H616_TPR12=0xeeee8979 ++CONFIG_MACH_SUN50I_H616=y ++CONFIG_R_I2C_ENABLE=y ++CONFIG_SPL_I2C=y ++CONFIG_SPL_I2C_SUPPORT=y ++CONFIG_SPL_SYS_I2C_LEGACY=y ++CONFIG_SYS_I2C_MVTWSI=y ++CONFIG_SYS_I2C_SLAVE=0x7f ++CONFIG_SYS_I2C_SPEED=100000 ++CONFIG_SYS_MONITOR_LEN=786432 ++CONFIG_PHY_REALTEK=y ++CONFIG_SUN8I_EMAC=y ++CONFIG_I2C3_ENABLE=y ++CONFIG_AXP313_POWER=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_MUSB_GADGET=y +diff --git a/arch/arm/dts/sun50i-h313-x96q-lpddr3.dts b/arch/arm/dts/sun50i-h313-x96q-lpddr3.dts +new file mode 100644 +index 000000000..306157b84 +--- /dev/null ++++ b/arch/arm/dts/sun50i-h313-x96q-lpddr3.dts +@@ -0,0 +1,162 @@ ++// SPDX-License-Identifier: (GPL-2.0+ or MIT) ++/* ++ * Author: piotr.oniszczuk@gmail.com ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-h616.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ model = "hechuang,x96q LPDDR3"; ++ compatible = "hechuang,x96-q", "allwinner,sun50i-h616"; ++ ++ aliases { ++ mmc0 = &mmc0; ++ mmc1 = &mmc1; ++ mmc2 = &mmc2; ++ ethernet0 = &emac1; ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-red { ++ function = LED_FUNCTION_DISK_ACTIVITY; ++ color = ; ++ gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ ++ linux,default-trigger = "mmc0"; ++ }; ++ }; ++ ++ reg_vcc5v: vcc5v { ++ /* board wide 5V supply directly from the USB-C socket */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-5v"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++ status = "okay"; ++}; ++ ++&cpu1 { ++ cpu-supply = <®_dcdc2>; ++ status = "okay"; ++}; ++ ++&cpu2 { ++ cpu-supply = <®_dcdc2>; ++ status = "okay"; ++}; ++ ++&cpu3 { ++ cpu-supply = <®_dcdc2>; ++ status = "okay"; ++}; ++ ++&emac1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rmii_pins>; ++ phy-mode = "rmii"; ++ phy-handle = <&rmii_phy>; ++ phy-supply = <®_aldo1>; ++ allwinner,rx-delay-ps = <3100>; ++ allwinner,tx-delay-ps = <700>; ++ status = "okay"; ++}; ++ ++&mdio1 { ++ rmii_phy: ethernet-phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ ++&mmc0 { ++ vmmc-supply = <®_dldo2>; ++ broken-cd; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ vmmc-supply = <®_dldo2>; ++ broken-cd; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc2 { ++ vmmc-supply = <®_dldo2>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&r_i2c { ++ status = "okay"; ++ ++ axp313a: pmic@36 { ++ compatible = "x-powers,axp313a"; ++ reg = <0x36>; ++ wakeup-source; ++ ++ regulators { ++ reg_dcdc1: dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1160000>; ++ regulator-max-microvolt = <1160000>; ++ regulator-name = "vdd-cpu"; ++ }; ++ ++ reg_dcdc2: dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1160000>; ++ regulator-max-microvolt = <1160000>; ++ regulator-name = "vdd-gpu-sys"; ++ }; ++ ++ reg_dcdc3: dcdc3 { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vdd-dram"; ++ }; ++ ++ reg_aldo1: ldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-sys"; ++ }; ++ ++ reg_dldo2: ldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3-ext"; ++ }; ++ }; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ status = "okay"; ++};