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cpu.S
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cpu.S
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.file "cpu.S"
__SP_H__ = 0x3e
__SP_L__ = 0x3d
__SREG__ = 0x3f
__tmp_reg__ = 0
__zero_reg__ = 1
const_one = 2
/* Static register variables */
_A = 20
_X = 4
_Y = 5
_S = 6
_P = 16
_NZC = 17
_PCL = 24
_PCH = 25
time0 = 18
time1 = 19
time2 = 14
time3 = 15
/* Loop-local register variables */
value = 3
opcode = 10
opcode_hi = 11
cycles = 21
fptr_lo = 22
fptr_hi = 23
data = 28
addr_lo = 28
addr_hi = 29
XL = 26
XH = 27
YL = 28
YH = 29
ZL = 30
ZH = 31
temp0 = 26
;;; Format of status flag (6502 vs AVR)
;;; 6502: NV1BDIZC
;;; AVR: ITHSVNZC
/* Status flags */
C_FLAG = 0x01
Z_FLAG = 0x02
I_FLAG = 0x04
D_FLAG = 0x08
B_FLAG = 0x10
/* bit 5 is always 1 */
V_FLAG = 0x40
N_FLAG = 0x80
#define TICK(n) \
subi time0,(n) $ \
rjmp ticked
#define TICK1(n) \
subi time0,(n) $ \
rjmp ticked1
#define ZERO_PAGE hi8(ram)
#define STACK_PAGE hi8(ram+256)
#define ROM_PAGE_FF hi8(dos1541-0xc000+0xff00)
#define RAM_PAGES 8 /* should be 8 if we have more than 2k of SRAM available */
.macro LED_INIT
;; Bit 5 for Nano, bit 7 for Mega
sbi 4,7 ; Set DDRB5 to 'output'
.endm
.macro LED_ON ; Turn on LED
sbi 5,7 ; Set PORTB5 (pin 13, LED)
.endm
.macro LED_OFF ; Turn off LED
cbi 5,7 ; Clear PORTB5 (pin 13, LED)
.endm
#define PUSH(reg) \
mov ZL, _S $ \
ldi ZH, STACK_PAGE $ \
st Z, (reg) $ \
dec _S
#define PULL(reg) \
inc _S $ \
mov ZL, _S $ \
ldi ZH, STACK_PAGE $ \
ld (reg), Z
/* reg+1:reg <- ram[addr+1]:ram[addr] */
#define LDW_ZERO_PAGE(reg,addr) \
mov ZL,(addr) $ \
ldi ZH,ZERO_PAGE $ \
ld (reg),Z $ \
inc ZL $ \
ld (reg)+1,Z
.section .text.clock_advance,"ax",@progbits
.type clock_advance, @function
clock_advance:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
sub time0,cycles ; time_left.20, D.3675
sbc time1,__zero_reg__ ; time_left.20, D.3675
sbc time2,__zero_reg__ ; time_left.20, D.3675
sbc time3,__zero_reg__ ; time_left.20, D.3675
ret
.size clock_advance, .-clock_advance
.section .text.unpack_flags,"ax",@progbits
.type unpack_flags, @function
unpack_flags:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
bst _P,0 ; C <- P.0
bld _NZC,0
bst _P,1 ; Z <- P.1
bld _NZC,1
bst _P,7 ; N <- P.7
bld _NZC,2
ret
.size unpack_flags, .-unpack_flags
.section .text.pack_flags,"ax",@progbits
.type pack_flags, @function
pack_flags:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
bst _NZC,0 ; P.0 <- C
bld _P,0
bst _NZC,1 ; P.1 <- Z
bld _P,1
bst _NZC,2 ; P.7 <- N
bld _P,7
cbr _P,B_FLAG ; clear B flag
sbr _P,0x20 ; set 1 flag
ret
.size pack_flags, .-pack_flags
.section .text.addr_abs,"ax",@progbits
.global addr_abs
.type addr_abs, @function
addr_abs:
/* addr_hi:addr_lo <- mem_read(++PC), PC += 2 */
/* assumes that mem(PC+1) is already in data/addr_lo */
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
/* cycles: 8+ret = 12 */
.L__stack_usage = 0
movw ZL,_PCL ; Z <- PC
adiw _PCL,1 ; PC++
brpl addr_abs_lo ;
addr_abs_hi:
subi ZH,hi8(-(dos1541-0xc000)) ;
lpm addr_hi,Z ; addr_hi <- rom[PC - 0xc0000]
ret
addr_abs_lo:
subi ZH,hi8(-(ram)) ;
ld addr_hi,Z ; load from ram[addr]
ret
.size addr_abs, .-addr_abs
.section .text.cpu_reset,"ax",@progbits
.global cpu_reset
.type cpu_reset, @function
cpu_reset:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
ldi ZL,0xfc
ldi ZH,ROM_PAGE_FF
lpm r24,Z+ ; PCL <- rom[0xfffc]
sts reg_pc,r24
lpm r24,Z ; PCH <- rom[0xfffd]
sts reg_pc+1,r24
ldi r24,0xff
sts time_left,r24
sts time_left+1,r24
sts time_left+2,r24
sts time_left+3,r24
ret
.size cpu_reset, .-cpu_reset
.section .text.cpu_get_pc,"ax",@progbits
.global cpu_get_pc
.type cpu_get_pc, @function
cpu_get_pc:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
lds r24,reg_pc
lds r25,reg_pc+1
ret
.size cpu_get_pc, .-cpu_get_pc
.section .text.cpu_get_regs,"ax",@progbits
.global cpu_get_regs
.type cpu_get_regs, @function
cpu_get_regs:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
lds r25,reg_a
lds r24,reg_x
lds r23,reg_y
lds r22,reg_s
ret
.size cpu_get_regs, .-cpu_get_regs
.section .text.cpu_irq,"ax",@progbits
.global cpu_irq
.type cpu_irq, @function
cpu_irq:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
sbrc _P,2 ; skip if I flag is clear
ret ;
PUSH(_PCH)
PUSH(_PCL)
rcall pack_flags ;
PUSH(_P) ; stack[S--] <- P
sbr _P,I_FLAG ; set I flag
ldi ZL,0xfe
ldi ZH,ROM_PAGE_FF
lpm _PCL,Z+ ; PCL <- rom[0xfffe]
lpm _PCH,Z ; PCH <- rom[0xffff]
ldi cycles,7 ; 7 cycles
rjmp clock_advance ;
ret
.size cpu_irq, .-cpu_irq
.section .text.cpu_nmi,"ax",@progbits
.global cpu_nmi
.type cpu_nmi, @function
cpu_nmi:
/* prologue: function */
/* frame size = 0 */
/* stack size = 0 */
.L__stack_usage = 0
PUSH(_PCH)
PUSH(_PCL)
rcall pack_flags ;
PUSH(_P) ; stack[S--] <- P
ldi ZL,0xfa
ldi ZH,ROM_PAGE_FF
lpm _PCL,Z+ ; PCL <- rom[0xfffa]
lpm _PCH,Z ; PCH <- rom[0xfffb]
ldi cycles,7 ; 7 cycles
rjmp clock_advance ;
ret
.size cpu_nmi, .-cpu_nmi
.section .text.cpu_main,"ax",@progbits
/* align to 256-word (512-byte) boundary */
.p2align 9
opcode_table:
rjmp x00_BRK
rjmp x01_ORA_inx
rjmp x02
rjmp x03_SLO_inx_undocumented
rjmp x04_NOP_zpg_undocumented
rjmp x05_ORA_zpg
rjmp x06_ASL_zpg
rjmp x07_SLO_zpg_undocumented
rjmp x08_PHP
rjmp x09_ORA_imm
rjmp x0a_ASL_acc
rjmp x0b_ANC_imm_undocumented
rjmp x0c_NOP_abs_undocumented
rjmp x0d_ORA_abs
rjmp x0e_ASL_abs
rjmp x0f_SLO_abs_undocumented
rjmp x10_BPL
rjmp x11_ORA_iny
rjmp x12
rjmp x13_SLO_iny_undocumented
rjmp x14_NOP_zpx_undocumented
rjmp x15_ORA_zpx
rjmp x16_ASL_zpx
rjmp x17_SLO_zpx_undocumented
rjmp x18_CLC
rjmp x19_ORA_aby
rjmp x1a_NOP_undocumented
rjmp x1b_SLO_aby_undocumented
rjmp x1c_NOP_abx_undocumented
rjmp x1d_ORA_abx
rjmp x1e_ASL_abx
rjmp x1f_SLO_abx_undocumented
rjmp x20_JSR
rjmp x21_AND_inx
rjmp x22
rjmp x23_RLA_inx_undocumented
rjmp x24_BIT_zpg
rjmp x25_AND_zpg
rjmp x26_ROL_zpg
rjmp x27_RLA_zpg_undocumented
rjmp x28_PLP
rjmp x29_AND_imm
rjmp x2a_ROL_acc
rjmp x2b_ANC_imm_undocumented
rjmp x2c_BIT_abs
rjmp x2d_AND_abs
rjmp x2e_ROL_abs
rjmp x2f_RLA_abs_undocumented
rjmp x30_BMI
rjmp x31_AND_iny
rjmp x32
rjmp x33_RLA_iny_undocumented
rjmp x34_NOP_zpx_undocumented
rjmp x35_AND_zpx
rjmp x36_ROL_zpx
rjmp x37_RLA_zpx_undocumented
rjmp x38_SEC
rjmp x39_AND_aby
rjmp x3a_NOP_undocumented
rjmp x3b_RLA_aby_undocumented
rjmp x3c_NOP_abx_undocumented
rjmp x3d_AND_abx
rjmp x3e_ROL_abx
rjmp x3f_RLA_abx_undocumented
rjmp x40_RTI
rjmp x41_EOR_inx
rjmp x42
rjmp x43_SRE_inx_undocumented
rjmp x44_NOP_zpg_undocumented
rjmp x45_EOR_zpg
rjmp x46_LSR_zpg
rjmp x47_SRE_zpg_undocumented
rjmp x48_PHA
rjmp x49_EOR_imm
rjmp x4a_LSR_acc
rjmp x4b_ASR_imm_undocumented
rjmp x4c_JMP_abs
rjmp x4d_EOR_abs
rjmp x4e_LSR_abs
rjmp x4f_SRE_abs_undocumented
rjmp x50_BVC
rjmp x51_EOR_iny
rjmp x52
rjmp x53_SRE_iny_undocumented
rjmp x54_NOP_zpx_undocumented
rjmp x55_EOR_zpx
rjmp x56_LSR_zpx
rjmp x57_SRE_zpx_undocumented
rjmp x58_CLI
rjmp x59_EOR_aby
rjmp x5a_NOP_undocumented
rjmp x5b_SRE_aby_undocumented
rjmp x5c_NOP_abx_undocumented
rjmp x5d_EOR_abx
rjmp x5e_LSR_abx
rjmp x5f_SRE_abx_undocumented
rjmp x60_RTS
rjmp x61_ADC_inx
rjmp x62
rjmp x63_RRA_inx_undocumented
rjmp x64_NOP_zpg_undocumented
rjmp x65_ADC_zpg
rjmp x66_ROR_zpg
rjmp x67_RRA_zpg_undocumented
rjmp x68_PLA
rjmp x69_ADC_imm
rjmp x6a_ROR_acc
rjmp x6b
rjmp x6c_JMP_ind
rjmp x6d_ADC_abs
rjmp x6e_ROR_abs
rjmp x6f_RRA_abs_undocumented
rjmp x70_BVS
rjmp x71_ADC_iny
rjmp x72
rjmp x73_RRA_iny_undocumented
rjmp x74_NOP_zpx_undocumented
rjmp x75_ADC_zpx
rjmp x76_ROR_zpx
rjmp x77_RRA_zpx_undocumented
rjmp x78_SEI
rjmp x79_ADC_aby
rjmp x7a_NOP_undocumented
rjmp x7b_RRA_aby_undocumented
rjmp x7c_NOP_abx_undocumented
rjmp x7d_ADC_abx
rjmp x7e_ROR_abx
rjmp x7f_RRA_abx_undocumented
rjmp x80_NOP_imm_undocumented
rjmp x81_STA_inx
rjmp x82_NOP_imm_undocumented
rjmp x83_SAX_inx_undocumented
rjmp x84_STY_zpg
rjmp x85_STA_zpg
rjmp x86_STX_zpg
rjmp x87_SAX_zpg_undocumented
rjmp x88_DEY
rjmp x89_NOP_imm_undocumented
rjmp x8a_TXA
rjmp x8b
rjmp x8c_STY_abs
rjmp x8d_STA_abs
rjmp x8e_STX_abs
rjmp x8f_SAX_abs_undocumented
rjmp x90_BCC
rjmp x91_STA_iny
rjmp x92
rjmp x93_SHA_iny_undocumented
rjmp x94_STY_zpx
rjmp x95_STA_zpx
rjmp x96_STX_zpy
rjmp x97_SAX_zpy_undocumented
rjmp x98_TYA
rjmp x99_STA_aby
rjmp x9a_TXS
rjmp x9b
rjmp x9c_SHY_abx_undocumented
rjmp x9d_STA_abx
rjmp x9e_SHX_aby_undocumented
rjmp x9f_SHA_aby_undocumented
rjmp xa0_LDY_imm
rjmp xa1_LDA_inx
rjmp xa2_LDX_imm
rjmp xa3_LAX_inx_undocumented
rjmp xa4_LDY_zpg
rjmp xa5_LDA_zpg
rjmp xa6_LDX_zpg
rjmp xa7_LAX_zpg_undocumented
rjmp xa8_TAY
rjmp xa9_LDA_imm
rjmp xaa_TAX
rjmp xab
rjmp xac_LDY_abs
rjmp xad_LDA_abs
rjmp xae_LDX_abs
rjmp xaf_LAX_abs_undocumented
rjmp xb0_BCS
rjmp xb1_LDA_iny
rjmp xb2
rjmp xb3_LAX_iny_undocumented
rjmp xb4_LDY_zpx
rjmp xb5_LDA_zpx
rjmp xb6_LDX_zpy
rjmp xb7_LAX_zpy_undocumented
rjmp xb8_CLV
rjmp xb9_LDA_aby
rjmp xba_TSX
rjmp xbb
rjmp xbc_LDY_abx
rjmp xbd_LDA_abx
rjmp xbe_LDX_aby
rjmp xbf_LAX_aby_undocumented
rjmp xc0_CPY_imm
rjmp xc1_CMP_inx
rjmp xc2_NOP_imm_undocumented
rjmp xc3_DCP_inx_undocumented
rjmp xc4_CPY_zpg
rjmp xc5_CMP_zpg
rjmp xc6_DEC_zpg
rjmp xc7_DCP_zpg_undocumented
rjmp xc8_INY
rjmp xc9_CMP_imm
rjmp xca_DEX
rjmp xcb_SBX_imm_undocumented
rjmp xcc_CPY_abs
rjmp xcd_CMP_abs
rjmp xce_DEC_abs
rjmp xcf_DCP_abs_undocumented
rjmp xd0_BNE
rjmp xd1_CMP_iny
rjmp xd2
rjmp xd3_DCP_iny_undocumented
rjmp xd4_NOP_zpx_undocumented
rjmp xd5_CMP_zpx
rjmp xd6_DEC_zpx
rjmp xd7_DCP_zpx_undocumented
rjmp xd8_CLD
rjmp xd9_CMP_aby
rjmp xda_NOP_undocumented
rjmp xdb_DCP_aby_undocumented
rjmp xdc_NOP_abx_undocumented
rjmp xdd_CMP_abx
rjmp xde_DEC_abx
rjmp xdf_DCP_abx_undocumented
rjmp xe0_CPX_imm
rjmp xe1_SBC_inx
rjmp xe2_NOP_imm_undocumented
rjmp xe3_ISB_inx_undocumented
rjmp xe4_CPX_zpg
rjmp xe5_SBC_zpg
rjmp xe6_INC_zpg
rjmp xe7_ISB_zpg_undocumented
rjmp xe8_INX
rjmp xe9_SBC_imm
rjmp xea_NOP
rjmp xeb_SBC_imm_undocumented
rjmp xec_CPX_abs
rjmp xed_SBC_abs
rjmp xee_INC_abs
rjmp xef_ISB_abs_undocumented
rjmp xf0_BEQ
rjmp xf1_SBC_iny
rjmp xf2
rjmp xf3_ISB_iny_undocumented
rjmp xf4_NOP_zpx_undocumented
rjmp xf5_SBC_zpx
rjmp xf6_INC_zpx
rjmp xf7_ISB_zpx_undocumented
rjmp xf8_SED
rjmp xf9_SBC_aby
rjmp xfa_NOP_undocumented
rjmp xfb_ISB_aby_undocumented
rjmp xfc_NOP_abx_undocumented
rjmp xfd_SBC_abx
rjmp xfe_INC_abx
rjmp xff_ISB_abx_undocumented
.global cpu_main
.type cpu_main, @function
cpu_main:
push r2
push r3
push r4
push r5
push r6
push r7
push r8
push r9
push r10
push r11
push r12
push r13
push r14
push r15
push r16
push r17
push r28
push r29
lds time0,time_left
lds time1,time_left+1
lds time2,time_left+2
lds time3,time_left+3
add time0,r22 ; time_left += cycles
adc time1,r23 ;
adc time2,r24 ;
adc time3,r25 ;
lds _PCL,reg_pc
lds _PCH,reg_pc+1
lds _A,reg_a
lds _X,reg_x
lds _Y,reg_y
lds _S,reg_s
lds _P,reg_p
in _NZC,__SREG__ ; copy upper bits of _NZC from AVR status
call unpack_flags ; load N, Z, and C from P
/* prologue: function */
/* frame size = 0 */
/* stack size = 14 */
.L__stack_usage = 14
;; initialize constant registers
ldi r30,1
mov const_one,r30
ldi r30,hi8(gs(opcode_table))
mov opcode_hi,r30
brpl load_opcode ; continue if time >= 0
rjmp .L366 ; save state and exit
tick_carry:
sbc time1,__zero_reg__ ;
sbc time2,__zero_reg__ ;
sbc time3,__zero_reg__ ;
brpl load_opcode ; continue if time >= 0
rjmp .L366 ; save state and exit
tick:
sub time0,cycles ; time_left -= cycles
ticked:
brcs tick_carry ; abort early if no carry
load_opcode:
movw ZL,_PCL ;
adiw _PCL,2 ; PC += 2
brpl load_opcode_ram ; branch if PC < 0x8000
load_opcode_rom:
subi ZH,hi8(-(dos1541-0xc000)) ;
lpm opcode,Z+ ; opcode <- rom[PC - 0xc0000]
lpm data,Z+ ; data <- rom[PC+1 - 0xc0000]
movw ZL,opcode ; ZH:ZL <- opcode_hi:opcode
ijmp ; jmp (opcode_table + opcode)
load_opcode_ram:
subi ZH,hi8(-(ram)) ;
ld opcode,Z+ ; opcode <- ram[PC]
ld data,Z ; data <- ram[PC+1]
movw ZL,opcode ; ZH:ZL <- opcode_hi:opcode
ijmp ; jmp (opcode_table + opcode)
tick_carry1:
sbc time1,__zero_reg__ ;
sbc time2,__zero_reg__ ;
sbc time3,__zero_reg__ ;
brpl load_opcode1 ; continue if time >= 0
sbiw _PCL,1 ; restore PC to proper location
rjmp .L366 ; save state and exit
ticked1:
;; At this point, PC points to the the byte AFTER the upcoming opcode
;; The upcoming opcode was prefetched last time and stored in `data`
brcs tick_carry1 ; abort early if no carry
load_opcode1:
movw ZL,_PCL ;
mov opcode,data ; opcode <- prefetched data from before
adiw _PCL,1 ; PC ++
brpl load_opcode_ram1 ; branch if PC < 0x8000
load_opcode_rom1:
subi ZH,hi8(-(dos1541-0xc000)) ;
lpm data,Z ; data <- rom[PC+1 - 0xc0000]
movw ZL,opcode ; ZH:ZL <- opcode_hi:opcode
ijmp ; jmp (opcode_table + opcode)
load_opcode_ram1:
subi ZH,hi8(-(ram)) ;
ld data,Z ; data <- ram[PC+1]
movw ZL,opcode ; ZH:ZL <- opcode_hi:opcode
ijmp ; jmp (opcode_table + opcode)
/***************************** READ INSTRUCTIONS ******************************/
#define READ_ZPG(label) \
ldi addr_hi,ZERO_PAGE $ \
ld data,Y $ \
ldi cycles,3 $ \
rjmp label
#define READ_ZPX(label) \
add addr_lo,_X $ \
ldi addr_hi,ZERO_PAGE $ \
ld data,Y $ \
ldi cycles,4 $ \
rjmp label
#define READ_ZPY(label) \
add addr_lo,_Y $ \
ldi addr_hi,ZERO_PAGE $ \
ld data,Y $ \
ldi cycles,4 $ \
rjmp label
#define READ_ABS(label) \
ldi fptr_lo,lo8(gs(label)) $ \
ldi fptr_hi,hi8(gs(label)) $ \
rjmp read_abs
#define READ_ABX(label) \
ldi fptr_lo,lo8(gs(label)) $ \
ldi fptr_hi,hi8(gs(label)) $ \
add addr_lo,_X $ \
rjmp read_abs_indexed
#define READ_ABY(label) \
ldi fptr_lo,lo8(gs(label)) $ \
ldi fptr_hi,hi8(gs(label)) $ \
add addr_lo,_Y $ \
rjmp read_abs_indexed
#define READ_INX(label) \
ldi fptr_lo,lo8(gs(label)) $ \
ldi fptr_hi,hi8(gs(label)) $ \
rjmp read_inx
#define READ_INY(label) \
ldi fptr_lo,lo8(gs(label)) $ \
ldi fptr_hi,hi8(gs(label)) $ \
rjmp read_iny
x01_ORA_inx:
READ_INX(ORA)
x05_ORA_zpg:
READ_ZPG(ORA)
x09_ORA_imm:
ldi cycles,2 ; cycles <- 2
ORA:
out __SREG__,_NZC
or _A,data ; A |= data
in _NZC,__SREG__ ; save N,Z,C
rjmp tick
x0d_ORA_abs:
READ_ABS(ORA)
x11_ORA_iny:
READ_INY(ORA)
x15_ORA_zpx:
READ_ZPX(ORA)
x19_ORA_aby:
READ_ABY(ORA)
x1d_ORA_abx:
READ_ABX(ORA)
x21_AND_inx:
READ_INX(AND)
x25_AND_zpg:
READ_ZPG(AND)
x29_AND_imm:
ldi cycles,2 ; cycles <- 2
AND:
out __SREG__,_NZC
and _A,data ; A &= data
in _NZC,__SREG__ ; save N,Z,C
rjmp tick
x2d_AND_abs:
READ_ABS(AND)
x31_AND_iny:
READ_INY(AND)
x35_AND_zpx:
READ_ZPX(AND)
x39_AND_aby:
READ_ABY(AND)
x3d_AND_abx:
READ_ABX(AND)
x41_EOR_inx:
READ_INX(EOR)
x45_EOR_zpg:
READ_ZPG(EOR)
x49_EOR_imm:
ldi cycles,2 ; cycles <- 2
EOR:
out __SREG__,_NZC
eor _A,data ; A ^= data
in _NZC,__SREG__ ; save N,Z,C
rjmp tick
x4d_EOR_abs:
READ_ABS(EOR)
x51_EOR_iny:
READ_INY(EOR)
x55_EOR_zpx:
READ_ZPX(EOR)
x59_EOR_aby:
READ_ABY(EOR)
x5d_EOR_abx:
READ_ABX(EOR)
x61_ADC_inx:
READ_INX(ADC)
x65_ADC_zpg:
READ_ZPG(ADC)
x69_ADC_imm:
ldi cycles,2 ; cycles <- 2
ADC:
sbrc _P,3 ; skip if decimal mode is clear
rjmp ADC_dec ; jump if decimal mode is set
ADC_bin:
out __SREG__,_NZC ; carry <- C
adc _A,data ; (carry, A) <- A + data + carry
in _NZC,__SREG__ ; save N,Z,C
bst _NZC,3 ; P.6 <- overflow
bld _P,6
rjmp tick
ADC_dec:
subi data,0x9a ; data += 0x66 (valid BCD won't overflow)
out __SREG__,_NZC ; carry <- C
adc _A,data ; (carry, A) <- A + data + carry
in _NZC,__SREG__ ; save N,Z,C
sbrs _NZC,5 ; if no half-carry, then A -= 0x06
subi _A,0x06
sbrs _NZC,0 ; if no carry, then A -= 0x60
subi _A,0x60
rjmp tick
x6d_ADC_abs:
READ_ABS(ADC)
x71_ADC_iny:
READ_INY(ADC)
x75_ADC_zpx:
READ_ZPX(ADC)
x79_ADC_aby:
READ_ABY(ADC)
x7d_ADC_abx:
READ_ABX(ADC)
xa1_LDA_inx:
READ_INX(LDA)
xa5_LDA_zpg:
READ_ZPG(LDA)
xa9_LDA_imm:
ldi cycles,2 ; cycles <- 2
LDA:
out __SREG__,_NZC ; carry <- C
mov _A,data ; A <- data
tst _A
in _NZC,__SREG__ ; save N,Z,C
rjmp tick
xad_LDA_abs:
READ_ABS(LDA)
xb1_LDA_iny:
READ_INY(LDA)
xb5_LDA_zpx:
READ_ZPX(LDA)
xb9_LDA_aby:
READ_ABY(LDA)
xbd_LDA_abx:
READ_ABX(LDA)
xc1_CMP_inx:
READ_INX(CMP)
xc5_CMP_zpg:
READ_ZPG(CMP)
xc9_CMP_imm:
ldi cycles,2 ; cycles <- 2
CMP:
cp _A,data ; A - data
in _NZC,__SREG__ ; save N,Z,C
eor _NZC,const_one ; invert C (AVR and 6502 have opposite convention for compare)
rjmp tick
xcd_CMP_abs:
READ_ABS(CMP)
xd1_CMP_iny:
READ_INY(CMP)
xd5_CMP_zpx:
READ_ZPX(CMP)
xd9_CMP_aby:
READ_ABY(CMP)
xdd_CMP_abx:
READ_ABX(CMP)
xe1_SBC_inx:
READ_INX(SBC)
xe5_SBC_zpg:
READ_ZPG(SBC)
xe9_SBC_imm:
xeb_SBC_imm_undocumented:
ldi cycles,2 ; cycles <- 2
SBC:
;; N, V, Z, C are set the same in decimal and binary mode
com data ; data <- ~data
out __SREG__,_NZC ; carry <- C
adc _A,data ; (carry, A) <- A + data + carry
in _NZC,__SREG__ ; save N,Z,C
bst _NZC,3 ; P.6 <- overflow
bld _P,6
sbrs _P,3 ; skip if decimal mode is set
rjmp tick
SBC_dec:
sbrs _NZC,5 ; if no half-carry, then A -= 0x06
subi _A,0x06
sbrs _NZC,0 ; if no carry, then A -= 0x60
subi _A,0x60
rjmp tick
xed_SBC_abs:
READ_ABS(SBC)
xf1_SBC_iny:
READ_INY(SBC)
xf5_SBC_zpx:
READ_ZPX(SBC)
xf9_SBC_aby:
READ_ABY(SBC)
xfd_SBC_abx:
READ_ABX(SBC)
xa2_LDX_imm:
ldi cycles,2 ; cycles <- 2
LDX:
out __SREG__,_NZC ; carry <- C
mov _X,data ; X <- data
tst _X
in _NZC,__SREG__ ; save N,Z,C
rjmp tick ;
xa6_LDX_zpg:
READ_ZPG(LDX)
xae_LDX_abs:
READ_ABS(LDX)
xb6_LDX_zpy:
READ_ZPY(LDX)
xbe_LDX_aby:
READ_ABY(LDX)
xa0_LDY_imm:
ldi cycles,2 ; cycles <- 2
LDY:
out __SREG__,_NZC ; carry <- C
mov _Y,data ; Y <- data
tst _Y
in _NZC,__SREG__ ; save N,Z,C
rjmp tick ;
xa4_LDY_zpg:
READ_ZPG(LDY)
xac_LDY_abs:
READ_ABS(LDY)
xb4_LDY_zpx:
READ_ZPX(LDY)
xbc_LDY_abx:
READ_ABX(LDY)
xe0_CPX_imm:
ldi cycles,2 ; cycles <- 2
CPX:
cp _X,data ; X - data
in _NZC,__SREG__ ; save N,Z,C
eor _NZC,const_one ; invert C (AVR and 6502 have opposite convention for compare)
rjmp tick
xe4_CPX_zpg:
READ_ZPG(CPX)
xec_CPX_abs:
READ_ABS(CPX)
xc0_CPY_imm:
ldi cycles,2 ; cycles <- 2
CPY:
cp _Y,data ; Y - data
in _NZC,__SREG__ ; save N,Z,C
eor _NZC,const_one ; invert C (AVR and 6502 have opposite convention for compare)
rjmp tick
xc4_CPY_zpg:
READ_ZPG(CPY)
xcc_CPY_abs:
READ_ABS(CPY)
x24_BIT_zpg:
READ_ZPG(BIT)
x2c_BIT_abs:
READ_ABS(BIT)
BIT:
bst data,7 ; N <- data.7
bld _NZC,2
bst data,6 ; P.6 <- data.6
bld _P,6
and data,_A ; Z <- data & A
in temp0,__SREG__
bst temp0,1
bld _NZC,1
rjmp tick
/* Undocumented read instructions */
LAX:
out __SREG__,_NZC ; carry <- C
tst data
in _NZC,__SREG__ ; save N,Z,C
mov _X,data ;
mov _A,data ;
rjmp tick
xa3_LAX_inx_undocumented:
READ_INX(LAX)
xa7_LAX_zpg_undocumented:
READ_ZPG(LAX)
xaf_LAX_abs_undocumented:
READ_ABS(LAX)
xb3_LAX_iny_undocumented:
READ_INY(LAX)
xb7_LAX_zpy_undocumented:
READ_ZPY(LAX)
xbf_LAX_aby_undocumented:
READ_ABY(LAX)
x80_NOP_imm_undocumented:
x82_NOP_imm_undocumented:
x89_NOP_imm_undocumented:
xc2_NOP_imm_undocumented:
xe2_NOP_imm_undocumented:
ldi cycles,2 ; cycles <- 2
NOP:
rjmp tick ;
x04_NOP_zpg_undocumented:
x44_NOP_zpg_undocumented:
x64_NOP_zpg_undocumented:
READ_ZPG(NOP)
x0c_NOP_abs_undocumented:
READ_ABS(NOP)
x14_NOP_zpx_undocumented:
x34_NOP_zpx_undocumented:
x54_NOP_zpx_undocumented:
x74_NOP_zpx_undocumented:
xd4_NOP_zpx_undocumented:
xf4_NOP_zpx_undocumented:
READ_ZPX(NOP)
x1c_NOP_abx_undocumented:
x3c_NOP_abx_undocumented:
x5c_NOP_abx_undocumented:
x7c_NOP_abx_undocumented:
xdc_NOP_abx_undocumented:
xfc_NOP_abx_undocumented:
READ_ABX(NOP)
/******************* ADDRESSING MODES FOR READ INSTRUCTIONS *******************/
/*
input: return address in fptr_hi:fptr_lo
output: data value in data, tick count in cycles
*/
.macro READ_ADDR_HI ; addr_hi <- read(PC++)
movw ZL,_PCL ; Z <- PC
adiw _PCL,1 ; PC++
brmi 1f ; branch if address in rom area
subi ZH,hi8(-(ram)) ;
ld addr_hi,Z ; addr_hi <- ram[addr]
rjmp 2f
1:
subi ZH,hi8(-(dos1541-0xc000)) ;
lpm addr_hi,Z ; addr_hi <- rom[PC - 0xc0000]
2:
.endm
read_abs_carry:
READ_ADDR_HI ; addr_hi <- read(PC++)
inc addr_hi ; addr_hi++
ldi cycles,5 ; cycles <- 5
rjmp read_mem ; data <- read(addr_hi:addr_lo), ijmp (fptr)
read_abs_indexed:
brcs read_abs_carry
read_abs:
READ_ADDR_HI ; addr_hi <- read(PC++)
ldi cycles,4 ; cycles <- 4
read_mem: ; data <- read(addr_hi:addr_lo), ijmp (ret)
cpi addr_hi,0xc0 ; branch if addr is in ROM
brsh read_mem_rom ;
read_mem_ram:
cpi addr_hi,RAM_PAGES ; branch if addr is above RAM
brsh read_mem_io ;
subi addr_hi,hi8(-(ram));