update_flags not working as expected for some ARM instructions

[cnheitman]

There seems to be an issue with update_flags on some ARM instruction (at least for ADC and SBC). More precisely, Capstone reports update_flags as true when it should be false (according to ARM reference manual).

The following code snippet shows the issue:

from capstone import *
from capstone.arm import *

CODE = [
    b"\x03\x00\xa1\xe0", # adcal r0, r1, r3
    b"\x03\x00\xb1\xe0", # adcsal r0, r1, r3
    b"\x03\x00\xc1\xe0", # sbcal r0, r1, r3
    b"\x03\x00\xd1\xe0", # sbcsal r0, r1, r3
    b"\x03\x00\x81\xe0", # addal r0, r1, r3
    b"\x03\x00\x91\xe0", # addsal r0, r1, r3
    b"\x03\x00\x41\xe0", # subal r0, r1, r3
    b"\x03\x00\x51\xe0", # subsal r0, r1, r3
]

md = Cs(CS_ARCH_ARM, CS_MODE_ARM)
md.detail = True

for code in CODE:
    for i in md.disasm(code, 0x1000):
        print("{} {} ; update_flags: {}".format(i.mnemonic, i.op_str, i.update_flags))

Output:

adc r0, r1, r3 ; update_flags: True
adcs r0, r1, r3 ; update_flags: True
sbc r0, r1, r3 ; update_flags: True
sbcs r0, r1, r3 ; update_flags: True
add r0, r1, r3 ; update_flags: False
adds r0, r1, r3 ; update_flags: True
sub r0, r1, r3 ; update_flags: False
subs r0, r1, r3 ; update_flags: True

Here update_flags is true for ADC and SBC when it should be false (generally, it should only report true for those instructions with the s suffix). Notice that this does not happen with neither ADD nor SUB.

[aquynh]

You may use "cstool -d" to avoid writing code.

Is this on the "next" branch?

[cnheitman]

Thanks, I wasn't aware of the tool.
I tested it originally on version 4.0.1.
I've just tried on "next" branch and it also reports true when it should report false.
Retaled to this issue #247 (apparently reintroduced at some point).

[JonathanSalwan]

@aquynh up :)

[Rot127]

Gets closed with #1949

[pipe01]

This still seems to be an issue on 5.0.1

[Rot127]

Are you able to use the next branch in your project? This fix is not so easily ported back. Because, from v5 on, we introduced a new updater (auto-sync) and changed the architecture module structure quite a bit.
If you use next you would get more precise details, alias detection and is based on LLVM 16 (soon 18).