From 3dcc4a0aca108b40f89257dc340025d5f72d8bd8 Mon Sep 17 00:00:00 2001 From: Sandeep Rajendran Date: Mon, 4 May 2020 09:51:51 -0700 Subject: [PATCH] provide reset values for registers driving cease and wfi --- src/main/scala/tile/Interrupts.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/main/scala/tile/Interrupts.scala b/src/main/scala/tile/Interrupts.scala index e7e6deca535..851cc718110 100644 --- a/src/main/scala/tile/Interrupts.scala +++ b/src/main/scala/tile/Interrupts.scala @@ -95,7 +95,7 @@ trait SourcesExternalNotifications { this: BaseTile => def reportCease(could_cease: Option[Bool], quiescenceCycles: Int = 8) { def waitForQuiescence(cease: Bool): Bool = { // don't report cease until signal is stable for longer than any pipeline depth - val count = Reg(UInt(log2Ceil(quiescenceCycles + 1).W)) + val count = RegInit(0.U(log2Ceil(quiescenceCycles + 1).W)) val saturated = count >= quiescenceCycles.U when (!cease) { count := 0.U } when (cease && !saturated) { count := count + 1.U } @@ -116,6 +116,6 @@ trait SourcesExternalNotifications { this: BaseTile => def reportWFI(could_wfi: Option[Bool]) { val (wfi, _) = wfiNode.out(0) - wfi(0) := could_wfi.map(RegNext(_)).getOrElse(false.B) + wfi(0) := could_wfi.map(RegNext(_, init=false.B)).getOrElse(false.B) } }