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vivado_pid2474.str
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/*
Xilinx Vivado v2020.1 (64-bit) [Major: 2020, Minor: 1]
SW Build: 2902540 on Wed May 27 19:54:35 MDT 2020
IP Build: 2902112 on Wed May 27 22:43:36 MDT 2020
Process ID (PID): 2474
License: Customer
Current time: Tue Jan 16 15:08:51 CST 2024
Time zone: Taipei Standard Time (Asia/Taipei)
OS: Ubuntu
OS Version: 5.15.133.1-microsoft-standard-WSL2
OS Architecture: amd64
Available processors (cores): 6
Display: :0
Screen size: 2560x1440
Screen resolution (DPI): 100
Available screens: 1
Default font: family=Dialog,name=Dialog,style=plain,size=12
Java version: 9.0.4 64-bit
Java home: /opt/Xilinx/Vivado/2020.1/tps/lnx64/jre9.0.4
Java executable location: /opt/Xilinx/Vivado/2020.1/tps/lnx64/jre9.0.4/bin/java
Java initial memory (-Xms): 128 MB
Java maximum memory (-Xmx): 3 GB
User name: ntucms_wsl
User home directory: /home/ntucms_wsl
User working directory: /home/ntucms_wsl/RedPitaya-FPGA
User country: null
User language: en
User locale: en
RDI_BASEROOT: /opt/Xilinx/Vivado
HDI_APPROOT: /opt/Xilinx/Vivado/2020.1
RDI_DATADIR: /opt/Xilinx/Vivado/2020.1/data
RDI_BINDIR: /opt/Xilinx/Vivado/2020.1/bin
Vivado preferences file location: /home/ntucms_wsl/.Xilinx/Vivado/2020.1/vivado.xml
Vivado preferences directory: /home/ntucms_wsl/.Xilinx/Vivado/2020.1/
Vivado layouts directory: /home/ntucms_wsl/.Xilinx/Vivado/2020.1/data/layouts
PlanAhead jar file location: /opt/Xilinx/Vivado/2020.1/lib/classes/planAhead.jar
Vivado log file location: /home/ntucms_wsl/RedPitaya-FPGA/vivado.log
Vivado journal file location: /home/ntucms_wsl/RedPitaya-FPGA/vivado.jou
Engine tmp dir: ./.Xil/Vivado-2474-DESKTOP-GGQOMU5
Xilinx Environment Variables
----------------------------
XILINX: /opt/Xilinx/Vivado/2020.1/ids_lite/ISE
XILINX_DSP: /opt/Xilinx/Vivado/2020.1/ids_lite/ISE
XILINX_HLS: /opt/Xilinx/Vitis_HLS/2023.1
XILINX_PLANAHEAD: /opt/Xilinx/Vivado/2020.1
XILINX_VITIS:
XILINX_VIVADO: /opt/Xilinx/Vivado/2020.1
XILINX_VIVADO_HLS: /opt/Xilinx/Vivado/2020.1
GUI allocated memory: 471 MB
GUI max memory: 3,072 MB
Engine allocated memory: 1,735 MB
Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.
*/
// TclEventType: START_GUI
// TclEventType: START_PROGRESS_DIALOG
// Tcl Message: start_gui
// TclEventType: START_PROGRESS_DIALOG
// bz (cs): Sourcing Tcl script 'red_pitaya_vivado_project_Z20_4.tcl' : addNotify
// TclEventType: DEBUG_PROBE_SET_CHANGE
// Tcl Message: source red_pitaya_vivado_project_Z20_4.tcl
// Tcl Message: # set prj_name [lindex $argv 0] # puts "Project name: $prj_name"
// Tcl Message: Project name: v0.94
// Tcl Message: # cd prj/$prj_name # set path_brd ../../brd # set path_rtl rtl # set path_ip ip # set path_bd project/redpitaya.srcs/sources_1/bd/system/hdl # set path_sdc ../../sdc # set path_sdc_prj sdc # set_param board.repoPaths [list $path_brd] # set_param iconstr.diffPairPulltype {opposite} # set part xc7z020clg400-1 # create_project -part $part -force redpitaya ./project
// TclEventType: FILE_SET_NEW
// TclEventType: RUN_ADD
// TclEventType: RUN_CURRENT
// TclEventType: PROJECT_DASHBOARD_NEW
// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
// TclEventType: PROJECT_DASHBOARD_GADGET_NEW
// TclEventType: PROJECT_DASHBOARD_GADGET_CHANGE
// TclEventType: PROJECT_NEW
// [GUI Memory]: 117 MB (+119937kb) [00:00:05]
// [Engine Memory]: 1,712 MB (+1643629kb) [00:00:05]
// WARNING: HEventQueue.dispatchEvent() is taking 1334 ms.
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2020.1/data/ip'.
// TclEventType: FILE_SET_OPTIONS_CHANGE
// TclEventType: LOAD_FEATURE
// Tcl Message: INFO: [BD::TCL 103-2003] Currently there is no design <system> in project, so creating one...
// TclEventType: RSB_CHANGE_CURRENT_DIAGRAM
// TclEventType: RSB_SAVE_DIAGRAM
// TclEventType: RSB_LOCK_CHANGE
// TclEventType: FILE_SET_CHANGE
// HMemoryUtils.trashcanNow. Engine heap size: 1,435 MB. GUI used memory: 52 MB. Current time: 1/16/24, 3:08:52 PM CST
// TclEventType: RSB_LOCK_CHANGE
// TclEventType: RSB_SAVE_DIAGRAM
// TclEventType: RSB_OPEN_DIAGRAM
// Tcl Message: Wrote : </home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/system.bd>
closeView(PAResourceOtoP.PAViews_PROJECT_SUMMARY, "Project Summary"); // v
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: LOAD_FEATURE
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_PROPERTY_CHANGE
// Tcl Message: INFO: [BD::TCL 103-2004] Making design <system> as current_bd_design.
// Tcl Message: ## common::send_gid_msg -ssname BD::TCL -id 2005 -severity "INFO" "Currently the variable <design_name> is equal to \"$design_name\"."
// Tcl Message: INFO: [BD::TCL 103-2005] Currently the variable <design_name> is equal to "system".
// Tcl Message: INFO: [BD::TCL 103-2011] Checking if the following IPs exist in the project's IP catalog: xilinx.com:ip:axi_protocol_converter:2.1 xilinx.com:ip:proc_sys_reset:5.0 xilinx.com:ip:processing_system7:5.5 xilinx.com:ip:xadc_wiz:3.3 xilinx.com:ip:xlconstant:1.1 .
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_ADD_OBJECT
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: FILE_SET_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: RSB_ADD_OBJECT
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: RSB_ADD_OBJECT
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// Tcl Message: INFO: [Device 21-403] Loading part xc7z020clg400-1
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_PROPERTY_CHANGE
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: REPORT_IP_STATUS_STALE
// TclEventType: RSB_ADD_OBJECT
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_REMOVE_ADDRNETWORK
// TclEventType: RSB_INSERT_ADDRNETWORK
// TclEventType: RSB_CONNECTION_CHANGE
// TclEventType: RSB_SCRIPT_TASK
// TclEventType: MSGMGR_REFRESH_MSG
// TclEventType: RSB_PARAM_PROP
// TclEventType: RSB_SCRIPT_TASK
// TclEventType: RSB_PARAM_PROP
// TclEventType: RSB_SAVE_DIAGRAM
// TclEventType: FILE_SET_CHANGE
// TclEventType: RSB_SAVE_DIAGRAM
// TclEventType: RSB_SCRIPT_TASK
// TclEventType: RSB_SAVE_DIAGRAM
// TclEventType: FILE_SET_CHANGE
// TclEventType: RSB_SAVE_DIAGRAM
// TclEventType: RSB_SCRIPT_TASK
// TclEventType: FILE_SET_CHANGE
// Tcl Message: Wrote : </home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/system.bd> Wrote : </home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/ui/bd_c954508f.ui>
// Tcl Message: # generate_target all [get_files system.bd]
// Tcl Message: VHDL Output written to : /home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/synth/system.v VHDL Output written to : /home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/sim/system.v VHDL Output written to : /home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/hdl/system_wrapper.v
// Tcl Message: INFO: [BD 41-1029] Generation completed for the IP Integrator block axi_protocol_converter_0 . INFO: [BD 41-1029] Generation completed for the IP Integrator block proc_sys_reset . INFO: [BD 41-1029] Generation completed for the IP Integrator block axi_register_slice_0 .
// TclEventType: FILE_SET_CHANGE
// Tcl Message: INFO: [BD 41-1029] Generation completed for the IP Integrator block processing_system7 .
// TclEventType: FILE_SET_CHANGE
// Tcl Message: INFO: [BD 41-1029] Generation completed for the IP Integrator block xadc . INFO: [BD 41-1029] Generation completed for the IP Integrator block xlconstant .
// Tcl Message: Exporting to file /home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/hw_handoff/system.hwh Generated Block Design Tcl file /home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/hw_handoff/system_bd.tcl Generated Hardware Definition File /home/ntucms_wsl/RedPitaya-FPGA/prj/v0.94/project/redpitaya.srcs/sources_1/bd/system/synth/system.hwdef
// Tcl Message: generate_target: Time (s): cpu = 00:00:24 ; elapsed = 00:00:23 . Memory (MB): peak = 7068.605 ; gain = 0.000 ; free physical = 12513 ; free virtual = 18322
// Tcl Message: # add_files ../../$path_rtl # add_files $path_rtl # add_files $path_bd # set ip_files [glob -nocomplain $path_ip/*.xci] # if {$ip_files != ""} { # add_files $ip_files # } # add_files -fileset constrs_1 $path_sdc_prj/red_pitaya_4ADC.xdc # import_files -force
// Tcl Message: INFO: [filemgmt 20-348] Importing the appropriate files for fileset: 'constrs_1' INFO: [filemgmt 20-348] Importing the appropriate files for fileset: 'sources_1'
// Tcl Message: # update_compile_order -fileset sources_1
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// TclEventType: STOP_PROGRESS_DIALOG
// Tcl Message: # set_property top red_pitaya_top_4ADC [current_fileset]
// Elapsed time: 33 seconds
dismissDialog("Sourcing Tcl script 'red_pitaya_vivado_project_Z20_4.tcl'"); // bz (cs)
// TclEventType: STOP_PROGRESS_DIALOG
// Tcl Command: 'rdi::info_commands {device::*}'
// Tcl Command: 'rdi::info_commands {debug::*}'
// Tcl Command: 'rdi::info_commands {*}'
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sources_1
// [GUI Memory]: 130 MB (+7566kb) [00:00:48]
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_STALE
// HMemoryUtils.trashcanNow. Engine heap size: 1,545 MB. GUI used memory: 71 MB. Current time: 1/16/24, 3:38:52 PM CST
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sources_1
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_STALE
// G (cs): Invalid Top Module: addNotify
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Elapsed time: 2989 seconds
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (G)
dismissDialog("Invalid Top Module"); // G (cs)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// HMemoryUtils.trashcanNow. Engine heap size: 1,643 MB. GUI used memory: 63 MB. Current time: 1/16/24, 4:08:52 PM CST
// HMemoryUtils.trashcanNow. Engine heap size: 1,643 MB. GUI used memory: 63 MB. Current time: 1/16/24, 4:38:52 PM CST