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Project X-Ray - Xilinx Series 7 Bitstream Documentation

[TOC]

This repo contains the bitstream documentation database for Xilinx Series 7 devices.

HTML version of the Xilinx Series 7 BitStream is available on https://symbiflow.github.io/prjxray-db.

This documentation was generated using the Project X-Ray tools.

Due to the long time taken to create this database yourself, a prebuilt version is currently being provided by Tim 'mithro' Ansell <me@mith.ro>. The database is intended to kept in sync with the current prjxray output, but due to the manual nature required to create it, it may sometimes lag behind what you could create yourself using those tools.

Please try contacting Tim if you believe the database is more than a week out of date.

Contributions

As this repo is created from the prjxray output it doesn't accept external contributions. You are encourage to generate and maintain your own versions of this documentation if your needs are not being met by this repository.

The htmlgen.py is kept in sync with the version in Project X-Ray, please contribute all changes to that file and then request Tim to rebuild the HTML output.

License

These files are released under the very permissive CC0 1.0 Universal.

Details

Last updated on Fri 13 Nov 2020 05:59:22 PM UTC (2020-11-13T17:59:22+00:00).

Created using Project X-Ray version 0f939808.

Latest commit was;

commit 0f9398087501da7710200a26fe5e6fbbde566dbc
Merge: 780b7e4d fe82e0f2
Author: litghost <537074+litghost@users.noreply.github.com>
Date:   Tue Nov 10 14:12:23 2020 -0800

    Merge pull request #1491 from antmicro/mmcm_comp
    
    MMCM compensation

Database for artix7

Settings

Created using following settings/artix7.sh (sha256: a067074fade87ce054484872304ec70ee6992e5487c492f76a86143f6da45e03)

#!/bin/bash
# Copyright (C) 2017-2020  The Project X-Ray Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/ISC
#
# SPDX-License-Identifier: ISC
export XRAY_DATABASE="artix7"
export XRAY_PART="xc7a100tfgg676-1"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"

# All CLB's in part, all BRAM's in part, all DSP's in part.
# tcl queries IOB => don't bother adding
export XRAY_ROI_TILEGRID="RAMB36_X0Y0:RAMB36_X3Y39 RAMB18_X0Y0:RAMB18_X3Y79 DSP48_X0Y0:DSP48_X2Y79 IOB_X0Y0:IOB_X1Y199 SLICE_X0Y0:SLICE_X89Y199"

export XRAY_EXCLUDE_ROI_TILEGRID=""

# This is used by fuzzers/005-tilegrid/generate_full.py
# (special handling for frame addresses of certain IOIs -- see the script for details).
# This needs to be changed for any new device!
# If you have a FASM mismatch or unknown bits in IOIs, CHECK THIS FIRST.
export XRAY_IOI3_TILES="LIOI3_X0Y9 LIOI3_X0Y109 RIOI3_X57Y109"

# These settings must remain in sync
export XRAY_ROI="SLICE_X0Y150:SLICE_X51Y199 RAMB18_X0Y60:RAMB18_X0Y79 RAMB36_X0Y30:RAMB36_X0Y39 DSP48_X0Y60:DSP48_X0Y79 IOB_X0Y150:IOB_X0Y199"
# Most of CMT X0Y2.
export XRAY_ROI_GRID_X1="0"
export XRAY_ROI_GRID_X2="77"
# Include VBRK / VTERM
export XRAY_ROI_GRID_Y1="0"
export XRAY_ROI_GRID_Y2="51"

# clock pin
export XRAY_PIN_00="Y22"
# data pins
export XRAY_PIN_01="U17"
export XRAY_PIN_02="V17"
export XRAY_PIN_03="V16"
export XRAY_PIN_04="V14"
export XRAY_PIN_05="U14"
export XRAY_PIN_06="U16"

source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh

Results

Results have checksums;

Database for kintex7

Settings

Created using following settings/kintex7.sh (sha256: 8c4c506cbdc6a25696436bbe6359e3617c82a11931ad6e406a1c433b263527c4)

# Copyright (C) 2017-2020  The Project X-Ray Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/ISC
#
# SPDX-License-Identifier: ISC
export XRAY_DATABASE="kintex7"
export XRAY_PART="xc7k70tfbg676-2"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"

# FIXME: make entire part
export XRAY_ROI_TILEGRID="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB18_X0Y20:RAMB18_X0Y39 RAMB36_X0Y10:RAMB36_X0Y19"

export XRAY_EXCLUDE_ROI_TILEGRID=""

export XRAY_IOI3_TILES="LIOI3_X0Y9"

# These settings must remain in sync
export XRAY_ROI="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB18_X0Y20:RAMB18_X0Y39 RAMB36_X0Y10:RAMB36_X0Y19 IOB_X0Y50:IOB_X0Y99"
# Part of CMT X0Y1
export XRAY_ROI_GRID_X1="0"
export XRAY_ROI_GRID_X2="38"
# Include VBRK / VTERM
export XRAY_ROI_GRID_Y1="104"
export XRAY_ROI_GRID_Y2="156"

# Choose the first N High Range I/Os
export XRAY_PIN_00="K25"
export XRAY_PIN_01="K26"
export XRAY_PIN_02="L24"
export XRAY_PIN_03="L25"
export XRAY_PIN_04="M19"
export XRAY_PIN_05="M20"
export XRAY_PIN_06="M21"

source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh

Results

Results have checksums;

Database for zynq7

Settings

Created using following settings/zynq7.sh (sha256: 790d0886285b195daff0950f82ddb42635257c7c6400dcc5c7fb5b13f66ee6ba)

# Copyright (C) 2017-2020  The Project X-Ray Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/ISC
#
# SPDX-License-Identifier: ISC
export XRAY_DATABASE="zynq7"
export XRAY_PART="xc7z020clg484-1"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"

# All CLB's in part, all BRAM's in part, all DSP's in part.
export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X113Y149 RAMB18_X0Y0:RAMB18_X5Y59 RAMB36_X0Y0:RAMB36_X5Y29 DSP48_X0Y0:DSP48_X4Y59"

export XRAY_EXCLUDE_ROI_TILEGRID=""

export XRAY_IOI3_TILES="RIOI3_X73Y9 LIOI3_X0Y9"
export XRAY_PS7_INT="INT_L_X18Y100"

# These settings must remain in sync
export XRAY_ROI="SLICE_X0Y0:SLICE_X49Y49 RAMB18_X0Y0:RAMB18_X2Y19 RAMB36_X0Y0:RAMB36_X2Y9 IOB_X0Y0:IOB_X0Y49 DSP48_X0Y0:DSP48_X2Y19"

# Most of CMT X0Y2.
export XRAY_ROI_GRID_X1="0"
export XRAY_ROI_GRID_X2="86"
# Include VBRK / VTERM
export XRAY_ROI_GRID_Y1="105"
export XRAY_ROI_GRID_Y2="155"

export XRAY_PIN_00="Y9"
export XRAY_PIN_01="U10"
export XRAY_PIN_02="N17"
export XRAY_PIN_03="P18"

source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh

Results

Results have checksums;