; Assembly listing for method BilinearTest:BilinearInterpol_Vector(double[],double[],double,double,double[],double,double,double):double[]:this ; Emitting BLENDED_CODE for X64 CPU with AVX - Unix ; Tier-1 compilation ; optimized code ; rbp based frame ; fully interruptible ; No matching PGO data ; 0 inlinees with PGO data; 2 single block inlinees; 0 inlinees without PGO data ; Final local variable assignments ; ;* V00 this [V00 ] ( 0, 0 ) ref -> zero-ref this class-hnd single-def ; V01 arg1 [V01,T16] ( 5, 7 ) ref -> r15 class-hnd single-def ; V02 arg2 [V02,T09] ( 7, 34.68) ref -> rbx class-hnd single-def ; V03 arg3 [V03,T46] ( 4, 4 ) double -> [rbp-30H] single-def ; V04 arg4 [V04,T47] ( 4, 4 ) double -> [rbp-38H] single-def ; V05 arg5 [V05,T10] ( 7, 34.68) ref -> r14 class-hnd single-def ; V06 arg6 [V06,T48] ( 4, 4 ) double -> [rbp-40H] single-def ; V07 arg7 [V07,T49] ( 4, 4 ) double -> [rbp-48H] single-def ; V08 arg8 [V08,T50] ( 4, 4 ) double -> [rbp-50H] single-def ; V09 loc0 [V09,T17] ( 4, 6 ) ref -> r12 class-hnd exact single-def ; V10 loc1 [V10,T53] ( 3, 5 ) simd32 -> [rbp-70H] ld-addr-op single-def ; V11 loc2 [V11,T54] ( 3, 5 ) simd32 -> [rbp-90H] ld-addr-op single-def ; V12 loc3 [V12,T31] ( 7, 13 ) simd32 -> [rbp-B0H] ld-addr-op single-def ; V13 loc4 [V13,T55] ( 3, 5 ) simd32 -> [rbp-D0H] ld-addr-op single-def ; V14 loc5 [V14,T32] ( 7, 13 ) simd32 -> [rbp-F0H] ld-addr-op single-def ; V15 loc6 [V15,T56] ( 3, 5 ) simd32 -> [rbp-110H] ld-addr-op single-def ; V16 loc7 [V16,T57] ( 2, 2 ) double -> mm2 single-def ; V17 loc8 [V17,T58] ( 2, 2 ) double -> mm4 single-def ; V18 loc9 [V18,T51] ( 4, 6 ) simd32 -> [rbp-130H] ld-addr-op spill-single-def ; V19 loc10 [V19,T52] ( 4, 6 ) simd32 -> [rbp-150H] ld-addr-op spill-single-def ; V20 loc11 [V20,T36] ( 5, 9 ) simd32 -> [rbp-170H] single-def ; V21 loc12 [V21,T37] ( 5, 9 ) simd32 -> [rbp-190H] single-def ; V22 loc13 [V22,T38] ( 5, 9 ) simd32 -> [rbp-1B0H] ld-addr-op single-def ; V23 loc14 [V23,T39] ( 5, 9 ) simd32 -> [rbp-1D0H] ld-addr-op single-def ; V24 loc15 [V24,T08] ( 17, 80.37) ref -> rax class-hnd exact single-def ; V25 loc16 [V25,T13] ( 15, 25.08) int -> rdi ; V26 loc17 [V26,T26] ( 10, 20 ) simd32 -> registers ld-addr-op ; V27 loc18 [V27,T24] ( 12, 35.84) simd32 -> registers ld-addr-op ; V28 loc19 [V28,T27] ( 4, 19.84) simd32 -> registers ld-addr-op ; V29 loc20 [V29,T40] ( 4, 8 ) simd32 -> registers ld-addr-op ;* V30 loc21 [V30 ] ( 0, 0 ) simd32 -> zero-ref ld-addr-op ;* V31 loc22 [V31 ] ( 0, 0 ) simd32 -> zero-ref ;* V32 loc23 [V32 ] ( 0, 0 ) simd32 -> zero-ref ; V33 loc24 [V33,T41] ( 4, 8 ) simd32 -> registers ; V34 loc25 [V34,T33] ( 6, 12 ) simd32 -> registers ld-addr-op ; V35 loc26 [V35,T42] ( 4, 8 ) simd32 -> registers ld-addr-op ; V36 loc27 [V36,T25] ( 12, 35.84) simd32 -> registers ld-addr-op ; V37 loc28 [V37,T28] ( 4, 19.84) simd32 -> registers ld-addr-op ; V38 loc29 [V38,T43] ( 4, 8 ) simd32 -> registers ld-addr-op ;* V39 loc30 [V39 ] ( 0, 0 ) simd32 -> zero-ref ld-addr-op ;* V40 loc31 [V40 ] ( 0, 0 ) simd32 -> zero-ref ;* V41 loc32 [V41 ] ( 0, 0 ) simd32 -> zero-ref ; V42 loc33 [V42,T44] ( 4, 8 ) simd32 -> registers ; V43 loc34 [V43,T34] ( 6, 12 ) simd32 -> registers ld-addr-op ;* V44 loc35 [V44 ] ( 0, 0 ) simd32 -> zero-ref ld-addr-op ; V45 loc36 [V45,T45] ( 4, 8 ) simd32 -> registers ld-addr-op ; V46 loc37 [V46,T04] ( 12, 83.21) int -> rcx ; V47 loc38 [V47,T05] ( 12, 83.21) int -> r8 ; V48 loc39 [V48,T06] ( 12, 83.21) int -> rcx ; V49 loc40 [V49,T07] ( 12, 83.21) int -> r8 ;# V50 OutArgs [V50 ] ( 1, 1 ) lclBlk ( 0) [rsp+00H] "OutgoingArgSpace" ; V51 tmp1 [V51,T20] ( 4, 63.37) double -> registers "Strict ordering of exceptions for Array store" ; V52 tmp2 [V52,T21] ( 4, 63.37) double -> registers "Strict ordering of exceptions for Array store" ; V53 tmp3 [V53,T22] ( 4, 63.37) double -> registers "Strict ordering of exceptions for Array store" ; V54 tmp4 [V54,T23] ( 4, 63.37) double -> registers "Strict ordering of exceptions for Array store" ; V55 tmp5 [V55,T29] ( 4, 16 ) simd32 -> registers "Inlining Arg" ; V56 tmp6 [V56,T30] ( 4, 16 ) simd32 -> registers "Inlining Arg" ; V57 tmp7 [V57,T00] ( 6, 95.05) int -> r8 "index expr" ; V58 tmp8 [V58,T01] ( 6, 95.05) int -> r9 "index expr" ; V59 tmp9 [V59,T02] ( 6, 95.05) int -> r9 "index expr" ; V60 tmp10 [V60,T03] ( 6, 95.05) int -> r9 "index expr" ; V61 cse0 [V61,T18] ( 3, 3 ) int -> rdi "CSE - conservative" ; V62 cse1 [V62,T19] ( 3, 3 ) int -> rsi "CSE - conservative" ; V63 cse2 [V63,T11] ( 6, 33.68) int -> r13 "CSE - moderate" ; V64 cse3 [V64,T12] ( 6, 33.68) int -> [rbp-1D4H] spill-single-def "CSE - moderate" ; V65 cse4 [V65,T15] ( 7, 11 ) int -> rsi "CSE - moderate" ; V66 cse5 [V66,T35] ( 6, 12 ) simd32 -> registers "CSE - moderate" ; V67 cse6 [V67,T14] ( 3, 11.88) int -> rdx "CSE - moderate" ; V68 rat0 [V68 ] ( 1, 1 ) simd32 -> [rbp-1F8H] must-init "SIMDInitTempVar" ; TEMP_01 simd16 -> [rbp-0x208] ; TEMP_03 simd32 -> [rbp-0x228] ; TEMP_02 simd32 -> [rbp-0x248] ; ; Lcl frame size = 552 G_M25977_IG01: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG push rbp push r15 push r14 push r13 push r12 push rbx sub rsp, 552 vzeroupper lea rbp, [rsp+250H] xor eax, eax mov qword ptr [rbp-1F8H], rax vxorps xmm8, xmm8 vmovdqa xmmword ptr [rbp-1F0H], xmm8 mov qword ptr [rbp-1E0H], rax mov r15, rsi ; gcrRegs +[r15] mov rbx, rdx ; gcrRegs +[rbx] mov r14, rcx ; gcrRegs +[r14] vmovsd qword ptr [rbp-30H], xmm0 vmovsd qword ptr [rbp-38H], xmm1 vmovsd qword ptr [rbp-40H], xmm2 vmovsd qword ptr [rbp-48H], xmm3 vmovsd qword ptr [rbp-50H], xmm4 ;; size=91 bbWeight=1 PerfScore 18.08 G_M25977_IG02: ; gcrefRegs=0000C008 {rbx r14 r15}, byrefRegs=00000000 {}, byref mov rdi, 0xD1FFAB1E ; double[] mov esi, 0x400 call CORINFO_HELP_NEWARR_1_VC ; gcrRegs +[rax] ; gcr arg pop 0 mov r12, rax ; gcrRegs +[r12] vmovsd xmm4, qword ptr [rbp-50H] vmovaps xmm0, xmm4 vbroadcastsd ymm0, ymm0 vmovupd ymmword ptr[rbp-70H], ymm0 vmovsd xmm1, qword ptr [reloc @RWD00] vsubsd xmm1, xmm1, xmm4 vbroadcastsd ymm1, ymm1 vmovupd ymmword ptr[rbp-90H], ymm1 vmovsd xmm2, qword ptr [rbp-30H] vmovaps xmm3, xmm2 vbroadcastsd ymm3, ymm3 vmovupd ymmword ptr[rbp-B0H], ymm3 vmovsd xmm4, qword ptr [rbp-38H] vmovaps xmm5, xmm4 vbroadcastsd ymm5, ymm5 vmovupd ymmword ptr[rbp-D0H], ymm5 vmovsd xmm6, qword ptr [rbp-40H] vmovaps xmm7, xmm6 vbroadcastsd ymm7, ymm7 vmovupd ymmword ptr[rbp-F0H], ymm7 vmovsd xmm8, qword ptr [rbp-48H] vmovaps xmm9, xmm8 vbroadcastsd ymm9, ymm9 vmovupd ymmword ptr[rbp-110H], ymm9 vsubsd xmm2, xmm4, xmm2 mov r13d, dword ptr [rbx+08H] lea edi, [r13-01H] vxorps xmm4, xmm4 vcvtsi2sd xmm4, edi vdivsd xmm2, xmm2, xmm4 vsubsd xmm4, xmm8, xmm6 mov eax, dword ptr [r14+08H] ; gcrRegs -[rax] mov dword ptr [rbp-1D4H], eax lea esi, [rax-01H] vxorps xmm6, xmm6 vcvtsi2sd xmm6, esi vdivsd xmm4, xmm4, xmm6 vbroadcastsd ymm2, ymm2 vmovupd ymmword ptr[rbp-130H], ymm2 vbroadcastsd ymm4, ymm4 vmovupd ymmword ptr[rbp-150H], ymm4 vmovupd ymm6, ymmword ptr[reloc @RWD32] vdivpd ymm6, ymm6, ymm2 vmovupd ymmword ptr[rbp-170H], ymm6 vmovupd ymm8, ymmword ptr[reloc @RWD32] vdivpd ymm8, ymm8, ymm4 vmovupd ymmword ptr[rbp-190H], ymm8 vmovd xmm10, edi vpbroadcastd ymm10, ymm10 vmovupd ymmword ptr[rbp-1B0H], ymm10 vmovd xmm11, esi vpbroadcastd ymm11, ymm11 vmovupd ymmword ptr[rbp-1D0H], ymm11 mov rdi, 0xD1FFAB1E ; double[] mov esi, 4 call CORINFO_HELP_NEWARR_1_VC ; gcrRegs +[rax] ; gcr arg pop 0 xor edi, edi mov esi, dword ptr [r15+08H] test esi, esi jle G_M25977_IG23 cmp esi, 0x400 ;; size=349 bbWeight=1 PerfScore 145.92 G_M25977_IG03: ; , extend jg G_M25977_IG14 ;; size=6 bbWeight=1 PerfScore 1.00 G_M25977_IG04: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref, isz lea edx, [rdi+03H] cmp edx, esi jae G_M25977_IG25 vmovupd ymm0, ymmword ptr[r15+8*rdi+10H] vmovupd ymm3, ymmword ptr[rbp-B0H] vsubpd ymm1, ymm0, ymm3 vmovupd ymm6, ymmword ptr[rbp-170H] vmulpd ymm1, ymm1, ymm6 vcvtpd2ps ymm1, ymm1 vxorps ymm2, ymm2, ymm2 vcvtpd2ps ymm2, ymm2 vinsertf128 ymm1, ymm1, xmm2, 1 vcvttps2dq ymm1, ymm1 vxorps ymm2, ymm2, ymm2 vpmaxsd ymm1, ymm1, ymm2 vmovupd ymm10, ymmword ptr[rbp-1B0H] vpminsd ymm1, ymm1, ymm10 vmovupd ymm2, ymmword ptr[reloc @RWD64] vpaddd ymm4, ymm1, ymm2 vpminsd ymm4, ymm4, ymm10 vcvtdq2ps ymm5, ymm1 vcvtps2pd ymm5, ymm5 vmovupd ymm7, ymmword ptr[rbp-D0H] vminpd ymm8, ymm0, ymm7 vmaxpd ymm8, ymm3, ymm8 vmovupd ymm9, ymmword ptr[rbp-130H] vmulpd ymm5, ymm5, ymm9 vaddpd ymm5, ymm5, ymm3 vsubpd ymm5, ymm8, ymm5 vmulpd ymm5, ymm5, ymm6 xor ecx, ecx align [0 bytes for IG05] ;; size=155 bbWeight=3.96 PerfScore 330.66 G_M25977_IG05: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, loop=IG05, byref, isz vmovupd ymmword ptr[rbp-1F8H], ymm1 mov r8d, dword ptr [rbp+4*rcx-1F8H] cmp r8d, r13d jae G_M25977_IG26 mov r8d, r8d vmovsd xmm8, qword ptr [rbx+8*r8+10H] mov r8d, ecx vmovsd qword ptr [rax+8*r8+10H], xmm8 inc ecx cmp ecx, 4 jl SHORT G_M25977_IG05 ;; size=52 bbWeight=15.68 PerfScore 192.10 G_M25977_IG06: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref, isz vmovupd ymm11, ymmword ptr[rax+10H] xor r8d, r8d align [0 bytes for IG07] ;; size=8 bbWeight=3.96 PerfScore 20.79 G_M25977_IG07: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, loop=IG07, byref, isz vmovupd ymmword ptr[rbp-1F8H], ymm4 mov r9d, dword ptr [rbp+4*r8-1F8H] cmp r9d, r13d jae G_M25977_IG26 mov ecx, r9d vmovsd xmm12, qword ptr [rbx+8*rcx+10H] mov r9d, r8d vmovsd qword ptr [rax+8*r9+10H], xmm12 inc r8d cmp r8d, 4 jl SHORT G_M25977_IG07 ;; size=53 bbWeight=15.68 PerfScore 192.10 G_M25977_IG08: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref, isz vmovupd ymm13, ymmword ptr[rax+10H] vmovupd ymm14, ymmword ptr[rbp-F0H] vsubpd ymm1, ymm0, ymm14 vmovupd ymm8, ymmword ptr[rbp-190H] vmulpd ymm4, ymm1, ymm8 vcvtpd2ps ymm12, ymm4 vxorps ymm1, ymm1, ymm1 vcvtpd2ps ymm1, ymm1 vinsertf128 ymm1, ymm12, xmm1, 1 vcvttps2dq ymm1, ymm1 vxorps ymm4, ymm4, ymm4 vpmaxsd ymm1, ymm1, ymm4 vmovupd ymm4, ymmword ptr[rbp-1D0H] vpminsd ymm1, ymm1, ymm4 vpaddd ymm2, ymm1, ymm2 vpminsd ymm2, ymm2, ymm4 vcvtdq2ps ymm12, ymm1 vcvtps2pd ymm12, ymm12 vmovupd ymm15, ymmword ptr[rbp-110H] vminpd ymm0, ymm0, ymm15 vmaxpd ymm0, ymm14, ymm0 vmulpd ymm12, ymm12, ymmword ptr[rbp-150H] vaddpd ymm12, ymm12, ymm14 vsubpd ymm0, ymm0, ymm12 vmulpd ymm0, ymm0, ymm8 xor ecx, ecx align [0 bytes for IG09] ;; size=135 bbWeight=3.96 PerfScore 299.97 G_M25977_IG09: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, loop=IG09, byref, isz vmovupd ymmword ptr[rbp-1F8H], ymm1 mov r9d, dword ptr [rbp+4*rcx-1F8H] mov r10d, dword ptr [rbp-1D4H] cmp r9d, r10d jae G_M25977_IG26 mov r8d, r9d vmovsd xmm12, qword ptr [r14+8*r8+10H] mov r9d, ecx vmovsd qword ptr [rax+8*r9+10H], xmm12 inc ecx cmp ecx, 4 jl SHORT G_M25977_IG09 ;; size=59 bbWeight=15.68 PerfScore 207.78 G_M25977_IG10: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref, isz vmovupd ymm1, ymmword ptr[rax+10H] xor r8d, r8d align [0 bytes for IG11] ;; size=8 bbWeight=3.96 PerfScore 20.79 G_M25977_IG11: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, loop=IG11, byref, isz vmovupd ymmword ptr[rbp-1F8H], ymm2 mov r9d, dword ptr [rbp+4*r8-1F8H] mov r10d, dword ptr [rbp-1D4H] cmp r9d, r10d jae G_M25977_IG26 mov ecx, r9d vmovsd xmm12, qword ptr [r14+8*rcx+10H] mov r9d, r8d vmovsd qword ptr [rax+8*r9+10H], xmm12 inc r8d cmp r8d, 4 jl SHORT G_M25977_IG11 ;; size=61 bbWeight=15.68 PerfScore 207.78 G_M25977_IG12: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref vsubpd ymm13, ymm13, ymm11 vmulpd ymm5, ymm5, ymm13 vaddpd ymm11, ymm11, ymm5 vmovupd ymm5, ymmword ptr[rbp-90H] vmulpd ymm2, ymm5, ymm11 vmovupd ymm12, ymmword ptr[rax+10H] vsubpd ymm11, ymm12, ymm1 vmulpd ymm0, ymm0, ymm11 vaddpd ymm1, ymm1, ymm0 vmovupd ymm0, ymmword ptr[rbp-70H] vmulpd ymm1, ymm0, ymm1 vaddpd ymm1, ymm2, ymm1 cmp edx, 0x400 jae G_M25977_IG27 mov r8d, edi vmovupd ymmword ptr[r12+8*r8+10H], ymm1 add edi, 4 cmp esi, edi vmovupd ymmword ptr[rbp-B0H], ymm3 vmovupd ymmword ptr[rbp-F0H], ymm14 vmovupd ymmword ptr[rbp-170H], ymm6 vmovupd ymmword ptr[rbp-190H], ymm8 vmovupd ymmword ptr[rbp-1B0H], ymm10 vmovupd ymmword ptr[rbp-1D0H], ymm4 vmovupd ymmword ptr[rbp-70H], ymm0 vmovupd ymmword ptr[rbp-90H], ymm5 vmovupd ymmword ptr[rbp-D0H], ymm7 vmovupd ymmword ptr[rbp-110H], ymm15 jg G_M25977_IG04 ;; size=168 bbWeight=3.96 PerfScore 217.80 G_M25977_IG13: ; gcrefRegs=00001000 {r12}, byrefRegs=00000000 {}, byref ; gcrRegs -[rax rbx r14-r15] jmp G_M25977_IG23 ;; size=5 bbWeight=1 PerfScore 2.00 G_M25977_IG14: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref ; gcrRegs +[rax rbx r14-r15] lea edx, [rdi+03H] cmp edx, esi jae G_M25977_IG25 vmovupd ymm1, ymmword ptr[r15+8*rdi+10H] vmovupd ymm3, ymmword ptr[rbp-B0H] vsubpd ymm2, ymm1, ymm3 vmovupd ymm6, ymmword ptr[rbp-170H] vmulpd ymm2, ymm2, ymm6 vcvtpd2ps ymm2, ymm2 vxorps ymm11, ymm11, ymm11 vcvtpd2ps ymm11, ymm11 vinsertf128 ymm2, ymm2, xmm11, 1 vcvttps2dq ymm2, ymm2 vxorps ymm11, ymm11, ymm11 vpmaxsd ymm2, ymm2, ymm11 vmovupd ymm10, ymmword ptr[rbp-1B0H] vpminsd ymm2, ymm2, ymm10 vmovupd ymm11, ymmword ptr[reloc @RWD64] vpaddd ymm12, ymm2, ymm11 vpminsd ymm12, ymm12, ymm10 vcvtdq2ps ymm13, ymm2 vcvtps2pd ymm13, ymm13 vminpd ymm9, ymm1, ymmword ptr[rbp-D0H] vmaxpd ymm9, ymm3, ymm9 vmovupd ymmword ptr[rbp-228H], ymm9 vmulpd ymm13, ymm13, ymmword ptr[rbp-130H] vaddpd ymm13, ymm13, ymm3 vmovupd ymmword ptr[rbp-248H], ymm13 vmovupd ymm13, ymmword ptr[rbp-228H] vsubpd ymm13, ymm13, ymmword ptr[rbp-248H] vmulpd ymm13, ymm13, ymm6 xor ecx, ecx ;; size=179 bbWeight=0.04 PerfScore 3.50 G_M25977_IG15: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref, isz vmovupd ymmword ptr[rbp-1F8H], ymm2 mov r8d, dword ptr [rbp+4*rcx-1F8H] cmp r8d, r13d jae G_M25977_IG26 mov edx, r8d vmovsd xmm9, qword ptr [rbx+8*rdx+10H] mov edx, ecx vmovsd qword ptr [rax+8*rdx+10H], xmm9 inc ecx cmp ecx, 4 jl SHORT G_M25977_IG15 ;; size=49 bbWeight=0.16 PerfScore 1.96 G_M25977_IG16: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref vmovupd ymm2, ymmword ptr[rax+10H] xor r8d, r8d ;; size=8 bbWeight=0.04 PerfScore 0.21 G_M25977_IG17: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref, isz vmovupd ymmword ptr[rbp-1F8H], ymm12 mov r9d, dword ptr [rbp+4*r8-1F8H] cmp r9d, r13d jae G_M25977_IG26 mov edx, r9d vmovsd xmm9, qword ptr [rbx+8*rdx+10H] mov edx, r8d vmovsd qword ptr [rax+8*rdx+10H], xmm9 inc r8d cmp r8d, 4 jl SHORT G_M25977_IG17 ;; size=52 bbWeight=0.16 PerfScore 1.96 G_M25977_IG18: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref vmovupd ymm12, ymmword ptr[rax+10H] vmovupd ymm14, ymmword ptr[rbp-F0H] vsubpd ymm9, ymm1, ymm14 vmovupd ymm8, ymmword ptr[rbp-190H] vmulpd ymm9, ymm9, ymm8 vcvtpd2ps ymm9, ymm9 vmovupd ymmword ptr[rbp-248H], ymm9 vxorps ymm9, ymm9, ymm9 vcvtpd2ps ymm9, ymm9 vmovupd xmmword ptr [rbp-208H], xmm9 vmovupd ymm9, ymmword ptr[rbp-248H] vinsertf128 ymm9, ymm9, xmmword ptr [rbp-208H], 1 vcvttps2dq ymm9, ymm9 vxorps ymm7, ymm7, ymm7 vpmaxsd ymm9, ymm9, ymm7 vmovupd ymm4, ymmword ptr[rbp-1D0H] vpminsd ymm9, ymm9, ymm4 vpaddd ymm7, ymm9, ymm11 vpminsd ymm7, ymm7, ymm4 vcvtdq2ps ymm11, ymm9 vcvtps2pd ymm11, ymm11 vmovupd ymm15, ymmword ptr[rbp-110H] vminpd ymm1, ymm1, ymm15 vmaxpd ymm1, ymm14, ymm1 vmovupd ymmword ptr[rbp-248H], ymm1 vmulpd ymm11, ymm11, ymmword ptr[rbp-150H] vaddpd ymm11, ymm11, ymm14 vmovupd ymmword ptr[rbp-228H], ymm11 vmovupd ymm11, ymmword ptr[rbp-248H] vsubpd ymm11, ymm11, ymmword ptr[rbp-228H] vmulpd ymm11, ymm11, ymm8 xor ecx, ecx ;; size=196 bbWeight=0.04 PerfScore 3.67 G_M25977_IG19: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref, isz vmovupd ymmword ptr[rbp-1F8H], ymm9 mov r9d, dword ptr [rbp+4*rcx-1F8H] mov r10d, dword ptr [rbp-1D4H] cmp r9d, r10d jae G_M25977_IG26 mov edx, r9d vmovsd xmm1, qword ptr [r14+8*rdx+10H] mov edx, ecx vmovsd qword ptr [rax+8*rdx+10H], xmm1 inc ecx cmp ecx, 4 jl SHORT G_M25977_IG19 ;; size=57 bbWeight=0.16 PerfScore 2.12 G_M25977_IG20: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref vmovupd ymm9, ymmword ptr[rax+10H] xor r8d, r8d ;; size=8 bbWeight=0.04 PerfScore 0.21 G_M25977_IG21: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref, isz vmovupd ymmword ptr[rbp-1F8H], ymm7 mov r9d, dword ptr [rbp+4*r8-1F8H] mov r10d, dword ptr [rbp-1D4H] cmp r9d, r10d jae G_M25977_IG26 mov edx, r9d vmovsd xmm1, qword ptr [r14+8*rdx+10H] mov edx, r8d vmovsd qword ptr [rax+8*rdx+10H], xmm1 inc r8d cmp r8d, 4 jl SHORT G_M25977_IG21 ;; size=60 bbWeight=0.16 PerfScore 2.12 G_M25977_IG22: ; gcrefRegs=0000D009 {rax rbx r12 r14 r15}, byrefRegs=00000000 {}, byref vsubpd ymm7, ymm12, ymm2 vmulpd ymm7, ymm13, ymm7 vaddpd ymm2, ymm2, ymm7 vmovupd ymm5, ymmword ptr[rbp-90H] vmulpd ymm2, ymm5, ymm2 vmovupd ymm7, ymmword ptr[rax+10H] vsubpd ymm7, ymm7, ymm9 vmulpd ymm7, ymm11, ymm7 vaddpd ymm7, ymm9, ymm7 vmovupd ymm0, ymmword ptr[rbp-70H] vmulpd ymm7, ymm0, ymm7 vaddpd ymm2, ymm2, ymm7 cmp edi, 0x400 jae G_M25977_IG25 lea edx, [rdi+03H] cmp edx, 0x400 jae G_M25977_IG27 mov edx, edi vmovupd ymmword ptr[r12+8*rdx+10H], ymm2 add edi, 4 cmp esi, edi vmovupd ymmword ptr[rbp-B0H], ymm3 vmovupd ymmword ptr[rbp-F0H], ymm14 vmovupd ymmword ptr[rbp-170H], ymm6 vmovupd ymmword ptr[rbp-190H], ymm8 vmovupd ymmword ptr[rbp-1B0H], ymm10 vmovupd ymmword ptr[rbp-1D0H], ymm4 vmovupd ymmword ptr[rbp-70H], ymm0 vmovupd ymmword ptr[rbp-90H], ymm5 vmovupd ymmword ptr[rbp-110H], ymm15 jg G_M25977_IG14 ;; size=171 bbWeight=0.04 PerfScore 2.23 G_M25977_IG23: ; gcrefRegs=00001000 {r12}, byrefRegs=00000000 {}, byref ; gcrRegs -[rax rbx r14-r15] mov rax, r12 ; gcrRegs +[rax] ;; size=3 bbWeight=1 PerfScore 0.25 G_M25977_IG24: ; , epilog, nogc, extend vzeroupper add rsp, 552 pop rbx pop r12 pop r13 pop r14 pop r15 pop rbp ret ;; size=21 bbWeight=1 PerfScore 5.25 G_M25977_IG25: ; gcVars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, gcvars, byref ; gcrRegs -[rax r12] call CORINFO_HELP_THROW_ARGUMENTOUTOFRANGEEXCEPTION ; gcr arg pop 0 ;; size=5 bbWeight=0 PerfScore 0.00 G_M25977_IG26: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref call CORINFO_HELP_RNGCHKFAIL ; gcr arg pop 0 ;; size=5 bbWeight=0 PerfScore 0.00 G_M25977_IG27: ; gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref call CORINFO_HELP_THROW_ARGUMENTEXCEPTION ; gcr arg pop 0 int3 ;; size=6 bbWeight=0 PerfScore 0.00 RWD00 dq 3FF0000000000000h ; 1 RWD08 dd 00000000h, 00000000h, 00000000h, 00000000h, 00000000h, 00000000h RWD32 dq 3FF0000000000000h, 3FF0000000000000h, 3FF0000000000000h, 3FF0000000000000h RWD64 dq 0000000100000001h, 0000000100000001h, 0000000100000001h, 0000000100000001h ; Total bytes of code 1970, prolog size 91, PerfScore 2093.85, instruction count 388, allocated bytes for code 2136 (MethodHash=c11d9a86) for method BilinearTest:BilinearInterpol_Vector(double[],double[],double,double,double[],double,double,double):double[]:this ; ============================================================ Unwind Info: >> Start offset : 0x000000 (not in unwind data) >> End offset : 0xd1ffab1e (not in unwind data) Version : 1 Flags : 0x00 SizeOfProlog : 0x11 CountOfUnwindCodes: 8 FrameRegister : none (0) FrameOffset : N/A (no FrameRegister) (Value=0) UnwindCodes : CodeOffset: 0x11 UnwindOp: UWOP_ALLOC_LARGE (1) OpInfo: 0 - Scaled small Size: 69 * 8 = 552 = 0x00228 CodeOffset: 0x0A UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rbx (3) CodeOffset: 0x09 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r12 (12) CodeOffset: 0x07 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r13 (13) CodeOffset: 0x05 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r14 (14) CodeOffset: 0x03 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: r15 (15) CodeOffset: 0x01 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rbp (5)