****** START compiling NullableTest16:BoxUnboxToNQGen(long):bool (MethodHash=1570d073) Generating code for Unix arm64 OPTIONS: compCodeOpt = BLENDED_CODE OPTIONS: compDbgCode = false OPTIONS: compDbgInfo = true OPTIONS: compDbgEnC = false OPTIONS: compProcedureSplitting = false OPTIONS: compProcedureSplittingEH = false OPTIONS: No matching PGO data IL to import: IL_0000 02 ldarg.0 IL_0001 8c 04 00 00 1b box 0x1B000004 IL_0006 a5 0a 00 00 01 unbox.any 0x100000A IL_000b 12 00 ldloca.s 0x0 IL_000d fe 15 0a 00 00 01 initobj 0x100000A IL_0013 06 ldloc.0 IL_0014 28 dd 01 00 06 call 0x60001DD IL_0019 28 08 02 00 06 call 0x6000208 IL_001e 0b stloc.1 IL_001f de 0d leave.s 13 (IL_002e) IL_0021 26 pop IL_0022 02 ldarg.0 IL_0023 8c 04 00 00 1b box 0x1B000004 IL_0028 14 ldnull IL_0029 fe 01 ceq IL_002b 0b stloc.1 IL_002c de 00 leave.s 0 (IL_002e) IL_002e 07 ldloc.1 IL_002f 2a ret Arg #0 passed in register(s) x0 lvaGrabTemp returning 3 (V03 tmp0) (a long lifetime temp) called for OutgoingArgSpace. ; Initial local variable assignments ; ; V00 arg0 long ; V01 loc0 struct ; V02 loc1 bool ; V03 OutArgs lclBlk "OutgoingArgSpace" *************** In compInitDebuggingInfo() for NullableTest16:BoxUnboxToNQGen(long):bool getVars() returned cVars = 0, extendOthers = true info.compVarScopesCount = 3 VarNum LVNum Name Beg End 0: 00h 00h V00 arg0 000h 030h 1: 01h 01h V01 loc0 000h 030h 2: 02h 02h V02 loc1 000h 030h info.compStmtOffsetsCount = 0 info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE ) *************** In fgFindBasicBlocks() for NullableTest16:BoxUnboxToNQGen(long):bool Jump targets: IL_0000 IL_0021 IL_002e New Basic Block BB01 [0000] created. BB01 [000..021) New Basic Block BB02 [0001] created. BB02 [021..02E) New Basic Block BB03 [0002] created. BB03 [02E..030) EH clause #0: Flags: 0x0 (catch) TryOffset: 0x0 TryLength: 0x21 HandlerOffset: 0x21 HandlerLength: 0xd ClassToken: 0x1000006 *************** After fgFindBasicBlocks() has created the EH table *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) *************** In fgNormalizeEH() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (leave ) T0 try { } keep try BB02 [0001] 1 0 1 [021..02E)-> BB03 (leave ) H0 catch { } keep BB03 [0002] 2 1 [02E..030) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) No EH normalization performed. IL Code Size,Instr 48, 19, Basic Block count 3, Local Variable Num,Ref count 4, 7 for method NullableTest16:BoxUnboxToNQGen(long):bool OPTIONS: opts.MinOpts() == false Basic block list for 'NullableTest16:BoxUnboxToNQGen(long):bool' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (leave ) T0 try { } keep try BB02 [0001] 1 0 1 [021..02E)-> BB03 (leave ) H0 catch { } keep BB03 [0002] 2 1 [02E..030) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Pre-import *************** Finishing PHASE Pre-import *************** Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) *************** Finishing PHASE Profile incorporation [no changes] *************** Starting PHASE Importation *************** In impImport() for NullableTest16:BoxUnboxToNQGen(long):bool impImportBlockPending for BB01 impImportBlockPending for BB02 Importing BB01 (PC=000) of 'NullableTest16:BoxUnboxToNQGen(long):bool' [ 0] 0 (0x000) ldarg.0 [ 1] 1 (0x001) box 1B000004 Compiler::impImportAndPushBox -- handling BOX(value class) via inline allocate/copy sequence lvaGrabTemp returning 4 (V04 tmp1) called for Single-def Box Helper. Marking V04 as a single def local lvaSetClass: setting class for V04 to (00000000D1FFAB1E) System.Int64 [exact] STMT00000 (IL 0x000... ???) [000006] -A---------- * ASG ref [000005] D------N---- +--* LCL_VAR ref V04 tmp1 [000004] ------------ \--* ALLOCOBJ ref [000003] H----------- \--* CNS_INT(h) long 0xd1ffab1e class STMT00001 (IL ???... ???) [000011] -A---------- * ASG long [000010] -------N---- +--* IND long [000009] ------------ | \--* ADD byref [000007] ------------ | +--* LCL_VAR ref V04 tmp1 [000008] ------------ | \--* CNS_INT long 8 [000002] ------------ \--* LCL_VAR long V00 arg0 [ 1] 6 (0x006) unbox.any 0100000A Unable to optimize UNBOX.ANY -- can't resolve type comparison Importing UNBOX.ANY as inline sequence lvaGrabTemp returning 5 (V05 tmp2) called for inline UNBOX clone1. STMT00002 (IL ???... ???) [000016] -A---------- * ASG ref [000015] D------N---- +--* LCL_VAR ref V05 tmp2 [000013] ------------ \--* BOX ref [000012] ------------ \--* LCL_VAR ref V04 tmp1 STMT00003 (IL ???... ???) [000026] --CXG------- * QMARK void [000020] Q--X-------- if +--* EQ int [000019] #--X-------- | +--* IND long [000018] ------------ | | \--* LCL_VAR ref V05 tmp2 [000014] H----------- | \--* CNS_INT(h) long 0xd1ffab1e class [000025] --CXG------- if \--* COLON void [000023] --CXG------- else +--* CALL help void HELPER.CORINFO_HELP_UNBOX [000022] H----------- arg0 | +--* CNS_INT(h) long 0xd1ffab1e class [000017] ------------ arg1 | \--* LCL_VAR ref V05 tmp2 [000024] ------------ then \--* NOP void [ 1] 11 (0x00b) ldloca.s 0 [ 2] 13 (0x00d) initobj 0100000A lvaGrabTemp returning 6 (V06 tmp3) called for impSpillLclRefs. STMT00004 (IL ???... ???) [000036] -A-XG------- * ASG struct (copy) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 [000029] ---XG------- \--* OBJ struct [000028] ------------ \--* ADD byref [000021] ------------ +--* LCL_VAR ref V05 tmp2 [000027] ------------ \--* CNS_INT long 8 STMT00005 (IL ???... ???) [000033] IA---------- * ASG struct (init) [000030] D------N---- +--* LCL_VAR struct V01 loc0 [000032] ------------ \--* CNS_INT int 0 [ 1] 19 (0x013) ldloc.0 [ 2] 20 (0x014) call 060001DD In Compiler::impImportCall: opcode is call, kind=0, callRetType is struct, structSize is 16 Calling impNormStructVal on: [000038] ------------ * LCL_VAR struct V01 loc0 resulting tree: [000041] n----------- * OBJ struct [000040] ------------ \--* ADDR byref [000038] -------N---- \--* LCL_VAR struct V01 loc0 STMT00006 (IL ???... ???) [000039] I-C-G------- * CALL struct Helper.Create (exactContextHnd=0x00000000D1FFAB1E) [000041] n----------- arg0 \--* OBJ struct [000040] ------------ \--* ADDR byref [000038] -------N---- \--* LCL_VAR struct V01 loc0 [ 2] 25 (0x019) call 06000208 In Compiler::impImportCall: opcode is call, kind=0, callRetType is bool, structSize is 0 Calling impNormStructVal on: [000042] --C--------- * RET_EXPR struct(inl return expr [000039]) lvaGrabTemp returning 7 (V07 tmp4) called for struct address for call/obj. STMT00007 (IL ???... ???) [000046] -AC--------- * ASG struct (copy) [000044] M------N---- +--* LCL_VAR struct V07 tmp4 [000042] --C--------- \--* RET_EXPR struct(inl return expr [000039]) resulting tree: [000049] n----------- * OBJ struct [000048] ------------ \--* ADDR byref [000047] -------N---- \--* LCL_VAR struct V07 tmp4 Calling impNormStructVal on: [000037] ------------ * LCL_VAR struct V06 tmp3 resulting tree: [000051] n----------- * OBJ struct [000050] ------------ \--* ADDR byref [000037] -------N---- \--* LCL_VAR struct V06 tmp3 STMT00008 (IL ???... ???) [000043] I-C-G------- * CALL int Helper.Compare (exactContextHnd=0x00000000D1FFAB1E) [000051] n----------- arg0 +--* OBJ struct [000050] ------------ | \--* ADDR byref [000037] -------N---- | \--* LCL_VAR struct V06 tmp3 [000049] n----------- arg1 \--* OBJ struct [000048] ------------ \--* ADDR byref [000047] -------N---- \--* LCL_VAR struct V07 tmp4 [ 1] 30 (0x01e) stloc.1 STMT00009 (IL ???... ???) [000054] -AC--------- * ASG int [000053] D------N---- +--* LCL_VAR int V02 loc1 [000052] --C--------- \--* RET_EXPR int (inl return expr [000043]) [ 0] 31 (0x01f) leave.s 002E Before import CEE_LEAVE in BB01 (targetting BB03): ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (leave ) T0 try { } keep try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 (leave ) H0 catch { } keep BB03 [0002] 2 1 [02E..030) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) impImportLeave - no enclosing finally-protected try blocks or catch handlers; convert CEE_LEAVE block BB01 to BBJ_ALWAYS After import CEE_LEAVE: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 (leave ) H0 catch { } keep BB03 [0002] 2 1 [02E..030) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) impImportBlockPending for BB03 Importing BB03 (PC=046) of 'NullableTest16:BoxUnboxToNQGen(long):bool' [ 0] 46 (0x02e) ldloc.1 [ 1] 47 (0x02f) ret STMT00010 (IL 0x02E... ???) [000056] ------------ * RETURN int [000055] ------------ \--* LCL_VAR int V02 loc1 Importing BB02 (PC=033) of 'NullableTest16:BoxUnboxToNQGen(long):bool' lvaGrabTemp returning 8 (V08 tmp5) called for impSpillSpecialSideEff. STMT00011 (IL 0x021... ???) [000058] -A---O------ * ASG ref [000057] D------N---- +--* LCL_VAR ref V08 tmp5 [000001] -----O------ \--* CATCH_ARG ref Marked V08 as a single def temp lvaSetClass: setting class for V08 to (00000000D1FFAB1E) hackishClassName [ 1] 33 (0x021) pop [ 0] 34 (0x022) ldarg.0 [ 1] 35 (0x023) box 1B000004 Compiler::impImportAndPushBox -- handling BOX(value class) via inline allocate/copy sequence lvaGrabTemp returning 9 (V09 tmp6) called for Single-def Box Helper. Marking V09 as a single def local lvaSetClass: setting class for V09 to (00000000D1FFAB1E) System.Int64 [exact] STMT00012 (IL 0x022... ???) [000064] -A---------- * ASG ref [000063] D------N---- +--* LCL_VAR ref V09 tmp6 [000062] ------------ \--* ALLOCOBJ ref [000061] H----------- \--* CNS_INT(h) long 0xd1ffab1e class STMT00013 (IL ???... ???) [000069] -A---------- * ASG long [000068] -------N---- +--* IND long [000067] ------------ | \--* ADD byref [000065] ------------ | +--* LCL_VAR ref V09 tmp6 [000066] ------------ | \--* CNS_INT long 8 [000060] ------------ \--* LCL_VAR long V00 arg0 [ 1] 40 (0x028) ldnull [ 2] 41 (0x029) ceq Attempting to optimize BOX(valueType) EQ null [000073] gtTryRemoveBoxUpstreamEffects: attempting to remove side effects of BOX (valuetype) [000071] (assign/newobj STMT00012 copy STMT00013 Bashing NEWOBJ [000064] to NOP Bashing COPY [000069] to NOP; no source side effects. Success: replacing BOX(valueType) EQ null with 0 [ 1] 43 (0x02b) stloc.1 STMT00014 (IL ???... ???) [000078] -A---------- * ASG int [000077] D------N---- +--* LCL_VAR int V02 loc1 [000076] ------------ \--* CNS_INT int 0 [ 0] 44 (0x02c) leave.s 002E Before import CEE_LEAVE in BB02 (targetting BB03): ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 (leave ) H0 catch { } keep newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) impImportLeave - jumping out of a catch (EH#0), convert block BB02 to BBJ_EHCATCHRET block impImportLeave - final destination of step blocks set to BB03 impImportBlockPending for BB03 After import CEE_LEAVE: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) impImportBlockPending for BB03 After impImport() added block for try,catch,finally ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..021) -> BB03 (always), preds={} succs={BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) [000006] -A---------- * ASG ref [000005] D------N---- +--* LCL_VAR ref V04 tmp1 [000004] ------------ \--* ALLOCOBJ ref [000003] H----------- \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) [000011] -A---------- * ASG long [000010] -------N---- +--* IND long [000009] ------------ | \--* ADD byref [000007] ------------ | +--* LCL_VAR ref V04 tmp1 [000008] ------------ | \--* CNS_INT long 8 [000002] ------------ \--* LCL_VAR long V00 arg0 ***** BB01 STMT00002 (IL ???... ???) [000016] -A---------- * ASG ref [000015] D------N---- +--* LCL_VAR ref V05 tmp2 [000013] ------------ \--* BOX ref [000012] ------------ \--* LCL_VAR ref V04 tmp1 ***** BB01 STMT00003 (IL ???... ???) [000026] --CXG------- * QMARK void [000020] Q--X-------- if +--* EQ int [000019] #--X-------- | +--* IND long [000018] ------------ | | \--* LCL_VAR ref V05 tmp2 [000014] H----------- | \--* CNS_INT(h) long 0xd1ffab1e class [000025] --CXG------- if \--* COLON void [000023] --CXG------- else +--* CALL help void HELPER.CORINFO_HELP_UNBOX [000022] H----------- arg0 | +--* CNS_INT(h) long 0xd1ffab1e class [000017] ------------ arg1 | \--* LCL_VAR ref V05 tmp2 [000024] ------------ then \--* NOP void ***** BB01 STMT00004 (IL ???... ???) [000036] -A-XG------- * ASG struct (copy) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 [000029] ---XG------- \--* OBJ struct [000028] ------------ \--* ADD byref [000021] ------------ +--* LCL_VAR ref V05 tmp2 [000027] ------------ \--* CNS_INT long 8 ***** BB01 STMT00005 (IL ???... ???) [000033] IA---------- * ASG struct (init) [000030] D------N---- +--* LCL_VAR struct V01 loc0 [000032] ------------ \--* CNS_INT int 0 ***** BB01 STMT00006 (IL ???...0x01E) [000039] I-C-G------- * CALL struct Helper.Create (exactContextHnd=0x00000000D1FFAB1E) [000041] n----------- arg0 \--* OBJ struct [000040] ------------ \--* ADDR byref [000038] -------N---- \--* LCL_VAR struct V01 loc0 ***** BB01 STMT00007 (IL ???... ???) [000046] -AC--------- * ASG struct (copy) [000044] M------N---- +--* LCL_VAR struct V07 tmp4 [000042] --C--------- \--* RET_EXPR struct(inl return expr [000039]) ***** BB01 STMT00008 (IL ???... ???) [000043] I-C-G------- * CALL int Helper.Compare (exactContextHnd=0x00000000D1FFAB1E) [000051] n----------- arg0 +--* OBJ struct [000050] ------------ | \--* ADDR byref [000037] -------N---- | \--* LCL_VAR struct V06 tmp3 [000049] n----------- arg1 \--* OBJ struct [000048] ------------ \--* ADDR byref [000047] -------N---- \--* LCL_VAR struct V07 tmp4 ***** BB01 STMT00009 (IL ???... ???) [000054] -AC--------- * ASG int [000053] D------N---- +--* LCL_VAR int V02 loc1 [000052] --C--------- \--* RET_EXPR int (inl return expr [000043]) ------------ BB02 [021..02E) -> BB03 (cret), preds={} succs={BB03} ***** BB02 STMT00011 (IL 0x021...0x02B) [000058] -A---O------ * ASG ref [000057] D------N---- +--* LCL_VAR ref V08 tmp5 [000001] -----O------ \--* CATCH_ARG ref ***** BB02 STMT00012 (IL 0x022... ???) [000064] ------------ * NOP void ***** BB02 STMT00013 (IL ???... ???) [000069] ------------ * NOP void ***** BB02 STMT00014 (IL ???... ???) [000078] -A---------- * ASG int [000077] D------N---- +--* LCL_VAR int V02 loc1 [000076] ------------ \--* CNS_INT int 0 ------------ BB03 [02E..030) (return), preds={} succs={} ***** BB03 STMT00010 (IL 0x02E...0x02F) [000056] ------------ * RETURN int [000055] ------------ \--* LCL_VAR int V02 loc1 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Indirect call transform -- no candidates to transform *************** Finishing PHASE Indirect call transform [no changes] *************** Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Finishing PHASE Expand patchpoints [no changes] *************** Starting PHASE Post-import *************** Finishing PHASE Post-import *************** Starting PHASE Morph - Init New BlockSet epoch 1, # of blocks (including unused BB00): 4, bitset array size: 1 (short) *************** In fgRemoveEmptyBlocks *************** Finishing PHASE Morph - Init *************** In fgDebugCheckBBlist *************** Starting PHASE Morph - Inlining Expanding INLINE_CANDIDATE in statement STMT00006 in BB01: STMT00006 (IL ???...0x01E) [000039] I-C-G------- * CALL struct Helper.Create (exactContextHnd=0x00000000D1FFAB1E) [000041] n----------- arg0 \--* OBJ struct [000040] ------------ \--* ADDR byref [000038] -------N---- \--* LCL_VAR struct V01 loc0 Argument #0: has caller local ref [000041] n----------- * OBJ struct [000040] ------------ \--* ADDR byref [000038] -------N---- \--* LCL_VAR struct V01 loc0 INLINER: inlineInfo.tokenLookupContextHandle for Helper:Create(System.Guid):System.Guid set to 0x00000000D1FFAB1E: Invoking compiler for the inlinee method Helper:Create(System.Guid):System.Guid : IL to import: IL_0000 72 b1 39 00 70 ldstr 0x700039B1 IL_0005 73 43 00 00 0a newobj 0xA000043 IL_000a 2a ret INLINER impTokenLookupContextHandle for Helper:Create(System.Guid):System.Guid is 0x00000000D1FFAB1E. *************** In fgFindBasicBlocks() for Helper:Create(System.Guid):System.Guid Jump targets: none New Basic Block BB04 [0003] created. BB04 [000..00B) Basic block list for 'Helper:Create(System.Guid):System.Guid' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB04 [0003] 1 1 [000..00B) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000039] Starting PHASE Pre-import *************** Inline @[000039] Finishing PHASE Pre-import *************** Inline @[000039] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000039] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB04 [0003] 1 1 [000..00B) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB04 [000..00B) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000039] Starting PHASE Importation *************** In impImport() for Helper:Create(System.Guid):System.Guid impImportBlockPending for BB04 Importing BB04 (PC=000) of 'Helper:Create(System.Guid):System.Guid' [ 0] 0 (0x000) ldstr 700039B1 [ 1] 5 (0x005) newobj lvaGrabTemp returning 10 (V10 tmp7) called for NewObj constructor temp. [000082] IA---------- * ASG struct (init) [000080] D------N---- +--* LCL_VAR struct V10 tmp7 [000081] ------------ \--* CNS_INT int 0 0A000043 In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0 [000085] I-C-G------- * CALL void System.Guid..ctor (exactContextHnd=0x00000000D1FFAB1E) [000084] ------------ this in x0 +--* ADDR byref [000083] -------N---- | \--* LCL_VAR struct V10 tmp7 [000079] ------------ arg1 \--* CNS_STR ref [ 1] 10 (0x00a) ret Inlinee Return expression (before normalization) => [000086] ------------ * LCL_VAR struct V10 tmp7 After impImport() added block for try,catch,finally ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB04 [0003] 1 1 [000..00B) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000039] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB04 [0003] 1 1 [000..00B) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB04 [000..00B) (return), preds={} succs={} ***** BB04 [000082] IA---------- * ASG struct (init) [000080] D------N---- +--* LCL_VAR struct V10 tmp7 [000081] ------------ \--* CNS_INT int 0 ***** BB04 [000085] I-C-G------- * CALL void System.Guid..ctor (exactContextHnd=0x00000000D1FFAB1E) [000084] ------------ this in x0 +--* ADDR byref [000083] -------N---- | \--* LCL_VAR struct V10 tmp7 [000079] ------------ arg1 \--* CNS_STR ref ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000039] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000039] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000039] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000039] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000039] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000039] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000039] ----------- Arguments setup: Inlinee method body: STMT00015 (IL ???... ???) [000082] IA---------- * ASG struct (init) [000080] D------N---- +--* LCL_VAR struct V10 tmp7 [000081] ------------ \--* CNS_INT int 0 STMT00016 (IL ???... ???) [000085] I-C-G------- * CALL void System.Guid..ctor (exactContextHnd=0x00000000D1FFAB1E) [000084] ------------ this in x0 +--* ADDR byref [000083] -------N---- | \--* LCL_VAR struct V10 tmp7 [000079] ------------ arg1 \--* CNS_STR ref fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000039] is [000086] ------------ * LCL_VAR struct V10 tmp7 Successfully inlined Helper:Create(System.Guid):System.Guid (11 IL bytes) (depth 1) [below ALWAYS_INLINE size] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'NullableTest16:BoxUnboxToNQGen(long):bool' calling 'Helper:Create(System.Guid):System.Guid' INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' Expanding INLINE_CANDIDATE in statement STMT00016 in BB01: STMT00016 (IL ???... ???) [000085] I-C-G------- * CALL void System.Guid..ctor (exactContextHnd=0x00000000D1FFAB1E) [000084] ------------ this in x0 +--* ADDR byref [000083] -------N---- | \--* LCL_VAR struct V10 tmp7 [000079] ------------ arg1 \--* CNS_STR ref thisArg: is a constant is byref to a struct local [000084] ------------ * ADDR byref [000083] -------N---- \--* LCL_VAR struct V10 tmp7 Argument #1: is a constant [000079] ------------ * CNS_STR ref INLINER: inlineInfo.tokenLookupContextHandle for System.Guid:.ctor(System.String):this set to 0x00000000D1FFAB1E: Invoking compiler for the inlinee method System.Guid:.ctor(System.String):this : IL to import: IL_0000 03 ldarg.1 IL_0001 2d 0b brtrue.s 11 (IL_000e) IL_0003 72 9f 3f 00 70 ldstr 0x70003F9F IL_0008 73 fb 09 00 06 newobj 0x60009FB IL_000d 7a throw IL_000e 12 00 ldloca.s 0x0 IL_0010 17 ldc.i4.1 IL_0011 28 a9 10 00 06 call 0x60010A9 IL_0016 03 ldarg.1 IL_0017 28 37 07 00 06 call 0x6000737 IL_001c 12 00 ldloca.s 0x0 IL_001e 28 7f 10 00 06 call 0x600107F IL_0023 0b stloc.1 IL_0024 07 ldloc.1 IL_0025 72 a3 3f 00 70 ldstr 0x70003FA3 IL_002a 28 29 62 00 06 call 0x6006229 IL_002f 02 ldarg.0 IL_0030 12 00 ldloca.s 0x0 IL_0032 28 ab 10 00 06 call 0x60010AB IL_0037 81 05 01 00 02 stobj 0x2000105 IL_003c 2a ret INLINER impTokenLookupContextHandle for System.Guid:.ctor(System.String):this is 0x00000000D1FFAB1E. *************** In fgFindBasicBlocks() for System.Guid:.ctor(System.String):this weight= 16 : state 4 [ ldarg.1 ] weight= 25 : state 45 [ brtrue.s ] weight= 66 : state 102 [ ldstr ] weight=227 : state 103 [ newobj ] weight=210 : state 108 [ throw ] weight= 61 : state 19 [ ldloca.s ] weight= 28 : state 24 [ ldc.i4.1 ] weight= 79 : state 40 [ call ] weight= 16 : state 4 [ ldarg.1 ] weight= 79 : state 40 [ call ] weight= 61 : state 19 [ ldloca.s ] weight= 79 : state 40 [ call ] weight= -7 : state 200 [ stloc.1 -> ldloc.1 ] weight= 66 : state 102 [ ldstr ] weight= 79 : state 40 [ call ] weight= 10 : state 3 [ ldarg.0 ] weight= 61 : state 19 [ ldloca.s ] weight= 79 : state 40 [ call ] weight= 36 : state 115 [ stobj ] weight= 19 : state 42 [ ret ] multiplier in instance constructors increased to 1.5. multiplier in methods of struct increased to 4.5. Inline candidate has 1 foldable branches. Multiplier increased to 8.5. Inline candidate callsite is boring. Multiplier increased to 9.8. calleeNativeSizeEstimate=1290 callsiteNativeSizeEstimate=115 benefit multiplier=9.8 threshold=1127 Native estimate for function size exceeds threshold for inlining 129 > 112.7 (multiplier = 9.8) Inline expansion aborted, inline not profitable INLINER: during 'fgInline' result 'failed this call site' reason 'unprofitable inline' for 'NullableTest16:BoxUnboxToNQGen(long):bool' calling 'System.Guid:.ctor(System.String):this' INLINER: during 'fgInline' result 'failed this call site' reason 'unprofitable inline' Replacing the return expression placeholder [000042] with [000086] [000042] --C--------- * RET_EXPR struct(inl return expr [000086]) Inserting the inline return expression [000086] ------------ * LCL_VAR struct V10 tmp7 Expanding INLINE_CANDIDATE in statement STMT00008 in BB01: STMT00008 (IL ???... ???) [000043] I-C-G------- * CALL int Helper.Compare (exactContextHnd=0x00000000D1FFAB1E) [000051] n----------- arg0 +--* OBJ struct [000050] ------------ | \--* ADDR byref [000037] -------N---- | \--* LCL_VAR struct V06 tmp3 [000049] n----------- arg1 \--* OBJ struct [000048] ------------ \--* ADDR byref [000047] -------N---- \--* LCL_VAR struct V07 tmp4 Argument #0: [000051] n----------- * OBJ struct [000050] ------------ \--* ADDR byref [000037] -------N---- \--* LCL_VAR struct V06 tmp3 Argument #1: [000049] n----------- * OBJ struct [000048] ------------ \--* ADDR byref [000047] -------N---- \--* LCL_VAR struct V07 tmp4 INLINER: inlineInfo.tokenLookupContextHandle for Helper:Compare(System.Guid,System.Guid):bool set to 0x00000000D1FFAB1E: Invoking compiler for the inlinee method Helper:Compare(System.Guid,System.Guid):bool : IL to import: IL_0000 02 ldarg.0 IL_0001 03 ldarg.1 IL_0002 28 4c 00 00 0a call 0xA00004C IL_0007 2a ret INLINER impTokenLookupContextHandle for Helper:Compare(System.Guid,System.Guid):bool is 0x00000000D1FFAB1E. *************** In fgFindBasicBlocks() for Helper:Compare(System.Guid,System.Guid):bool Jump targets: none New Basic Block BB05 [0004] created. BB05 [000..008) Basic block list for 'Helper:Compare(System.Guid,System.Guid):bool' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..008) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000043] Starting PHASE Pre-import *************** Inline @[000043] Finishing PHASE Pre-import *************** Inline @[000043] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000043] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..008) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB05 [000..008) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000043] Starting PHASE Importation *************** In impImport() for Helper:Compare(System.Guid,System.Guid):bool impImportBlockPending for BB05 Importing BB05 (PC=000) of 'Helper:Compare(System.Guid,System.Guid):bool' [ 0] 0 (0x000) ldarg.0 lvaGrabTemp returning 11 (V11 tmp8) called for Inlining Arg. [ 1] 1 (0x001) ldarg.1 lvaGrabTemp returning 12 (V12 tmp9) called for Inlining Arg. [ 2] 2 (0x002) call 0A00004C In Compiler::impImportCall: opcode is call, kind=0, callRetType is bool, structSize is 0 Calling impNormStructVal on: [000095] ------------ * LCL_VAR struct V12 tmp9 resulting tree: [000098] n----------- * OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 Calling impNormStructVal on: [000094] ------------ * LCL_VAR struct V11 tmp8 resulting tree: [000100] n----------- * OBJ struct [000099] ------------ \--* ADDR byref [000094] -------N---- \--* LCL_VAR struct V11 tmp8 [000096] I-C-G------- * CALL int System.Guid.op_Equality (exactContextHnd=0x00000000D1FFAB1E) [000100] n----------- arg0 +--* OBJ struct [000099] ------------ | \--* ADDR byref [000094] -------N---- | \--* LCL_VAR struct V11 tmp8 [000098] n----------- arg1 \--* OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 [ 1] 7 (0x007) ret Inlinee Return expression (before normalization) => [000101] --C--------- * RET_EXPR int (inl return expr [000096]) Inlinee Return expression (after normalization) => [000102] --C--------- * CAST int <- bool <- int [000101] --C--------- \--* RET_EXPR int (inl return expr [000096]) After impImport() added block for try,catch,finally ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..008) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000043] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..008) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB05 [000..008) (return), preds={} succs={} ***** BB05 [000096] I-C-G------- * CALL int System.Guid.op_Equality (exactContextHnd=0x00000000D1FFAB1E) [000100] n----------- arg0 +--* OBJ struct [000099] ------------ | \--* ADDR byref [000094] -------N---- | \--* LCL_VAR struct V11 tmp8 [000098] n----------- arg1 \--* OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000043] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000043] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000043] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000043] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000043] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000043] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000043] ----------- Arguments setup: STMT00019 (IL ???... ???) [000105] -A---------- * ASG struct (copy) [000103] D------N---- +--* LCL_VAR struct V11 tmp8 [000051] n----------- \--* OBJ struct [000050] ------------ \--* ADDR byref [000037] -------N---- \--* LCL_VAR struct V06 tmp3 STMT00020 (IL ???... ???) [000108] -A---------- * ASG struct (copy) [000106] D------N---- +--* LCL_VAR struct V12 tmp9 [000049] n----------- \--* OBJ struct [000048] ------------ \--* ADDR byref [000047] -------N---- \--* LCL_VAR struct V07 tmp4 Inlinee method body: STMT00018 (IL ???... ???) [000096] I-C-G------- * CALL int System.Guid.op_Equality (exactContextHnd=0x00000000D1FFAB1E) [000100] n----------- arg0 +--* OBJ struct [000099] ------------ | \--* ADDR byref [000094] -------N---- | \--* LCL_VAR struct V11 tmp8 [000098] n----------- arg1 \--* OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000043] is [000102] --C--------- * CAST int <- bool <- int [000101] --C--------- \--* RET_EXPR int (inl return expr [000096]) Successfully inlined Helper:Compare(System.Guid,System.Guid):bool (8 IL bytes) (depth 1) [below ALWAYS_INLINE size] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'NullableTest16:BoxUnboxToNQGen(long):bool' calling 'Helper:Compare(System.Guid,System.Guid):bool' INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' Expanding INLINE_CANDIDATE in statement STMT00018 in BB01: STMT00018 (IL ???... ???) [000096] I-C-G------- * CALL int System.Guid.op_Equality (exactContextHnd=0x00000000D1FFAB1E) [000100] n----------- arg0 +--* OBJ struct [000099] ------------ | \--* ADDR byref [000094] -------N---- | \--* LCL_VAR struct V11 tmp8 [000098] n----------- arg1 \--* OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 Argument #0: [000100] n----------- * OBJ struct [000099] ------------ \--* ADDR byref [000094] -------N---- \--* LCL_VAR struct V11 tmp8 Argument #1: [000098] n----------- * OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 INLINER: inlineInfo.tokenLookupContextHandle for System.Guid:op_Equality(System.Guid,System.Guid):bool set to 0x00000000D1FFAB1E: Invoking compiler for the inlinee method System.Guid:op_Equality(System.Guid,System.Guid):bool : IL to import: IL_0000 0f 00 ldarga.s 0x0 IL_0002 0f 01 ldarga.s 0x1 IL_0004 28 91 10 00 06 call 0x6001091 IL_0009 2a ret INLINER impTokenLookupContextHandle for System.Guid:op_Equality(System.Guid,System.Guid):bool is 0x00000000D1FFAB1E. *************** In fgFindBasicBlocks() for System.Guid:op_Equality(System.Guid,System.Guid):bool Jump targets: none New Basic Block BB06 [0005] created. BB06 [000..00A) Basic block list for 'System.Guid:op_Equality(System.Guid,System.Guid):bool' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0005] 1 1 [000..00A) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000096] Starting PHASE Pre-import *************** Inline @[000096] Finishing PHASE Pre-import *************** Inline @[000096] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000096] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0005] 1 1 [000..00A) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [000..00A) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000096] Starting PHASE Importation *************** In impImport() for System.Guid:op_Equality(System.Guid,System.Guid):bool impImportBlockPending for BB06 Importing BB06 (PC=000) of 'System.Guid:op_Equality(System.Guid,System.Guid):bool' [ 0] 0 (0x000) ldarga.s 0 lvaGrabTemp returning 13 (V13 tmp10) called for Inlining Arg. [ 1] 2 (0x002) ldarga.s 1 lvaGrabTemp returning 14 (V14 tmp11) called for Inlining Arg. [ 2] 4 (0x004) call 06001091 In Compiler::impImportCall: opcode is call, kind=0, callRetType is bool, structSize is 0 [000117] I-C-G------- * CALL int System.Guid.EqualsCore (exactContextHnd=0x00000000D1FFAB1E) [000114] ------------ arg0 +--* ADDR byref [000113] -------N---- | \--* LCL_VAR struct V13 tmp10 [000116] ------------ arg1 \--* ADDR byref [000115] -------N---- \--* LCL_VAR struct V14 tmp11 [ 1] 9 (0x009) ret Inlinee Return expression (before normalization) => [000118] --C--------- * RET_EXPR int (inl return expr [000117]) Inlinee Return expression (after normalization) => [000119] --C--------- * CAST int <- bool <- int [000118] --C--------- \--* RET_EXPR int (inl return expr [000117]) After impImport() added block for try,catch,finally ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0005] 1 1 [000..00A) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000096] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0005] 1 1 [000..00A) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [000..00A) (return), preds={} succs={} ***** BB06 [000117] I-C-G------- * CALL int System.Guid.EqualsCore (exactContextHnd=0x00000000D1FFAB1E) [000114] ------------ arg0 +--* ADDR byref [000113] -------N---- | \--* LCL_VAR struct V13 tmp10 [000116] ------------ arg1 \--* ADDR byref [000115] -------N---- \--* LCL_VAR struct V14 tmp11 ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000096] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000096] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000096] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000096] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000096] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000096] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000096] ----------- Arguments setup: STMT00023 (IL ???... ???) [000122] -A---------- * ASG struct (copy) [000120] D------N---- +--* LCL_VAR struct V13 tmp10 [000100] n----------- \--* OBJ struct [000099] ------------ \--* ADDR byref [000094] -------N---- \--* LCL_VAR struct V11 tmp8 STMT00024 (IL ???... ???) [000125] -A---------- * ASG struct (copy) [000123] D------N---- +--* LCL_VAR struct V14 tmp11 [000098] n----------- \--* OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 Inlinee method body: STMT00022 (IL ???... ???) [000117] I-C-G------- * CALL int System.Guid.EqualsCore (exactContextHnd=0x00000000D1FFAB1E) [000114] ------------ arg0 +--* ADDR byref [000113] -------N---- | \--* LCL_VAR struct V13 tmp10 [000116] ------------ arg1 \--* ADDR byref [000115] -------N---- \--* LCL_VAR struct V14 tmp11 fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000096] is [000119] --C--------- * CAST int <- bool <- int [000118] --C--------- \--* RET_EXPR int (inl return expr [000117]) Successfully inlined System.Guid:op_Equality(System.Guid,System.Guid):bool (10 IL bytes) (depth 2) [below ALWAYS_INLINE size] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'NullableTest16:BoxUnboxToNQGen(long):bool' calling 'System.Guid:op_Equality(System.Guid,System.Guid):bool' INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' Expanding INLINE_CANDIDATE in statement STMT00022 in BB01: STMT00022 (IL ???... ???) [000117] I-C-G------- * CALL int System.Guid.EqualsCore (exactContextHnd=0x00000000D1FFAB1E) [000114] ------------ arg0 +--* ADDR byref [000113] -------N---- | \--* LCL_VAR struct V13 tmp10 [000116] ------------ arg1 \--* ADDR byref [000115] -------N---- \--* LCL_VAR struct V14 tmp11 Argument #0: is a constant is byref to a struct local [000114] ------------ * ADDR byref [000113] -------N---- \--* LCL_VAR struct V13 tmp10 Argument #1: is a constant is byref to a struct local [000116] ------------ * ADDR byref [000115] -------N---- \--* LCL_VAR struct V14 tmp11 INLINER: inlineInfo.tokenLookupContextHandle for System.Guid:EqualsCore(byref,byref):bool set to 0x00000000D1FFAB1E: Invoking compiler for the inlinee method System.Guid:EqualsCore(byref,byref):bool : IL to import: IL_0000 02 ldarg.0 IL_0001 7c 43 04 00 04 ldflda 0x4000443 IL_0006 28 29 01 00 2b call 0x2B000129 IL_000b 0a stloc.0 IL_000c 03 ldarg.1 IL_000d 7c 43 04 00 04 ldflda 0x4000443 IL_0012 28 29 01 00 2b call 0x2B000129 IL_0017 0b stloc.1 IL_0018 06 ldloc.0 IL_0019 4a ldind.i4 IL_001a 07 ldloc.1 IL_001b 4a ldind.i4 IL_001c 33 37 bne.un.s 55 (IL_0055) IL_001e 06 ldloc.0 IL_001f 17 ldc.i4.1 IL_0020 28 15 00 00 2b call 0x2B000015 IL_0025 4a ldind.i4 IL_0026 07 ldloc.1 IL_0027 17 ldc.i4.1 IL_0028 28 15 00 00 2b call 0x2B000015 IL_002d 4a ldind.i4 IL_002e 33 25 bne.un.s 37 (IL_0055) IL_0030 06 ldloc.0 IL_0031 18 ldc.i4.2 IL_0032 28 15 00 00 2b call 0x2B000015 IL_0037 4a ldind.i4 IL_0038 07 ldloc.1 IL_0039 18 ldc.i4.2 IL_003a 28 15 00 00 2b call 0x2B000015 IL_003f 4a ldind.i4 IL_0040 33 13 bne.un.s 19 (IL_0055) IL_0042 06 ldloc.0 IL_0043 19 ldc.i4.3 IL_0044 28 15 00 00 2b call 0x2B000015 IL_0049 4a ldind.i4 IL_004a 07 ldloc.1 IL_004b 19 ldc.i4.3 IL_004c 28 15 00 00 2b call 0x2B000015 IL_0051 4a ldind.i4 IL_0052 fe 01 ceq IL_0054 2a ret IL_0055 16 ldc.i4.0 IL_0056 2a ret INLINER impTokenLookupContextHandle for System.Guid:EqualsCore(byref,byref):bool is 0x00000000D1FFAB1E. *************** In fgFindBasicBlocks() for System.Guid:EqualsCore(byref,byref):bool weight= 10 : state 3 [ ldarg.0 ] weight= 17 : state 110 [ ldflda ] weight= 79 : state 40 [ call ] weight= 6 : state 11 [ stloc.0 ] weight= 16 : state 4 [ ldarg.1 ] weight= 17 : state 110 [ ldflda ] weight= 79 : state 40 [ call ] weight= 34 : state 12 [ stloc.1 ] weight= 12 : state 7 [ ldloc.0 ] weight=-11 : state 62 [ ldind.i4 ] weight= 9 : state 8 [ ldloc.1 ] weight=-11 : state 62 [ ldind.i4 ] weight= 12 : state 51 [ bne.un.s ] weight= 12 : state 7 [ ldloc.0 ] weight= 28 : state 24 [ ldc.i4.1 ] weight= 79 : state 40 [ call ] weight=-11 : state 62 [ ldind.i4 ] weight= 9 : state 8 [ ldloc.1 ] weight= 28 : state 24 [ ldc.i4.1 ] weight= 79 : state 40 [ call ] weight=-11 : state 62 [ ldind.i4 ] weight= 12 : state 51 [ bne.un.s ] weight= 12 : state 7 [ ldloc.0 ] weight= 34 : state 25 [ ldc.i4.2 ] weight= 79 : state 40 [ call ] weight=-11 : state 62 [ ldind.i4 ] weight= 9 : state 8 [ ldloc.1 ] weight= 34 : state 25 [ ldc.i4.2 ] weight= 79 : state 40 [ call ] weight=-11 : state 62 [ ldind.i4 ] weight= 12 : state 51 [ bne.un.s ] weight= 12 : state 7 [ ldloc.0 ] weight= -6 : state 26 [ ldc.i4.3 ] weight= 79 : state 40 [ call ] weight=-11 : state 62 [ ldind.i4 ] weight= 9 : state 8 [ ldloc.1 ] weight= -6 : state 26 [ ldc.i4.3 ] weight= 79 : state 40 [ call ] weight=-11 : state 62 [ ldind.i4 ] weight= 20 : state 168 [ ceq ] weight= 19 : state 42 [ ret ] weight= 15 : state 23 [ ldc.i4.0 ] weight= 19 : state 42 [ ret ] multiplier in methods of struct increased to 3. 2 ldfld or stfld over arguments which are structs. Multiplier increased to 4. Inline candidate callsite is boring. Multiplier increased to 5.3. calleeNativeSizeEstimate=949 callsiteNativeSizeEstimate=115 benefit multiplier=5.3 threshold=609 Native estimate for function size exceeds threshold for inlining 94.9 > 60.9 (multiplier = 5.3) Inline expansion aborted, inline not profitable Inlining [000117] failed, so bashing STMT00022 to NOP INLINER: during 'fgInline' result 'failed this call site' reason 'unprofitable inline' for 'NullableTest16:BoxUnboxToNQGen(long):bool' calling 'System.Guid:EqualsCore(byref,byref):bool' INLINER: during 'fgInline' result 'failed this call site' reason 'unprofitable inline' Replacing the return expression placeholder [000052] with [000102] [000052] --C--------- * RET_EXPR int (inl return expr [000102]) Inserting the inline return expression [000102] --C--------- * CAST int <- bool <- int [000101] --C--------- \--* RET_EXPR int (inl return expr [000119]) Replacing the return expression placeholder [000101] with [000119] [000101] --C--------- * RET_EXPR int (inl return expr [000119]) Inserting the inline return expression [000119] --C--------- * CAST int <- bool <- int [000118] --C--------- \--* RET_EXPR int (inl return expr [000117]) Replacing the return expression placeholder [000118] with [000117] [000118] --C--------- * RET_EXPR int (inl return expr [000117]) Inserting the inline return expression [000117] --C-G------- * CALL int System.Guid.EqualsCore [000114] ------------ arg0 +--* ADDR byref [000113] -------N---- | \--* LCL_VAR struct V13 tmp10 [000116] ------------ arg1 \--* ADDR byref [000115] -------N---- \--* LCL_VAR struct V14 tmp11 **************** Inline Tree Inlines into 06000000 [via ExtendedDefaultPolicy] NullableTest16:BoxUnboxToNQGen(long):bool [1 IL=0020 TR=000039 06000000] [below ALWAYS_INLINE size] Helper:Create(System.Guid):System.Guid [0 IL=0005 TR=000085 06000000] [FAILED: unprofitable inline] System.Guid:.ctor(System.String):this [2 IL=0025 TR=000043 06000000] [below ALWAYS_INLINE size] Helper:Compare(System.Guid,System.Guid):bool [3 IL=0002 TR=000096 06000000] [below ALWAYS_INLINE size] System.Guid:op_Equality(System.Guid,System.Guid):bool [0 IL=0004 TR=000117 06000000] [FAILED: unprofitable inline] System.Guid:EqualsCore(byref,byref):bool Budget: initialTime=204, finalTime=220, initialBudget=2040, currentBudget=2040 Budget: initialSize=1225, finalSize=1225 *************** Finishing PHASE Morph - Inlining Trees after Morph - Inlining ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..021) -> BB03 (always), preds={} succs={BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) [000006] -A---------- * ASG ref [000005] D------N---- +--* LCL_VAR ref V04 tmp1 [000004] ------------ \--* ALLOCOBJ ref [000003] H----------- \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) [000011] -A---------- * ASG long [000010] -------N---- +--* IND long [000009] ------------ | \--* ADD byref [000007] ------------ | +--* LCL_VAR ref V04 tmp1 [000008] ------------ | \--* CNS_INT long 8 [000002] ------------ \--* LCL_VAR long V00 arg0 ***** BB01 STMT00002 (IL ???... ???) [000016] -A---------- * ASG ref [000015] D------N---- +--* LCL_VAR ref V05 tmp2 [000013] ------------ \--* BOX ref [000012] ------------ \--* LCL_VAR ref V04 tmp1 ***** BB01 STMT00003 (IL ???... ???) [000026] --CXG------- * QMARK void [000020] Q--X-------- if +--* EQ int [000019] #--X-------- | +--* IND long [000018] ------------ | | \--* LCL_VAR ref V05 tmp2 [000014] H----------- | \--* CNS_INT(h) long 0xd1ffab1e class [000025] --CXG------- if \--* COLON void [000023] --CXG------- else +--* CALL help void HELPER.CORINFO_HELP_UNBOX [000022] H----------- arg0 | +--* CNS_INT(h) long 0xd1ffab1e class [000017] ------------ arg1 | \--* LCL_VAR ref V05 tmp2 [000024] ------------ then \--* NOP void ***** BB01 STMT00004 (IL ???... ???) [000036] -A-XG------- * ASG struct (copy) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 [000029] ---XG------- \--* OBJ struct [000028] ------------ \--* ADD byref [000021] ------------ +--* LCL_VAR ref V05 tmp2 [000027] ------------ \--* CNS_INT long 8 ***** BB01 STMT00005 (IL ???... ???) [000033] IA---------- * ASG struct (init) [000030] D------N---- +--* LCL_VAR struct V01 loc0 [000032] ------------ \--* CNS_INT int 0 ***** BB01 STMT00017 (IL ???... ???) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] ------------ arg0 +--* CNS_INT long 0x7f2134dd40 [000088] ------------ arg1 \--* CNS_INT int 91 ***** BB01 STMT00015 (IL ???... ???) [000082] IA---------- * ASG struct (init) [000080] D------N---- +--* LCL_VAR struct V10 tmp7 [000081] ------------ \--* CNS_INT int 0 ***** BB01 STMT00016 (IL ???... ???) [000085] --C-G------- * CALL void System.Guid..ctor [000084] ------------ this in x0 +--* ADDR byref [000083] -------N---- | \--* LCL_VAR struct V10 tmp7 [000079] ------------ arg1 \--* CNS_STR ref ***** BB01 STMT00007 (IL ???... ???) [000093] -A---------- * ASG struct (copy) [000044] M------N---- +--* LCL_VAR struct V07 tmp4 [000086] -------N---- \--* LCL_VAR struct V10 tmp7 ***** BB01 STMT00019 (IL ???... ???) [000105] -A---------- * ASG struct (copy) [000103] D------N---- +--* LCL_VAR struct V11 tmp8 [000051] n----------- \--* OBJ struct [000050] ------------ \--* ADDR byref [000037] -------N---- \--* LCL_VAR struct V06 tmp3 ***** BB01 STMT00020 (IL ???... ???) [000108] -A---------- * ASG struct (copy) [000106] D------N---- +--* LCL_VAR struct V12 tmp9 [000049] n----------- \--* OBJ struct [000048] ------------ \--* ADDR byref [000047] -------N---- \--* LCL_VAR struct V07 tmp4 ***** BB01 STMT00021 (IL ???... ???) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] ------------ arg0 +--* CNS_INT long 0x7f2134dd40 [000110] ------------ arg1 \--* CNS_INT int 91 ***** BB01 STMT00023 (IL ???... ???) [000122] -A---------- * ASG struct (copy) [000120] D------N---- +--* LCL_VAR struct V13 tmp10 [000100] n----------- \--* OBJ struct [000099] ------------ \--* ADDR byref [000094] -------N---- \--* LCL_VAR struct V11 tmp8 ***** BB01 STMT00024 (IL ???... ???) [000125] -A---------- * ASG struct (copy) [000123] D------N---- +--* LCL_VAR struct V14 tmp11 [000098] n----------- \--* OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 ***** BB01 STMT00009 (IL ???... ???) [000054] -AC--------- * ASG int [000053] D------N---- +--* LCL_VAR int V02 loc1 [000102] --C--------- \--* CAST int <- bool <- int [000119] --C--------- \--* CAST int <- bool <- int [000117] --C-G------- \--* CALL int System.Guid.EqualsCore [000114] ------------ arg0 +--* ADDR byref [000113] -------N---- | \--* LCL_VAR struct V13 tmp10 [000116] ------------ arg1 \--* ADDR byref [000115] -------N---- \--* LCL_VAR struct V14 tmp11 ------------ BB02 [021..02E) -> BB03 (cret), preds={} succs={BB03} ***** BB02 STMT00011 (IL 0x021...0x02B) [000058] -A---O------ * ASG ref [000057] D------N---- +--* LCL_VAR ref V08 tmp5 [000001] -----O------ \--* CATCH_ARG ref ***** BB02 STMT00012 (IL 0x022... ???) [000064] ------------ * NOP void ***** BB02 STMT00013 (IL ???... ???) [000069] ------------ * NOP void ***** BB02 STMT00014 (IL ???... ???) [000078] -A---------- * ASG int [000077] D------N---- +--* LCL_VAR int V02 loc1 [000076] ------------ \--* CNS_INT int 0 ------------ BB03 [02E..030) (return), preds={} succs={} ***** BB03 STMT00010 (IL 0x02E...0x02F) [000056] ------------ * RETURN int [000055] ------------ \--* LCL_VAR int V02 loc1 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Allocate Objects disabled, punting *************** Finishing PHASE Allocate Objects [no changes] *************** Starting PHASE Morph - Add internal blocks *************** After fgAddInternal() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) *************** Finishing PHASE Morph - Add internal blocks *************** Starting PHASE Remove empty try *************** In fgRemoveEmptyTry() *************** Before fgRemoveEmptyTry() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) EH#0 is not a try-finally; skipping. *************** Finishing PHASE Remove empty try [no changes] *************** Starting PHASE Remove empty finally *************** Before fgRemoveEmptyFinally() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) EH#0 is not a try-finally; skipping. *************** Finishing PHASE Remove empty finally [no changes] *************** Starting PHASE Merge callfinally chains ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) Method does not have any try-finallys; no merging. *************** Finishing PHASE Merge callfinally chains [no changes] *************** Starting PHASE Clone finally ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) EH#0 is not a try-finally; skipping. *************** Finishing PHASE Clone finally [no changes] *************** Starting PHASE Compute preds Renumbering the basic blocks for fgComputePred *************** Before renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB01 [000..021), Handler at BB02..BB02 [021..02E) *************** After renumbering the basic blocks =============== No blocks renumbered! New BlockSet epoch 2, # of blocks (including unused BB00): 4, bitset array size: 1 (short) *************** In fgComputePreds() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- Setting edge weights for BB01 -> BB03 to [0 .. 3.402823e+38] Setting edge weights for BB02 -> BB03 to [0 .. 3.402823e+38] *************** After fgComputePreds() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 BB01,BB02 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Compute preds *************** Starting PHASE Merge throw blocks *************** In fgTailMergeThrows Method does not have multiple noreturn calls. *************** Finishing PHASE Merge throw blocks [no changes] *************** Starting PHASE Update flow graph early pass *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 BB01,BB02 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Finishing PHASE Update flow graph early pass *************** Starting PHASE Morph - Promote Structs *************** In fgResetImplicitByRefRefCount() *************** In fgPromoteStructs() lvaTable before fgPromoteStructs ; Initial local variable assignments ; ; V00 arg0 long ; V01 loc0 struct ld-addr-op ; V02 loc1 bool ; V03 OutArgs lclBlk "OutgoingArgSpace" ; V04 tmp1 ref class-hnd exact "Single-def Box Helper" ; V05 tmp2 ref "inline UNBOX clone1" ; V06 tmp3 struct "impSpillLclRefs" ; V07 tmp4 struct "struct address for call/obj" ; V08 tmp5 ref class-hnd "impSpillSpecialSideEff" ; V09 tmp6 ref class-hnd exact "Single-def Box Helper" ; V10 tmp7 struct "NewObj constructor temp" ; V11 tmp8 struct "Inlining Arg" ; V12 tmp9 struct "Inlining Arg" ; V13 tmp10 struct ld-addr-op "Inlining Arg" ; V14 tmp11 struct ld-addr-op "Inlining Arg" lvaTable after fgPromoteStructs ; Initial local variable assignments ; ; V00 arg0 long ; V01 loc0 struct ld-addr-op ; V02 loc1 bool ; V03 OutArgs lclBlk "OutgoingArgSpace" ; V04 tmp1 ref class-hnd exact "Single-def Box Helper" ; V05 tmp2 ref "inline UNBOX clone1" ; V06 tmp3 struct "impSpillLclRefs" ; V07 tmp4 struct "struct address for call/obj" ; V08 tmp5 ref class-hnd "impSpillSpecialSideEff" ; V09 tmp6 ref class-hnd exact "Single-def Box Helper" ; V10 tmp7 struct "NewObj constructor temp" ; V11 tmp8 struct "Inlining Arg" ; V12 tmp9 struct "Inlining Arg" ; V13 tmp10 struct ld-addr-op "Inlining Arg" ; V14 tmp11 struct ld-addr-op "Inlining Arg" *************** Finishing PHASE Morph - Promote Structs *************** Starting PHASE Morph - Structs/AddrExp *************** In fgMarkAddressExposedLocals() LocalAddressVisitor visiting statement: STMT00000 (IL 0x000...0x00E) [000006] -AC--------- * ASG ref [000005] D------N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----------- arg0 \--* CNS_INT(h) long 0xd1ffab1e class LocalAddressVisitor visiting statement: STMT00001 (IL ???... ???) [000011] -A---------- * ASG long [000010] -------N---- +--* IND long [000009] ------------ | \--* ADD byref [000007] ------------ | +--* LCL_VAR ref V04 tmp1 [000008] ------------ | \--* CNS_INT long 8 [000002] ------------ \--* LCL_VAR long V00 arg0 LocalAddressVisitor visiting statement: STMT00002 (IL ???... ???) [000016] -A---------- * ASG ref [000015] D------N---- +--* LCL_VAR ref V05 tmp2 [000013] ------------ \--* BOX ref [000012] ------------ \--* LCL_VAR ref V04 tmp1 LocalAddressVisitor visiting statement: STMT00003 (IL ???... ???) [000026] --CXG------- * QMARK void [000020] Q--X-------- if +--* EQ int [000019] #--X-------- | +--* IND long [000018] ------------ | | \--* LCL_VAR ref V05 tmp2 [000014] H----------- | \--* CNS_INT(h) long 0xd1ffab1e class [000025] --CXG------- if \--* COLON void [000023] --CXG------- else +--* CALL help void HELPER.CORINFO_HELP_UNBOX [000022] H----------- arg0 | +--* CNS_INT(h) long 0xd1ffab1e class [000017] ------------ arg1 | \--* LCL_VAR ref V05 tmp2 [000024] ------------ then \--* NOP void LocalAddressVisitor visiting statement: STMT00004 (IL ???... ???) [000036] -A-XG------- * ASG struct (copy) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 [000029] ---XG------- \--* OBJ struct [000028] ------------ \--* ADD byref [000021] ------------ +--* LCL_VAR ref V05 tmp2 [000027] ------------ \--* CNS_INT long 8 LocalAddressVisitor visiting statement: STMT00005 (IL ???... ???) [000033] IA---------- * ASG struct (init) [000030] D------N---- +--* LCL_VAR struct V01 loc0 [000032] ------------ \--* CNS_INT int 0 LocalAddressVisitor visiting statement: STMT00017 (IL ???... ???) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] ------------ arg0 +--* CNS_INT long 0x7f2134dd40 [000088] ------------ arg1 \--* CNS_INT int 91 LocalAddressVisitor visiting statement: STMT00015 (IL ???... ???) [000082] IA---------- * ASG struct (init) [000080] D------N---- +--* LCL_VAR struct V10 tmp7 [000081] ------------ \--* CNS_INT int 0 LocalAddressVisitor visiting statement: STMT00016 (IL ???... ???) [000085] --C-G------- * CALL void System.Guid..ctor [000084] ------------ this in x0 +--* ADDR byref [000083] -------N---- | \--* LCL_VAR struct V10 tmp7 [000079] ------------ arg1 \--* CNS_STR ref Local V10 should not be enregistered because: it is address exposed LocalAddressVisitor modified statement: STMT00016 (IL ???... ???) [000085] --C-G------- * CALL void System.Guid..ctor [000084] ------------ this in x0 +--* LCL_VAR_ADDR byref V10 tmp7 [000079] ------------ arg1 \--* CNS_STR ref LocalAddressVisitor visiting statement: STMT00007 (IL ???... ???) [000093] -A---------- * ASG struct (copy) [000044] M------N---- +--* LCL_VAR struct V07 tmp4 [000086] -------N---- \--* LCL_VAR struct(AX) V10 tmp7 LocalAddressVisitor visiting statement: STMT00019 (IL ???... ???) [000105] -A---------- * ASG struct (copy) [000103] D------N---- +--* LCL_VAR struct V11 tmp8 [000051] n----------- \--* OBJ struct [000050] ------------ \--* ADDR byref [000037] -------N---- \--* LCL_VAR struct V06 tmp3 LocalAddressVisitor modified statement: STMT00019 (IL ???... ???) [000105] -A---------- * ASG struct (copy) [000103] D------N---- +--* LCL_VAR struct V11 tmp8 [000051] ------------ \--* LCL_VAR struct V06 tmp3 LocalAddressVisitor visiting statement: STMT00020 (IL ???... ???) [000108] -A---------- * ASG struct (copy) [000106] D------N---- +--* LCL_VAR struct V12 tmp9 [000049] n----------- \--* OBJ struct [000048] ------------ \--* ADDR byref [000047] -------N---- \--* LCL_VAR struct V07 tmp4 LocalAddressVisitor modified statement: STMT00020 (IL ???... ???) [000108] -A---------- * ASG struct (copy) [000106] D------N---- +--* LCL_VAR struct V12 tmp9 [000049] ------------ \--* LCL_VAR struct V07 tmp4 LocalAddressVisitor visiting statement: STMT00021 (IL ???... ???) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] ------------ arg0 +--* CNS_INT long 0x7f2134dd40 [000110] ------------ arg1 \--* CNS_INT int 91 LocalAddressVisitor visiting statement: STMT00023 (IL ???... ???) [000122] -A---------- * ASG struct (copy) [000120] D------N---- +--* LCL_VAR struct V13 tmp10 [000100] n----------- \--* OBJ struct [000099] ------------ \--* ADDR byref [000094] -------N---- \--* LCL_VAR struct V11 tmp8 LocalAddressVisitor modified statement: STMT00023 (IL ???... ???) [000122] -A---------- * ASG struct (copy) [000120] D------N---- +--* LCL_VAR struct V13 tmp10 [000100] ------------ \--* LCL_VAR struct V11 tmp8 LocalAddressVisitor visiting statement: STMT00024 (IL ???... ???) [000125] -A---------- * ASG struct (copy) [000123] D------N---- +--* LCL_VAR struct V14 tmp11 [000098] n----------- \--* OBJ struct [000097] ------------ \--* ADDR byref [000095] -------N---- \--* LCL_VAR struct V12 tmp9 LocalAddressVisitor modified statement: STMT00024 (IL ???... ???) [000125] -A---------- * ASG struct (copy) [000123] D------N---- +--* LCL_VAR struct V14 tmp11 [000098] ------------ \--* LCL_VAR struct V12 tmp9 LocalAddressVisitor visiting statement: STMT00009 (IL ???... ???) [000054] -AC--------- * ASG int [000053] D------N---- +--* LCL_VAR int V02 loc1 [000102] --C--------- \--* CAST int <- bool <- int [000119] --C--------- \--* CAST int <- bool <- int [000117] --C-G------- \--* CALL int System.Guid.EqualsCore [000114] ------------ arg0 +--* ADDR byref [000113] -------N---- | \--* LCL_VAR struct V13 tmp10 [000116] ------------ arg1 \--* ADDR byref [000115] -------N---- \--* LCL_VAR struct V14 tmp11 Local V14 should not be enregistered because: it is address exposed Local V13 should not be enregistered because: it is address exposed LocalAddressVisitor modified statement: STMT00009 (IL ???... ???) [000054] -AC--------- * ASG int [000053] D------N---- +--* LCL_VAR int V02 loc1 [000102] --C--------- \--* CAST int <- bool <- int [000119] --C--------- \--* CAST int <- bool <- int [000117] --C-G------- \--* CALL int System.Guid.EqualsCore [000114] ------------ arg0 +--* LCL_VAR_ADDR byref V13 tmp10 [000116] ------------ arg1 \--* LCL_VAR_ADDR byref V14 tmp11 LocalAddressVisitor visiting statement: STMT00011 (IL 0x021...0x02B) [000058] -A---O------ * ASG ref [000057] D------N---- +--* LCL_VAR ref V08 tmp5 [000001] -----O------ \--* CATCH_ARG ref LocalAddressVisitor visiting statement: STMT00012 (IL 0x022... ???) [000064] ------------ * NOP void LocalAddressVisitor visiting statement: STMT00013 (IL ???... ???) [000069] ------------ * NOP void LocalAddressVisitor visiting statement: STMT00014 (IL ???... ???) [000078] -A---------- * ASG int [000077] D------N---- +--* LCL_VAR int V02 loc1 [000076] ------------ \--* CNS_INT int 0 LocalAddressVisitor visiting statement: STMT00010 (IL 0x02E...0x02F) [000056] ------------ * RETURN int [000055] ------------ \--* LCL_VAR int V02 loc1 *************** Finishing PHASE Morph - Structs/AddrExp *************** Starting PHASE Morph - ByRefs *************** In fgRetypeImplicitByRefArgs() *************** Finishing PHASE Morph - ByRefs *************** Starting PHASE Morph - Global *************** In fgMorphBlocks() Morphing BB01 of 'NullableTest16:BoxUnboxToNQGen(long):bool' fgMorphTree BB01, STMT00000 (before) [000006] -AC--------- * ASG ref [000005] D------N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----------- arg0 \--* CNS_INT(h) long 0xd1ffab1e class Notify VM instruction set (AdvSimd) must be supported. Initializing arg info for 4.CALL: ArgTable for 4.CALL after fgInitArgInfo: fgArgTabEntry[arg 0 3.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8] Morphing args for 4.CALL: argSlots=1, preallocatedArgCount=0, nextSlotNum=0, nextSlotByteOffset=0, outgoingArgSpaceSize=0 Sorting the arguments: Deferred argument ('x0'): [000003] H----+------ * CNS_INT(h) long 0xd1ffab1e class Replaced with placeholder node: [000128] ----------L- * ARGPLACE long Shuffled argument table: x0 ArgTable for 4.CALL after fgMorphArgs: fgArgTabEntry[arg 0 3.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8, lateArgInx=0, processed] fgMorphTree BB01, STMT00000 (after) [000006] -AC--+------ * ASG ref [000005] D----+-N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--+------ \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----+------ arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class fgMorphTree BB01, STMT00001 (before) [000011] -A---------- * ASG long [000010] -------N---- +--* IND long [000009] ------------ | \--* ADD byref [000007] ------------ | +--* LCL_VAR ref V04 tmp1 [000008] ------------ | \--* CNS_INT long 8 [000002] ------------ \--* LCL_VAR long V00 arg0 GenTreeNode creates assertion: [000010] ---X---N---- * IND long In BB01 New Local Constant Assertion: V04 != null, index = #01 fgMorphTree BB01, STMT00002 (before) [000016] -A---------- * ASG ref [000015] D------N---- +--* LCL_VAR ref V05 tmp2 [000013] ------------ \--* BOX ref [000012] ------------ \--* LCL_VAR ref V04 tmp1 fgMorphTree BB01, STMT00003 (before) [000026] --CXG------- * QMARK void [000020] Q--X-------- if +--* EQ int [000019] #--X-------- | +--* IND long [000018] ------------ | | \--* LCL_VAR ref V05 tmp2 [000014] H----------- | \--* CNS_INT(h) long 0xd1ffab1e class [000025] --CXG------- if \--* COLON void [000023] --CXG------- else +--* CALL help void HELPER.CORINFO_HELP_UNBOX [000022] H----------- arg0 | +--* CNS_INT(h) long 0xd1ffab1e class [000017] ------------ arg1 | \--* LCL_VAR ref V05 tmp2 [000024] ------------ then \--* NOP void GenTreeNode creates assertion: [000019] #--X-------- * IND long In BB01 New Local Constant Assertion: V05 != null, index = #02 Initializing arg info for 23.CALL: ArgTable for 23.CALL after fgInitArgInfo: fgArgTabEntry[arg 0 22.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8] fgArgTabEntry[arg 1 17.LCL_VAR ref (By ref), 1 reg: x1, byteAlignment=8] Morphing args for 23.CALL: argSlots=2, preallocatedArgCount=0, nextSlotNum=0, nextSlotByteOffset=0, outgoingArgSpaceSize=0 Sorting the arguments: Deferred argument ('x1'): [000017] -----+------ * LCL_VAR ref V05 tmp2 Replaced with placeholder node: [000129] ----------L- * ARGPLACE ref Deferred argument ('x0'): [000022] H----+------ * CNS_INT(h) long 0xd1ffab1e class Replaced with placeholder node: [000130] ----------L- * ARGPLACE long Shuffled argument table: x1 x0 ArgTable for 23.CALL after fgMorphArgs: fgArgTabEntry[arg 1 17.LCL_VAR ref (By ref), 1 reg: x1, byteAlignment=8, lateArgInx=0, processed] fgArgTabEntry[arg 0 22.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8, lateArgInx=1, processed] fgMorphTree BB01, STMT00003 (after) [000026] --CXG+------ * QMARK void [000020] J--X-+-N---- if +--* EQ int [000019] #--X-+------ | +--* IND long [000018] -----+------ | | \--* LCL_VAR ref V05 tmp2 [000014] H----+------ | \--* CNS_INT(h) long 0xd1ffab1e class [000025] --CXG+?----- if \--* COLON void [000023] --CXG+?----- else +--* CALL help void HELPER.CORINFO_HELP_UNBOX [000017] -----+?----- arg1 in x1 | +--* LCL_VAR ref V05 tmp2 [000022] H----+?----- arg0 in x0 | \--* CNS_INT(h) long 0xd1ffab1e class [000024] -----+?----- then \--* NOP void fgMorphTree BB01, STMT00004 (before) [000036] -A-XG------- * ASG struct (copy) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 [000029] ---XG------- \--* OBJ struct [000028] ------------ \--* ADD byref [000021] ------------ +--* LCL_VAR ref V05 tmp2 [000027] ------------ \--* CNS_INT long 8 Non-null prop for index #02 in BB01: [000029] ---XG------- * OBJ struct MorphCopyBlock: MorphBlock for dst tree, before: [000034] D----+-N---- * LCL_VAR struct V06 tmp3 MorphBlock after: [000034] D----+-N---- * LCL_VAR struct V06 tmp3 PrepareDst for [000034] have found a local var V06. MorphBlock for src tree, before: [000029] n---G+------ * OBJ struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 MorphBlock after: [000029] n---G+------ * OBJ struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 block assignment to morph: [000036] -A--GO------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* OBJ struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 with no promoted structs this requires a CopyBlock. MorphCopyBlock (after): [000036] -A--GO------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* IND struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 fgMorphTree BB01, STMT00004 (after) [000036] -A--G+------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* IND struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 fgMorphTree BB01, STMT00005 (before) [000033] IA---------- * ASG struct (init) [000030] D------N---- +--* LCL_VAR struct V01 loc0 [000032] ------------ \--* CNS_INT int 0 MorphInitBlock: MorphBlock for dst tree, before: [000030] D----+-N---- * LCL_VAR struct V01 loc0 MorphBlock after: [000030] D----+-N---- * LCL_VAR struct V01 loc0 PrepareDst for [000030] have found a local var V01. MorphInitBlock (after): [000033] IA---------- * ASG struct (init) [000030] D----+-N---- +--* LCL_VAR struct V01 loc0 [000032] -----+------ \--* CNS_INT int 0 GenTreeNode creates assertion: [000033] IA---------- * ASG struct (init) In BB01 New Local Constant Assertion: V01 == 0, index = #03 fgMorphTree BB01, STMT00017 (before) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] ------------ arg0 +--* CNS_INT long 0x7f2134dd40 [000088] ------------ arg1 \--* CNS_INT int 91 Initializing arg info for 89.CALL: ArgTable for 89.CALL after fgInitArgInfo: fgArgTabEntry[arg 0 87.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8] fgArgTabEntry[arg 1 88.CNS_INT int (By ref), 1 reg: x1, byteAlignment=8] Morphing args for 89.CALL: argSlots=2, preallocatedArgCount=0, nextSlotNum=0, nextSlotByteOffset=0, outgoingArgSpaceSize=0 Sorting the arguments: Deferred argument ('x0'): [000087] -----+------ * CNS_INT long 0x7f2134dd40 Replaced with placeholder node: [000131] ----------L- * ARGPLACE long Deferred argument ('x1'): [000088] -----+------ * CNS_INT int 91 Replaced with placeholder node: [000132] ----------L- * ARGPLACE int Shuffled argument table: x0 x1 ArgTable for 89.CALL after fgMorphArgs: fgArgTabEntry[arg 0 87.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8, lateArgInx=0, processed] fgArgTabEntry[arg 1 88.CNS_INT int (By ref), 1 reg: x1, byteAlignment=8, lateArgInx=1, processed] fgMorphTree BB01, STMT00017 (after) [000089] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000088] -----+------ arg1 in x1 \--* CNS_INT int 91 fgMorphTree BB01, STMT00015 (before) [000082] IA---------- * ASG struct (init) [000080] D------N---- +--* LCL_VAR struct(AX) V10 tmp7 [000081] ------------ \--* CNS_INT int 0 MorphInitBlock: MorphBlock for dst tree, before: [000080] D---G+-N---- * LCL_VAR struct(AX) V10 tmp7 MorphBlock after: [000080] D---G+-N---- * LCL_VAR struct(AX) V10 tmp7 PrepareDst for [000080] have found a local var V10. MorphInitBlock (after): [000082] IA--G------- * ASG struct (init) [000080] D---G+-N---- +--* LCL_VAR struct(AX) V10 tmp7 [000081] -----+------ \--* CNS_INT int 0 fgMorphTree BB01, STMT00016 (before) [000085] --C-G------- * CALL void System.Guid..ctor [000084] ------------ this in x0 +--* LCL_VAR_ADDR byref V10 tmp7 [000079] ------------ arg1 \--* CNS_STR ref Initializing arg info for 85.CALL: ArgTable for 85.CALL after fgInitArgInfo: fgArgTabEntry[arg 0 84.LCL_VAR_ADDR byref (By ref), 1 reg: x0, byteAlignment=8] fgArgTabEntry[arg 1 79.CNS_STR ref (By ref), 1 reg: x1, byteAlignment=8] Morphing args for 85.CALL: argSlots=2, preallocatedArgCount=0, nextSlotNum=0, nextSlotByteOffset=0, outgoingArgSpaceSize=0 Sorting the arguments: Deferred argument ('x1'): ( 6, 14) [000134] #---G------- * IND ref ( 3, 12) [000133] H----------- \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] Replaced with placeholder node: [000135] ----------L- * ARGPLACE ref Deferred argument ('x0'): ( 3, 3) [000084] ------------ * LCL_VAR_ADDR byref V10 tmp7 Replaced with placeholder node: [000136] ----------L- * ARGPLACE byref Shuffled argument table: x1 x0 ArgTable for 85.CALL after fgMorphArgs: fgArgTabEntry[arg 1 134.IND ref (By ref), 1 reg: x1, byteAlignment=8, lateArgInx=0, processed] fgArgTabEntry[arg 0 84.LCL_VAR_ADDR byref (By ref), 1 reg: x0, byteAlignment=8, lateArgInx=1, processed] fgMorphTree BB01, STMT00016 (after) [000085] --CXG+------ * CALL void System.Guid..ctor ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 fgMorphTree BB01, STMT00007 (before) [000093] -A---------- * ASG struct (copy) [000044] M------N---- +--* LCL_VAR struct V07 tmp4 [000086] -------N---- \--* LCL_VAR struct(AX) V10 tmp7 MorphCopyBlock: MorphBlock for dst tree, before: [000044] M----+-N---- * LCL_VAR struct V07 tmp4 MorphBlock after: [000044] M----+-N---- * LCL_VAR struct V07 tmp4 PrepareDst for [000044] have found a local var V07. MorphBlock for src tree, before: [000086] ----G+-N---- * LCL_VAR struct(AX) V10 tmp7 MorphBlock after: [000086] ----G+-N---- * LCL_VAR struct(AX) V10 tmp7 block assignment to morph: [000093] -A--G------- * ASG struct (copy) [000044] D----+-N---- +--* LCL_VAR struct V07 tmp4 [000086] ----G+-N---- \--* LCL_VAR struct(AX) V10 tmp7 with no promoted structs this requires a CopyBlock. MorphCopyBlock (after): [000093] -A--G------- * ASG struct (copy) [000044] D----+-N---- +--* LCL_VAR struct V07 tmp4 [000086] ----G+-N---- \--* LCL_VAR struct(AX) V10 tmp7 fgMorphTree BB01, STMT00019 (before) [000105] -A---------- * ASG struct (copy) [000103] D------N---- +--* LCL_VAR struct V11 tmp8 [000051] ------------ \--* LCL_VAR struct V06 tmp3 MorphCopyBlock: MorphBlock for dst tree, before: [000103] D----+-N---- * LCL_VAR struct V11 tmp8 MorphBlock after: [000103] D----+-N---- * LCL_VAR struct V11 tmp8 PrepareDst for [000103] have found a local var V11. MorphBlock for src tree, before: [000051] -----+------ * LCL_VAR struct V06 tmp3 MorphBlock after: [000051] -----+------ * LCL_VAR struct V06 tmp3 block assignment to morph: [000105] -A---------- * ASG struct (copy) [000103] D----+-N---- +--* LCL_VAR struct V11 tmp8 [000051] -----+------ \--* LCL_VAR struct V06 tmp3 with no promoted structs this requires a CopyBlock. MorphCopyBlock (after): [000105] -A---------- * ASG struct (copy) [000103] D----+-N---- +--* LCL_VAR struct V11 tmp8 [000051] -----+------ \--* LCL_VAR struct V06 tmp3 GenTreeNode creates assertion: [000105] -A---------- * ASG struct (copy) In BB01 New Local Copy Assertion: V11 == V06, index = #04 fgMorphTree BB01, STMT00020 (before) [000108] -A---------- * ASG struct (copy) [000106] D------N---- +--* LCL_VAR struct V12 tmp9 [000049] ------------ \--* LCL_VAR struct V07 tmp4 MorphCopyBlock: MorphBlock for dst tree, before: [000106] D----+-N---- * LCL_VAR struct V12 tmp9 MorphBlock after: [000106] D----+-N---- * LCL_VAR struct V12 tmp9 PrepareDst for [000106] have found a local var V12. MorphBlock for src tree, before: [000049] -----+------ * LCL_VAR struct V07 tmp4 MorphBlock after: [000049] -----+------ * LCL_VAR struct V07 tmp4 block assignment to morph: [000108] -A---------- * ASG struct (copy) [000106] D----+-N---- +--* LCL_VAR struct V12 tmp9 [000049] -----+------ \--* LCL_VAR struct V07 tmp4 with no promoted structs this requires a CopyBlock. MorphCopyBlock (after): [000108] -A---------- * ASG struct (copy) [000106] D----+-N---- +--* LCL_VAR struct V12 tmp9 [000049] -----+------ \--* LCL_VAR struct V07 tmp4 GenTreeNode creates assertion: [000108] -A---------- * ASG struct (copy) In BB01 New Local Copy Assertion: V12 == V07, index = #05 fgMorphTree BB01, STMT00021 (before) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] ------------ arg0 +--* CNS_INT long 0x7f2134dd40 [000110] ------------ arg1 \--* CNS_INT int 91 Initializing arg info for 111.CALL: ArgTable for 111.CALL after fgInitArgInfo: fgArgTabEntry[arg 0 109.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8] fgArgTabEntry[arg 1 110.CNS_INT int (By ref), 1 reg: x1, byteAlignment=8] Morphing args for 111.CALL: argSlots=2, preallocatedArgCount=0, nextSlotNum=0, nextSlotByteOffset=0, outgoingArgSpaceSize=0 Sorting the arguments: Deferred argument ('x0'): [000109] -----+------ * CNS_INT long 0x7f2134dd40 Replaced with placeholder node: [000137] ----------L- * ARGPLACE long Deferred argument ('x1'): [000110] -----+------ * CNS_INT int 91 Replaced with placeholder node: [000138] ----------L- * ARGPLACE int Shuffled argument table: x0 x1 ArgTable for 111.CALL after fgMorphArgs: fgArgTabEntry[arg 0 109.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8, lateArgInx=0, processed] fgArgTabEntry[arg 1 110.CNS_INT int (By ref), 1 reg: x1, byteAlignment=8, lateArgInx=1, processed] fgMorphTree BB01, STMT00021 (after) [000111] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000110] -----+------ arg1 in x1 \--* CNS_INT int 91 fgMorphTree BB01, STMT00023 (before) [000122] -A---------- * ASG struct (copy) [000120] D------N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] ------------ \--* LCL_VAR struct V11 tmp8 Assertion prop in BB01: Copy Assertion: V11 == V06, index = #04 [000100] ------------ * LCL_VAR struct V06 tmp3 MorphCopyBlock: MorphBlock for dst tree, before: [000120] D---G+-N---- * LCL_VAR struct(AX) V13 tmp10 MorphBlock after: [000120] D---G+-N---- * LCL_VAR struct(AX) V13 tmp10 PrepareDst for [000120] have found a local var V13. MorphBlock for src tree, before: [000100] -----+------ * LCL_VAR struct V06 tmp3 MorphBlock after: [000100] -----+------ * LCL_VAR struct V06 tmp3 block assignment to morph: [000122] -A--G------- * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 with no promoted structs this requires a CopyBlock. MorphCopyBlock (after): [000122] -A--G------- * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 fgMorphTree BB01, STMT00023 (after) [000122] -A--G+------ * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 fgMorphTree BB01, STMT00024 (before) [000125] -A---------- * ASG struct (copy) [000123] D------N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] ------------ \--* LCL_VAR struct V12 tmp9 Assertion prop in BB01: Copy Assertion: V12 == V07, index = #05 [000098] ------------ * LCL_VAR struct V07 tmp4 MorphCopyBlock: MorphBlock for dst tree, before: [000123] D---G+-N---- * LCL_VAR struct(AX) V14 tmp11 MorphBlock after: [000123] D---G+-N---- * LCL_VAR struct(AX) V14 tmp11 PrepareDst for [000123] have found a local var V14. MorphBlock for src tree, before: [000098] -----+------ * LCL_VAR struct V07 tmp4 MorphBlock after: [000098] -----+------ * LCL_VAR struct V07 tmp4 block assignment to morph: [000125] -A--G------- * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 with no promoted structs this requires a CopyBlock. MorphCopyBlock (after): [000125] -A--G------- * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 fgMorphTree BB01, STMT00024 (after) [000125] -A--G+------ * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 fgMorphTree BB01, STMT00009 (before) [000054] -AC--------- * ASG int [000053] D------N---- +--* LCL_VAR int V02 loc1 [000102] --C--------- \--* CAST int <- bool <- int [000119] --C--------- \--* CAST int <- bool <- int [000117] --C-G------- \--* CALL int System.Guid.EqualsCore [000114] ------------ arg0 +--* LCL_VAR_ADDR byref V13 tmp10 [000116] ------------ arg1 \--* LCL_VAR_ADDR byref V14 tmp11 Initializing arg info for 117.CALL: ArgTable for 117.CALL after fgInitArgInfo: fgArgTabEntry[arg 0 114.LCL_VAR_ADDR long (By ref), 1 reg: x0, byteAlignment=8] fgArgTabEntry[arg 1 116.LCL_VAR_ADDR long (By ref), 1 reg: x1, byteAlignment=8] Morphing args for 117.CALL: argSlots=2, preallocatedArgCount=0, nextSlotNum=0, nextSlotByteOffset=0, outgoingArgSpaceSize=0 Sorting the arguments: Deferred argument ('x0'): ( 3, 3) [000114] ------------ * LCL_VAR_ADDR long V13 tmp10 Replaced with placeholder node: [000139] ----------L- * ARGPLACE long Deferred argument ('x1'): ( 3, 3) [000116] ------------ * LCL_VAR_ADDR long V14 tmp11 Replaced with placeholder node: [000140] ----------L- * ARGPLACE long Shuffled argument table: x0 x1 ArgTable for 117.CALL after fgMorphArgs: fgArgTabEntry[arg 0 114.LCL_VAR_ADDR long (By ref), 1 reg: x0, byteAlignment=8, lateArgInx=0, processed] fgArgTabEntry[arg 1 116.LCL_VAR_ADDR long (By ref), 1 reg: x1, byteAlignment=8, lateArgInx=1, processed] GenTreeNode creates assertion: [000054] -ACXG------- * ASG int In BB01 New Local Subrange Assertion: V02 in [0..1], index = #06 fgMorphTree BB01, STMT00009 (after) [000054] -ACXG+------ * ASG int [000053] D----+-N---- +--* LCL_VAR int V02 loc1 [000119] --CXG+------ \--* CAST int <- bool <- int [000117] --CXG+------ \--* CALL int System.Guid.EqualsCore ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 Morphing BB02 of 'NullableTest16:BoxUnboxToNQGen(long):bool' fgMorphTree BB02, STMT00011 (before) [000058] -A---O------ * ASG ref [000057] D------N---- +--* LCL_VAR ref V08 tmp5 [000001] -----O------ \--* CATCH_ARG ref fgMorphTree BB02, STMT00012 (before) [000064] ------------ * NOP void fgMorphTree BB02, STMT00013 (before) [000069] ------------ * NOP void fgMorphTree BB02, STMT00014 (before) [000078] -A---------- * ASG int [000077] D------N---- +--* LCL_VAR int V02 loc1 [000076] ------------ \--* CNS_INT int 0 GenTreeNode creates assertion: [000078] -A---------- * ASG int In BB02 New Local Constant Assertion: V02 == 0, index = #01 Morphing BB03 of 'NullableTest16:BoxUnboxToNQGen(long):bool' fgMorphTree BB03, STMT00010 (before) [000056] ------------ * RETURN int [000055] ------------ \--* LCL_VAR int V02 loc1 *************** In fgMarkDemotedImplicitByRefArgs() Method has EH, marking method as fully interruptible Expanding top-level qmark in BB01 (before) ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..021)-> BB03 (always) T0 try { } keep i try hascall gcsafe newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..021) -> BB03 (always), preds={} succs={BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) [000006] -AC--+------ * ASG ref [000005] D----+-N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--+------ \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----+------ arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) [000011] -A-X-+------ * ASG long [000010] ---X-+-N---- +--* IND long [000009] -----+------ | \--* ADD byref [000007] -----+------ | +--* LCL_VAR ref V04 tmp1 [000008] -----+------ | \--* CNS_INT long 8 [000002] -----+------ \--* LCL_VAR long V00 arg0 ***** BB01 STMT00002 (IL ???... ???) [000016] -A---+------ * ASG ref [000015] D----+-N---- +--* LCL_VAR ref V05 tmp2 [000013] -----+------ \--* BOX ref [000012] -----+------ \--* LCL_VAR ref V04 tmp1 ***** BB01 STMT00003 (IL ???... ???) [000026] --CXG+------ * QMARK void [000020] J--X-+-N---- if +--* EQ int [000019] #--X-+------ | +--* IND long [000018] -----+------ | | \--* LCL_VAR ref V05 tmp2 [000014] H----+------ | \--* CNS_INT(h) long 0xd1ffab1e class [000025] --CXG+?----- if \--* COLON void [000023] --CXG+?----- else +--* CALL help void HELPER.CORINFO_HELP_UNBOX [000017] -----+?----- arg1 in x1 | +--* LCL_VAR ref V05 tmp2 [000022] H----+?----- arg0 in x0 | \--* CNS_INT(h) long 0xd1ffab1e class [000024] -----+?----- then \--* NOP void ***** BB01 STMT00004 (IL ???... ???) [000036] -A--G+------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* IND struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 ***** BB01 STMT00005 (IL ???... ???) [000033] IA---+------ * ASG struct (init) [000030] D----+-N---- +--* LCL_VAR struct V01 loc0 [000032] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00017 (IL ???... ???) [000089] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000088] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB01 STMT00015 (IL ???... ???) [000082] IA--G+------ * ASG struct (init) [000080] D---G+-N---- +--* LCL_VAR struct(AX) V10 tmp7 [000081] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00016 (IL ???... ???) [000085] --CXG+------ * CALL void System.Guid..ctor ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB01 STMT00007 (IL ???... ???) [000093] -A--G+------ * ASG struct (copy) [000044] D----+-N---- +--* LCL_VAR struct V07 tmp4 [000086] ----G+-N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB01 STMT00019 (IL ???... ???) [000105] -A---+------ * ASG struct (copy) [000103] D----+-N---- +--* LCL_VAR struct V11 tmp8 [000051] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB01 STMT00020 (IL ???... ???) [000108] -A---+------ * ASG struct (copy) [000106] D----+-N---- +--* LCL_VAR struct V12 tmp9 [000049] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB01 STMT00021 (IL ???... ???) [000111] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000110] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB01 STMT00023 (IL ???... ???) [000122] -A--G+------ * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB01 STMT00024 (IL ???... ???) [000125] -A--G+------ * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB01 STMT00009 (IL ???... ???) [000054] -ACXG+------ * ASG int [000053] D----+-N---- +--* LCL_VAR int V02 loc1 [000119] --CXG+------ \--* CAST int <- bool <- int [000117] --CXG+------ \--* CALL int System.Guid.EqualsCore ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------------------------------------------------------------------------------------------------------------- New Basic Block BB04 [0006] created. BB03 previous predecessor was BB01, now is BB04 EH#0: New last block of try: BB04 Setting edge weights for BB01 -> BB04 to [0 .. 3.402823e+38] New Basic Block BB05 [0007] created. New Basic Block BB06 [0008] created. Setting edge weights for BB01 -> BB05 to [0 .. 3.402823e+38] Setting edge weights for BB05 -> BB06 to [0 .. 3.402823e+38] Setting edge weights for BB06 -> BB04 to [0 .. 3.402823e+38] Setting edge weights for BB05 -> BB04 to [0 .. 3.402823e+38] removing useless STMT00003 (IL ???... ???) [000026] --CXG+------ * QMARK void [000020] J--X-+-N---- if +--* EQ int [000019] #--X-+------ | +--* IND long [000018] -----+------ | | \--* LCL_VAR ref V05 tmp2 [000014] H----+------ | \--* CNS_INT(h) long 0xd1ffab1e class [000025] --CXG+?----- if \--* COLON void [000023] --CXG+?----- else +--* CALL help void HELPER.CORINFO_HELP_UNBOX [000017] -----+?----- arg1 in x1 | +--* LCL_VAR ref V05 tmp2 [000022] H----+?----- arg0 in x0 | \--* CNS_INT(h) long 0xd1ffab1e class [000024] -----+?----- then \--* NOP void from BB01 Expanding top-level qmark in BB01 (after) ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB05 [0007] 1 0 BB01 1 [???..???)-> BB04 ( cond ) T0 i BB06 [0008] 1 0 BB05 0.50 [???..???) T0 i BB04 [0006] 2 0 BB05,BB06 1 [???..021)-> BB03 (always) T0 } keep i hascall gcsafe newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB05} ***** BB01 STMT00000 (IL 0x000...0x00E) [000006] -AC--+------ * ASG ref [000005] D----+-N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--+------ \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----+------ arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) [000011] -A-X-+------ * ASG long [000010] ---X-+-N---- +--* IND long [000009] -----+------ | \--* ADD byref [000007] -----+------ | +--* LCL_VAR ref V04 tmp1 [000008] -----+------ | \--* CNS_INT long 8 [000002] -----+------ \--* LCL_VAR long V00 arg0 ***** BB01 STMT00002 (IL ???... ???) [000016] -A---+------ * ASG ref [000015] D----+-N---- +--* LCL_VAR ref V05 tmp2 [000013] -----+------ \--* BOX ref [000012] -----+------ \--* LCL_VAR ref V04 tmp1 ------------ BB05 [???..???) -> BB04 (cond), preds={BB01} succs={BB06,BB04} ***** BB05 STMT00025 (IL ???... ???) [000143] ---X-------- * JTRUE void [000020] J--X-+-N---- \--* EQ int [000019] #--X-+------ +--* IND long [000018] -----+------ | \--* LCL_VAR ref V05 tmp2 [000014] H----+------ \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB06 [???..???), preds={BB05} succs={BB04} ***** BB06 STMT00026 (IL ???... ???) [000023] --CXG+?----- * CALL help void HELPER.CORINFO_HELP_UNBOX [000017] -----+?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 [000022] H----+?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB04 [???..021) -> BB03 (always), preds={BB05,BB06} succs={BB03} ***** BB04 STMT00004 (IL ???... ???) [000036] -A--G+------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* IND struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 ***** BB04 STMT00005 (IL ???... ???) [000033] IA---+------ * ASG struct (init) [000030] D----+-N---- +--* LCL_VAR struct V01 loc0 [000032] -----+------ \--* CNS_INT int 0 ***** BB04 STMT00017 (IL ???... ???) [000089] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000088] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB04 STMT00015 (IL ???... ???) [000082] IA--G+------ * ASG struct (init) [000080] D---G+-N---- +--* LCL_VAR struct(AX) V10 tmp7 [000081] -----+------ \--* CNS_INT int 0 ***** BB04 STMT00016 (IL ???... ???) [000085] --CXG+------ * CALL void System.Guid..ctor ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB04 STMT00007 (IL ???... ???) [000093] -A--G+------ * ASG struct (copy) [000044] D----+-N---- +--* LCL_VAR struct V07 tmp4 [000086] ----G+-N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB04 STMT00019 (IL ???... ???) [000105] -A---+------ * ASG struct (copy) [000103] D----+-N---- +--* LCL_VAR struct V11 tmp8 [000051] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB04 STMT00020 (IL ???... ???) [000108] -A---+------ * ASG struct (copy) [000106] D----+-N---- +--* LCL_VAR struct V12 tmp9 [000049] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB04 STMT00021 (IL ???... ???) [000111] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000110] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB04 STMT00023 (IL ???... ???) [000122] -A--G+------ * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB04 STMT00024 (IL ???... ???) [000125] -A--G+------ * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB04 STMT00009 (IL ???... ???) [000054] -ACXG+------ * ASG int [000053] D----+-N---- +--* LCL_VAR int V02 loc1 [000119] --CXG+------ \--* CAST int <- bool <- int [000117] --CXG+------ \--* CALL int System.Guid.EqualsCore ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------------------------------------------------------------------------------------------------------------- *************** Before renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB05 [0007] 1 0 BB01 1 [???..???)-> BB04 ( cond ) T0 i BB06 [0008] 1 0 BB05 0.50 [???..???) T0 i BB04 [0006] 2 0 BB05,BB06 1 [???..021)-> BB03 (always) T0 } keep i hascall gcsafe newobj BB02 [0001] 1 0 1 [021..02E)-> BB03 ( cret ) H0 catch { } keep i newobj BB03 [0002] 2 BB02,BB04 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB04 [000..021), Handler at BB02..BB02 [021..02E) Renumber BB05 to BB02 Renumber BB06 to BB03 Renumber BB02 to BB05 Renumber BB03 to BB06 *************** After renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB02 [0007] 1 0 BB01 1 [???..???)-> BB04 ( cond ) T0 i BB03 [0008] 1 0 BB02 0.50 [???..???) T0 i BB04 [0006] 2 0 BB02,BB03 1 [???..021)-> BB06 (always) T0 } keep i hascall gcsafe newobj BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 catch { } keep i newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB04 [000..021), Handler at BB05..BB05 [021..02E) New BlockSet epoch 3, # of blocks (including unused BB00): 7, bitset array size: 1 (short) *************** Finishing PHASE Morph - Global Trees after Morph - Global ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB02 [0007] 1 0 BB01 1 [???..???)-> BB04 ( cond ) T0 i BB03 [0008] 1 0 BB02 0.50 [???..???) T0 i BB04 [0006] 2 0 BB02,BB03 1 [???..021)-> BB06 (always) T0 } keep i hascall gcsafe newobj BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 catch { } keep i newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB02} ***** BB01 STMT00000 (IL 0x000...0x00E) [000006] -AC--+------ * ASG ref [000005] D----+-N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--+------ \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----+------ arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) [000011] -A-X-+------ * ASG long [000010] ---X-+-N---- +--* IND long [000009] -----+------ | \--* ADD byref [000007] -----+------ | +--* LCL_VAR ref V04 tmp1 [000008] -----+------ | \--* CNS_INT long 8 [000002] -----+------ \--* LCL_VAR long V00 arg0 ***** BB01 STMT00002 (IL ???... ???) [000016] -A---+------ * ASG ref [000015] D----+-N---- +--* LCL_VAR ref V05 tmp2 [000013] -----+------ \--* BOX ref [000012] -----+------ \--* LCL_VAR ref V04 tmp1 ------------ BB02 [???..???) -> BB04 (cond), preds={BB01} succs={BB03,BB04} ***** BB02 STMT00025 (IL ???... ???) [000143] ---X-------- * JTRUE void [000020] J--X-+-N---- \--* EQ int [000019] #--X-+------ +--* IND long [000018] -----+------ | \--* LCL_VAR ref V05 tmp2 [000014] H----+------ \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB03 [???..???), preds={BB02} succs={BB04} ***** BB03 STMT00026 (IL ???... ???) [000023] --CXG+?----- * CALL help void HELPER.CORINFO_HELP_UNBOX [000017] -----+?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 [000022] H----+?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB04 [???..021) -> BB06 (always), preds={BB02,BB03} succs={BB06} ***** BB04 STMT00004 (IL ???... ???) [000036] -A--G+------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* IND struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 ***** BB04 STMT00005 (IL ???... ???) [000033] IA---+------ * ASG struct (init) [000030] D----+-N---- +--* LCL_VAR struct V01 loc0 [000032] -----+------ \--* CNS_INT int 0 ***** BB04 STMT00017 (IL ???... ???) [000089] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000088] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB04 STMT00015 (IL ???... ???) [000082] IA--G+------ * ASG struct (init) [000080] D---G+-N---- +--* LCL_VAR struct(AX) V10 tmp7 [000081] -----+------ \--* CNS_INT int 0 ***** BB04 STMT00016 (IL ???... ???) [000085] --CXG+------ * CALL void System.Guid..ctor ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB04 STMT00007 (IL ???... ???) [000093] -A--G+------ * ASG struct (copy) [000044] D----+-N---- +--* LCL_VAR struct V07 tmp4 [000086] ----G+-N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB04 STMT00019 (IL ???... ???) [000105] -A---+------ * ASG struct (copy) [000103] D----+-N---- +--* LCL_VAR struct V11 tmp8 [000051] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB04 STMT00020 (IL ???... ???) [000108] -A---+------ * ASG struct (copy) [000106] D----+-N---- +--* LCL_VAR struct V12 tmp9 [000049] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB04 STMT00021 (IL ???... ???) [000111] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000110] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB04 STMT00023 (IL ???... ???) [000122] -A--G+------ * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB04 STMT00024 (IL ???... ???) [000125] -A--G+------ * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB04 STMT00009 (IL ???... ???) [000054] -ACXG+------ * ASG int [000053] D----+-N---- +--* LCL_VAR int V02 loc1 [000119] --CXG+------ \--* CAST int <- bool <- int [000117] --CXG+------ \--* CALL int System.Guid.EqualsCore ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------ BB05 [021..02E) -> BB06 (cret), preds={} succs={BB06} ***** BB05 STMT00011 (IL 0x021...0x02B) [000058] -A---+------ * ASG ref [000057] D----+-N---- +--* LCL_VAR ref V08 tmp5 [000001] -----+------ \--* CATCH_ARG ref ***** BB05 STMT00014 (IL ???... ???) [000078] -A---+------ * ASG int [000077] D----+-N---- +--* LCL_VAR int V02 loc1 [000076] -----+------ \--* CNS_INT int 0 ------------ BB06 [02E..030) (return), preds={BB04,BB05} succs={} ***** BB06 STMT00010 (IL 0x02E...0x02F) [000056] -----+------ * RETURN int [000055] -----+------ \--* LCL_VAR int V02 loc1 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE GS Cookie No GS security needed *************** Finishing PHASE GS Cookie *************** Starting PHASE Compute edge weights (1, false) *************** In fgComputeBlockAndEdgeWeights() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB02 [0007] 1 0 BB01 1 [???..???)-> BB04 ( cond ) T0 i BB03 [0008] 1 0 BB02 0.50 [???..???) T0 i BB04 [0006] 2 0 BB02,BB03 1 [???..021)-> BB06 (always) T0 } keep i hascall gcsafe newobj BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 catch { } keep i newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- -- no profile data, so using default called count -- not optimizing or no profile data, so not computing edge weights *************** Finishing PHASE Compute edge weights (1, false) *************** Starting PHASE Create EH funclets *************** In fgCreateFunclets() Relocating handler range BB05..BB05 (EH#0) to end of BBlist ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB02 [0007] 1 0 BB01 1 [???..???)-> BB04 ( cond ) T0 i BB03 [0008] 1 0 BB02 0.50 [???..???) T0 i BB04 [0006] 2 0 BB02,BB03 1 [???..021)-> BB06 (always) T0 } keep i hascall gcsafe newobj BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 catch { } keep i newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB04 [000..021), Handler at BB05..BB05 [021..02E) Relocated block [BB05..BB05] inserted after BB06 at the end of method Create funclets: moved region *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB04 [000..021), Handler at BB05..BB05 [021..02E) After fgCreateFunclets() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB02 [0007] 1 0 BB01 1 [???..???)-> BB04 ( cond ) T0 i BB03 [0008] 1 0 BB02 0.50 [???..???) T0 i BB04 [0006] 2 0 BB02,BB03 1 [???..021)-> BB06 (always) T0 } keep i hascall gcsafe newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB04 [000..021), Handler at BB05..BB05 [021..02E) *************** In fgDebugCheckBBlist *************** Finishing PHASE Create EH funclets *************** Starting PHASE Invert loops *************** Finishing PHASE Invert loops [no changes] *************** Starting PHASE Optimize layout *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB02 [0007] 1 0 BB01 1 [???..???)-> BB04 ( cond ) T0 i BB03 [0008] 1 0 BB02 0.50 [???..???) T0 i BB04 [0006] 2 0 BB02,BB03 1 [???..021)-> BB06 (always) T0 } keep i hascall gcsafe newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- Compacting blocks BB01 and BB02: *************** In fgDebugCheckBBlist Removing unconditional jump to next block (BB04 -> BB06) (converted BB04 to fall-through) After updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB04 ( cond ) T0 try { keep i try hascall gcsafe newobj BB03 [0008] 1 0 BB01 0.50 [???..???) T0 i BB04 [0006] 2 0 BB01,BB03 1 [???..021) T0 } keep i hascall gcsafe newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB04 [000..021), Handler at BB05..BB05 [021..02E) *************** In fgDebugCheckBBlist *************** In fgExpandRarelyRunBlocks() *************** In fgReorderBlocks() Initial BasicBlocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB04 ( cond ) T0 try { keep i try hascall gcsafe newobj BB03 [0008] 1 0 BB01 0.50 [???..???) T0 i BB04 [0006] 2 0 BB01,BB03 1 [???..021) T0 } keep i hascall gcsafe newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB04 ( cond ) T0 try { keep i try hascall gcsafe newobj BB03 [0008] 1 0 BB01 0.50 [???..???) T0 i BB04 [0006] 2 0 BB01,BB03 1 [???..021) T0 } keep i hascall gcsafe newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Finishing PHASE Optimize layout Trees after Optimize layout ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB04 ( cond ) T0 try { keep i try hascall gcsafe newobj BB03 [0008] 1 0 BB01 0.50 [???..???) T0 i BB04 [0006] 2 0 BB01,BB03 1 [???..021) T0 } keep i hascall gcsafe newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB04 (cond), preds={} succs={BB03,BB04} ***** BB01 STMT00000 (IL 0x000...0x00E) [000006] -AC--+------ * ASG ref [000005] D----+-N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--+------ \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----+------ arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) [000011] -A-X-+------ * ASG long [000010] ---X-+-N---- +--* IND long [000009] -----+------ | \--* ADD byref [000007] -----+------ | +--* LCL_VAR ref V04 tmp1 [000008] -----+------ | \--* CNS_INT long 8 [000002] -----+------ \--* LCL_VAR long V00 arg0 ***** BB01 STMT00002 (IL ???... ???) [000016] -A---+------ * ASG ref [000015] D----+-N---- +--* LCL_VAR ref V05 tmp2 [000013] -----+------ \--* BOX ref [000012] -----+------ \--* LCL_VAR ref V04 tmp1 ***** BB01 STMT00025 (IL ???... ???) [000143] ---X-------- * JTRUE void [000020] J--X-+-N---- \--* EQ int [000019] #--X-+------ +--* IND long [000018] -----+------ | \--* LCL_VAR ref V05 tmp2 [000014] H----+------ \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00026 (IL ???... ???) [000023] --CXG+?----- * CALL help void HELPER.CORINFO_HELP_UNBOX [000017] -----+?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 [000022] H----+?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB04 [???..021), preds={BB01,BB03} succs={BB06} ***** BB04 STMT00004 (IL ???... ???) [000036] -A--G+------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* IND struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 ***** BB04 STMT00005 (IL ???... ???) [000033] IA---+------ * ASG struct (init) [000030] D----+-N---- +--* LCL_VAR struct V01 loc0 [000032] -----+------ \--* CNS_INT int 0 ***** BB04 STMT00017 (IL ???... ???) [000089] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000088] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB04 STMT00015 (IL ???... ???) [000082] IA--G+------ * ASG struct (init) [000080] D---G+-N---- +--* LCL_VAR struct(AX) V10 tmp7 [000081] -----+------ \--* CNS_INT int 0 ***** BB04 STMT00016 (IL ???... ???) [000085] --CXG+------ * CALL void System.Guid..ctor ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB04 STMT00007 (IL ???... ???) [000093] -A--G+------ * ASG struct (copy) [000044] D----+-N---- +--* LCL_VAR struct V07 tmp4 [000086] ----G+-N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB04 STMT00019 (IL ???... ???) [000105] -A---+------ * ASG struct (copy) [000103] D----+-N---- +--* LCL_VAR struct V11 tmp8 [000051] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB04 STMT00020 (IL ???... ???) [000108] -A---+------ * ASG struct (copy) [000106] D----+-N---- +--* LCL_VAR struct V12 tmp9 [000049] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB04 STMT00021 (IL ???... ???) [000111] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000110] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB04 STMT00023 (IL ???... ???) [000122] -A--G+------ * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB04 STMT00024 (IL ???... ???) [000125] -A--G+------ * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB04 STMT00009 (IL ???... ???) [000054] -ACXG+------ * ASG int [000053] D----+-N---- +--* LCL_VAR int V02 loc1 [000119] --CXG+------ \--* CAST int <- bool <- int [000117] --CXG+------ \--* CALL int System.Guid.EqualsCore ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------ BB06 [02E..030) (return), preds={BB04,BB05} succs={} ***** BB06 STMT00010 (IL 0x02E...0x02F) [000056] -----+------ * RETURN int [000055] -----+------ \--* LCL_VAR int V02 loc1 ------------ BB05 [021..02E) -> BB06 (cret), preds={} succs={BB06} ***** BB05 STMT00011 (IL 0x021...0x02B) [000058] -A---+------ * ASG ref [000057] D----+-N---- +--* LCL_VAR ref V08 tmp5 [000001] -----+------ \--* CATCH_ARG ref ***** BB05 STMT00014 (IL ???... ???) [000078] -A---+------ * ASG int [000077] D----+-N---- +--* LCL_VAR int V02 loc1 [000076] -----+------ \--* CNS_INT int 0 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Compute blocks reachability *************** In fgComputeReachability *************** In fgDebugCheckBBlist Renumbering the basic blocks for fgComputeReachability pass #1 *************** Before renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB04 ( cond ) T0 try { keep i try hascall gcsafe newobj BB03 [0008] 1 0 BB01 0.50 [???..???) T0 i BB04 [0006] 2 0 BB01,BB03 1 [???..021) T0 } keep i hascall gcsafe newobj BB06 [0002] 2 BB04,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB06 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB04 [000..021), Handler at BB05..BB05 [021..02E) Renumber BB03 to BB02 Renumber BB04 to BB03 Renumber BB06 to BB04 *************** After renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB03 [000..021), Handler at BB05..BB05 [021..02E) New BlockSet epoch 4, # of blocks (including unused BB00): 6, bitset array size: 1 (short) Enter blocks: BB01 BB05 After computing reachability sets: ------------------------------------------------ BBnum Reachable by ------------------------------------------------ BB01 : BB01 BB02 : BB01 BB02 BB03 : BB01 BB02 BB03 BB04 : BB01 BB02 BB03 BB04 BB05 BB05 : BB05 After computing reachability: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 1 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgComputeDoms *************** In fgDebugCheckBBlist Dominator computation start blocks (those blocks with no incoming edges): BB01 BB05 ------------------------------------------------ BBnum Dominated by ------------------------------------------------ BB05: BB05 BB01: BB01 BB02: BB02 BB01 BB03: BB03 BB01 BB04: BB04 Inside fgBuildDomTree After computing the Dominance Tree: BB01 : BB03 BB02 After numbering the dominator tree: BB01: pre=01, post=03 BB02: pre=03, post=02 BB03: pre=02, post=01 BB04: pre=04, post=04 BB05: pre=05, post=05 *************** Finishing PHASE Compute blocks reachability *************** Starting PHASE Find loops *************** In optFindLoops() *************** In fgDebugCheckBBlist *************** Finishing PHASE Find loops Trees after Find loops ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) [000006] -AC--+------ * ASG ref [000005] D----+-N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--+------ \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----+------ arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) [000011] -A-X-+------ * ASG long [000010] ---X-+-N---- +--* IND long [000009] -----+------ | \--* ADD byref [000007] -----+------ | +--* LCL_VAR ref V04 tmp1 [000008] -----+------ | \--* CNS_INT long 8 [000002] -----+------ \--* LCL_VAR long V00 arg0 ***** BB01 STMT00002 (IL ???... ???) [000016] -A---+------ * ASG ref [000015] D----+-N---- +--* LCL_VAR ref V05 tmp2 [000013] -----+------ \--* BOX ref [000012] -----+------ \--* LCL_VAR ref V04 tmp1 ***** BB01 STMT00025 (IL ???... ???) [000143] ---X-------- * JTRUE void [000020] J--X-+-N---- \--* EQ int [000019] #--X-+------ +--* IND long [000018] -----+------ | \--* LCL_VAR ref V05 tmp2 [000014] H----+------ \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) [000023] --CXG+?----- * CALL help void HELPER.CORINFO_HELP_UNBOX [000017] -----+?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 [000022] H----+?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB03 [???..021), preds={BB01,BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) [000036] -A--G+------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* IND struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 ***** BB03 STMT00005 (IL ???... ???) [000033] IA---+------ * ASG struct (init) [000030] D----+-N---- +--* LCL_VAR struct V01 loc0 [000032] -----+------ \--* CNS_INT int 0 ***** BB03 STMT00017 (IL ???... ???) [000089] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000088] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00015 (IL ???... ???) [000082] IA--G+------ * ASG struct (init) [000080] D---G+-N---- +--* LCL_VAR struct(AX) V10 tmp7 [000081] -----+------ \--* CNS_INT int 0 ***** BB03 STMT00016 (IL ???... ???) [000085] --CXG+------ * CALL void System.Guid..ctor ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB03 STMT00007 (IL ???... ???) [000093] -A--G+------ * ASG struct (copy) [000044] D----+-N---- +--* LCL_VAR struct V07 tmp4 [000086] ----G+-N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB03 STMT00019 (IL ???... ???) [000105] -A---+------ * ASG struct (copy) [000103] D----+-N---- +--* LCL_VAR struct V11 tmp8 [000051] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB03 STMT00020 (IL ???... ???) [000108] -A---+------ * ASG struct (copy) [000106] D----+-N---- +--* LCL_VAR struct V12 tmp9 [000049] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB03 STMT00021 (IL ???... ???) [000111] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000110] -----+------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00023 (IL ???... ???) [000122] -A--G+------ * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 ***** BB03 STMT00024 (IL ???... ???) [000125] -A--G+------ * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 ***** BB03 STMT00009 (IL ???... ???) [000054] -ACXG+------ * ASG int [000053] D----+-N---- +--* LCL_VAR int V02 loc1 [000119] --CXG+------ \--* CAST int <- bool <- int [000117] --CXG+------ \--* CALL int System.Guid.EqualsCore ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00010 (IL 0x02E...0x02F) [000056] -----+------ * RETURN int [000055] -----+------ \--* LCL_VAR int V02 loc1 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00011 (IL 0x021...0x02B) [000058] -A---+------ * ASG ref [000057] D----+-N---- +--* LCL_VAR ref V08 tmp5 [000001] -----+------ \--* CATCH_ARG ref ***** BB05 STMT00014 (IL ???... ???) [000078] -A---+------ * ASG int [000077] D----+-N---- +--* LCL_VAR int V02 loc1 [000076] -----+------ \--* CNS_INT int 0 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Clone loops *************** In optCloneLoops() No loops to clone *************** Finishing PHASE Clone loops [no changes] *************** Starting PHASE Unroll loops *************** Finishing PHASE Unroll loops [no changes] *************** Starting PHASE Mark local vars *************** In lvaMarkLocalVars() lvaGrabTemp returning 15 (V15 tmp12) (a long lifetime temp) called for PSPSym. Local V15 should not be enregistered because: it is address exposed *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** *** marking local variables in block BB01 (weight=1 ) STMT00000 (IL 0x000...0x00E) [000006] -AC--+------ * ASG ref [000005] D----+-N---- +--* LCL_VAR ref V04 tmp1 [000004] --C--+------ \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST [000003] H----+------ arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class New refCnts for V04: refCnt = 1, refCntWtd = 2 Marking EH Var V04 as a register candidate. STMT00001 (IL ???... ???) [000011] -A-X-+------ * ASG long [000010] ---X-+-N---- +--* IND long [000009] -----+------ | \--* ADD byref [000007] -----+------ | +--* LCL_VAR ref V04 tmp1 [000008] -----+------ | \--* CNS_INT long 8 [000002] -----+------ \--* LCL_VAR long V00 arg0 New refCnts for V04: refCnt = 2, refCntWtd = 4 New refCnts for V00: refCnt = 1, refCntWtd = 1 STMT00002 (IL ???... ???) [000016] -A---+------ * ASG ref [000015] D----+-N---- +--* LCL_VAR ref V05 tmp2 [000013] -----+------ \--* BOX ref [000012] -----+------ \--* LCL_VAR ref V04 tmp1 New refCnts for V05: refCnt = 1, refCntWtd = 2 Marking EH Var V05 as a register candidate. New refCnts for V04: refCnt = 3, refCntWtd = 6 STMT00025 (IL ???... ???) [000143] ---X-------- * JTRUE void [000020] J--X-+-N---- \--* EQ int [000019] #--X-+------ +--* IND long [000018] -----+------ | \--* LCL_VAR ref V05 tmp2 [000014] H----+------ \--* CNS_INT(h) long 0xd1ffab1e class New refCnts for V05: refCnt = 2, refCntWtd = 4 *** marking local variables in block BB02 (weight=0.50) STMT00026 (IL ???... ???) [000023] --CXG+?----- * CALL help void HELPER.CORINFO_HELP_UNBOX [000017] -----+?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 [000022] H----+?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class New refCnts for V05: refCnt = 3, refCntWtd = 5 *** marking local variables in block BB03 (weight=1 ) STMT00004 (IL ???... ???) [000036] -A--G+------ * ASG struct (copy) [000034] D----+-N---- +--* LCL_VAR struct V06 tmp3 [000029] n---G+------ \--* IND struct [000028] -----+------ \--* ADD byref [000021] -----+------ +--* LCL_VAR ref V05 tmp2 [000027] -----+------ \--* CNS_INT long 8 New refCnts for V06: refCnt = 1, refCntWtd = 2 V06 needs explicit zero init. Disqualified as a single-def register candidate. New refCnts for V05: refCnt = 4, refCntWtd = 7 STMT00005 (IL ???... ???) [000033] IA---+------ * ASG struct (init) [000030] D----+-N---- +--* LCL_VAR struct V01 loc0 [000032] -----+------ \--* CNS_INT int 0 New refCnts for V01: refCnt = 1, refCntWtd = 1 STMT00017 (IL ???... ???) [000089] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000087] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000088] -----+------ arg1 in x1 \--* CNS_INT int 91 STMT00015 (IL ???... ???) [000082] IA--G+------ * ASG struct (init) [000080] D---G+-N---- +--* LCL_VAR struct(AX) V10 tmp7 [000081] -----+------ \--* CNS_INT int 0 New refCnts for V10: refCnt = 1, refCntWtd = 2 V10 needs explicit zero init. Disqualified as a single-def register candidate. STMT00016 (IL ???... ???) [000085] --CXG+------ * CALL void System.Guid..ctor ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 New refCnts for V10: refCnt = 2, refCntWtd = 4 STMT00007 (IL ???... ???) [000093] -A--G+------ * ASG struct (copy) [000044] D----+-N---- +--* LCL_VAR struct V07 tmp4 [000086] ----G+-N---- \--* LCL_VAR struct(AX) V10 tmp7 New refCnts for V07: refCnt = 1, refCntWtd = 2 V07 needs explicit zero init. Disqualified as a single-def register candidate. New refCnts for V10: refCnt = 3, refCntWtd = 6 STMT00019 (IL ???... ???) [000105] -A---+------ * ASG struct (copy) [000103] D----+-N---- +--* LCL_VAR struct V11 tmp8 [000051] -----+------ \--* LCL_VAR struct V06 tmp3 New refCnts for V11: refCnt = 1, refCntWtd = 2 V11 needs explicit zero init. Disqualified as a single-def register candidate. New refCnts for V06: refCnt = 2, refCntWtd = 4 STMT00020 (IL ???... ???) [000108] -A---+------ * ASG struct (copy) [000106] D----+-N---- +--* LCL_VAR struct V12 tmp9 [000049] -----+------ \--* LCL_VAR struct V07 tmp4 New refCnts for V12: refCnt = 1, refCntWtd = 2 V12 needs explicit zero init. Disqualified as a single-def register candidate. New refCnts for V07: refCnt = 2, refCntWtd = 4 STMT00021 (IL ???... ???) [000111] --CXG+------ * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE [000109] -----+------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 [000110] -----+------ arg1 in x1 \--* CNS_INT int 91 STMT00023 (IL ???... ???) [000122] -A--G+------ * ASG struct (copy) [000120] D---G+-N---- +--* LCL_VAR struct(AX) V13 tmp10 [000100] -----+------ \--* LCL_VAR struct V06 tmp3 New refCnts for V13: refCnt = 1, refCntWtd = 2 V13 needs explicit zero init. Disqualified as a single-def register candidate. New refCnts for V06: refCnt = 3, refCntWtd = 6 STMT00024 (IL ???... ???) [000125] -A--G+------ * ASG struct (copy) [000123] D---G+-N---- +--* LCL_VAR struct(AX) V14 tmp11 [000098] -----+------ \--* LCL_VAR struct V07 tmp4 New refCnts for V14: refCnt = 1, refCntWtd = 2 V14 needs explicit zero init. Disqualified as a single-def register candidate. New refCnts for V07: refCnt = 3, refCntWtd = 6 STMT00009 (IL ???... ???) [000054] -ACXG+------ * ASG int [000053] D----+-N---- +--* LCL_VAR int V02 loc1 [000119] --CXG+------ \--* CAST int <- bool <- int [000117] --CXG+------ \--* CALL int System.Guid.EqualsCore ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 New refCnts for V02: refCnt = 1, refCntWtd = 1 Marking EH Var V02 as a register candidate. New refCnts for V13: refCnt = 2, refCntWtd = 4 New refCnts for V14: refCnt = 2, refCntWtd = 4 *** marking local variables in block BB04 (weight=1 ) STMT00010 (IL 0x02E...0x02F) [000056] -----+------ * RETURN int [000055] -----+------ \--* LCL_VAR int V02 loc1 New refCnts for V02: refCnt = 2, refCntWtd = 2 *** marking local variables in block BB05 (weight=0 ) STMT00011 (IL 0x021...0x02B) [000058] -A---+------ * ASG ref [000057] D----+-N---- +--* LCL_VAR ref V08 tmp5 [000001] -----+------ \--* CATCH_ARG ref New refCnts for V08: refCnt = 1, refCntWtd = 0 Marking EH Var V08 as a register candidate. STMT00014 (IL ???... ???) [000078] -A---+------ * ASG int [000077] D----+-N---- +--* LCL_VAR int V02 loc1 [000076] -----+------ \--* CNS_INT int 0 New refCnts for V02: refCnt = 3, refCntWtd = 2 V02 has multiple definitions. Disqualified as a single-def register candidate. *** lvaComputeRefCounts -- implicit counts *** New refCnts for V00: refCnt = 2, refCntWtd = 2 New refCnts for V00: refCnt = 3, refCntWtd = 3 *************** In optAddCopies() *************** Finishing PHASE Mark local vars *************** Starting PHASE Optimize bools *************** In optOptimizeBools() *************** In fgDebugCheckBBlist *************** Finishing PHASE Optimize bools *************** Starting PHASE Find oper order *************** In fgFindOperOrder() *************** Finishing PHASE Find oper order *************** Starting PHASE Set block order *************** In fgSetBlockOrder() The biggest BB has 8 tree nodes *************** Finishing PHASE Set block order Trees before Build SSA representation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A-X-------- * ASG long N004 ( 4, 3) [000010] ---X---N---- +--* IND long N003 ( 3, 4) [000009] -------N---- | \--* ADD byref N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 N002 ( 7, 5) [000013] ------------ \--* BOX ref N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 ***** BB01 STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int N002 ( 3, 2) [000019] #--X-------- +--* IND long N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 N003 ( 3, 12) [000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB03 [???..021), preds={BB01,BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 ***** BB03 STMT00005 (IL ???... ???) N003 ( 5, 5) [000033] IA------R--- * ASG struct (init) N002 ( 3, 2) [000030] D------N---- +--* LCL_VAR struct V01 loc0 N001 ( 1, 2) [000032] ------------ \--* CNS_INT int 0 ***** BB03 STMT00017 (IL ???... ???) N005 ( 18, 18) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB03 STMT00019 (IL ???... ???) N003 ( 5, 4) [000105] -A------R--- * ASG struct (copy) N002 ( 3, 2) [000103] D------N---- +--* LCL_VAR struct V11 tmp8 N001 ( 1, 1) [000051] ------------ \--* LCL_VAR struct V06 tmp3 ***** BB03 STMT00020 (IL ???... ???) N003 ( 5, 4) [000108] -A------R--- * ASG struct (copy) N002 ( 3, 2) [000106] D------N---- +--* LCL_VAR struct V12 tmp9 N001 ( 1, 1) [000049] ------------ \--* LCL_VAR struct V07 tmp4 ***** BB03 STMT00021 (IL ???... ???) N005 ( 18, 18) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00011 (IL 0x021...0x02B) N003 ( 5, 4) [000058] -A---O--R--- * ASG ref N002 ( 3, 2) [000057] D------N---- +--* LCL_VAR ref V08 tmp5 N001 ( 1, 1) [000001] -----O------ \--* CATCH_ARG ref ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Build SSA representation *************** In SsaBuilder::Build() New Basic Block BB06 [0009] created. Setting edge weights for BB06 -> BB01 to [0 .. 3.402823e+38] [SsaBuilder] Max block count is 7. ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB03 [000..021), Handler at BB05..BB05 [021..02E) [SsaBuilder] Topologically sorted the graph. [SsaBuilder::ComputeImmediateDom] Inside fgBuildDomTree After computing the Dominance Tree: BB01 : BB03 BB02 BB06 : BB05 BB04 BB01 *************** In fgLocalVarLiveness() In fgLocalVarLivenessInit Tracked variable (10 out of 16) table: V05 tmp2 [ ref]: refCnt = 4, refCntWtd = 7 V04 tmp1 [ ref]: refCnt = 3, refCntWtd = 6 V06 tmp3 [struct]: refCnt = 3, refCntWtd = 6 V07 tmp4 [struct]: refCnt = 3, refCntWtd = 6 V00 arg0 [ long]: refCnt = 3, refCntWtd = 3 V02 loc1 [ bool]: refCnt = 3, refCntWtd = 2 V11 tmp8 [struct]: refCnt = 1, refCntWtd = 2 V12 tmp9 [struct]: refCnt = 1, refCntWtd = 2 V01 loc0 [struct]: refCnt = 1, refCntWtd = 1 V08 tmp5 [ ref]: refCnt = 1, refCntWtd = 0 *************** In fgPerBlockLocalVarLiveness() BB06 USE(0)={} DEF(0)={} BB01 USE(1)={ V00} + ByrefExposed + GcHeap DEF(2)={V05 V04 } + ByrefExposed + GcHeap BB02 USE(1)={V05} DEF(0)={ } BB03 USE(1)={V05 } + ByrefExposed + GcHeap DEF(6)={ V06 V07 V02 V11 V12 V01} + ByrefExposed* + GcHeap* BB04 USE(1)={V02} DEF(0)={ } BB05 USE(0)={ } DEF(2)={V02 V08} ** Memory liveness computed, GcHeap states and ByrefExposed states diverge *************** In fgInterBlockLocalVarLiveness() BB liveness after fgLiveVarAnalysis(): BB06 IN (1)={V00} + ByrefExposed + GcHeap OUT(1)={V00} + ByrefExposed + GcHeap BB01 IN (1)={ V00} + ByrefExposed + GcHeap OUT(1)={V05 } + ByrefExposed + GcHeap BB02 IN (1)={V05} + ByrefExposed + GcHeap OUT(1)={V05} + ByrefExposed + GcHeap BB03 IN (1)={V05 } + ByrefExposed + GcHeap OUT(1)={ V02} BB04 IN (1)={V02} OUT(0)={ } BB05 IN (0)={ } OUT(1)={V02} Local V02 should not be enregistered because: live in/out of a handler top level assign removing stmt with no side effects removing useless STMT00020 (IL ???... ???) N003 ( 5, 4) [000108] -A------R--- * ASG struct (copy) N002 ( 3, 2) [000106] D------N---- +--* LCL_VAR struct V12 tmp9 N001 ( 1, 1) [000049] ------------ \--* LCL_VAR struct V07 tmp4 from BB03 top level assign removing stmt with no side effects removing useless STMT00019 (IL ???... ???) N003 ( 5, 4) [000105] -A------R--- * ASG struct (copy) N002 ( 3, 2) [000103] D------N---- +--* LCL_VAR struct V11 tmp8 N001 ( 1, 1) [000051] ------------ \--* LCL_VAR struct V06 tmp3 from BB03 top level assign removing stmt with no side effects removing useless STMT00005 (IL ???... ???) N003 ( 5, 5) [000033] IA------R--- * ASG struct (init) N002 ( 3, 2) [000030] D------N---- +--* LCL_VAR struct V01 loc0 N001 ( 1, 2) [000032] ------------ \--* CNS_INT int 0 from BB03 top level assign removing stmt with no side effects removing useless STMT00011 (IL 0x021...0x02B) N003 ( 5, 4) [000058] -A---O--R--- * ASG ref N002 ( 3, 2) [000057] D------N---- +--* LCL_VAR ref V08 tmp5 N001 ( 1, 1) [000001] -----O------ \--* CATCH_ARG ref from BB05 *************** In optRemoveRedundantZeroInits() *************** In SsaBuilder::InsertPhiFunctions() Inserting phi functions: Added PHI definition for V02 at start of BB04. *************** In SsaBuilder::RenameVariables() After fgSsaBuild: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [???..???), preds={} succs={BB01} ------------ BB01 [000..???) -> BB03 (cond), preds={BB06} succs={BB02,BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A-X-------- * ASG long N004 ( 4, 3) [000010] D--X---N---- +--* IND long N003 ( 3, 4) [000009] -------N---- | \--* ADD byref N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 N002 ( 7, 5) [000013] ------------ \--* BOX ref N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) ***** BB01 STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int N002 ( 3, 2) [000019] #--X-------- +--* IND long N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 u:2 N003 ( 3, 12) [000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB03 [???..021), preds={BB01,BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 ***** BB03 STMT00017 (IL ???... ???) N005 ( 18, 18) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB03 STMT00021 (IL ???... ???) N005 ( 18, 18) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00027 (IL ???... ???) N005 ( 0, 0) [000146] -A------R--- * ASG bool N004 ( 0, 0) [000144] D------N---- +--* LCL_VAR bool V02 loc1 d:3 N003 ( 0, 0) [000145] ------------ \--* PHI bool N001 ( 0, 0) [000148] ------------ pred BB03 +--* PHI_ARG bool V02 loc1 u:4 N002 ( 0, 0) [000147] ------------ pred BB05 \--* PHI_ARG bool V02 loc1 u:2 ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 ------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Build SSA representation Trees after Build SSA representation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [???..???), preds={} succs={BB01} ------------ BB01 [000..???) -> BB03 (cond), preds={BB06} succs={BB02,BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A-X-------- * ASG long N004 ( 4, 3) [000010] D--X---N---- +--* IND long N003 ( 3, 4) [000009] -------N---- | \--* ADD byref N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 N002 ( 7, 5) [000013] ------------ \--* BOX ref N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) ***** BB01 STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int N002 ( 3, 2) [000019] #--X-------- +--* IND long N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 u:2 N003 ( 3, 12) [000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB03 [???..021), preds={BB01,BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 ***** BB03 STMT00017 (IL ???... ???) N005 ( 18, 18) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB03 STMT00021 (IL ???... ???) N005 ( 18, 18) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00027 (IL ???... ???) N005 ( 0, 0) [000146] -A------R--- * ASG bool N004 ( 0, 0) [000144] D------N---- +--* LCL_VAR bool V02 loc1 d:3 N003 ( 0, 0) [000145] ------------ \--* PHI bool N001 ( 0, 0) [000148] ------------ pred BB03 +--* PHI_ARG bool V02 loc1 u:4 N002 ( 0, 0) [000147] ------------ pred BB05 \--* PHI_ARG bool V02 loc1 u:2 ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Early Value Propagation *************** In optEarlyProp() After optEarlyProp: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [???..???), preds={} succs={BB01} ------------ BB01 [000..???) -> BB03 (cond), preds={BB06} succs={BB02,BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A-X-------- * ASG long N004 ( 4, 3) [000010] D--X---N---- +--* IND long N003 ( 3, 4) [000009] -------N---- | \--* ADD byref N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 N002 ( 7, 5) [000013] ------------ \--* BOX ref N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) ***** BB01 STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int N002 ( 3, 2) [000019] #--X-------- +--* IND long N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 u:2 N003 ( 3, 12) [000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class ------------ BB03 [???..021), preds={BB01,BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 ***** BB03 STMT00017 (IL ???... ???) N005 ( 18, 18) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 ***** BB03 STMT00021 (IL ???... ???) N005 ( 18, 18) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00027 (IL ???... ???) N005 ( 0, 0) [000146] -A------R--- * ASG bool N004 ( 0, 0) [000144] D------N---- +--* LCL_VAR bool V02 loc1 d:3 N003 ( 0, 0) [000145] ------------ \--* PHI bool N001 ( 0, 0) [000148] ------------ pred BB03 +--* PHI_ARG bool V02 loc1 u:4 N002 ( 0, 0) [000147] ------------ pred BB05 \--* PHI_ARG bool V02 loc1 u:2 ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 ------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Early Value Propagation *************** Starting PHASE Do value numbering *************** In fgValueNumber() Memory Initial Value in BB01 is: $c0 The SSA definition for ByrefExposed (#1) at start of BB06 is $c0 {InitVal($41)} The SSA definition for GcHeap (#1) at start of BB06 is $c0 {InitVal($41)} finish(BB06). Succ(BB01). Not yet completed. All preds complete, adding to allDone. Succ(BB05). Not yet completed. Not all preds complete Adding to notallDone, if necessary... Was necessary. The SSA definition for ByrefExposed (#1) at start of BB01 is $c0 {InitVal($41)} The SSA definition for GcHeap (#1) at start of BB01 is $c0 {InitVal($41)} ***** BB01, STMT00000(before) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class N001 [000128] ARGPLACE => $81 {MemOpaque:NotInLoop} N002 [000003] CNS_INT(h) 0xd1ffab1e class => $100 {Hnd const: 0x00000000D1FFAB1E} VN of ARGPLACE tree [000128] updated to $100 {Hnd const: 0x00000000D1FFAB1E} N003 [000004] CALL help => $140 {JitNew($100, $c1)} N004 [000005] LCL_VAR V04 tmp1 d:2 => $140 {JitNew($100, $c1)} N005 [000006] ASG => $140 {JitNew($100, $c1)} ***** BB01, STMT00000(after) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref $140 N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 $140 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $100 --------- ***** BB01, STMT00001(before) N006 ( 6, 5) [000011] -A-X-------- * ASG long N004 ( 4, 3) [000010] D--X---N---- +--* IND long N003 ( 3, 4) [000009] -------N---- | \--* ADD byref N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) N001 [000007] LCL_VAR V04 tmp1 u:2 => $140 {JitNew($100, $c1)} N002 [000008] CNS_INT 8 => $180 {LngCns: 8} N003 [000009] ADD => $1c0 {ADD($140, $180)} N005 [000002] LCL_VAR V00 arg0 u:1 (last use) => $80 {InitVal($40)} fgCurMemoryVN[GcHeap] assigned for assign-of-IND at [000011] to VN: $c3. Node [000011] sets GcHeap SSA # 3 to VN $c3: {MemOpaque:NotInLoop} N006 [000011] ASG => $VN.Void ***** BB01, STMT00001(after) N006 ( 6, 5) [000011] -A-X-------- * ASG long $VN.Void N004 ( 4, 3) [000010] D--X---N---- +--* IND long $80 N003 ( 3, 4) [000009] -------N---- | \--* ADD byref $1c0 N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 $180 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) $80 --------- ***** BB01, STMT00002(before) N004 ( 7, 5) [000016] -A------R--- * ASG ref N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 N002 ( 7, 5) [000013] ------------ \--* BOX ref N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) N001 [000012] LCL_VAR V04 tmp1 u:2 (last use) => $140 {JitNew($100, $c1)} N002 [000013] BOX => $140 {JitNew($100, $c1)} N003 [000015] LCL_VAR V05 tmp2 d:2 => $140 {JitNew($100, $c1)} N004 [000016] ASG => $140 {JitNew($100, $c1)} ***** BB01, STMT00002(after) N004 ( 7, 5) [000016] -A------R--- * ASG ref $140 N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 $140 N002 ( 7, 5) [000013] ------------ \--* BOX ref $140 N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) $140 --------- ***** BB01, STMT00025(before) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int N002 ( 3, 2) [000019] #--X-------- +--* IND long N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 u:2 N003 ( 3, 12) [000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class N001 [000018] LCL_VAR V05 tmp2 u:2 => $140 {JitNew($100, $c1)} N002 [000019] IND => $240 {norm=$100 {Hnd const: 0x00000000D1FFAB1E}, exc=$141 {NullPtrExc($140)}} N003 [000014] CNS_INT(h) 0xd1ffab1e class => $101 {Hnd const: 0x00000000D1FFAB1E} N004 [000020] EQ => $280 {norm=$40 {IntCns 0}, exc=$141 {NullPtrExc($140)}} ***** BB01, STMT00025(after) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int $280 N002 ( 3, 2) [000019] #--X-------- +--* IND long $240 N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 u:2 $140 N003 ( 3, 12) [000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class $101 finish(BB01). Succ(BB02). Not yet completed. All preds complete, adding to allDone. Succ(BB03). Not yet completed. Not all preds complete Adding to notallDone, if necessary... Was necessary. Succ(BB05). Not yet completed. Not all preds complete Adding to notallDone, if necessary... The SSA definition for ByrefExposed (#4) at start of BB02 is $200 {MemOpaque:NotInLoop} The SSA definition for GcHeap (#5) at start of BB02 is $c3 {MemOpaque:NotInLoop} ***** BB02, STMT00026(before) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class N001 [000130] ARGPLACE => $82 {MemOpaque:NotInLoop} N002 [000129] ARGPLACE => $c6 {MemOpaque:NotInLoop} N003 [000017] LCL_VAR V05 tmp2 u:2 => $140 {JitNew($100, $c1)} N004 [000022] CNS_INT(h) 0xd1ffab1e class => $101 {Hnd const: 0x00000000D1FFAB1E} VN of ARGPLACE tree [000130] updated to $101 {Hnd const: 0x00000000D1FFAB1E} VN of ARGPLACE tree [000129] updated to $140 {JitNew($100, $c1)} N005 [000023] CALL help => $143 {norm=$3 {3}, exc=$142 {HelperMultipleExc()}} ***** BB02, STMT00026(after) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $101 finish(BB02). Succ(BB03). Not yet completed. All preds complete, adding to allDone. Succ(BB05). Not yet completed. Not all preds complete Adding to notallDone, if necessary... The SSA definition for ByrefExposed (#4) at start of BB03 is $200 {MemOpaque:NotInLoop} The SSA definition for GcHeap (#5) at start of BB03 is $c3 {MemOpaque:NotInLoop} ***** BB03, STMT00004(before) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 N001 [000021] LCL_VAR V05 tmp2 u:2 (last use) => $140 {JitNew($100, $c1)} N002 [000027] CNS_INT 8 => $180 {LngCns: 8} N003 [000028] ADD => $1c0 {ADD($140, $180)} N004 [000029] IND => Tree [000036] assigned VN to local var V06/2: new uniq $303 {MemOpaque:NotInLoop} N006 [000036] ASG => $VN.Void ***** BB03, STMT00004(after) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) $VN.Void N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref $1c0 N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 $180 --------- ***** BB03, STMT00017(before) N005 ( 18, 18) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 N001 [000131] ARGPLACE => $83 {MemOpaque:NotInLoop} N002 [000132] ARGPLACE => $340 {MemOpaque:NotInLoop} N003 [000087] CNS_INT 0x7f2134dd40 => $181 {LngCns: 0x7f2134dd40} N004 [000088] CNS_INT 91 => $42 {IntCns 91} VN of ARGPLACE tree [000131] updated to $181 {LngCns: 0x7f2134dd40} VN of ARGPLACE tree [000132] updated to $42 {IntCns 91} fgCurMemoryVN[GcHeap] assigned for HELPER - modifies heap at [000089] to VN: $c7. N005 [000089] CALL help => $242 {norm=$241 {GetsharedNongcstaticBase($181, $42)}, exc=$142 {HelperMultipleExc()}} ***** BB03, STMT00017(after) N005 ( 18, 18) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) [000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 $42 --------- ***** BB03, STMT00015(before) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 N001 [000081] CNS_INT 0 => $40 {IntCns 0} fgCurMemoryVN[ByrefExposed] assigned for INITBLK - address-exposed local at [000082] to VN: $202. N003 [000082] ASG => $VN.Void ***** BB03, STMT00015(after) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) $VN.Void N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 $40 --------- ***** BB03, STMT00016(before) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 N001 [000136] ARGPLACE => $380 {MemOpaque:NotInLoop} N002 [000135] ARGPLACE => $c8 {MemOpaque:NotInLoop} N003 [000133] CNS_INT(h) 0xD1FFAB1E [ICON_STR_HDL] => $102 {Hnd const: 0x00000000D1FFAB1E} N004 [000134] IND => $c9 {NonNullIndirect($102)} N005 [000084] LCL_VAR_ADDR V10 tmp7 => $381 {MemOpaque:NotInLoop} VN of ARGPLACE tree [000135] updated to $381 {MemOpaque:NotInLoop} fgCurMemoryVN[GcHeap] assigned for CALL at [000085] to VN: $ca. N006 [000085] CALL => $VN.Void ***** BB03, STMT00016(after) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref $c9 N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 $381 --------- ***** BB03, STMT00007(before) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 N001 [000086] LCL_VAR V10 tmp7 => $304 {MemOpaque:NotInLoop} Tree [000093] assigned VN to local var V07/2: new uniq $307 {MemOpaque:NotInLoop} N003 [000093] ASG => $VN.Void ***** BB03, STMT00007(after) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 $304 --------- ***** BB03, STMT00021(before) N005 ( 18, 18) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE N003 ( 3, 12) [000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 N001 [000137] ARGPLACE => $84 {MemOpaque:NotInLoop} N002 [000138] ARGPLACE => $341 {MemOpaque:NotInLoop} N003 [000109] CNS_INT 0x7f2134dd40 => $181 {LngCns: 0x7f2134dd40} N004 [000110] CNS_INT 91 => $42 {IntCns 91} VN of ARGPLACE tree [000137] updated to $181 {LngCns: 0x7f2134dd40} VN of ARGPLACE tree [000138] updated to $42 {IntCns 91} fgCurMemoryVN[GcHeap] assigned for HELPER - modifies heap at [000111] to VN: $cb. N005 [000111] CALL help => $242 {norm=$241 {GetsharedNongcstaticBase($181, $42)}, exc=$142 {HelperMultipleExc()}} ***** BB03, STMT00021(after) N005 ( 18, 18) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) [000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 $42 --------- ***** BB03, STMT00023(before) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) N001 [000100] LCL_VAR V06 tmp3 u:2 (last use) => $303 {MemOpaque:NotInLoop} fgCurMemoryVN[ByrefExposed] assigned for COPYBLK - address-exposed local at [000122] to VN: $205. N003 [000122] ASG => $VN.Void ***** BB03, STMT00023(after) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) $303 --------- ***** BB03, STMT00024(before) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) N001 [000098] LCL_VAR V07 tmp4 u:2 (last use) => $307 {MemOpaque:NotInLoop} fgCurMemoryVN[ByrefExposed] assigned for COPYBLK - address-exposed local at [000125] to VN: $206. N003 [000125] ASG => $VN.Void ***** BB03, STMT00024(after) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) $307 --------- ***** BB03, STMT00009(before) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 N001 [000139] ARGPLACE => $85 {MemOpaque:NotInLoop} N002 [000140] ARGPLACE => $86 {MemOpaque:NotInLoop} N003 [000114] LCL_VAR_ADDR V13 tmp10 => $87 {MemOpaque:NotInLoop} N004 [000116] LCL_VAR_ADDR V14 tmp11 => $88 {MemOpaque:NotInLoop} VN of ARGPLACE tree [000139] updated to $87 {MemOpaque:NotInLoop} VN of ARGPLACE tree [000140] updated to $88 {MemOpaque:NotInLoop} fgCurMemoryVN[GcHeap] assigned for CALL at [000117] to VN: $cc. N005 [000117] CALL => $342 {MemOpaque:NotInLoop} VNForCastOper(bool) is $44 N006 [000119] CAST => $281 {Cast($342, $44)} N007 [000053] LCL_VAR V02 loc1 d:4 => $281 {Cast($342, $44)} N008 [000054] ASG => $281 {Cast($342, $44)} ***** BB03, STMT00009(after) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int $281 N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 $281 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int $281 N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore $342 N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 $88 finish(BB03). Succ(BB04). Not yet completed. Not all preds complete Adding to notallDone, if necessary... Was necessary. Succ(BB05). Not yet completed. All preds complete, adding to allDone. The SSA definition for ByrefExposed (#1) at start of BB05 is $c0 {InitVal($41)} The SSA definition for GcHeap (#1) at start of BB05 is $c0 {InitVal($41)} ***** BB05, STMT00014(before) N003 ( 5, 5) [000078] -A------R--- * ASG int N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 N001 [000076] CNS_INT 0 => $40 {IntCns 0} N002 [000077] LCL_VAR V02 loc1 d:2 => $40 {IntCns 0} N003 [000078] ASG => $40 {IntCns 0} ***** BB05, STMT00014(after) N003 ( 5, 5) [000078] -A------R--- * ASG int $40 N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 $40 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 $40 finish(BB05). Succ(BB04). Not yet completed. All preds complete, adding to allDone. SSA PHI definition: set VN of local 2/3 to $400 {PhiDef($2, $3, $3c0)} . The SSA definition for ByrefExposed (#1) at start of BB04 is $c0 {InitVal($41)} The SSA definition for GcHeap (#1) at start of BB04 is $c0 {InitVal($41)} ***** BB04, STMT00010(before) N002 ( 4, 3) [000056] ------------ * RETURN int N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) N001 [000055] LCL_VAR V02 loc1 u:3 (last use) => $400 {PhiDef($2, $3, $3c0)} N002 [000056] RETURN => $345 {MemOpaque:NotInLoop} ***** BB04, STMT00010(after) N002 ( 4, 3) [000056] ------------ * RETURN int $345 N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) $400 finish(BB04). *************** Finishing PHASE Do value numbering *************** Starting PHASE Hoist loop code *************** Finishing PHASE Hoist loop code *************** Starting PHASE VN based copy prop *************** In optVnCopyProp() Copy Assertion for BB06 curSsaName stack: { } Copy Assertion for BB05 curSsaName stack: { } Live vars: {} => {V02} Copy Assertion for BB04 curSsaName stack: { } Live vars: {V02} => {} Copy Assertion for BB01 curSsaName stack: { } Live vars: {V00} => {V00 V04} Live vars: {V00 V04} => {V04} Live vars: {V04} => {} Live vars: {} => {V05} Copy Assertion for BB03 curSsaName stack: { 0-[000002]:V00 4-[000005]:V04 5-[000015]:V05 } Live vars: {V05} => {} Live vars: {} => {V06} Live vars: {V06} => {V06 V07} Live vars: {V06 V07} => {V07} Live vars: {V07} => {} Live vars: {} => {V02} Copy Assertion for BB02 curSsaName stack: { 0-[000002]:V00 4-[000005]:V04 5-[000015]:V05 } *************** Finishing PHASE VN based copy prop *************** Starting PHASE Redundant branch opts ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Redundant branch opts [no changes] Trees before Optimize Valnum CSEs ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [???..???), preds={} succs={BB01} ------------ BB01 [000..???) -> BB03 (cond), preds={BB06} succs={BB02,BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref $140 N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 $140 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $100 ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A-X-------- * ASG long $VN.Void N004 ( 4, 3) [000010] D--X---N---- +--* IND long $80 N003 ( 3, 4) [000009] -------N---- | \--* ADD byref $1c0 N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 $180 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) $80 ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref $140 N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 $140 N002 ( 7, 5) [000013] ------------ \--* BOX ref $140 N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) $140 ***** BB01 STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int $280 N002 ( 3, 2) [000019] #--X-------- +--* IND long $240 N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 u:2 $140 N003 ( 3, 12) [000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class $101 ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $101 ------------ BB03 [???..021), preds={BB01,BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) $VN.Void N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref $1c0 N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 $180 ***** BB03 STMT00017 (IL ???... ???) N005 ( 18, 18) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) [000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 $42 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) $VN.Void N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 $40 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref $c9 N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 $381 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 $304 ***** BB03 STMT00021 (IL ???... ???) N005 ( 18, 18) [000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) [000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 $42 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) $303 ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) $307 ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int $281 N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 $281 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int $281 N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore $342 N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 $88 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00027 (IL ???... ???) N005 ( 0, 0) [000146] -A------R--- * ASG bool N004 ( 0, 0) [000144] D------N---- +--* LCL_VAR bool V02 loc1 d:3 N003 ( 0, 0) [000145] ------------ \--* PHI bool N001 ( 0, 0) [000148] ------------ pred BB03 +--* PHI_ARG bool V02 loc1 u:4 $281 N002 ( 0, 0) [000147] ------------ pred BB05 \--* PHI_ARG bool V02 loc1 u:2 $40 ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int $345 N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) $400 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int $40 N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 $40 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 $40 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Optimize Valnum CSEs CSE candidate #01, key=K_00000000D1FFAB1E in BB02, [cost= 3, size=12]: N004 ( 3, 12) CSE #01 (use)[000022] H-----?----- * CNS_INT(h) long 0xd1ffab1e class $101 CSE candidate #02, key=K_00000000D1FFAB1E in BB03, [cost= 3, size=12]: N003 ( 3, 12) CSE #02 (use)[000109] ------------ * CNS_INT long 0x7f2134dd40 $181 CSE candidate #03, key=$241 in BB03, [cost=18, size=18]: N005 ( 18, 18) CSE #03 (use)[000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) CSE #02 (use)[000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 $42 Blocks that generate CSE def/uses BB01 cseGen = 0000000000000003 CSE #01.c BB02 cseGen = 0000000000000003 CSE #01.c BB03 cseGen = 0000000000000014 CSE #02, CSE #03 Performing DataFlow for ValnumCSE's After performing DataFlow for ValnumCSE's BB06 in gen out 0000000000000000 0000000000000000 0000000000000000 BB01 in gen out 0000000000000000 0000000000000003 CSE #01.c 0000000000000003 CSE #01.c BB02 in gen out 0000000000000003 CSE #01.c 0000000000000003 CSE #01.c 0000000000000003 CSE #01.c BB03 in gen out 0000000000000003 CSE #01.c 0000000000000014 CSE #02, CSE #03 0000000000000015 CSE #01, CSE #02, CSE #03 BB04 in gen out 0000000000000000 0000000000000000 0000000000000000 BB05 in gen out 0000000000000000 0000000000000000 0000000000000000 Labeling the CSEs with Use/Def information BB01 [000014] Def of CSE #01 [weight=1 ] BB02 [000022] Use of CSE #01 [weight=0.50] BB03 [000087] Def of CSE #02 [weight=1 ] BB03 [000089] Def of CSE #03 [weight=1 ] BB03 [000109] Use of CSE #02 [weight=1 ] *** Now Live Across Call *** BB03 [000111] Use of CSE #03 [weight=1 ] *** Now Live Across Call *** ************ Trees at start of optValnumCSE_Heuristic() ------------ BB06 [???..???), preds={} succs={BB01} ------------ BB01 [000..???) -> BB03 (cond), preds={BB06} succs={BB02,BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref $140 N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 $140 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $100 ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A-X-------- * ASG long $VN.Void N004 ( 4, 3) [000010] D--X---N---- +--* IND long $80 N003 ( 3, 4) [000009] -------N---- | \--* ADD byref $1c0 N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 $180 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) $80 ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref $140 N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 $140 N002 ( 7, 5) [000013] ------------ \--* BOX ref $140 N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) $140 ***** BB01 STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int $280 N002 ( 3, 2) [000019] #--X-------- +--* IND long $240 N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 u:2 $140 N003 ( 3, 12) CSE #01 (def)[000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class $101 ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) CSE #01 (use)[000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $101 ------------ BB03 [???..021), preds={BB01,BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) $VN.Void N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref $1c0 N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 $180 ***** BB03 STMT00017 (IL ???... ???) N005 ( 18, 18) CSE #03 (def)[000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) CSE #02 (def)[000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 $42 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) $VN.Void N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 $40 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref $c9 N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 $381 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 $304 ***** BB03 STMT00021 (IL ???... ???) N005 ( 18, 18) CSE #03 (use)[000111] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) CSE #02 (use)[000109] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000110] ------------ arg1 in x1 \--* CNS_INT int 91 $42 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) $303 ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) $307 ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int $281 N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 $281 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int $281 N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore $342 N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 $88 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00027 (IL ???... ???) N005 ( 0, 0) [000146] -A------R--- * ASG bool N004 ( 0, 0) [000144] D------N---- +--* LCL_VAR bool V02 loc1 d:3 N003 ( 0, 0) [000145] ------------ \--* PHI bool N001 ( 0, 0) [000148] ------------ pred BB03 +--* PHI_ARG bool V02 loc1 u:4 $281 N002 ( 0, 0) [000147] ------------ pred BB05 \--* PHI_ARG bool V02 loc1 u:2 $40 ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int $345 N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) $400 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int $40 N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 $40 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 $40 ------------------------------------------------------------------------------------------------------------------- Aggressive CSE Promotion cutoff is 200.000000 Moderate CSE Promotion cutoff is 100.000000 enregCount is 9 Framesize estimate is 0x003C We have a small frame Sorted CSE candidates: CSE #03, {$241, $142} useCnt=1: [def=100.000000, use=100.000000, cost= 18, call] :: N005 ( 18, 18) CSE #03 (def)[000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 CSE #02, {K_00000000D1FFAB1E} useCnt=1: [def=100.000000, use=100.000000, cost= 3, call] :: N003 ( 3, 12) CSE #02 (def)[000087] ------------ * CNS_INT long 0x7f2134dd40 $181 CSE #01, {K_00000000D1FFAB1E} useCnt=1: [def=100.000000, use=50.000000, cost= 3 ] :: N003 ( 3, 12) CSE #01 (def)[000014] H----------- * CNS_INT(h) long 0xd1ffab1e class $101 Considering CSE #03 {$241, $142} [def=100.000000, use=100.000000, cost= 18, call] CSE Expression : N005 ( 18, 18) CSE #03 (def)[000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) CSE #02 (def)[000087] ------------ arg0 in x0 +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ arg1 in x1 \--* CNS_INT int 91 $42 Aggressive CSE Promotion (300.000000 >= 200.000000) cseRefCnt=300.000000, aggressiveRefCnt=200.000000, moderateRefCnt=100.000000 defCnt=100.000000, useCnt=100.000000, cost=18, size=18, LiveAcrossCall def_cost=1, use_cost=1, extra_no_cost=34, extra_yes_cost=100 CSE cost savings check (1834.000000 >= 300.000000) passes Promoting CSE: lvaGrabTemp returning 16 (V16 rat0) (a long lifetime temp) called for CSE - aggressive. CSE #03 is single-def, so associated CSE temp V16 will be in SSA New refCnts for V16: refCnt = 2, refCntWtd = 2 New refCnts for V16: refCnt = 3, refCntWtd = 3 CSE #03 def at [000089] replaced in BB03 with def of V16 ReMorphing args for 89.CALL: argSlots=2, preallocatedArgCount=0, nextSlotNum=0, nextSlotByteOffset=0, outgoingArgSpaceSize=0 ArgTable for 89.CALL after fgMorphArgs: fgArgTabEntry[arg 0 87.CNS_INT long (By ref), 1 reg: x0, byteAlignment=8, lateArgInx=0, processed] fgArgTabEntry[arg 1 88.CNS_INT int (By ref), 1 reg: x1, byteAlignment=8, lateArgInx=1, processed] optValnumCSE morphed tree: N009 ( 19, 19) [000152] -ACXG------- * COMMA long $242 N007 ( 18, 18) [000150] -ACXG---R--- +--* ASG long $VN.Void N006 ( 1, 1) [000149] D------N---- | +--* LCL_VAR long V16 cse0 d:1 $242 N005 ( 18, 18) [000089] --CXG------- | \--* CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) CSE #02 (def)[000087] ------------ arg0 in x0 | +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ arg1 in x1 | \--* CNS_INT int 91 $42 N008 ( 1, 1) [000151] ------------ \--* LCL_VAR long V16 cse0 u:1 $242 Working on the replacement of the CSE #03 use at [000111] in BB03 Unmark CSE use #02 at [000109]: 1 -> 0 optValnumCSE morphed tree: N001 ( 1, 1) [000153] ------------ * LCL_VAR long V16 cse0 u:1 $241 Skipped CSE #02 because use count is 0 Considering CSE #01 {K_00000000D1FFAB1E} [def=100.000000, use=50.000000, cost= 3 ] CSE Expression : N003 ( 3, 12) CSE #01 (def)[000014] H----------- * CNS_INT(h) long 0xd1ffab1e class $101 Moderate CSE Promotion (CSE never live at call) (250.000000 >= 150.000000) cseRefCnt=250.000000, aggressiveRefCnt=300.000000, moderateRefCnt=150.000000 defCnt=100.000000, useCnt=50.000000, cost=3, size=12 def_cost=2, use_cost=1, extra_no_cost=22, extra_yes_cost=0 CSE cost savings check (172.000000 >= 250.000000) fails Did Not promote this CSE *************** Finishing PHASE Optimize Valnum CSEs *************** Starting PHASE Assertion prop *************** In optAssertionPropMain() Blocks/Trees at start of phase ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???)-> BB03 ( cond ) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 2 0 BB01,BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [???..???), preds={} succs={BB01} ------------ BB01 [000..???) -> BB03 (cond), preds={BB06} succs={BB02,BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref $140 N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 $140 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $100 ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A-X-------- * ASG long $VN.Void N004 ( 4, 3) [000010] D--X---N---- +--* IND long $80 N003 ( 3, 4) [000009] -------N---- | \--* ADD byref $1c0 N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 $180 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) $80 ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref $140 N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 $140 N002 ( 7, 5) [000013] ------------ \--* BOX ref $140 N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) $140 ***** BB01 STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* EQ int $280 N002 ( 3, 2) [000019] #--X-------- +--* IND long $240 N001 ( 1, 1) [000018] ------------ | \--* LCL_VAR ref V05 tmp2 u:2 $140 N003 ( 3, 12) [000014] H----------- \--* CNS_INT(h) long 0xd1ffab1e class $101 ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $101 ------------ BB03 [???..021), preds={BB01,BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) $VN.Void N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref $1c0 N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 $180 ***** BB03 STMT00017 (IL ???... ???) N009 ( 19, 19) [000152] -ACXG------- * COMMA long $242 N007 ( 18, 18) [000150] -ACXG---R--- +--* ASG long $VN.Void N006 ( 1, 1) [000149] D------N---- | +--* LCL_VAR long V16 cse0 d:1 $242 N005 ( 18, 18) [000089] --CXG------- | \--* CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) [000087] ------------ arg0 in x0 | +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ arg1 in x1 | \--* CNS_INT int 91 $42 N008 ( 1, 1) [000151] ------------ \--* LCL_VAR long V16 cse0 u:1 $242 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) $VN.Void N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 $40 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref $c9 N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 $381 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 $304 ***** BB03 STMT00021 (IL ???... ???) N001 ( 1, 1) [000153] ------------ * LCL_VAR long V16 cse0 u:1 $241 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) $303 ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) $307 ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int $281 N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 $281 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int $281 N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore $342 N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 $88 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00027 (IL ???... ???) N005 ( 0, 0) [000146] -A------R--- * ASG bool N004 ( 0, 0) [000144] D------N---- +--* LCL_VAR bool V02 loc1 d:3 N003 ( 0, 0) [000145] ------------ \--* PHI bool N001 ( 0, 0) [000148] ------------ pred BB03 +--* PHI_ARG bool V02 loc1 u:4 $281 N002 ( 0, 0) [000147] ------------ pred BB05 \--* PHI_ARG bool V02 loc1 u:2 $40 ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int $345 N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) $400 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int $40 N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 $40 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 $40 ------------------------------------------------------------------------------------------------------------------- VN based non-null prop in BB01: N004 ( 4, 3) [000010] D--X---N---- * IND long $80 optVNAssertionPropCurStmt morphed tree: N006 ( 6, 5) [000011] -A---O------ * ASG long $VN.Void N004 ( 4, 3) [000010] n----O-N---- +--* IND long $80 N003 ( 3, 4) [000009] -------N---- | \--* ADD byref $1c0 N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 $180 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) $80 GenTreeNode creates assertion: N004 ( 4, 3) [000010] n----O-N---- * IND long $80 In BB01 New Global Constant Assertion: ($140,$0) V04.02 != null, index = #01 Extracted side effects from a constant tree [000020]: N002 ( 3, 2) [000019] #--X-------- * IND long $240 N001 ( 1, 1) [000018] ------------ \--* LCL_VAR ref V05 tmp2 u:2 $140 Compiler::optVNConstantPropOnJTrue morphed tree: N002 ( 3, 2) [000019] #--X-------- * IND long $240 N001 ( 1, 1) [000018] ------------ \--* LCL_VAR ref V05 tmp2 u:2 $140 After constant propagation on [000143]: STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ---X-------- * JTRUE void N004 ( 7, 15) [000020] J--X---N---- \--* NE int $40 [000154] ------------ +--* CNS_INT int 0 $40 [000155] ------------ \--* CNS_INT int 0 $40 Folding operator with constant nodes into a constant: N004 ( 7, 15) [000020] J------N---- * NE int $40 [000154] ------------ +--* CNS_INT int 0 $40 [000155] ------------ \--* CNS_INT int 0 $40 Bashed to int constant: N004 ( 7, 15) [000020] ------------ * CNS_INT int 0 $40 removing useless STMT00025 (IL ???... ???) N005 ( 9, 17) [000143] ------------ * JTRUE void N004 ( 7, 15) [000020] ------------ \--* CNS_INT int 0 $40 from BB01 Conditional folded at BB01 BB01 becomes a BBJ_NONE optVNAssertionPropCurStmt removed tree: N005 ( 9, 17) [000143] ------------ * JTRUE void N004 ( 7, 15) [000020] ------------ \--* CNS_INT int 0 $40 VN based non-null prop in BB01: N002 ( 3, 2) [000019] #--X-------- * IND long $240 removing useless STMT00028 (IL ???... ???) N002 ( 3, 2) [000019] #----O------ * IND long $240 N001 ( 1, 1) [000018] ------------ \--* LCL_VAR ref V05 tmp2 u:2 $140 from BB01 optVNAssertionPropCurStmt removed tree: N002 ( 3, 2) [000019] #----O------ * IND long $240 N001 ( 1, 1) [000018] ------------ \--* LCL_VAR ref V05 tmp2 u:2 $140 BB06 valueGen = #NA BB01 valueGen = #01 BB02 valueGen = #NA BB03 valueGen = #01 BB04 valueGen = #NA BB05 valueGen = #NA BB06: in = #NA out = #NA BB01: in = #NA out = #01 BB02: in = #01 out = #01 BB03: in = #01 out = #01 BB04: in = #NA out = #NA BB05: in = #NA out = #NA Propagating #NA for BB01, stmt STMT00000, tree [000128], tree -> #NA Propagating #NA for BB01, stmt STMT00000, tree [000003], tree -> #NA Propagating #NA for BB01, stmt STMT00000, tree [000004], tree -> #NA Propagating #NA for BB01, stmt STMT00000, tree [000005], tree -> #NA Propagating #NA for BB01, stmt STMT00000, tree [000006], tree -> #NA Propagating #NA for BB01, stmt STMT00001, tree [000007], tree -> #NA Propagating #NA for BB01, stmt STMT00001, tree [000008], tree -> #NA Propagating #NA for BB01, stmt STMT00001, tree [000009], tree -> #NA Propagating #NA for BB01, stmt STMT00001, tree [000010], tree -> #01 Propagating #01 for BB01, stmt STMT00001, tree [000002], tree -> #NA Propagating #01 for BB01, stmt STMT00001, tree [000011], tree -> #NA Propagating #01 for BB01, stmt STMT00002, tree [000012], tree -> #NA Propagating #01 for BB01, stmt STMT00002, tree [000013], tree -> #NA Propagating #01 for BB01, stmt STMT00002, tree [000015], tree -> #NA Propagating #01 for BB01, stmt STMT00002, tree [000016], tree -> #NA Propagating #01 for BB02, stmt STMT00026, tree [000130], tree -> #NA Propagating #01 for BB02, stmt STMT00026, tree [000129], tree -> #NA Propagating #01 for BB02, stmt STMT00026, tree [000017], tree -> #NA Propagating #01 for BB02, stmt STMT00026, tree [000022], tree -> #NA Propagating #01 for BB02, stmt STMT00026, tree [000023], tree -> #NA Propagating #01 for BB03, stmt STMT00004, tree [000021], tree -> #NA Propagating #01 for BB03, stmt STMT00004, tree [000027], tree -> #NA Propagating #01 for BB03, stmt STMT00004, tree [000028], tree -> #NA Propagating #01 for BB03, stmt STMT00004, tree [000029], tree -> #01 Propagating #01 for BB03, stmt STMT00004, tree [000034], tree -> #NA Propagating #01 for BB03, stmt STMT00004, tree [000036], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000131], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000132], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000087], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000088], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000089], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000149], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000150], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000151], tree -> #NA Propagating #01 for BB03, stmt STMT00017, tree [000152], tree -> #NA Propagating #01 for BB03, stmt STMT00015, tree [000081], tree -> #NA Propagating #01 for BB03, stmt STMT00015, tree [000080], tree -> #NA Propagating #01 for BB03, stmt STMT00015, tree [000082], tree -> #NA Propagating #01 for BB03, stmt STMT00016, tree [000136], tree -> #NA Propagating #01 for BB03, stmt STMT00016, tree [000135], tree -> #NA Propagating #01 for BB03, stmt STMT00016, tree [000133], tree -> #NA Propagating #01 for BB03, stmt STMT00016, tree [000134], tree -> #NA Propagating #01 for BB03, stmt STMT00016, tree [000084], tree -> #NA Propagating #01 for BB03, stmt STMT00016, tree [000085], tree -> #NA Propagating #01 for BB03, stmt STMT00007, tree [000086], tree -> #NA Propagating #01 for BB03, stmt STMT00007, tree [000044], tree -> #NA Propagating #01 for BB03, stmt STMT00007, tree [000093], tree -> #NA Propagating #01 for BB03, stmt STMT00021, tree [000153], tree -> #NA Propagating #01 for BB03, stmt STMT00023, tree [000100], tree -> #NA Propagating #01 for BB03, stmt STMT00023, tree [000120], tree -> #NA Propagating #01 for BB03, stmt STMT00023, tree [000122], tree -> #NA Propagating #01 for BB03, stmt STMT00024, tree [000098], tree -> #NA Propagating #01 for BB03, stmt STMT00024, tree [000123], tree -> #NA Propagating #01 for BB03, stmt STMT00024, tree [000125], tree -> #NA Propagating #01 for BB03, stmt STMT00009, tree [000139], tree -> #NA Propagating #01 for BB03, stmt STMT00009, tree [000140], tree -> #NA Propagating #01 for BB03, stmt STMT00009, tree [000114], tree -> #NA Propagating #01 for BB03, stmt STMT00009, tree [000116], tree -> #NA Propagating #01 for BB03, stmt STMT00009, tree [000117], tree -> #NA Propagating #01 for BB03, stmt STMT00009, tree [000119], tree -> #NA Propagating #01 for BB03, stmt STMT00009, tree [000053], tree -> #NA Propagating #01 for BB03, stmt STMT00009, tree [000054], tree -> #NA Propagating #NA for BB04, stmt STMT00010, tree [000055], tree -> #NA Propagating #NA for BB04, stmt STMT00010, tree [000056], tree -> #NA Propagating #NA for BB05, stmt STMT00014, tree [000076], tree -> #NA Propagating #NA for BB05, stmt STMT00014, tree [000077], tree -> #NA Propagating #NA for BB05, stmt STMT00014, tree [000078], tree -> #NA *************** In fgDebugCheckBBlist *************** Finishing PHASE Assertion prop *************** Starting PHASE Optimize index checks *************** In OptimizeRangeChecks() Blocks/trees before phase ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 1 0 BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [???..???), preds={} succs={BB01} ------------ BB01 [000..???), preds={BB06} succs={BB02} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref $140 N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 $140 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $100 ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A---O------ * ASG long $VN.Void N004 ( 4, 3) [000010] n----O-N---- +--* IND long $80 N003 ( 3, 4) [000009] -------N---- | \--* ADD byref $1c0 N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 $180 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) $80 ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref $140 N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 $140 N002 ( 7, 5) [000013] ------------ \--* BOX ref $140 N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) $140 ------------ BB02 [???..???), preds={BB01} succs={BB03} ***** BB02 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $101 ------------ BB03 [???..021), preds={BB02} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) $VN.Void N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref $1c0 N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 $180 ***** BB03 STMT00017 (IL ???... ???) N009 ( 19, 19) [000152] -ACXG------- * COMMA long $242 N007 ( 18, 18) [000150] -ACXG---R--- +--* ASG long $VN.Void N006 ( 1, 1) [000149] D------N---- | +--* LCL_VAR long V16 cse0 d:1 $242 N005 ( 18, 18) [000089] --CXG------- | \--* CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) [000087] ------------ arg0 in x0 | +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ arg1 in x1 | \--* CNS_INT int 91 $42 N008 ( 1, 1) [000151] ------------ \--* LCL_VAR long V16 cse0 u:1 $242 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) $VN.Void N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 $40 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref $c9 N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 $381 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 $304 ***** BB03 STMT00021 (IL ???... ???) N001 ( 1, 1) [000153] ------------ * LCL_VAR long V16 cse0 u:1 $241 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) $303 ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) $307 ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int $281 N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 $281 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int $281 N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore $342 N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 $88 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00027 (IL ???... ???) N005 ( 0, 0) [000146] -A------R--- * ASG bool N004 ( 0, 0) [000144] D------N---- +--* LCL_VAR bool V02 loc1 d:3 N003 ( 0, 0) [000145] ------------ \--* PHI bool N001 ( 0, 0) [000148] ------------ pred BB03 +--* PHI_ARG bool V02 loc1 u:4 $281 N002 ( 0, 0) [000147] ------------ pred BB05 \--* PHI_ARG bool V02 loc1 u:2 $40 ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int $345 N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) $400 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int $40 N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 $40 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 $40 ------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Optimize index checks *************** Starting PHASE Update flow graph opt pass *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0009] 1 1 [???..???) internal BB01 [0000] 1 0 BB06 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB02 [0008] 1 0 BB01 0.50 [???..???) T0 i gcsafe BB03 [0006] 1 0 BB02 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- fgRemoveBlock BB06 Removing empty BB06 Compacting blocks BB01 and BB02: *************** In fgDebugCheckBBlist After updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table index eTry, eHnd 0 :: - Try at BB01..BB03 [000..021), Handler at BB05..BB05 [021..02E) *************** In fgDebugCheckBBlist *************** Finishing PHASE Update flow graph opt pass *************** Starting PHASE Compute edge weights (2, false) -- not optimizing or no profile data, so not computing edge weights *************** Finishing PHASE Compute edge weights (2, false) *************** Starting PHASE Insert GC Polls *************** Finishing PHASE Insert GC Polls [no changes] *************** Starting PHASE Determine first cold block *************** In fgDetermineFirstColdBlock() No procedure splitting will be done for this method *************** Finishing PHASE Determine first cold block Trees before Rationalize IR ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB03} ***** BB01 STMT00000 (IL 0x000...0x00E) N005 ( 17, 15) [000006] -AC-----R--- * ASG ref $140 N004 ( 1, 1) [000005] D------N---- +--* LCL_VAR ref V04 tmp1 d:2 $140 N003 ( 17, 15) [000004] --C--------- \--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 N002 ( 3, 12) [000003] H----------- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $100 ***** BB01 STMT00001 (IL ???... ???) N006 ( 6, 5) [000011] -A---O------ * ASG long $VN.Void N004 ( 4, 3) [000010] n----O-N---- +--* IND long $80 N003 ( 3, 4) [000009] -------N---- | \--* ADD byref $1c0 N001 ( 1, 1) [000007] ------------ | +--* LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ | \--* CNS_INT long 8 $180 N005 ( 1, 1) [000002] ------------ \--* LCL_VAR long V00 arg0 u:1 (last use) $80 ***** BB01 STMT00002 (IL ???... ???) N004 ( 7, 5) [000016] -A------R--- * ASG ref $140 N003 ( 1, 1) [000015] D------N---- +--* LCL_VAR ref V05 tmp2 d:2 $140 N002 ( 7, 5) [000013] ------------ \--* BOX ref $140 N001 ( 1, 1) [000012] ------------ \--* LCL_VAR ref V04 tmp1 u:2 (last use) $140 ***** BB01 STMT00026 (IL ???... ???) N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 N003 ( 1, 1) [000017] ------?----- arg1 in x1 +--* LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) [000022] H-----?----- arg0 in x0 \--* CNS_INT(h) long 0xd1ffab1e class $101 ------------ BB03 [???..021), preds={BB01} succs={BB04} ***** BB03 STMT00004 (IL ???... ???) N006 ( 6, 6) [000036] -A--GO--R--- * ASG struct (copy) $VN.Void N005 ( 1, 1) [000034] D------N---- +--* LCL_VAR struct V06 tmp3 d:2 N004 ( 6, 6) [000029] n---GO------ \--* IND struct N003 ( 3, 4) [000028] ------------ \--* ADD byref $1c0 N001 ( 1, 1) [000021] ------------ +--* LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] ------------ \--* CNS_INT long 8 $180 ***** BB03 STMT00017 (IL ???... ???) N009 ( 19, 19) [000152] -ACXG------- * COMMA long $242 N007 ( 18, 18) [000150] -ACXG---R--- +--* ASG long $VN.Void N006 ( 1, 1) [000149] D------N---- | +--* LCL_VAR long V16 cse0 d:1 $242 N005 ( 18, 18) [000089] --CXG------- | \--* CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N003 ( 3, 12) [000087] ------------ arg0 in x0 | +--* CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ arg1 in x1 | \--* CNS_INT int 91 $42 N008 ( 1, 1) [000151] ------------ \--* LCL_VAR long V16 cse0 u:1 $242 ***** BB03 STMT00015 (IL ???... ???) N003 ( 5, 5) [000082] IA--G---R--- * ASG struct (init) $VN.Void N002 ( 3, 2) [000080] D---G--N---- +--* LCL_VAR struct(AX) V10 tmp7 N001 ( 1, 2) [000081] ------------ \--* CNS_INT int 0 $40 ***** BB03 STMT00016 (IL ???... ???) N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N004 ( 6, 14) [000134] #---G------- arg1 in x1 +--* IND ref $c9 N003 ( 3, 12) [000133] H----------- | \--* CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 N005 ( 3, 3) [000084] ------------ this in x0 \--* LCL_VAR_ADDR byref V10 tmp7 $381 ***** BB03 STMT00007 (IL ???... ???) N003 ( 3, 3) [000093] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 1, 1) [000044] D------N---- +--* LCL_VAR struct V07 tmp4 d:2 N001 ( 3, 2) [000086] ----G--N---- \--* LCL_VAR struct(AX) V10 tmp7 $304 ***** BB03 STMT00021 (IL ???... ???) N001 ( 1, 1) [000153] ------------ * LCL_VAR long V16 cse0 u:1 $241 ***** BB03 STMT00023 (IL ???... ???) N003 ( 5, 4) [000122] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000120] D---G--N---- +--* LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000100] ------------ \--* LCL_VAR struct V06 tmp3 u:2 (last use) $303 ***** BB03 STMT00024 (IL ???... ???) N003 ( 5, 4) [000125] -A--G---R--- * ASG struct (copy) $VN.Void N002 ( 3, 2) [000123] D---G--N---- +--* LCL_VAR struct(AX) V14 tmp11 N001 ( 1, 1) [000098] ------------ \--* LCL_VAR struct V07 tmp4 u:2 (last use) $307 ***** BB03 STMT00009 (IL ???... ???) N008 ( 25, 15) [000054] -ACXG---R--- * ASG int $281 N007 ( 3, 2) [000053] D------N---- +--* LCL_VAR int V02 loc1 d:4 $281 N006 ( 21, 12) [000119] --CXG------- \--* CAST int <- bool <- int $281 N005 ( 20, 10) [000117] --CXG------- \--* CALL int System.Guid.EqualsCore $342 N003 ( 3, 3) [000114] ------------ arg0 in x0 +--* LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ arg1 in x1 \--* LCL_VAR_ADDR long V14 tmp11 $88 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} ***** BB04 STMT00027 (IL ???... ???) N005 ( 0, 0) [000146] -A------R--- * ASG bool N004 ( 0, 0) [000144] D------N---- +--* LCL_VAR bool V02 loc1 d:3 N003 ( 0, 0) [000145] ------------ \--* PHI bool N001 ( 0, 0) [000148] ------------ pred BB03 +--* PHI_ARG bool V02 loc1 u:4 $281 N002 ( 0, 0) [000147] ------------ pred BB05 \--* PHI_ARG bool V02 loc1 u:2 $40 ***** BB04 STMT00010 (IL 0x02E...0x02F) N002 ( 4, 3) [000056] ------------ * RETURN int $345 N001 ( 3, 2) [000055] ------------ \--* LCL_VAR int V02 loc1 u:3 (last use) $400 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ***** BB05 STMT00014 (IL ???... ???) N003 ( 5, 5) [000078] -A------R--- * ASG int $40 N002 ( 3, 2) [000077] D------N---- +--* LCL_VAR int V02 loc1 d:2 $40 N001 ( 1, 2) [000076] ------------ \--* CNS_INT int 0 $40 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Rationalize IR rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N005 ( 17, 15) [000006] DAC--------- * STORE_LCL_VAR ref V04 tmp1 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N004 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N006 ( 6, 6) [000036] DA--GO------ * STORE_LCL_VAR struct V06 tmp3 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N007 ( 18, 18) [000150] DACXG------- * STORE_LCL_VAR long V16 cse0 d:1 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N008 ( 25, 15) [000054] DACXG------- * STORE_LCL_VAR int V02 loc1 d:4 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 *************** Finishing PHASE Rationalize IR Trees after Rationalize IR ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB03} [000156] ------------ IL_OFFSET void IL offset: 0x0 N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 /--* t4 ref N005 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 N001 ( 1, 1) [000007] ------------ t7 = LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ t8 = CNS_INT long 8 $180 /--* t7 ref +--* t8 long N003 ( 3, 4) [000009] -------N---- t9 = * ADD byref $1c0 N005 ( 1, 1) [000002] ------------ t2 = LCL_VAR long V00 arg0 u:1 (last use) $80 /--* t9 byref +--* t2 long [000157] -A---O------ * STOREIND long N001 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 (last use) $140 /--* t12 ref N004 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 N003 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class $101 /--* t17 ref arg1 in x1 +--* t22 long arg0 in x0 N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 ------------ BB03 [???..021), preds={BB01} succs={BB04} N001 ( 1, 1) [000021] ------------ t21 = LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] ------------ t27 = CNS_INT long 8 $180 /--* t21 ref +--* t27 long N003 ( 3, 4) [000028] ------------ t28 = * ADD byref $1c0 /--* t28 byref N004 ( 6, 6) [000029] n---GO------ t29 = * IND struct /--* t29 struct N006 ( 6, 6) [000036] DA--GO------ * STORE_LCL_VAR struct V06 tmp3 d:2 N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t87 long arg0 in x0 +--* t88 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 /--* t89 long N007 ( 18, 18) [000150] DA-XG------- * STORE_LCL_VAR long V16 cse0 d:1 N001 ( 1, 2) [000081] ------------ t81 = CNS_INT int 0 $40 /--* t81 int N003 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 N003 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 /--* t133 long N004 ( 6, 14) [000134] #---G------- t134 = * IND ref $c9 N005 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 $381 /--* t134 ref arg1 in x1 +--* t84 byref this in x0 N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N001 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 $304 /--* t86 struct N003 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 N001 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 (last use) $303 /--* t100 struct N003 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 (last use) $307 /--* t98 struct N003 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t114 long arg0 in x0 +--* t116 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 /--* t117 int N006 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int $281 /--* t119 int N008 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} [000158] ------------ IL_OFFSET void IL offset: 0x2e N001 ( 3, 2) [000055] ------------ t55 = LCL_VAR int V02 loc1 u:3 (last use) $400 /--* t55 int N002 ( 4, 3) [000056] ------------ * RETURN int $345 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} N001 ( 1, 2) [000076] ------------ t76 = CNS_INT int 0 $40 /--* t76 int N003 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Do 'simple' lowering outgoingArgSpaceSize 0 sufficient for call [000004], which needs 0 outgoingArgSpaceSize 0 sufficient for call [000023], which needs 0 outgoingArgSpaceSize 0 sufficient for call [000089], which needs 0 outgoingArgSpaceSize 0 sufficient for call [000085], which needs 0 outgoingArgSpaceSize 0 sufficient for call [000117], which needs 0 *************** Finishing PHASE Do 'simple' lowering *************** In fgDebugCheckBBlist Trees before Lowering nodeinfo ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB03} [000156] ------------ IL_OFFSET void IL offset: 0x0 N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 /--* t4 ref N005 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 N001 ( 1, 1) [000007] ------------ t7 = LCL_VAR ref V04 tmp1 u:2 $140 N002 ( 1, 2) [000008] ------------ t8 = CNS_INT long 8 $180 /--* t7 ref +--* t8 long N003 ( 3, 4) [000009] -------N---- t9 = * ADD byref $1c0 N005 ( 1, 1) [000002] ------------ t2 = LCL_VAR long V00 arg0 u:1 (last use) $80 /--* t9 byref +--* t2 long [000157] -A---O------ * STOREIND long N001 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 (last use) $140 /--* t12 ref N004 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 N003 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class $101 /--* t17 ref arg1 in x1 +--* t22 long arg0 in x0 N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 ------------ BB03 [???..021), preds={BB01} succs={BB04} N001 ( 1, 1) [000021] ------------ t21 = LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] ------------ t27 = CNS_INT long 8 $180 /--* t21 ref +--* t27 long N003 ( 3, 4) [000028] ------------ t28 = * ADD byref $1c0 /--* t28 byref N004 ( 6, 6) [000029] n---GO------ t29 = * IND struct /--* t29 struct N006 ( 6, 6) [000036] DA--GO------ * STORE_LCL_VAR struct V06 tmp3 d:2 N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t87 long arg0 in x0 +--* t88 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 /--* t89 long N007 ( 18, 18) [000150] DA-XG------- * STORE_LCL_VAR long V16 cse0 d:1 N001 ( 1, 2) [000081] ------------ t81 = CNS_INT int 0 $40 /--* t81 int N003 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 N003 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 /--* t133 long N004 ( 6, 14) [000134] #---G------- t134 = * IND ref $c9 N005 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 $381 /--* t134 ref arg1 in x1 +--* t84 byref this in x0 N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N001 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 $304 /--* t86 struct N003 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 N001 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 (last use) $303 /--* t100 struct N003 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 (last use) $307 /--* t98 struct N003 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t114 long arg0 in x0 +--* t116 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 /--* t117 int N006 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int $281 /--* t119 int N008 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} [000158] ------------ IL_OFFSET void IL offset: 0x2e N001 ( 3, 2) [000055] ------------ t55 = LCL_VAR int V02 loc1 u:3 (last use) $400 /--* t55 int N002 ( 4, 3) [000056] ------------ * RETURN int $345 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} N001 ( 1, 2) [000076] ------------ t76 = CNS_INT int 0 $40 /--* t76 int N003 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Lowering nodeinfo lowering call (before): N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 objp: ====== args: ====== lowering arg : N001 ( 0, 0) [000128] ----------L- * ARGPLACE long $100 late: ====== lowering arg : N002 ( 3, 12) [000003] H----------- * CNS_INT(h) long 0xd1ffab1e class $100 new node is : [000159] ------------ * PUTARG_REG long REG x0 lowering call (after): N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long [000159] ------------ t159 = * PUTARG_REG long REG x0 /--* t159 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 lowering store lcl var/field (before): N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long [000159] ------------ t159 = * PUTARG_REG long REG x0 /--* t159 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 /--* t4 ref N005 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 lowering store lcl var/field (after): N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long [000159] ------------ t159 = * PUTARG_REG long REG x0 /--* t159 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 /--* t4 ref N005 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 Addressing mode: Base N001 ( 1, 1) [000007] ------------ * LCL_VAR ref V04 tmp1 u:2 $140 + 8 Removing unused node: N002 ( 1, 2) [000008] -c---------- * CNS_INT long 8 $180 New addressing mode node: N003 ( 3, 4) [000009] ------------ * LEA(b+8) byref lowering store lcl var/field (before): N001 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 (last use) $140 /--* t12 ref N004 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 lowering store lcl var/field (after): N001 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 (last use) $140 /--* t12 ref N004 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 lowering call (before): N003 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 $140 N004 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class $101 /--* t17 ref arg1 in x1 +--* t22 long arg0 in x0 N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 objp: ====== args: ====== lowering arg : N001 ( 0, 0) [000130] ------?---L- * ARGPLACE long $101 lowering arg : N002 ( 0, 0) [000129] ------?---L- * ARGPLACE ref $140 late: ====== lowering arg : N003 ( 1, 1) [000017] ------?----- * LCL_VAR ref V05 tmp2 u:2 $140 new node is : [000160] ------------ * PUTARG_REG ref REG x1 lowering arg : N004 ( 3, 12) [000022] H-----?----- * CNS_INT(h) long 0xd1ffab1e class $101 new node is : [000161] ------------ * PUTARG_REG long REG x0 lowering call (after): N003 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 $140 /--* t17 ref [000160] ------------ t160 = * PUTARG_REG ref REG x1 N004 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class $101 /--* t22 long [000161] ------------ t161 = * PUTARG_REG long REG x0 /--* t160 ref arg1 in x1 +--* t161 long arg0 in x0 N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 lowering store lcl var/field (before): N001 ( 1, 1) [000021] ------------ t21 = LCL_VAR ref V05 tmp2 u:2 (last use) $140 N002 ( 1, 2) [000027] -c---------- t27 = CNS_INT long 8 $180 /--* t21 ref +--* t27 long N003 ( 3, 4) [000028] ------------ t28 = * ADD byref $1c0 /--* t28 byref N004 ( 6, 6) [000029] n---GO------ t29 = * IND struct /--* t29 struct N006 ( 6, 6) [000036] DA--GO------ * STORE_LCL_VAR struct V06 tmp3 d:2 Local V06 should not be enregistered because: written/read in a block op Replacing STORE_OBJ with STOREIND for [0636]Addressing mode: Base N001 ( 1, 1) [000021] ------------ * LCL_VAR ref V05 tmp2 u:2 (last use) $140 + 8 Removing unused node: N002 ( 1, 2) [000027] -c---------- * CNS_INT long 8 $180 New addressing mode node: N003 ( 3, 4) [000028] ------------ * LEA(b+8) byref lowering call (before): N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t87 long arg0 in x0 +--* t88 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 objp: ====== args: ====== lowering arg : N001 ( 0, 0) [000131] ----------L- * ARGPLACE long $181 lowering arg : N002 ( 0, 0) [000132] ----------L- * ARGPLACE int $42 late: ====== lowering arg : N003 ( 3, 12) [000087] ------------ * CNS_INT long 0x7f2134dd40 $181 new node is : [000163] ------------ * PUTARG_REG long REG x0 lowering arg : N004 ( 1, 2) [000088] ------------ * CNS_INT int 91 $42 new node is : [000164] ------------ * PUTARG_REG int REG x1 lowering call (after): N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 /--* t87 long [000163] ------------ t163 = * PUTARG_REG long REG x0 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t88 int [000164] ------------ t164 = * PUTARG_REG int REG x1 /--* t163 long arg0 in x0 +--* t164 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 lowering store lcl var/field (before): N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 /--* t87 long [000163] ------------ t163 = * PUTARG_REG long REG x0 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t88 int [000164] ------------ t164 = * PUTARG_REG int REG x1 /--* t163 long arg0 in x0 +--* t164 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 /--* t89 long N007 ( 18, 18) [000150] DA-XG------- * STORE_LCL_VAR long V16 cse0 d:1 lowering store lcl var/field (after): N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 /--* t87 long [000163] ------------ t163 = * PUTARG_REG long REG x0 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t88 int [000164] ------------ t164 = * PUTARG_REG int REG x1 /--* t163 long arg0 in x0 +--* t164 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 /--* t89 long N007 ( 18, 18) [000150] DA-XG------- * STORE_LCL_VAR long V16 cse0 d:1 lowering store lcl var/field (before): N001 ( 1, 2) [000081] ------------ t81 = CNS_INT int 0 $40 /--* t81 int N003 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 lowering store lcl var/field (after): N001 ( 1, 2) [000081] -c---------- t81 = CNS_INT int 0 $40 /--* t81 int [000165] ------------ t165 = * SIMD simd16 float init /--* t165 simd16 N003 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 lowering call (before): N003 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 /--* t133 long N004 ( 6, 14) [000134] #---G------- t134 = * IND ref $c9 N005 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 $381 /--* t134 ref arg1 in x1 +--* t84 byref this in x0 N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void objp: ====== lowering arg : N001 ( 0, 0) [000136] ----------L- * ARGPLACE byref $380 args: ====== lowering arg : N002 ( 0, 0) [000135] ----------L- * ARGPLACE ref $381 late: ====== lowering arg : N004 ( 6, 14) [000134] #---G------- * IND ref $c9 new node is : [000166] ----G------- * PUTARG_REG ref REG x1 lowering arg : N005 ( 3, 3) [000084] ------------ * LCL_VAR_ADDR byref V10 tmp7 $381 new node is : [000167] ------------ * PUTARG_REG byref REG x0 lowering call (after): N003 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 /--* t133 long N004 ( 6, 14) [000134] #---G------- t134 = * IND ref $c9 /--* t134 ref [000166] ----G------- t166 = * PUTARG_REG ref REG x1 N005 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 $381 /--* t84 byref [000167] ------------ t167 = * PUTARG_REG byref REG x0 /--* t166 ref arg1 in x1 +--* t167 byref this in x0 N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void lowering store lcl var/field (before): N001 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 $304 /--* t86 struct N003 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 lowering store lcl var/field (after): N001 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 $304 /--* t86 struct N003 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 lowering store lcl var/field (before): N001 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 (last use) $303 /--* t100 struct N003 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 lowering store lcl var/field (after): N001 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 (last use) $303 /--* t100 struct N003 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 lowering store lcl var/field (before): N001 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 (last use) $307 /--* t98 struct N003 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 lowering store lcl var/field (after): N001 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 (last use) $307 /--* t98 struct N003 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 lowering call (before): N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t114 long arg0 in x0 +--* t116 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 objp: ====== args: ====== lowering arg : N001 ( 0, 0) [000139] ----------L- * ARGPLACE long $87 lowering arg : N002 ( 0, 0) [000140] ----------L- * ARGPLACE long $88 late: ====== lowering arg : N003 ( 3, 3) [000114] ------------ * LCL_VAR_ADDR long V13 tmp10 $87 new node is : [000168] ------------ * PUTARG_REG long REG x0 lowering arg : N004 ( 3, 3) [000116] ------------ * LCL_VAR_ADDR long V14 tmp11 $88 new node is : [000169] ------------ * PUTARG_REG long REG x1 lowering call (after): N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 /--* t114 long [000168] ------------ t168 = * PUTARG_REG long REG x0 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t116 long [000169] ------------ t169 = * PUTARG_REG long REG x1 /--* t168 long arg0 in x0 +--* t169 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 LowerCast for: N006 ( 21, 12) [000119] ---XG------- * CAST int <- bool <- int $281 lowering store lcl var/field (before): N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 /--* t114 long [000168] ------------ t168 = * PUTARG_REG long REG x0 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t116 long [000169] ------------ t169 = * PUTARG_REG long REG x1 /--* t168 long arg0 in x0 +--* t169 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 /--* t117 int N006 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int $281 /--* t119 int N008 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 lowering store lcl var/field (after): N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 /--* t114 long [000168] ------------ t168 = * PUTARG_REG long REG x0 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t116 long [000169] ------------ t169 = * PUTARG_REG long REG x1 /--* t168 long arg0 in x0 +--* t169 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 /--* t117 int N006 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int $281 /--* t119 int N008 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 lowering GT_RETURN N002 ( 4, 3) [000056] ------------ * RETURN int $345 ============lowering store lcl var/field (before): N001 ( 1, 2) [000076] ------------ t76 = CNS_INT int 0 $40 /--* t76 int N003 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 lowering store lcl var/field (after): N001 ( 1, 2) [000076] -c---------- t76 = CNS_INT int 0 $40 /--* t76 int N003 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 Lower has completed modifying nodes. ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB03} [000156] ------------ IL_OFFSET void IL offset: 0x0 N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long [000159] ------------ t159 = * PUTARG_REG long REG x0 /--* t159 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 /--* t4 ref N005 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 N001 ( 1, 1) [000007] ------------ t7 = LCL_VAR ref V04 tmp1 u:2 $140 /--* t7 ref N003 ( 3, 4) [000009] -c---------- t9 = * LEA(b+8) byref N005 ( 1, 1) [000002] ------------ t2 = LCL_VAR long V00 arg0 u:1 (last use) $80 /--* t9 byref +--* t2 long [000157] -A---O------ * STOREIND long N001 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 (last use) $140 /--* t12 ref N004 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 N003 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 $140 /--* t17 ref [000160] ------------ t160 = * PUTARG_REG ref REG x1 N004 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class $101 /--* t22 long [000161] ------------ t161 = * PUTARG_REG long REG x0 /--* t160 ref arg1 in x1 +--* t161 long arg0 in x0 N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 ------------ BB03 [???..021), preds={BB01} succs={BB04} N001 ( 1, 1) [000021] ------------ t21 = LCL_VAR ref V05 tmp2 u:2 (last use) $140 /--* t21 ref N003 ( 3, 4) [000028] -c---------- t28 = * LEA(b+8) byref /--* t28 byref N004 ( 6, 6) [000029] n---GO------ t29 = * IND simd16 [000162] Dc-----N---- t162 = LCL_VAR_ADDR byref V06 tmp3 /--* t162 byref +--* t29 simd16 N006 ( 6, 6) [000036] -A---------- * STOREIND simd16 N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 /--* t87 long [000163] ------------ t163 = * PUTARG_REG long REG x0 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t88 int [000164] ------------ t164 = * PUTARG_REG int REG x1 /--* t163 long arg0 in x0 +--* t164 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 /--* t89 long N007 ( 18, 18) [000150] DA-XG------- * STORE_LCL_VAR long V16 cse0 d:1 N001 ( 1, 2) [000081] -c---------- t81 = CNS_INT int 0 $40 /--* t81 int [000165] ------------ t165 = * SIMD simd16 float init /--* t165 simd16 N003 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 N003 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 /--* t133 long N004 ( 6, 14) [000134] #---G------- t134 = * IND ref $c9 /--* t134 ref [000166] ----G------- t166 = * PUTARG_REG ref REG x1 N005 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 $381 /--* t84 byref [000167] ------------ t167 = * PUTARG_REG byref REG x0 /--* t166 ref arg1 in x1 +--* t167 byref this in x0 N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N001 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 $304 /--* t86 struct N003 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 N001 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 (last use) $303 /--* t100 struct N003 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 (last use) $307 /--* t98 struct N003 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 /--* t114 long [000168] ------------ t168 = * PUTARG_REG long REG x0 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t116 long [000169] ------------ t169 = * PUTARG_REG long REG x1 /--* t168 long arg0 in x0 +--* t169 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 /--* t117 int N006 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int $281 /--* t119 int N008 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} [000158] ------------ IL_OFFSET void IL offset: 0x2e N001 ( 3, 2) [000055] ------------ t55 = LCL_VAR int V02 loc1 u:3 (last use) $400 /--* t55 int N002 ( 4, 3) [000056] ------------ * RETURN int $345 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} N001 ( 1, 2) [000076] -c---------- t76 = CNS_INT int 0 $40 /--* t76 int N003 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 ------------------------------------------------------------------------------------------------------------------- *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** New refCnts for V04: refCnt = 1, refCntWtd = 2 New refCnts for V04: refCnt = 2, refCntWtd = 4 New refCnts for V00: refCnt = 1, refCntWtd = 1 New refCnts for V04: refCnt = 3, refCntWtd = 6 New refCnts for V05: refCnt = 1, refCntWtd = 2 New refCnts for V05: refCnt = 2, refCntWtd = 4 New refCnts for V05: refCnt = 3, refCntWtd = 6 New refCnts for V06: refCnt = 1, refCntWtd = 2 New refCnts for V16: refCnt = 1, refCntWtd = 1 New refCnts for V10: refCnt = 1, refCntWtd = 2 New refCnts for V10: refCnt = 2, refCntWtd = 4 New refCnts for V10: refCnt = 3, refCntWtd = 6 New refCnts for V07: refCnt = 1, refCntWtd = 2 New refCnts for V06: refCnt = 2, refCntWtd = 4 New refCnts for V13: refCnt = 1, refCntWtd = 2 New refCnts for V07: refCnt = 2, refCntWtd = 4 New refCnts for V14: refCnt = 1, refCntWtd = 2 New refCnts for V13: refCnt = 2, refCntWtd = 4 New refCnts for V14: refCnt = 2, refCntWtd = 4 New refCnts for V02: refCnt = 1, refCntWtd = 1 New refCnts for V02: refCnt = 2, refCntWtd = 2 New refCnts for V02: refCnt = 3, refCntWtd = 2 *** lvaComputeRefCounts -- implicit counts *** New refCnts for V00: refCnt = 2, refCntWtd = 2 New refCnts for V00: refCnt = 3, refCntWtd = 3 *************** In fgLocalVarLiveness() ; Initial local variable assignments ; ; V00 arg0 long single-def ; V01 loc0 struct ld-addr-op ; V02 loc1 bool do-not-enreg[M] EH-live ; V03 OutArgs lclBlk <0> "OutgoingArgSpace" ; V04 tmp1 ref class-hnd exact single-def "Single-def Box Helper" ; V05 tmp2 ref single-def "inline UNBOX clone1" ; V06 tmp3 struct do-not-enreg[SB] "impSpillLclRefs" ; V07 tmp4 struct "struct address for call/obj" ; V08 tmp5 ref class-hnd single-def "impSpillSpecialSideEff" ; V09 tmp6 ref class-hnd exact "Single-def Box Helper" ; V10 tmp7 struct do-not-enreg[XS] addr-exposed "NewObj constructor temp" ; V11 tmp8 struct "Inlining Arg" ; V12 tmp9 struct "Inlining Arg" ; V13 tmp10 struct do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" ; V14 tmp11 struct do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" ; V15 PSPSym long do-not-enreg[X] addr-exposed "PSPSym" ; V16 cse0 long "CSE - aggressive" In fgLocalVarLivenessInit Tracked variable (7 out of 17) table: V04 tmp1 [ ref]: refCnt = 3, refCntWtd = 6 V05 tmp2 [ ref]: refCnt = 3, refCntWtd = 6 V00 arg0 [ long]: refCnt = 3, refCntWtd = 3 V06 tmp3 [struct]: refCnt = 2, refCntWtd = 4 V07 tmp4 [struct]: refCnt = 2, refCntWtd = 4 V02 loc1 [ bool]: refCnt = 3, refCntWtd = 2 V16 cse0 [ long]: refCnt = 1, refCntWtd = 1 *************** In fgPerBlockLocalVarLiveness() BB01 USE(1)={ V00} DEF(2)={V04 V05 } BB03 USE(1)={V05 } + ByrefExposed + GcHeap DEF(4)={ V06 V07 V02 V16} + ByrefExposed* + GcHeap* BB04 USE(1)={V02} DEF(0)={ } BB05 USE(0)={ } DEF(1)={V02} ** Memory liveness computed, GcHeap states and ByrefExposed states diverge *************** In fgInterBlockLocalVarLiveness() BB liveness after fgLiveVarAnalysis(): BB01 IN (1)={ V00} + ByrefExposed + GcHeap OUT(1)={V05 } + ByrefExposed + GcHeap BB03 IN (1)={V05 } + ByrefExposed + GcHeap OUT(1)={ V02} BB04 IN (1)={V02} OUT(0)={ } BB05 IN (0)={ } OUT(1)={V02} Local V02 should not be enregistered because: live in/out of a handler Removing dead store: N007 ( 18, 18) [000150] DA-XG------- * STORE_LCL_VAR long V16 cse0 d:1 (last use) *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** New refCnts for V04: refCnt = 1, refCntWtd = 2 New refCnts for V04: refCnt = 2, refCntWtd = 4 New refCnts for V00: refCnt = 1, refCntWtd = 1 New refCnts for V04: refCnt = 3, refCntWtd = 6 New refCnts for V05: refCnt = 1, refCntWtd = 2 New refCnts for V05: refCnt = 2, refCntWtd = 4 New refCnts for V05: refCnt = 3, refCntWtd = 6 New refCnts for V06: refCnt = 1, refCntWtd = 2 New refCnts for V10: refCnt = 1, refCntWtd = 2 New refCnts for V10: refCnt = 2, refCntWtd = 4 New refCnts for V10: refCnt = 3, refCntWtd = 6 New refCnts for V07: refCnt = 1, refCntWtd = 2 New refCnts for V06: refCnt = 2, refCntWtd = 4 New refCnts for V13: refCnt = 1, refCntWtd = 2 New refCnts for V07: refCnt = 2, refCntWtd = 4 New refCnts for V14: refCnt = 1, refCntWtd = 2 New refCnts for V13: refCnt = 2, refCntWtd = 4 New refCnts for V14: refCnt = 2, refCntWtd = 4 New refCnts for V02: refCnt = 1, refCntWtd = 1 New refCnts for V02: refCnt = 2, refCntWtd = 2 New refCnts for V02: refCnt = 3, refCntWtd = 2 *** lvaComputeRefCounts -- implicit counts *** New refCnts for V00: refCnt = 2, refCntWtd = 2 New refCnts for V00: refCnt = 3, refCntWtd = 3 *************** Finishing PHASE Lowering nodeinfo Trees after Lowering nodeinfo ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB03} [000156] ------------ IL_OFFSET void IL offset: 0x0 N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long [000159] ------------ t159 = * PUTARG_REG long REG x0 /--* t159 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 /--* t4 ref N005 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 N001 ( 1, 1) [000007] ------------ t7 = LCL_VAR ref V04 tmp1 u:2 $140 /--* t7 ref N003 ( 3, 4) [000009] -c---------- t9 = * LEA(b+8) byref N005 ( 1, 1) [000002] ------------ t2 = LCL_VAR long V00 arg0 u:1 (last use) $80 /--* t9 byref +--* t2 long [000157] -A---O------ * STOREIND long N001 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 (last use) $140 /--* t12 ref N004 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 N003 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 $140 /--* t17 ref [000160] ------------ t160 = * PUTARG_REG ref REG x1 N004 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class $101 /--* t22 long [000161] ------------ t161 = * PUTARG_REG long REG x0 /--* t160 ref arg1 in x1 +--* t161 long arg0 in x0 N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 ------------ BB03 [???..021), preds={BB01} succs={BB04} N001 ( 1, 1) [000021] ------------ t21 = LCL_VAR ref V05 tmp2 u:2 (last use) $140 /--* t21 ref N003 ( 3, 4) [000028] -c---------- t28 = * LEA(b+8) byref /--* t28 byref N004 ( 6, 6) [000029] n---GO------ t29 = * IND simd16 [000162] Dc-----N---- t162 = LCL_VAR_ADDR byref V06 tmp3 /--* t162 byref +--* t29 simd16 N006 ( 6, 6) [000036] -A---------- * STOREIND simd16 N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 /--* t87 long [000163] ------------ t163 = * PUTARG_REG long REG x0 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t88 int [000164] ------------ t164 = * PUTARG_REG int REG x1 /--* t163 long arg0 in x0 +--* t164 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N001 ( 1, 2) [000081] -c---------- t81 = CNS_INT int 0 $40 /--* t81 int [000165] ------------ t165 = * SIMD simd16 float init /--* t165 simd16 N003 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 N003 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 /--* t133 long N004 ( 6, 14) [000134] #---G------- t134 = * IND ref $c9 /--* t134 ref [000166] ----G------- t166 = * PUTARG_REG ref REG x1 N005 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 $381 /--* t84 byref [000167] ------------ t167 = * PUTARG_REG byref REG x0 /--* t166 ref arg1 in x1 +--* t167 byref this in x0 N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N001 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 $304 /--* t86 struct N003 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 N001 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 (last use) $303 /--* t100 struct N003 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 (last use) $307 /--* t98 struct N003 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 /--* t114 long [000168] ------------ t168 = * PUTARG_REG long REG x0 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t116 long [000169] ------------ t169 = * PUTARG_REG long REG x1 /--* t168 long arg0 in x0 +--* t169 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 /--* t117 int N006 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int $281 /--* t119 int N008 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} [000158] ------------ IL_OFFSET void IL offset: 0x2e N001 ( 3, 2) [000055] ------------ t55 = LCL_VAR int V02 loc1 u:3 (last use) $400 /--* t55 int N002 ( 4, 3) [000056] ------------ * RETURN int $345 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} N001 ( 1, 2) [000076] -c---------- t76 = CNS_INT int 0 $40 /--* t76 int N003 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist Trees before Calculate stack level slots ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB03} [000156] ------------ IL_OFFSET void IL offset: 0x0 N002 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class $100 /--* t3 long [000159] ------------ t159 = * PUTARG_REG long REG x0 /--* t159 long arg0 in x0 N003 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $140 /--* t4 ref N005 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 N001 ( 1, 1) [000007] ------------ t7 = LCL_VAR ref V04 tmp1 u:2 $140 /--* t7 ref N003 ( 3, 4) [000009] -c---------- t9 = * LEA(b+8) byref N005 ( 1, 1) [000002] ------------ t2 = LCL_VAR long V00 arg0 u:1 (last use) $80 /--* t9 byref +--* t2 long [000157] -A---O------ * STOREIND long N001 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 (last use) $140 /--* t12 ref N004 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 N003 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 $140 /--* t17 ref [000160] ------------ t160 = * PUTARG_REG ref REG x1 N004 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class $101 /--* t22 long [000161] ------------ t161 = * PUTARG_REG long REG x0 /--* t160 ref arg1 in x1 +--* t161 long arg0 in x0 N005 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX $143 ------------ BB03 [???..021), preds={BB01} succs={BB04} N001 ( 1, 1) [000021] ------------ t21 = LCL_VAR ref V05 tmp2 u:2 (last use) $140 /--* t21 ref N003 ( 3, 4) [000028] -c---------- t28 = * LEA(b+8) byref /--* t28 byref N004 ( 6, 6) [000029] n---GO------ t29 = * IND simd16 [000162] Dc-----N---- t162 = LCL_VAR_ADDR byref V06 tmp3 /--* t162 byref +--* t29 simd16 N006 ( 6, 6) [000036] -A---------- * STOREIND simd16 N003 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 $181 /--* t87 long [000163] ------------ t163 = * PUTARG_REG long REG x0 N004 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 $42 /--* t88 int [000164] ------------ t164 = * PUTARG_REG int REG x1 /--* t163 long arg0 in x0 +--* t164 int arg1 in x1 N005 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $242 N001 ( 1, 2) [000081] -c---------- t81 = CNS_INT int 0 $40 /--* t81 int [000165] ------------ t165 = * SIMD simd16 float init /--* t165 simd16 N003 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 N003 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] $102 /--* t133 long N004 ( 6, 14) [000134] #---G------- t134 = * IND ref $c9 /--* t134 ref [000166] ----G------- t166 = * PUTARG_REG ref REG x1 N005 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 $381 /--* t84 byref [000167] ------------ t167 = * PUTARG_REG byref REG x0 /--* t166 ref arg1 in x1 +--* t167 byref this in x0 N006 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor $VN.Void N001 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 $304 /--* t86 struct N003 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 N001 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 (last use) $303 /--* t100 struct N003 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 N001 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 (last use) $307 /--* t98 struct N003 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 N003 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 $87 /--* t114 long [000168] ------------ t168 = * PUTARG_REG long REG x0 N004 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 $88 /--* t116 long [000169] ------------ t169 = * PUTARG_REG long REG x1 /--* t168 long arg0 in x0 +--* t169 long arg1 in x1 N005 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore $342 /--* t117 int N006 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int $281 /--* t119 int N008 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} [000158] ------------ IL_OFFSET void IL offset: 0x2e N001 ( 3, 2) [000055] ------------ t55 = LCL_VAR int V02 loc1 u:3 (last use) $400 /--* t55 int N002 ( 4, 3) [000056] ------------ * RETURN int $345 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} N001 ( 1, 2) [000076] -c---------- t76 = CNS_INT int 0 $40 /--* t76 int N003 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Calculate stack level slots *************** Finishing PHASE Calculate stack level slots [no changes] *************** Starting PHASE Linear scan register alloc Clearing modified regs. buildIntervals ======== ----------------- LIVENESS: ----------------- BB01 use def in out {V00} {V04 V05} {V00} {V05} BB03 use def in out {V05} {V02 V06 V07 V16} {V05} {V02} BB04 use def in out {V02} {} {V02} {} BB05 use def in out {} {V02} {} {V02} EH Vars: {V02} Finally Vars: {} Interval 0: long RefPositions {} physReg:NA Preferences=[x0-xip1 x19-x28] Interval 0: (V00) long RefPositions {} physReg:NA Preferences=[x0-xip1 x19-x28] Interval 1: ref RefPositions {} physReg:NA Preferences=[x0-xip1 x19-x28] Interval 1: (V04) ref RefPositions {} physReg:NA Preferences=[x0-xip1 x19-x28] Interval 2: ref RefPositions {} physReg:NA Preferences=[x0-xip1 x19-x28] Interval 2: (V05) ref RefPositions {} physReg:NA Preferences=[x0-xip1 x19-x28] Interval 3: simd16 RefPositions {} physReg:NA Preferences=[allFloat] Interval 3: (V07) simd16 RefPositions {} physReg:NA Preferences=[allFloat] Interval 4: double RefPositions {} physReg:NA Preferences=[allFloat] FP callee save candidate vars: None floatVarCount = 0; hasLoops = 0, singleExit = 1 *************** In lvaAssignFrameOffsets(REGALLOC_FRAME_LAYOUT) Setting genSaveFpLrWithAllCalleeSavedRegisters to false Pad V15 PSPSym, size=8, stkOffs=-0x97, pad=7 Assign V15 PSPSym, size=8, stkOffs=-0x9f Pad V00 arg0, size=8, stkOffs=-0xa6, pad=7 Assign V00 arg0, size=8, stkOffs=-0xae Pad V01 loc0, size=16, stkOffs=-0xb5, pad=7 Assign V01 loc0, size=16, stkOffs=-0xc5 Assign V02 loc1, size=4, stkOffs=-0xc9 Pad V06 tmp3, size=16, stkOffs=-0xd0, pad=7 Assign V06 tmp3, size=16, stkOffs=-0xe0 Pad V07 tmp4, size=16, stkOffs=-0xe7, pad=7 Assign V07 tmp4, size=16, stkOffs=-0xf7 Pad V08 tmp5, size=8, stkOffs=-0xfe, pad=7 Assign V08 tmp5, size=8, stkOffs=-0x106 Pad V09 tmp6, size=8, stkOffs=-0x10d, pad=7 Assign V09 tmp6, size=8, stkOffs=-0x115 Pad V10 tmp7, size=16, stkOffs=-0x11c, pad=7 Assign V10 tmp7, size=16, stkOffs=-0x12c Pad V11 tmp8, size=16, stkOffs=-0x133, pad=7 Assign V11 tmp8, size=16, stkOffs=-0x143 Pad V12 tmp9, size=16, stkOffs=-0x14a, pad=7 Assign V12 tmp9, size=16, stkOffs=-0x15a Pad V13 tmp10, size=16, stkOffs=-0x161, pad=7 Assign V13 tmp10, size=16, stkOffs=-0x171 Pad V14 tmp11, size=16, stkOffs=-0x178, pad=7 Assign V14 tmp11, size=16, stkOffs=-0x188 Pad V16 cse0, size=8, stkOffs=-0x18f, pad=7 Assign V16 cse0, size=8, stkOffs=-0x197 Pad V04 tmp1, size=8, stkOffs=-0x19e, pad=7 Assign V04 tmp1, size=8, stkOffs=-0x1a6 Pad V05 tmp2, size=8, stkOffs=-0x1ad, pad=7 Assign V05 tmp2, size=8, stkOffs=-0x1b5 --- delta bump 464 for RBP frame --- virtual stack offset to actual stack offset delta is 464 -- V00 was -174, now 290 -- V01 was -197, now 267 -- V02 was -201, now 263 -- V03 was 0, now 464 -- V04 was -422, now 42 -- V05 was -437, now 27 -- V06 was -224, now 240 -- V07 was -247, now 217 -- V08 was -262, now 202 -- V09 was -277, now 187 -- V10 was -300, now 164 -- V11 was -323, now 141 -- V12 was -346, now 118 -- V13 was -369, now 95 -- V14 was -392, now 72 -- V15 was -159, now 305 -- V16 was -407, now 57 compRsvdRegCheck frame size = 464 compArgSize = 8 Returning true (ARM64) Reserved REG_OPT_RSVD (xip1) due to large frame TUPLE STYLE DUMP BEFORE LSRA New BlockSet epoch 5, # of blocks (including unused BB00): 7, bitset array size: 1 (short) Start LSRA Block Sequence: Current block: BB01 Succ block: BB03, Criteria: weight, Worklist: [BB03 ] Current block: BB03 Succ block: BB04, Criteria: weight, Worklist: [BB04 ] Current block: BB04 Unvisited block: BB05, Criteria: weight, Worklist: [BB05 ] Current block: BB05 Final LSRA Block Sequence: BB01( 1 ) BB03( 1 ) BB04( 1 ) has EH pred BB05( 0 ) EH-in EH-out BB01 [000..???), preds={} succs={BB03} ===== N000. IL_OFFSET IL offset: 0x0 N002. t3 = CNS_INT(h) 0xd1ffab1e class N000. t159 = PUTARG_REG; t3 N003. t4 = CALL help; t159 N005. V04(t6); t4 N001. V04(t7) N003. t9 = LEA(b+8) ; t7 N005. V00(t2*) N000. STOREIND ; t9,t2* N001. V04(t12*) N004. V05(t16); t12* N003. V05(t17) N000. t160 = PUTARG_REG; t17 N004. t22 = CNS_INT(h) 0xd1ffab1e class N000. t161 = PUTARG_REG; t22 N005. CALL help; t160,t161 BB03 [???..021), preds={BB01} succs={BB04} ===== N001. V05(t21*) N003. t28 = LEA(b+8) ; t21* N004. t29 = IND ; t28 N000. LCL_VAR_ADDR V06 tmp3 N006. STOREIND ; t29 N003. t87 = CNS_INT 0x7f2134dd40 N000. t163 = PUTARG_REG; t87 N004. t88 = CNS_INT 91 N000. t164 = PUTARG_REG; t88 N005. CALL help; t163,t164 N001. CNS_INT 0 N000. t165 = SIMD N003. V10 MEM; t165 N003. t133 = CNS_INT(h) 0xD1FFAB1E [ICON_STR_HDL] N004. t134 = IND ; t133 N000. t166 = PUTARG_REG; t134 N005. t84 = LCL_VAR_ADDR V10 tmp7 N000. t167 = PUTARG_REG; t84 N006. CALL ; t166,t167 N001. t86 = V10 MEM N003. V07(t93); t86 N001. t100* = V06 MEM N003. V13 MEM; t100* N001. V07(t98*) N003. V14 MEM; t98* N003. t114 = LCL_VAR_ADDR V13 tmp10 N000. t168 = PUTARG_REG; t114 N004. t116 = LCL_VAR_ADDR V14 tmp11 N000. t169 = PUTARG_REG; t116 N005. t117 = CALL ; t168,t169 N006. t119 = CAST ; t117 N008. V02 MEM; t119 BB04 [02E..030) (return), preds={BB03,BB05} succs={} ===== N000. IL_OFFSET IL offset: 0x2e N001. t55* = V02 MEM N002. RETURN ; t55* BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ===== N001. CNS_INT 0 N003. V02 MEM buildIntervals second part ======== Int arg V00 in reg x0 BB00 regmask=[x0] minReg=1 fixed wt=100.00> NEW BLOCK BB01 DefList: { } N003 (???,???) [000156] ------------ * IL_OFFSET void IL offset: 0x0 REG NA DefList: { } N005 ( 3, 12) [000003] H----------- * CNS_INT(h) long 0xd1ffab1e class REG NA $100 Interval 5: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] CNS_INT BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N005.t3. CNS_INT } N007 (???,???) [000159] ------------ * PUTARG_REG long REG x0 BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> Interval 6: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB01 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x0] minReg=1 fixed wt=400.00> DefList: { N007.t159. PUTARG_REG } N009 ( 17, 15) [000004] --C--------- * CALL help ref HELPER.CORINFO_HELP_NEWSFAST REG NA $140 BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x1] minReg=1 wt=100.00> BB01 regmask=[x2] minReg=1 wt=100.00> BB01 regmask=[x3] minReg=1 wt=100.00> BB01 regmask=[x4] minReg=1 wt=100.00> BB01 regmask=[x5] minReg=1 wt=100.00> BB01 regmask=[x6] minReg=1 wt=100.00> BB01 regmask=[x7] minReg=1 wt=100.00> BB01 regmask=[x8] minReg=1 wt=100.00> BB01 regmask=[x9] minReg=1 wt=100.00> BB01 regmask=[x10] minReg=1 wt=100.00> BB01 regmask=[x11] minReg=1 wt=100.00> BB01 regmask=[x12] minReg=1 wt=100.00> BB01 regmask=[x13] minReg=1 wt=100.00> BB01 regmask=[x14] minReg=1 wt=100.00> BB01 regmask=[x15] minReg=1 wt=100.00> BB01 regmask=[xip0] minReg=1 wt=100.00> BB01 regmask=[xip1] minReg=1 wt=100.00> BB01 regmask=[lr] minReg=1 wt=100.00> BB01 regmask=[d0] minReg=1 wt=100.00> BB01 regmask=[d1] minReg=1 wt=100.00> BB01 regmask=[d2] minReg=1 wt=100.00> BB01 regmask=[d3] minReg=1 wt=100.00> BB01 regmask=[d4] minReg=1 wt=100.00> BB01 regmask=[d5] minReg=1 wt=100.00> BB01 regmask=[d6] minReg=1 wt=100.00> BB01 regmask=[d7] minReg=1 wt=100.00> BB01 regmask=[d16] minReg=1 wt=100.00> BB01 regmask=[d17] minReg=1 wt=100.00> BB01 regmask=[d18] minReg=1 wt=100.00> BB01 regmask=[d19] minReg=1 wt=100.00> BB01 regmask=[d20] minReg=1 wt=100.00> BB01 regmask=[d21] minReg=1 wt=100.00> BB01 regmask=[d22] minReg=1 wt=100.00> BB01 regmask=[d23] minReg=1 wt=100.00> BB01 regmask=[d24] minReg=1 wt=100.00> BB01 regmask=[d25] minReg=1 wt=100.00> BB01 regmask=[d26] minReg=1 wt=100.00> BB01 regmask=[d27] minReg=1 wt=100.00> BB01 regmask=[d28] minReg=1 wt=100.00> BB01 regmask=[d29] minReg=1 wt=100.00> BB01 regmask=[d30] minReg=1 wt=100.00> BB01 regmask=[d31] minReg=1 wt=100.00> Interval 7: ref RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB01 regmask=[x0] minReg=1 wt=100.00> CALL BB01 regmask=[x0] minReg=1 fixed wt=400.00> DefList: { N009.t4. CALL } N011 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 NA REG NA BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> Assigning related to STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> DefList: { } N013 ( 1, 1) [000007] ------------ * LCL_VAR ref V04 tmp1 u:2 NA REG NA $140 DefList: { } N015 ( 3, 4) [000009] -c---------- * LEA(b+8) byref REG NA Contained DefList: { } N017 ( 1, 1) [000002] ------------ * LCL_VAR long V00 arg0 u:1 NA (last use) REG NA $80 DefList: { } N019 (???,???) [000157] -A---O------ * STOREIND long REG NA LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=300.00> DefList: { } N021 ( 1, 1) [000012] ------------ * LCL_VAR ref V04 tmp1 u:2 NA (last use) REG NA $140 DefList: { } N023 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 NA REG NA LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> Assigning related to STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> DefList: { } N025 ( 1, 1) [000017] ------?----- * LCL_VAR ref V05 tmp2 u:2 NA REG NA $140 DefList: { } N027 (???,???) [000160] ------------ * PUTARG_REG ref REG x1 BB01 regmask=[x1] minReg=1 wt=100.00> LCL_VAR BB01 regmask=[x1] minReg=1 last fixed wt=600.00> Setting putarg_reg as a pass-through of a non-last use lclVar Interval 8: ref RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB01 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x1] minReg=1 fixed wt=400.00> Assigning related to DefList: { N027.t160. PUTARG_REG } N029 ( 3, 12) [000022] H-----?----- * CNS_INT(h) long 0xd1ffab1e class REG NA $101 Interval 9: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] CNS_INT BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N027.t160. PUTARG_REG; N029.t22. CNS_INT } N031 (???,???) [000161] ------------ * PUTARG_REG long REG x0 BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> Interval 10: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB01 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x0] minReg=1 fixed wt=400.00> DefList: { N027.t160. PUTARG_REG; N031.t161. PUTARG_REG } N033 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX REG NA $143 BB01 regmask=[x1] minReg=1 wt=100.00> BB01 regmask=[x1] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x1] minReg=1 wt=100.00> BB01 regmask=[x2] minReg=1 wt=100.00> BB01 regmask=[x3] minReg=1 wt=100.00> BB01 regmask=[x4] minReg=1 wt=100.00> BB01 regmask=[x5] minReg=1 wt=100.00> BB01 regmask=[x6] minReg=1 wt=100.00> BB01 regmask=[x7] minReg=1 wt=100.00> BB01 regmask=[x8] minReg=1 wt=100.00> BB01 regmask=[x9] minReg=1 wt=100.00> BB01 regmask=[x10] minReg=1 wt=100.00> BB01 regmask=[x11] minReg=1 wt=100.00> BB01 regmask=[x12] minReg=1 wt=100.00> BB01 regmask=[x13] minReg=1 wt=100.00> BB01 regmask=[x14] minReg=1 wt=100.00> BB01 regmask=[x15] minReg=1 wt=100.00> BB01 regmask=[xip0] minReg=1 wt=100.00> BB01 regmask=[xip1] minReg=1 wt=100.00> BB01 regmask=[lr] minReg=1 wt=100.00> BB01 regmask=[d0] minReg=1 wt=100.00> BB01 regmask=[d1] minReg=1 wt=100.00> BB01 regmask=[d2] minReg=1 wt=100.00> BB01 regmask=[d3] minReg=1 wt=100.00> BB01 regmask=[d4] minReg=1 wt=100.00> BB01 regmask=[d5] minReg=1 wt=100.00> BB01 regmask=[d6] minReg=1 wt=100.00> BB01 regmask=[d7] minReg=1 wt=100.00> BB01 regmask=[d16] minReg=1 wt=100.00> BB01 regmask=[d17] minReg=1 wt=100.00> BB01 regmask=[d18] minReg=1 wt=100.00> BB01 regmask=[d19] minReg=1 wt=100.00> BB01 regmask=[d20] minReg=1 wt=100.00> BB01 regmask=[d21] minReg=1 wt=100.00> BB01 regmask=[d22] minReg=1 wt=100.00> BB01 regmask=[d23] minReg=1 wt=100.00> BB01 regmask=[d24] minReg=1 wt=100.00> BB01 regmask=[d25] minReg=1 wt=100.00> BB01 regmask=[d26] minReg=1 wt=100.00> BB01 regmask=[d27] minReg=1 wt=100.00> BB01 regmask=[d28] minReg=1 wt=100.00> BB01 regmask=[d29] minReg=1 wt=100.00> BB01 regmask=[d30] minReg=1 wt=100.00> BB01 regmask=[d31] minReg=1 wt=100.00> CHECKING LAST USES for BB01, liveout={V05} ============================== use: {V00} def: {V04 V05} NEW BLOCK BB03 Setting BB01 as the predecessor for determining incoming variable registers of BB03 DefList: { } N037 ( 1, 1) [000021] ------------ * LCL_VAR ref V05 tmp2 u:2 NA (last use) REG NA $140 DefList: { } N039 ( 3, 4) [000028] -c---------- * LEA(b+8) byref REG NA Contained DefList: { } N041 ( 6, 6) [000029] n---GO------ * IND simd16 REG NA LCL_VAR BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> Interval 11: simd16 RefPositions {} physReg:NA Preferences=[allFloat] IND BB03 regmask=[allFloat] minReg=1 wt=400.00> DefList: { N041.t29. IND } N043 (???,???) [000162] Dc-----N---- * LCL_VAR_ADDR byref V06 tmp3 NA REG NA Contained DefList: { N041.t29. IND } N045 ( 6, 6) [000036] -A---------- * STOREIND simd16 REG NA BB03 regmask=[allFloat] minReg=1 last wt=100.00> DefList: { } N047 ( 3, 12) [000087] ------------ * CNS_INT long 0x7f2134dd40 REG NA $181 Interval 12: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] CNS_INT BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N047.t87. CNS_INT } N049 (???,???) [000163] ------------ * PUTARG_REG long REG x0 BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> Interval 13: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> DefList: { N049.t163. PUTARG_REG } N051 ( 1, 2) [000088] ------------ * CNS_INT int 91 REG NA $42 Interval 14: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] CNS_INT BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N049.t163. PUTARG_REG; N051.t88. CNS_INT } N053 (???,???) [000164] ------------ * PUTARG_REG int REG x1 BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> Interval 15: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> DefList: { N049.t163. PUTARG_REG; N053.t164. PUTARG_REG } N055 ( 18, 18) [000089] --CXG------- * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE REG NA $242 BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x2] minReg=1 wt=100.00> BB03 regmask=[x3] minReg=1 wt=100.00> BB03 regmask=[x4] minReg=1 wt=100.00> BB03 regmask=[x5] minReg=1 wt=100.00> BB03 regmask=[x6] minReg=1 wt=100.00> BB03 regmask=[x7] minReg=1 wt=100.00> BB03 regmask=[x8] minReg=1 wt=100.00> BB03 regmask=[x9] minReg=1 wt=100.00> BB03 regmask=[x10] minReg=1 wt=100.00> BB03 regmask=[x11] minReg=1 wt=100.00> BB03 regmask=[x12] minReg=1 wt=100.00> BB03 regmask=[x13] minReg=1 wt=100.00> BB03 regmask=[x14] minReg=1 wt=100.00> BB03 regmask=[x15] minReg=1 wt=100.00> BB03 regmask=[xip0] minReg=1 wt=100.00> BB03 regmask=[xip1] minReg=1 wt=100.00> BB03 regmask=[lr] minReg=1 wt=100.00> BB03 regmask=[d0] minReg=1 wt=100.00> BB03 regmask=[d1] minReg=1 wt=100.00> BB03 regmask=[d2] minReg=1 wt=100.00> BB03 regmask=[d3] minReg=1 wt=100.00> BB03 regmask=[d4] minReg=1 wt=100.00> BB03 regmask=[d5] minReg=1 wt=100.00> BB03 regmask=[d6] minReg=1 wt=100.00> BB03 regmask=[d7] minReg=1 wt=100.00> BB03 regmask=[d16] minReg=1 wt=100.00> BB03 regmask=[d17] minReg=1 wt=100.00> BB03 regmask=[d18] minReg=1 wt=100.00> BB03 regmask=[d19] minReg=1 wt=100.00> BB03 regmask=[d20] minReg=1 wt=100.00> BB03 regmask=[d21] minReg=1 wt=100.00> BB03 regmask=[d22] minReg=1 wt=100.00> BB03 regmask=[d23] minReg=1 wt=100.00> BB03 regmask=[d24] minReg=1 wt=100.00> BB03 regmask=[d25] minReg=1 wt=100.00> BB03 regmask=[d26] minReg=1 wt=100.00> BB03 regmask=[d27] minReg=1 wt=100.00> BB03 regmask=[d28] minReg=1 wt=100.00> BB03 regmask=[d29] minReg=1 wt=100.00> BB03 regmask=[d30] minReg=1 wt=100.00> BB03 regmask=[d31] minReg=1 wt=100.00> Interval 16: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB03 regmask=[x0] minReg=1 wt=100.00> CALL BB03 regmask=[x0] minReg=1 fixed wt=400.00> DefList: { } N057 ( 1, 2) [000081] -c---------- * CNS_INT int 0 REG NA $40 Contained DefList: { } N059 (???,???) [000165] ------------ * SIMD simd16 float init REG NA Interval 17: simd16 RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB03 regmask=[allFloat] minReg=1 wt=400.00> DefList: { N059.t165. SIMD } N061 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 NA REG NA BB03 regmask=[allFloat] minReg=1 last wt=100.00> DefList: { } N063 ( 3, 12) [000133] H----------- * CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] REG NA $102 Interval 18: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] CNS_INT BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N063.t133. CNS_INT } N065 ( 6, 14) [000134] #---G------- * IND ref REG NA $c9 BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> Interval 19: ref RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] IND BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N065.t134. IND } N067 (???,???) [000166] ----G------- * PUTARG_REG ref REG x1 BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> Interval 20: ref RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> DefList: { N067.t166. PUTARG_REG } N069 ( 3, 3) [000084] ------------ * LCL_VAR_ADDR byref V10 tmp7 NA REG NA $381 Interval 21: byref RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] LCL_VAR_ADDR BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N067.t166. PUTARG_REG; N069.t84. LCL_VAR_ADDR } N071 (???,???) [000167] ------------ * PUTARG_REG byref REG x0 BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> Interval 22: byref RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> DefList: { N067.t166. PUTARG_REG; N071.t167. PUTARG_REG } N073 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor REG NA $VN.Void BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x2] minReg=1 wt=100.00> BB03 regmask=[x3] minReg=1 wt=100.00> BB03 regmask=[x4] minReg=1 wt=100.00> BB03 regmask=[x5] minReg=1 wt=100.00> BB03 regmask=[x6] minReg=1 wt=100.00> BB03 regmask=[x7] minReg=1 wt=100.00> BB03 regmask=[x8] minReg=1 wt=100.00> BB03 regmask=[x9] minReg=1 wt=100.00> BB03 regmask=[x10] minReg=1 wt=100.00> BB03 regmask=[x11] minReg=1 wt=100.00> BB03 regmask=[x12] minReg=1 wt=100.00> BB03 regmask=[x13] minReg=1 wt=100.00> BB03 regmask=[x14] minReg=1 wt=100.00> BB03 regmask=[x15] minReg=1 wt=100.00> BB03 regmask=[xip0] minReg=1 wt=100.00> BB03 regmask=[xip1] minReg=1 wt=100.00> BB03 regmask=[lr] minReg=1 wt=100.00> BB03 regmask=[d0] minReg=1 wt=100.00> BB03 regmask=[d1] minReg=1 wt=100.00> BB03 regmask=[d2] minReg=1 wt=100.00> BB03 regmask=[d3] minReg=1 wt=100.00> BB03 regmask=[d4] minReg=1 wt=100.00> BB03 regmask=[d5] minReg=1 wt=100.00> BB03 regmask=[d6] minReg=1 wt=100.00> BB03 regmask=[d7] minReg=1 wt=100.00> BB03 regmask=[d16] minReg=1 wt=100.00> BB03 regmask=[d17] minReg=1 wt=100.00> BB03 regmask=[d18] minReg=1 wt=100.00> BB03 regmask=[d19] minReg=1 wt=100.00> BB03 regmask=[d20] minReg=1 wt=100.00> BB03 regmask=[d21] minReg=1 wt=100.00> BB03 regmask=[d22] minReg=1 wt=100.00> BB03 regmask=[d23] minReg=1 wt=100.00> BB03 regmask=[d24] minReg=1 wt=100.00> BB03 regmask=[d25] minReg=1 wt=100.00> BB03 regmask=[d26] minReg=1 wt=100.00> BB03 regmask=[d27] minReg=1 wt=100.00> BB03 regmask=[d28] minReg=1 wt=100.00> BB03 regmask=[d29] minReg=1 wt=100.00> BB03 regmask=[d30] minReg=1 wt=100.00> BB03 regmask=[d31] minReg=1 wt=100.00> DefList: { } N075 ( 3, 2) [000086] -------N---- * LCL_VAR struct(AX) V10 tmp7 NA REG NA $304 Interval 23: simd16 RefPositions {} physReg:NA Preferences=[allFloat] LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> DefList: { N075.t86. LCL_VAR } N077 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 NA REG NA BB03 regmask=[allFloat] minReg=1 last wt=100.00> Assigning related to STORE_LCL_VAR BB03 regmask=[allFloat] minReg=1 last wt=400.00> DefList: { } N079 ( 1, 1) [000100] ------------ * LCL_VAR struct V06 tmp3 u:2 NA (last use) REG NA $303 Interval 24: simd16 RefPositions {} physReg:NA Preferences=[allFloat] LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> DefList: { N079.t100. LCL_VAR } N081 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 NA REG NA BB03 regmask=[allFloat] minReg=1 last wt=100.00> DefList: { } N083 ( 1, 1) [000098] ------------ * LCL_VAR struct V07 tmp4 u:2 NA (last use) REG NA $307 DefList: { } N085 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 NA REG NA LCL_VAR BB03 regmask=[allFloat] minReg=1 last wt=400.00> DefList: { } N087 ( 3, 3) [000114] ------------ * LCL_VAR_ADDR long V13 tmp10 NA REG NA $87 Interval 25: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] LCL_VAR_ADDR BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N087.t114. LCL_VAR_ADDR } N089 (???,???) [000168] ------------ * PUTARG_REG long REG x0 BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> Interval 26: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> DefList: { N089.t168. PUTARG_REG } N091 ( 3, 3) [000116] ------------ * LCL_VAR_ADDR long V14 tmp11 NA REG NA $88 Interval 27: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] LCL_VAR_ADDR BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N089.t168. PUTARG_REG; N091.t116. LCL_VAR_ADDR } N093 (???,???) [000169] ------------ * PUTARG_REG long REG x1 BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> Interval 28: long RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> DefList: { N089.t168. PUTARG_REG; N093.t169. PUTARG_REG } N095 ( 20, 10) [000117] --CXG------- * CALL int System.Guid.EqualsCore REG NA $342 BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x2] minReg=1 wt=100.00> BB03 regmask=[x3] minReg=1 wt=100.00> BB03 regmask=[x4] minReg=1 wt=100.00> BB03 regmask=[x5] minReg=1 wt=100.00> BB03 regmask=[x6] minReg=1 wt=100.00> BB03 regmask=[x7] minReg=1 wt=100.00> BB03 regmask=[x8] minReg=1 wt=100.00> BB03 regmask=[x9] minReg=1 wt=100.00> BB03 regmask=[x10] minReg=1 wt=100.00> BB03 regmask=[x11] minReg=1 wt=100.00> BB03 regmask=[x12] minReg=1 wt=100.00> BB03 regmask=[x13] minReg=1 wt=100.00> BB03 regmask=[x14] minReg=1 wt=100.00> BB03 regmask=[x15] minReg=1 wt=100.00> BB03 regmask=[xip0] minReg=1 wt=100.00> BB03 regmask=[xip1] minReg=1 wt=100.00> BB03 regmask=[lr] minReg=1 wt=100.00> BB03 regmask=[d0] minReg=1 wt=100.00> BB03 regmask=[d1] minReg=1 wt=100.00> BB03 regmask=[d2] minReg=1 wt=100.00> BB03 regmask=[d3] minReg=1 wt=100.00> BB03 regmask=[d4] minReg=1 wt=100.00> BB03 regmask=[d5] minReg=1 wt=100.00> BB03 regmask=[d6] minReg=1 wt=100.00> BB03 regmask=[d7] minReg=1 wt=100.00> BB03 regmask=[d16] minReg=1 wt=100.00> BB03 regmask=[d17] minReg=1 wt=100.00> BB03 regmask=[d18] minReg=1 wt=100.00> BB03 regmask=[d19] minReg=1 wt=100.00> BB03 regmask=[d20] minReg=1 wt=100.00> BB03 regmask=[d21] minReg=1 wt=100.00> BB03 regmask=[d22] minReg=1 wt=100.00> BB03 regmask=[d23] minReg=1 wt=100.00> BB03 regmask=[d24] minReg=1 wt=100.00> BB03 regmask=[d25] minReg=1 wt=100.00> BB03 regmask=[d26] minReg=1 wt=100.00> BB03 regmask=[d27] minReg=1 wt=100.00> BB03 regmask=[d28] minReg=1 wt=100.00> BB03 regmask=[d29] minReg=1 wt=100.00> BB03 regmask=[d30] minReg=1 wt=100.00> BB03 regmask=[d31] minReg=1 wt=100.00> Interval 29: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] BB03 regmask=[x0] minReg=1 wt=100.00> CALL BB03 regmask=[x0] minReg=1 fixed wt=400.00> DefList: { N095.t117. CALL } N097 ( 21, 12) [000119] ---XG------- * CAST int <- bool <- int REG NA $281 BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> Interval 30: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] CAST BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N097.t119. CAST } N099 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 NA REG NA BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> CHECKING LAST USES for BB03, liveout={V02} ============================== use: {V05} def: {V02 V06 V07 V16} NEW BLOCK BB04 Setting BB03 as the predecessor for determining incoming variable registers of BB04 DefList: { } N103 (???,???) [000158] ------------ * IL_OFFSET void IL offset: 0x2e REG NA DefList: { } N105 ( 3, 2) [000055] ------------ * LCL_VAR int V02 loc1 u:3 NA (last use) REG NA $400 Interval 31: int RefPositions {} physReg:NA Preferences=[x0-xip0 x19-x28] LCL_VAR BB04 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> DefList: { N105.t55. LCL_VAR } N107 ( 4, 3) [000056] ------------ * RETURN int REG NA $345 BB04 regmask=[x0] minReg=1 wt=100.00> BB04 regmask=[x0] minReg=1 last fixed wt=100.00> CHECKING LAST USES for BB04, liveout={} ============================== use: {V02} def: {} NEW BLOCK BB05 Incoming EH boundary; firstColdLoc = 111 DefList: { } N111 ( 1, 2) [000076] -c---------- * CNS_INT int 0 REG NA $40 Contained DefList: { } N113 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 NA REG NA CHECKING LAST USES for BB05, liveout={V02} ============================== use: {} def: {V02} Linear scan intervals BEFORE VALIDATING INTERVALS: Interval 0: (V00) long RefPositions {#0@0 #57@19} physReg:x0 Preferences=[x19-x28] Interval 1: (V04) ref RefPositions {#55@12 #56@19 #58@23} physReg:NA Preferences=[x0-xip0 x19-x28] RelatedInterval Interval 2: (V05) ref RefPositions {#59@24 #61@27 #117@41} physReg:NA Preferences=[x19-x28] Interval 3: (V07) simd16 RefPositions {#242@78 #245@85} physReg:NA Preferences=[allFloat] Interval 4: (U07) double RefPositions {} physReg:NA Preferences=[allFloat] RelatedInterval Interval 5: long (constant) RefPositions {#2@6 #4@7} physReg:NA Preferences=[x0] Interval 6: long RefPositions {#6@8 #8@9} physReg:NA Preferences=[x0] Interval 7: ref RefPositions {#53@10 #54@11} physReg:NA Preferences=[x0] RelatedInterval Interval 8: ref (specialPutArg) RefPositions {#63@28 #70@33} physReg:NA Preferences=[x1] RelatedInterval Interval 9: long (constant) RefPositions {#64@30 #66@31} physReg:NA Preferences=[x0] Interval 10: long RefPositions {#68@32 #72@33} physReg:NA Preferences=[x0] Interval 11: simd16 RefPositions {#118@42 #119@45} physReg:NA Preferences=[allFloat] Interval 12: long (constant) RefPositions {#120@48 #122@49} physReg:NA Preferences=[x0] Interval 13: long RefPositions {#124@50 #131@55} physReg:NA Preferences=[x0] Interval 14: int (constant) RefPositions {#125@52 #127@53} physReg:NA Preferences=[x1] Interval 15: int RefPositions {#129@54 #133@55} physReg:NA Preferences=[x1] Interval 16: long RefPositions {#178@56} physReg:NA Preferences=[x0] Interval 17: simd16 RefPositions {#179@60 #180@61} physReg:NA Preferences=[allFloat] Interval 18: long (constant) RefPositions {#181@64 #182@65} physReg:NA Preferences=[x0-xip0 x19-x28] Interval 19: ref RefPositions {#183@66 #185@67} physReg:NA Preferences=[x1] Interval 20: ref RefPositions {#187@68 #194@73} physReg:NA Preferences=[x1] Interval 21: byref RefPositions {#188@70 #190@71} physReg:NA Preferences=[x0] Interval 22: byref RefPositions {#192@72 #196@73} physReg:NA Preferences=[x0] Interval 23: simd16 RefPositions {#240@76 #241@77} physReg:NA Preferences=[allFloat] RelatedInterval Interval 24: simd16 RefPositions {#243@80 #244@81} physReg:NA Preferences=[allFloat] Interval 25: long RefPositions {#246@88 #248@89} physReg:NA Preferences=[x0] Interval 26: long RefPositions {#250@90 #257@95} physReg:NA Preferences=[x0] Interval 27: long RefPositions {#251@92 #253@93} physReg:NA Preferences=[x1] Interval 28: long RefPositions {#255@94 #259@95} physReg:NA Preferences=[x1] Interval 29: int RefPositions {#304@96 #305@97} physReg:NA Preferences=[x0] Interval 30: int RefPositions {#306@98 #307@99} physReg:NA Preferences=[x0-xip0 x19-x28] Interval 31: int RefPositions {#309@106 #311@107} physReg:NA Preferences=[x0] ------------ REFPOSITIONS BEFORE VALIDATING INTERVALS: ------------ BB00 regmask=[x0] minReg=1 fixed regOptional wt=100.00> CNS_INT BB01 regmask=[x0] minReg=1 wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 last wt=100.00> BB01 regmask=[x1] minReg=1 last wt=100.00> BB01 regmask=[x2] minReg=1 last wt=100.00> BB01 regmask=[x3] minReg=1 last wt=100.00> BB01 regmask=[x4] minReg=1 last wt=100.00> BB01 regmask=[x5] minReg=1 last wt=100.00> BB01 regmask=[x6] minReg=1 last wt=100.00> BB01 regmask=[x7] minReg=1 last wt=100.00> BB01 regmask=[x8] minReg=1 last wt=100.00> BB01 regmask=[x9] minReg=1 last wt=100.00> BB01 regmask=[x10] minReg=1 last wt=100.00> BB01 regmask=[x11] minReg=1 last wt=100.00> BB01 regmask=[x12] minReg=1 last wt=100.00> BB01 regmask=[x13] minReg=1 last wt=100.00> BB01 regmask=[x14] minReg=1 last wt=100.00> BB01 regmask=[x15] minReg=1 last wt=100.00> BB01 regmask=[xip0] minReg=1 last wt=100.00> BB01 regmask=[xip1] minReg=1 last wt=100.00> BB01 regmask=[lr] minReg=1 last wt=100.00> BB01 regmask=[d0] minReg=1 last wt=100.00> BB01 regmask=[d1] minReg=1 last wt=100.00> BB01 regmask=[d2] minReg=1 last wt=100.00> BB01 regmask=[d3] minReg=1 last wt=100.00> BB01 regmask=[d4] minReg=1 last wt=100.00> BB01 regmask=[d5] minReg=1 last wt=100.00> BB01 regmask=[d6] minReg=1 last wt=100.00> BB01 regmask=[d7] minReg=1 last wt=100.00> BB01 regmask=[d16] minReg=1 last wt=100.00> BB01 regmask=[d17] minReg=1 last wt=100.00> BB01 regmask=[d18] minReg=1 last wt=100.00> BB01 regmask=[d19] minReg=1 last wt=100.00> BB01 regmask=[d20] minReg=1 last wt=100.00> BB01 regmask=[d21] minReg=1 last wt=100.00> BB01 regmask=[d22] minReg=1 last wt=100.00> BB01 regmask=[d23] minReg=1 last wt=100.00> BB01 regmask=[d24] minReg=1 last wt=100.00> BB01 regmask=[d25] minReg=1 last wt=100.00> BB01 regmask=[d26] minReg=1 last wt=100.00> BB01 regmask=[d27] minReg=1 last wt=100.00> BB01 regmask=[d28] minReg=1 last wt=100.00> BB01 regmask=[d29] minReg=1 last wt=100.00> BB01 regmask=[d30] minReg=1 last wt=100.00> BB01 regmask=[d31] minReg=1 last wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> CALL BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=300.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> BB01 regmask=[x1] minReg=1 wt=100.00> LCL_VAR BB01 regmask=[x1] minReg=1 fixed wt=600.00> BB01 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x1] minReg=1 fixed wt=400.00> CNS_INT BB01 regmask=[x0] minReg=1 wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x1] minReg=1 wt=100.00> BB01 regmask=[x1] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 last wt=100.00> BB01 regmask=[x1] minReg=1 last wt=100.00> BB01 regmask=[x2] minReg=1 last wt=100.00> BB01 regmask=[x3] minReg=1 last wt=100.00> BB01 regmask=[x4] minReg=1 last wt=100.00> BB01 regmask=[x5] minReg=1 last wt=100.00> BB01 regmask=[x6] minReg=1 last wt=100.00> BB01 regmask=[x7] minReg=1 last wt=100.00> BB01 regmask=[x8] minReg=1 last wt=100.00> BB01 regmask=[x9] minReg=1 last wt=100.00> BB01 regmask=[x10] minReg=1 last wt=100.00> BB01 regmask=[x11] minReg=1 last wt=100.00> BB01 regmask=[x12] minReg=1 last wt=100.00> BB01 regmask=[x13] minReg=1 last wt=100.00> BB01 regmask=[x14] minReg=1 last wt=100.00> BB01 regmask=[x15] minReg=1 last wt=100.00> BB01 regmask=[xip0] minReg=1 last wt=100.00> BB01 regmask=[xip1] minReg=1 last wt=100.00> BB01 regmask=[lr] minReg=1 last wt=100.00> BB01 regmask=[d0] minReg=1 last wt=100.00> BB01 regmask=[d1] minReg=1 last wt=100.00> BB01 regmask=[d2] minReg=1 last wt=100.00> BB01 regmask=[d3] minReg=1 last wt=100.00> BB01 regmask=[d4] minReg=1 last wt=100.00> BB01 regmask=[d5] minReg=1 last wt=100.00> BB01 regmask=[d6] minReg=1 last wt=100.00> BB01 regmask=[d7] minReg=1 last wt=100.00> BB01 regmask=[d16] minReg=1 last wt=100.00> BB01 regmask=[d17] minReg=1 last wt=100.00> BB01 regmask=[d18] minReg=1 last wt=100.00> BB01 regmask=[d19] minReg=1 last wt=100.00> BB01 regmask=[d20] minReg=1 last wt=100.00> BB01 regmask=[d21] minReg=1 last wt=100.00> BB01 regmask=[d22] minReg=1 last wt=100.00> BB01 regmask=[d23] minReg=1 last wt=100.00> BB01 regmask=[d24] minReg=1 last wt=100.00> BB01 regmask=[d25] minReg=1 last wt=100.00> BB01 regmask=[d26] minReg=1 last wt=100.00> BB01 regmask=[d27] minReg=1 last wt=100.00> BB01 regmask=[d28] minReg=1 last wt=100.00> BB01 regmask=[d29] minReg=1 last wt=100.00> BB01 regmask=[d30] minReg=1 last wt=100.00> BB01 regmask=[d31] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> IND BB03 regmask=[allFloat] minReg=1 wt=400.00> BB03 regmask=[allFloat] minReg=1 last wt=100.00> CNS_INT BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> CNS_INT BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> CALL BB03 regmask=[x0] minReg=1 last fixed local wt=400.00> SIMD BB03 regmask=[allFloat] minReg=1 wt=400.00> BB03 regmask=[allFloat] minReg=1 last wt=100.00> CNS_INT BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> IND BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> LCL_VAR_ADDR BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> BB03 regmask=[allFloat] minReg=1 last wt=100.00> STORE_LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> BB03 regmask=[allFloat] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[allFloat] minReg=1 last wt=400.00> LCL_VAR_ADDR BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> LCL_VAR_ADDR BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> CALL BB03 regmask=[x0] minReg=1 fixed wt=400.00> BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> CAST BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> LCL_VAR BB04 regmask=[x0] minReg=1 wt=400.00> BB04 regmask=[x0] minReg=1 wt=100.00> BB04 regmask=[x0] minReg=1 last fixed wt=100.00> ----------------- STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> ----------------- STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x1] minReg=1 fixed wt=600.00> LCL_VAR BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> ----------------- BB00 regmask=[x0] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=300.00> ----------------- STORE_LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[allFloat] minReg=1 last wt=400.00> TUPLE STYLE DUMP WITH REF POSITIONS Incoming Parameters: V00 BB01 [000..???), preds={} succs={BB03} ===== N003. IL_OFFSET IL offset: 0x0 N005. CNS_INT(h) 0xd1ffab1e class Def:(#2) N007. PUTARG_REG Use:(#4) Fixed:x0(#3) * Def:(#6) x0 N009. CALL help Use:(#8) Fixed:x0(#7) * Kill: x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 xip0 xip1 lr d0 d1 d2 d3 d4 d5 d6 d7 d16 d17 d18 d19 d20 d21 d22 d23 d24 d25 d26 d27 d28 d29 d30 d31 Def:(#53) x0 Pref: N011. V04(L1) Use:(#54) * Def:(#55) Pref: N013. V04(L1) N015. LEA(b+8) N017. V00(L0) N019. STOREIND Use:(#56) Use:(#57) * N021. V04(L1) N023. V05(L2) Use:(#58) * Def:(#59) N025. V05(L2) N027. PUTARG_REG Use:(#61) Fixed:x1(#60) Def:(#63) x1 Pref: N029. CNS_INT(h) 0xd1ffab1e class Def:(#64) N031. PUTARG_REG Use:(#66) Fixed:x0(#65) * Def:(#68) x0 N033. CALL help Use:(#70) Fixed:x1(#69) * Use:(#72) Fixed:x0(#71) * Kill: x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 xip0 xip1 lr d0 d1 d2 d3 d4 d5 d6 d7 d16 d17 d18 d19 d20 d21 d22 d23 d24 d25 d26 d27 d28 d29 d30 d31 BB03 [???..021), preds={BB01} succs={BB04} ===== N037. V05(L2) N039. LEA(b+8) N041. IND Use:(#117) * Def:(#118) N043. LCL_VAR_ADDR V06 tmp3 NA N045. STOREIND Use:(#119) * N047. CNS_INT 0x7f2134dd40 Def:(#120) N049. PUTARG_REG Use:(#122) Fixed:x0(#121) * Def:(#124) x0 N051. CNS_INT 91 Def:(#125) N053. PUTARG_REG Use:(#127) Fixed:x1(#126) * Def:(#129) x1 N055. CALL help Use:(#131) Fixed:x0(#130) * Use:(#133) Fixed:x1(#132) * Kill: x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 xip0 xip1 lr d0 d1 d2 d3 d4 d5 d6 d7 d16 d17 d18 d19 d20 d21 d22 d23 d24 d25 d26 d27 d28 d29 d30 d31 Def:(#178) x0 LocalDefUse * N057. CNS_INT 0 N059. SIMD Def:(#179) N061. V10 MEM Use:(#180) * N063. CNS_INT(h) 0xD1FFAB1E [ICON_STR_HDL] Def:(#181) N065. IND Use:(#182) * Def:(#183) N067. PUTARG_REG Use:(#185) Fixed:x1(#184) * Def:(#187) x1 N069. LCL_VAR_ADDR V10 tmp7 NA Def:(#188) N071. PUTARG_REG Use:(#190) Fixed:x0(#189) * Def:(#192) x0 N073. CALL Use:(#194) Fixed:x1(#193) * Use:(#196) Fixed:x0(#195) * Kill: x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 xip0 xip1 lr d0 d1 d2 d3 d4 d5 d6 d7 d16 d17 d18 d19 d20 d21 d22 d23 d24 d25 d26 d27 d28 d29 d30 d31 N075. V10 MEM Def:(#240) Pref: N077. V07(L3) Use:(#241) * Def:(#242) N079. V06 MEM Def:(#243) N081. V13 MEM Use:(#244) * N083. V07(L3) N085. V14 MEM Use:(#245) * N087. LCL_VAR_ADDR V13 tmp10 NA Def:(#246) N089. PUTARG_REG Use:(#248) Fixed:x0(#247) * Def:(#250) x0 N091. LCL_VAR_ADDR V14 tmp11 NA Def:(#251) N093. PUTARG_REG Use:(#253) Fixed:x1(#252) * Def:(#255) x1 N095. CALL Use:(#257) Fixed:x0(#256) * Use:(#259) Fixed:x1(#258) * Kill: x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 xip0 xip1 lr d0 d1 d2 d3 d4 d5 d6 d7 d16 d17 d18 d19 d20 d21 d22 d23 d24 d25 d26 d27 d28 d29 d30 d31 Def:(#304) x0 N097. CAST Use:(#305) * Def:(#306) N099. V02 MEM Use:(#307) * BB04 [02E..030) (return), preds={BB03,BB05} succs={} ===== N103. IL_OFFSET IL offset: 0x2e N105. V02 MEM Def:(#309) N107. RETURN Use:(#311) Fixed:x0(#310) * BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ===== N111. CNS_INT 0 N113. V02 MEM Linear scan intervals after buildIntervals: Interval 0: (V00) long RefPositions {#0@0 #57@19} physReg:x0 Preferences=[x19-x28] Interval 1: (V04) ref RefPositions {#55@12 #56@19 #58@23} physReg:NA Preferences=[x0-xip0 x19-x28] RelatedInterval Interval 2: (V05) ref RefPositions {#59@24 #61@27 #117@41} physReg:NA Preferences=[x19-x28] Interval 3: (V07) simd16 RefPositions {#242@78 #245@85} physReg:NA Preferences=[allFloat] Interval 4: (U07) double RefPositions {} physReg:NA Preferences=[allFloat] RelatedInterval Interval 5: long (constant) RefPositions {#2@6 #4@7} physReg:NA Preferences=[x0] Interval 6: long RefPositions {#6@8 #8@9} physReg:NA Preferences=[x0] Interval 7: ref RefPositions {#53@10 #54@11} physReg:NA Preferences=[x0] RelatedInterval Interval 8: ref (specialPutArg) RefPositions {#63@28 #70@33} physReg:NA Preferences=[x1] RelatedInterval Interval 9: long (constant) RefPositions {#64@30 #66@31} physReg:NA Preferences=[x0] Interval 10: long RefPositions {#68@32 #72@33} physReg:NA Preferences=[x0] Interval 11: simd16 RefPositions {#118@42 #119@45} physReg:NA Preferences=[allFloat] Interval 12: long (constant) RefPositions {#120@48 #122@49} physReg:NA Preferences=[x0] Interval 13: long RefPositions {#124@50 #131@55} physReg:NA Preferences=[x0] Interval 14: int (constant) RefPositions {#125@52 #127@53} physReg:NA Preferences=[x1] Interval 15: int RefPositions {#129@54 #133@55} physReg:NA Preferences=[x1] Interval 16: long RefPositions {#178@56} physReg:NA Preferences=[x0] Interval 17: simd16 RefPositions {#179@60 #180@61} physReg:NA Preferences=[allFloat] Interval 18: long (constant) RefPositions {#181@64 #182@65} physReg:NA Preferences=[x0-xip0 x19-x28] Interval 19: ref RefPositions {#183@66 #185@67} physReg:NA Preferences=[x1] Interval 20: ref RefPositions {#187@68 #194@73} physReg:NA Preferences=[x1] Interval 21: byref RefPositions {#188@70 #190@71} physReg:NA Preferences=[x0] Interval 22: byref RefPositions {#192@72 #196@73} physReg:NA Preferences=[x0] Interval 23: simd16 RefPositions {#240@76 #241@77} physReg:NA Preferences=[allFloat] RelatedInterval Interval 24: simd16 RefPositions {#243@80 #244@81} physReg:NA Preferences=[allFloat] Interval 25: long RefPositions {#246@88 #248@89} physReg:NA Preferences=[x0] Interval 26: long RefPositions {#250@90 #257@95} physReg:NA Preferences=[x0] Interval 27: long RefPositions {#251@92 #253@93} physReg:NA Preferences=[x1] Interval 28: long RefPositions {#255@94 #259@95} physReg:NA Preferences=[x1] Interval 29: int RefPositions {#304@96 #305@97} physReg:NA Preferences=[x0] Interval 30: int RefPositions {#306@98 #307@99} physReg:NA Preferences=[x0-xip0 x19-x28] Interval 31: int RefPositions {#309@106 #311@107} physReg:NA Preferences=[x0] *************** In LinearScan::allocateRegisters() Linear scan intervals before allocateRegisters: Interval 0: (V00) long RefPositions {#0@0 #57@19} physReg:x0 Preferences=[x19-x28] Interval 1: (V04) ref RefPositions {#55@12 #56@19 #58@23} physReg:NA Preferences=[x0-xip0 x19-x28] RelatedInterval Interval 2: (V05) ref RefPositions {#59@24 #61@27 #117@41} physReg:NA Preferences=[x19-x28] Interval 3: (V07) simd16 RefPositions {#242@78 #245@85} physReg:NA Preferences=[allFloat] Interval 4: (U07) double RefPositions {} physReg:NA Preferences=[allFloat] RelatedInterval Interval 5: long (constant) RefPositions {#2@6 #4@7} physReg:NA Preferences=[x0] Interval 6: long RefPositions {#6@8 #8@9} physReg:NA Preferences=[x0] Interval 7: ref RefPositions {#53@10 #54@11} physReg:NA Preferences=[x0] RelatedInterval Interval 8: ref (specialPutArg) RefPositions {#63@28 #70@33} physReg:NA Preferences=[x1] RelatedInterval Interval 9: long (constant) RefPositions {#64@30 #66@31} physReg:NA Preferences=[x0] Interval 10: long RefPositions {#68@32 #72@33} physReg:NA Preferences=[x0] Interval 11: simd16 RefPositions {#118@42 #119@45} physReg:NA Preferences=[allFloat] Interval 12: long (constant) RefPositions {#120@48 #122@49} physReg:NA Preferences=[x0] Interval 13: long RefPositions {#124@50 #131@55} physReg:NA Preferences=[x0] Interval 14: int (constant) RefPositions {#125@52 #127@53} physReg:NA Preferences=[x1] Interval 15: int RefPositions {#129@54 #133@55} physReg:NA Preferences=[x1] Interval 16: long RefPositions {#178@56} physReg:NA Preferences=[x0] Interval 17: simd16 RefPositions {#179@60 #180@61} physReg:NA Preferences=[allFloat] Interval 18: long (constant) RefPositions {#181@64 #182@65} physReg:NA Preferences=[x0-xip0 x19-x28] Interval 19: ref RefPositions {#183@66 #185@67} physReg:NA Preferences=[x1] Interval 20: ref RefPositions {#187@68 #194@73} physReg:NA Preferences=[x1] Interval 21: byref RefPositions {#188@70 #190@71} physReg:NA Preferences=[x0] Interval 22: byref RefPositions {#192@72 #196@73} physReg:NA Preferences=[x0] Interval 23: simd16 RefPositions {#240@76 #241@77} physReg:NA Preferences=[allFloat] RelatedInterval Interval 24: simd16 RefPositions {#243@80 #244@81} physReg:NA Preferences=[allFloat] Interval 25: long RefPositions {#246@88 #248@89} physReg:NA Preferences=[x0] Interval 26: long RefPositions {#250@90 #257@95} physReg:NA Preferences=[x0] Interval 27: long RefPositions {#251@92 #253@93} physReg:NA Preferences=[x1] Interval 28: long RefPositions {#255@94 #259@95} physReg:NA Preferences=[x1] Interval 29: int RefPositions {#304@96 #305@97} physReg:NA Preferences=[x0] Interval 30: int RefPositions {#306@98 #307@99} physReg:NA Preferences=[x0-xip0 x19-x28] Interval 31: int RefPositions {#309@106 #311@107} physReg:NA Preferences=[x0] ------------ REFPOSITIONS BEFORE ALLOCATION: ------------ BB00 regmask=[x0] minReg=1 fixed regOptional wt=100.00> CNS_INT BB01 regmask=[x0] minReg=1 wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 last wt=100.00> BB01 regmask=[x1] minReg=1 last wt=100.00> BB01 regmask=[x2] minReg=1 last wt=100.00> BB01 regmask=[x3] minReg=1 last wt=100.00> BB01 regmask=[x4] minReg=1 last wt=100.00> BB01 regmask=[x5] minReg=1 last wt=100.00> BB01 regmask=[x6] minReg=1 last wt=100.00> BB01 regmask=[x7] minReg=1 last wt=100.00> BB01 regmask=[x8] minReg=1 last wt=100.00> BB01 regmask=[x9] minReg=1 last wt=100.00> BB01 regmask=[x10] minReg=1 last wt=100.00> BB01 regmask=[x11] minReg=1 last wt=100.00> BB01 regmask=[x12] minReg=1 last wt=100.00> BB01 regmask=[x13] minReg=1 last wt=100.00> BB01 regmask=[x14] minReg=1 last wt=100.00> BB01 regmask=[x15] minReg=1 last wt=100.00> BB01 regmask=[xip0] minReg=1 last wt=100.00> BB01 regmask=[xip1] minReg=1 last wt=100.00> BB01 regmask=[lr] minReg=1 last wt=100.00> BB01 regmask=[d0] minReg=1 last wt=100.00> BB01 regmask=[d1] minReg=1 last wt=100.00> BB01 regmask=[d2] minReg=1 last wt=100.00> BB01 regmask=[d3] minReg=1 last wt=100.00> BB01 regmask=[d4] minReg=1 last wt=100.00> BB01 regmask=[d5] minReg=1 last wt=100.00> BB01 regmask=[d6] minReg=1 last wt=100.00> BB01 regmask=[d7] minReg=1 last wt=100.00> BB01 regmask=[d16] minReg=1 last wt=100.00> BB01 regmask=[d17] minReg=1 last wt=100.00> BB01 regmask=[d18] minReg=1 last wt=100.00> BB01 regmask=[d19] minReg=1 last wt=100.00> BB01 regmask=[d20] minReg=1 last wt=100.00> BB01 regmask=[d21] minReg=1 last wt=100.00> BB01 regmask=[d22] minReg=1 last wt=100.00> BB01 regmask=[d23] minReg=1 last wt=100.00> BB01 regmask=[d24] minReg=1 last wt=100.00> BB01 regmask=[d25] minReg=1 last wt=100.00> BB01 regmask=[d26] minReg=1 last wt=100.00> BB01 regmask=[d27] minReg=1 last wt=100.00> BB01 regmask=[d28] minReg=1 last wt=100.00> BB01 regmask=[d29] minReg=1 last wt=100.00> BB01 regmask=[d30] minReg=1 last wt=100.00> BB01 regmask=[d31] minReg=1 last wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> CALL BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=300.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> BB01 regmask=[x1] minReg=1 wt=100.00> LCL_VAR BB01 regmask=[x1] minReg=1 fixed wt=600.00> BB01 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x1] minReg=1 fixed wt=400.00> CNS_INT BB01 regmask=[x0] minReg=1 wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x1] minReg=1 wt=100.00> BB01 regmask=[x1] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 last wt=100.00> BB01 regmask=[x1] minReg=1 last wt=100.00> BB01 regmask=[x2] minReg=1 last wt=100.00> BB01 regmask=[x3] minReg=1 last wt=100.00> BB01 regmask=[x4] minReg=1 last wt=100.00> BB01 regmask=[x5] minReg=1 last wt=100.00> BB01 regmask=[x6] minReg=1 last wt=100.00> BB01 regmask=[x7] minReg=1 last wt=100.00> BB01 regmask=[x8] minReg=1 last wt=100.00> BB01 regmask=[x9] minReg=1 last wt=100.00> BB01 regmask=[x10] minReg=1 last wt=100.00> BB01 regmask=[x11] minReg=1 last wt=100.00> BB01 regmask=[x12] minReg=1 last wt=100.00> BB01 regmask=[x13] minReg=1 last wt=100.00> BB01 regmask=[x14] minReg=1 last wt=100.00> BB01 regmask=[x15] minReg=1 last wt=100.00> BB01 regmask=[xip0] minReg=1 last wt=100.00> BB01 regmask=[xip1] minReg=1 last wt=100.00> BB01 regmask=[lr] minReg=1 last wt=100.00> BB01 regmask=[d0] minReg=1 last wt=100.00> BB01 regmask=[d1] minReg=1 last wt=100.00> BB01 regmask=[d2] minReg=1 last wt=100.00> BB01 regmask=[d3] minReg=1 last wt=100.00> BB01 regmask=[d4] minReg=1 last wt=100.00> BB01 regmask=[d5] minReg=1 last wt=100.00> BB01 regmask=[d6] minReg=1 last wt=100.00> BB01 regmask=[d7] minReg=1 last wt=100.00> BB01 regmask=[d16] minReg=1 last wt=100.00> BB01 regmask=[d17] minReg=1 last wt=100.00> BB01 regmask=[d18] minReg=1 last wt=100.00> BB01 regmask=[d19] minReg=1 last wt=100.00> BB01 regmask=[d20] minReg=1 last wt=100.00> BB01 regmask=[d21] minReg=1 last wt=100.00> BB01 regmask=[d22] minReg=1 last wt=100.00> BB01 regmask=[d23] minReg=1 last wt=100.00> BB01 regmask=[d24] minReg=1 last wt=100.00> BB01 regmask=[d25] minReg=1 last wt=100.00> BB01 regmask=[d26] minReg=1 last wt=100.00> BB01 regmask=[d27] minReg=1 last wt=100.00> BB01 regmask=[d28] minReg=1 last wt=100.00> BB01 regmask=[d29] minReg=1 last wt=100.00> BB01 regmask=[d30] minReg=1 last wt=100.00> BB01 regmask=[d31] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> IND BB03 regmask=[allFloat] minReg=1 wt=400.00> BB03 regmask=[allFloat] minReg=1 last wt=100.00> CNS_INT BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> CNS_INT BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> CALL BB03 regmask=[x0] minReg=1 last fixed local wt=400.00> SIMD BB03 regmask=[allFloat] minReg=1 wt=400.00> BB03 regmask=[allFloat] minReg=1 last wt=100.00> CNS_INT BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> IND BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> LCL_VAR_ADDR BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> BB03 regmask=[allFloat] minReg=1 last wt=100.00> STORE_LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> BB03 regmask=[allFloat] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[allFloat] minReg=1 last wt=400.00> LCL_VAR_ADDR BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> LCL_VAR_ADDR BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> CALL BB03 regmask=[x0] minReg=1 fixed wt=400.00> BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> CAST BB03 regmask=[x0-xip0 x19-x28] minReg=1 wt=400.00> BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=100.00> LCL_VAR BB04 regmask=[x0] minReg=1 wt=400.00> BB04 regmask=[x0] minReg=1 wt=100.00> BB04 regmask=[x0] minReg=1 last fixed wt=100.00> VAR REFPOSITIONS BEFORE ALLOCATION --- V00 (Interval 0) BB00 regmask=[x0] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=300.00> --- V01 --- V02 --- V03 --- V04 (Interval 1) STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> --- V05 (Interval 2) STORE_LCL_VAR BB01 regmask=[x0-xip0 x19-x28] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x1] minReg=1 fixed wt=600.00> LCL_VAR BB03 regmask=[x0-xip0 x19-x28] minReg=1 last wt=600.00> --- V06 --- V07 (Interval 3) STORE_LCL_VAR BB03 regmask=[allFloat] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[allFloat] minReg=1 last wt=400.00> --- V08 --- V09 --- V10 --- V11 --- V12 --- V13 --- V14 --- V15 --- V16 Allocating Registers -------------------- The following table has one or more rows for each RefPosition that is handled during allocation. The first column provides the basic information about the RefPosition, with its type (e.g. Def, Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the action taken during allocation (e.g. Alloc a new register, or Keep an existing one). The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is active, a 'p' if it is a large vector that has been partially spilled, and 'i'if it is inactive. Columns are only printed up to the last modifed register, which may increase during allocation, in which case additional columns will appear. Registers which are not marked modified have ---- in their column. -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ |V0 a| | | | | | | | | | | | | | | 0.#0 V0 Parm ORDER(A) x19 | | | | | | | | |V0 a| | | | | | | 1.#1 BB1 PredBB0 | | | | | | | | |V0 a| | | | | | | 6.#2 C5 Def Alloc x0 |C5 a| | | | | | | |V0 a| | | | | | | 7.#3 x0 Fixd Keep x0 |C5 a| | | | | | | |V0 a| | | | | | | 7.#4 C5 Use * Keep x0 |C5 a| | | | | | | |V0 a| | | | | | | 8.#5 x0 Fixd Keep x0 | | | | | | | | |V0 a| | | | | | | 8.#6 I6 Def Alloc x0 |I6 a| | | | | | | |V0 a| | | | | | | 9.#7 x0 Fixd Keep x0 |I6 a| | | | | | | |V0 a| | | | | | | 9.#8 I6 Use * Keep x0 |I6 a| | | | | | | |V0 a| | | | | | | 10.#9 x0 Kill Keep x0 | | | | | | | | |V0 a| | | | | | | 10.#10 x1 Kill Keep x1 | | | | | | | | |V0 a| | | | | | | 10.#11 x2 Kill Keep x2 | | | | | | | | |V0 a| | | | | | | 10.#12 x3 Kill Keep x3 | | | | | | | | |V0 a| | | | | | | 10.#13 x4 Kill Keep x4 | | | | | | | | |V0 a| | | | | | | 10.#14 x5 Kill Keep x5 | | | | | | | | |V0 a| | | | | | | 10.#15 x6 Kill Keep x6 | | | | | | | | |V0 a| | | | | | | 10.#16 x7 Kill Keep x7 | | | | | | | | |V0 a| | | | | | | 10.#17 x8 Kill Keep x8 | | | | | | | | |V0 a| | | | | | | 10.#18 x9 Kill Keep x9 | | | | | | | | |V0 a| | | | | | | 10.#19 x10 Kill Keep x10 | | | | | | | | |V0 a| | | | | | | 10.#20 x11 Kill Keep x11 | | | | | | | | |V0 a| | | | | | | 10.#21 x12 Kill Keep x12 | | | | | | | | |V0 a| | | | | | | 10.#22 x13 Kill Keep x13 | | | | | | | | |V0 a| | | | | | | 10.#23 x14 Kill Keep x14 | | | | | | | | |V0 a| | | | | | | 10.#24 x15 Kill Keep x15 | | | | | | | | |V0 a| | | | | | | 10.#25 xip0 Kill Keep xip0 | | | | | | | | |V0 a| | | | | | | 10.#26 xip1 Kill Keep xip1 | | | | | | | | |V0 a| | | | | | | 10.#27 lr Kill Keep lr | | | | | | | | |V0 a| | | | | | | 10.#28 d0 Kill Keep d0 | | | | | | | | |V0 a| | | | | | | 10.#29 d1 Kill Keep d1 | | | | | | | | |V0 a| | | | | | | 10.#30 d2 Kill Keep d2 | | | | | | | | |V0 a| | | | | | | 10.#31 d3 Kill Keep d3 | | | | | | | | |V0 a| | | | | | | 10.#32 d4 Kill Keep d4 | | | | | | | | |V0 a| | | | | | | 10.#33 d5 Kill Keep d5 | | | | | | | | |V0 a| | | | | | | 10.#34 d6 Kill Keep d6 | | | | | | | | |V0 a| | | | | | | 10.#35 d7 Kill Keep d7 | | | | | | | | |V0 a| | | | | | | 10.#36 d16 Kill Keep d16 | | | | | | | | |V0 a| | | | | | | 10.#37 d17 Kill Keep d17 | | | | | | | | |V0 a| | | | | | | 10.#38 d18 Kill Keep d18 | | | | | | | | |V0 a| | | | | | | 10.#39 d19 Kill Keep d19 | | | | | | | | |V0 a| | | | | | | 10.#40 d20 Kill Keep d20 | | | | | | | | |V0 a| | | | | | | 10.#41 d21 Kill Keep d21 | | | | | | | | |V0 a| | | | | | | 10.#42 d22 Kill Keep d22 | | | | | | | | |V0 a| | | | | | | 10.#43 d23 Kill Keep d23 | | | | | | | | |V0 a| | | | | | | 10.#44 d24 Kill Keep d24 | | | | | | | | |V0 a| | | | | | | 10.#45 d25 Kill Keep d25 | | | | | | | | |V0 a| | | | | | | 10.#46 d26 Kill Keep d26 | | | | | | | | |V0 a| | | | | | | 10.#47 d27 Kill Keep d27 | | | | | | | | |V0 a| | | | | | | 10.#48 d28 Kill Keep d28 | | | | | | | | |V0 a| | | | | | | 10.#49 d29 Kill Keep d29 | | | | | | | | |V0 a| | | | | | | 10.#50 d30 Kill Keep d30 | | | | | | | | |V0 a| | | | | | | 10.#51 d31 Kill Keep d31 | | | | | | | | |V0 a| | | | | | | 10.#52 x0 Fixd Keep x0 | | | | | | | | |V0 a| | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 10.#53 I7 Def Alloc x0 |I7 a| | | | | | | |V0 a| | | | | | | 11.#54 I7 Use * Keep x0 |I7 a| | | | | | | |V0 a| | | | | | | 12.#55 V4 Def ORDER(A) x20 | | | | | | | | |V0 a|V4 a| | | | | | 19.#56 V4 Use Keep x20 | | | | | | | | |V0 a|V4 a| | | | | | 19.#57 V0 Use * Keep x19 | | | | | | | | |V0 a|V4 a| | | | | | 23.#58 V4 Use * Keep x20 | | | | | | | | | |V4 a| | | | | | 24.#59 V5 Def COVRS(A) x20 | | | | | | | | | |V5 a| | | | | | 27.#60 x1 Fixd Keep x1 | | | | | | | | | |V5 a| | | | | | 27.#61 V5 Use Copy x1 | |V5 a| | | | | | | |V5 a| | | | | | 28.#62 x1 Fixd Keep x1 | |V5 a| | | | | | | |V5 a| | | | | | 28.#63 I8 Def Alloc x1 | |I8 a| | | | | | | |V5 a| | | | | | 30.#64 C9 Def Alloc x0 |C9 a|I8 a| | | | | | | |V5 a| | | | | | 31.#65 x0 Fixd Keep x0 |C9 a|I8 a| | | | | | | |V5 a| | | | | | 31.#66 C9 Use * Keep x0 |C9 a|I8 a| | | | | | | |V5 a| | | | | | 32.#67 x0 Fixd Keep x0 | |I8 a| | | | | | | |V5 a| | | | | | 32.#68 I10 Def Alloc x0 |I10a|I8 a| | | | | | | |V5 a| | | | | | 33.#69 x1 Fixd Keep x1 |I10a|I8 a| | | | | | | |V5 a| | | | | | 33.#70 I8 Use * Keep x1 |I10a|I8 a| | | | | | | |V5 a| | | | | | 33.#71 x0 Fixd Keep x0 |I10a|I8 a| | | | | | | |V5 a| | | | | | 33.#72 I10 Use * Keep x0 |I10a|I8 a| | | | | | | |V5 a| | | | | | 34.#73 x0 Kill Keep x0 | | | | | | | | | |V5 a| | | | | | 34.#74 x1 Kill Keep x1 | | | | | | | | | |V5 a| | | | | | 34.#75 x2 Kill Keep x2 | | | | | | | | | |V5 a| | | | | | 34.#76 x3 Kill Keep x3 | | | | | | | | | |V5 a| | | | | | 34.#77 x4 Kill Keep x4 | | | | | | | | | |V5 a| | | | | | 34.#78 x5 Kill Keep x5 | | | | | | | | | |V5 a| | | | | | 34.#79 x6 Kill Keep x6 | | | | | | | | | |V5 a| | | | | | 34.#80 x7 Kill Keep x7 | | | | | | | | | |V5 a| | | | | | 34.#81 x8 Kill Keep x8 | | | | | | | | | |V5 a| | | | | | 34.#82 x9 Kill Keep x9 | | | | | | | | | |V5 a| | | | | | 34.#83 x10 Kill Keep x10 | | | | | | | | | |V5 a| | | | | | 34.#84 x11 Kill Keep x11 | | | | | | | | | |V5 a| | | | | | 34.#85 x12 Kill Keep x12 | | | | | | | | | |V5 a| | | | | | 34.#86 x13 Kill Keep x13 | | | | | | | | | |V5 a| | | | | | 34.#87 x14 Kill Keep x14 | | | | | | | | | |V5 a| | | | | | 34.#88 x15 Kill Keep x15 | | | | | | | | | |V5 a| | | | | | 34.#89 xip0 Kill Keep xip0 | | | | | | | | | |V5 a| | | | | | 34.#90 xip1 Kill Keep xip1 | | | | | | | | | |V5 a| | | | | | 34.#91 lr Kill Keep lr | | | | | | | | | |V5 a| | | | | | 34.#92 d0 Kill Keep d0 | | | | | | | | | |V5 a| | | | | | 34.#93 d1 Kill Keep d1 | | | | | | | | | |V5 a| | | | | | 34.#94 d2 Kill Keep d2 | | | | | | | | | |V5 a| | | | | | 34.#95 d3 Kill Keep d3 | | | | | | | | | |V5 a| | | | | | 34.#96 d4 Kill Keep d4 | | | | | | | | | |V5 a| | | | | | 34.#97 d5 Kill Keep d5 | | | | | | | | | |V5 a| | | | | | 34.#98 d6 Kill Keep d6 | | | | | | | | | |V5 a| | | | | | 34.#99 d7 Kill Keep d7 | | | | | | | | | |V5 a| | | | | | 34.#100 d16 Kill Keep d16 | | | | | | | | | |V5 a| | | | | | 34.#101 d17 Kill Keep d17 | | | | | | | | | |V5 a| | | | | | 34.#102 d18 Kill Keep d18 | | | | | | | | | |V5 a| | | | | | 34.#103 d19 Kill Keep d19 | | | | | | | | | |V5 a| | | | | | 34.#104 d20 Kill Keep d20 | | | | | | | | | |V5 a| | | | | | 34.#105 d21 Kill Keep d21 | | | | | | | | | |V5 a| | | | | | 34.#106 d22 Kill Keep d22 | | | | | | | | | |V5 a| | | | | | 34.#107 d23 Kill Keep d23 | | | | | | | | | |V5 a| | | | | | 34.#108 d24 Kill Keep d24 | | | | | | | | | |V5 a| | | | | | 34.#109 d25 Kill Keep d25 | | | | | | | | | |V5 a| | | | | | 34.#110 d26 Kill Keep d26 | | | | | | | | | |V5 a| | | | | | 34.#111 d27 Kill Keep d27 | | | | | | | | | |V5 a| | | | | | 34.#112 d28 Kill Keep d28 | | | | | | | | | |V5 a| | | | | | 34.#113 d29 Kill Keep d29 | | | | | | | | | |V5 a| | | | | | 34.#114 d30 Kill Keep d30 | | | | | | | | | |V5 a| | | | | | 34.#115 d31 Kill Keep d31 | | | | | | | | | |V5 a| | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 35.#116 BB3 PredBB1 | | | | | | | | | |V5 a| | | | | | 41.#117 V5 Use * Keep x20 | | | | | | | | | |V5 a| | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 42.#118 I11 Def ORDER(A) d16 | | | | | | | | | | | | | | | |I11a| 45.#119 I11 Use * Keep d16 | | | | | | | | | | | | | | | |I11a| 48.#120 C12 Def Alloc x0 |C12a| | | | | | | | | | | | | | | | 49.#121 x0 Fixd Keep x0 |C12a| | | | | | | | | | | | | | | | 49.#122 C12 Use * Keep x0 |C12a| | | | | | | | | | | | | | | | 50.#123 x0 Fixd Keep x0 | | | | | | | | | | | | | | | | | 50.#124 I13 Def Alloc x0 |I13a| | | | | | | | | | | | | | | | 52.#125 C14 Def Alloc x1 |I13a|C14a| | | | | | | | | | | | | | | 53.#126 x1 Fixd Keep x1 |I13a|C14a| | | | | | | | | | | | | | | 53.#127 C14 Use * Keep x1 |I13a|C14a| | | | | | | | | | | | | | | 54.#128 x1 Fixd Keep x1 |I13a| | | | | | | | | | | | | | | | 54.#129 I15 Def Alloc x1 |I13a|I15a| | | | | | | | | | | | | | | 55.#130 x0 Fixd Keep x0 |I13a|I15a| | | | | | | | | | | | | | | 55.#131 I13 Use * Keep x0 |I13a|I15a| | | | | | | | | | | | | | | 55.#132 x1 Fixd Keep x1 |I13a|I15a| | | | | | | | | | | | | | | 55.#133 I15 Use * Keep x1 |I13a|I15a| | | | | | | | | | | | | | | 56.#134 x0 Kill Keep x0 | | | | | | | | | | | | | | | | | 56.#135 x1 Kill Keep x1 | | | | | | | | | | | | | | | | | 56.#136 x2 Kill Keep x2 | | | | | | | | | | | | | | | | | 56.#137 x3 Kill Keep x3 | | | | | | | | | | | | | | | | | 56.#138 x4 Kill Keep x4 | | | | | | | | | | | | | | | | | 56.#139 x5 Kill Keep x5 | | | | | | | | | | | | | | | | | 56.#140 x6 Kill Keep x6 | | | | | | | | | | | | | | | | | 56.#141 x7 Kill Keep x7 | | | | | | | | | | | | | | | | | 56.#142 x8 Kill Keep x8 | | | | | | | | | | | | | | | | | 56.#143 x9 Kill Keep x9 | | | | | | | | | | | | | | | | | 56.#144 x10 Kill Keep x10 | | | | | | | | | | | | | | | | | 56.#145 x11 Kill Keep x11 | | | | | | | | | | | | | | | | | 56.#146 x12 Kill Keep x12 | | | | | | | | | | | | | | | | | 56.#147 x13 Kill Keep x13 | | | | | | | | | | | | | | | | | 56.#148 x14 Kill Keep x14 | | | | | | | | | | | | | | | | | 56.#149 x15 Kill Keep x15 | | | | | | | | | | | | | | | | | 56.#150 xip0 Kill Keep xip0 | | | | | | | | | | | | | | | | | 56.#151 xip1 Kill Keep xip1 | | | | | | | | | | | | | | | | | 56.#152 lr Kill Keep lr | | | | | | | | | | | | | | | | | 56.#153 d0 Kill Keep d0 | | | | | | | | | | | | | | | | | 56.#154 d1 Kill Keep d1 | | | | | | | | | | | | | | | | | 56.#155 d2 Kill Keep d2 | | | | | | | | | | | | | | | | | 56.#156 d3 Kill Keep d3 | | | | | | | | | | | | | | | | | 56.#157 d4 Kill Keep d4 | | | | | | | | | | | | | | | | | 56.#158 d5 Kill Keep d5 | | | | | | | | | | | | | | | | | 56.#159 d6 Kill Keep d6 | | | | | | | | | | | | | | | | | 56.#160 d7 Kill Keep d7 | | | | | | | | | | | | | | | | | 56.#161 d16 Kill Keep d16 | | | | | | | | | | | | | | | | | 56.#162 d17 Kill Keep d17 | | | | | | | | | | | | | | | | | 56.#163 d18 Kill Keep d18 | | | | | | | | | | | | | | | | | 56.#164 d19 Kill Keep d19 | | | | | | | | | | | | | | | | | 56.#165 d20 Kill Keep d20 | | | | | | | | | | | | | | | | | 56.#166 d21 Kill Keep d21 | | | | | | | | | | | | | | | | | 56.#167 d22 Kill Keep d22 | | | | | | | | | | | | | | | | | 56.#168 d23 Kill Keep d23 | | | | | | | | | | | | | | | | | 56.#169 d24 Kill Keep d24 | | | | | | | | | | | | | | | | | 56.#170 d25 Kill Keep d25 | | | | | | | | | | | | | | | | | 56.#171 d26 Kill Keep d26 | | | | | | | | | | | | | | | | | 56.#172 d27 Kill Keep d27 | | | | | | | | | | | | | | | | | 56.#173 d28 Kill Keep d28 | | | | | | | | | | | | | | | | | 56.#174 d29 Kill Keep d29 | | | | | | | | | | | | | | | | | 56.#175 d30 Kill Keep d30 | | | | | | | | | | | | | | | | | 56.#176 d31 Kill Keep d31 | | | | | | | | | | | | | | | | | 56.#177 x0 Fixd Keep x0 | | | | | | | | | | | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 56.#178 I16 Def * Alloc x0 |I16a| | | | | | | | | | | | | | | | 60.#179 I17 Def ORDER(A) d16 | | | | | | | | | | | | | | | |I17a| 61.#180 I17 Use * Keep d16 | | | | | | | | | | | | | | | |I17a| 64.#181 C18 Def BSFIT(A) x1 | |C18a| | | | | | | | | | | | | | | 65.#182 C18 Use * Keep x1 | |C18a| | | | | | | | | | | | | | | 66.#183 I19 Def Alloc x1 | |I19a| | | | | | | | | | | | | | | 67.#184 x1 Fixd Keep x1 | |I19a| | | | | | | | | | | | | | | 67.#185 I19 Use * Keep x1 | |I19a| | | | | | | | | | | | | | | 68.#186 x1 Fixd Keep x1 | | | | | | | | | | | | | | | | | 68.#187 I20 Def Alloc x1 | |I20a| | | | | | | | | | | | | | | 70.#188 I21 Def Alloc x0 |I21a|I20a| | | | | | | | | | | | | | | 71.#189 x0 Fixd Keep x0 |I21a|I20a| | | | | | | | | | | | | | | 71.#190 I21 Use * Keep x0 |I21a|I20a| | | | | | | | | | | | | | | 72.#191 x0 Fixd Keep x0 | |I20a| | | | | | | | | | | | | | | 72.#192 I22 Def Alloc x0 |I22a|I20a| | | | | | | | | | | | | | | 73.#193 x1 Fixd Keep x1 |I22a|I20a| | | | | | | | | | | | | | | 73.#194 I20 Use * Keep x1 |I22a|I20a| | | | | | | | | | | | | | | 73.#195 x0 Fixd Keep x0 |I22a|I20a| | | | | | | | | | | | | | | 73.#196 I22 Use * Keep x0 |I22a|I20a| | | | | | | | | | | | | | | 74.#197 x0 Kill Keep x0 | | | | | | | | | | | | | | | | | 74.#198 x1 Kill Keep x1 | | | | | | | | | | | | | | | | | 74.#199 x2 Kill Keep x2 | | | | | | | | | | | | | | | | | 74.#200 x3 Kill Keep x3 | | | | | | | | | | | | | | | | | 74.#201 x4 Kill Keep x4 | | | | | | | | | | | | | | | | | 74.#202 x5 Kill Keep x5 | | | | | | | | | | | | | | | | | 74.#203 x6 Kill Keep x6 | | | | | | | | | | | | | | | | | 74.#204 x7 Kill Keep x7 | | | | | | | | | | | | | | | | | 74.#205 x8 Kill Keep x8 | | | | | | | | | | | | | | | | | 74.#206 x9 Kill Keep x9 | | | | | | | | | | | | | | | | | 74.#207 x10 Kill Keep x10 | | | | | | | | | | | | | | | | | 74.#208 x11 Kill Keep x11 | | | | | | | | | | | | | | | | | 74.#209 x12 Kill Keep x12 | | | | | | | | | | | | | | | | | 74.#210 x13 Kill Keep x13 | | | | | | | | | | | | | | | | | 74.#211 x14 Kill Keep x14 | | | | | | | | | | | | | | | | | 74.#212 x15 Kill Keep x15 | | | | | | | | | | | | | | | | | 74.#213 xip0 Kill Keep xip0 | | | | | | | | | | | | | | | | | 74.#214 xip1 Kill Keep xip1 | | | | | | | | | | | | | | | | | 74.#215 lr Kill Keep lr | | | | | | | | | | | | | | | | | 74.#216 d0 Kill Keep d0 | | | | | | | | | | | | | | | | | 74.#217 d1 Kill Keep d1 | | | | | | | | | | | | | | | | | 74.#218 d2 Kill Keep d2 | | | | | | | | | | | | | | | | | 74.#219 d3 Kill Keep d3 | | | | | | | | | | | | | | | | | 74.#220 d4 Kill Keep d4 | | | | | | | | | | | | | | | | | 74.#221 d5 Kill Keep d5 | | | | | | | | | | | | | | | | | 74.#222 d6 Kill Keep d6 | | | | | | | | | | | | | | | | | 74.#223 d7 Kill Keep d7 | | | | | | | | | | | | | | | | | 74.#224 d16 Kill Keep d16 | | | | | | | | | | | | | | | | | 74.#225 d17 Kill Keep d17 | | | | | | | | | | | | | | | | | 74.#226 d18 Kill Keep d18 | | | | | | | | | | | | | | | | | 74.#227 d19 Kill Keep d19 | | | | | | | | | | | | | | | | | 74.#228 d20 Kill Keep d20 | | | | | | | | | | | | | | | | | 74.#229 d21 Kill Keep d21 | | | | | | | | | | | | | | | | | 74.#230 d22 Kill Keep d22 | | | | | | | | | | | | | | | | | 74.#231 d23 Kill Keep d23 | | | | | | | | | | | | | | | | | 74.#232 d24 Kill Keep d24 | | | | | | | | | | | | | | | | | 74.#233 d25 Kill Keep d25 | | | | | | | | | | | | | | | | | 74.#234 d26 Kill Keep d26 | | | | | | | | | | | | | | | | | 74.#235 d27 Kill Keep d27 | | | | | | | | | | | | | | | | | 74.#236 d28 Kill Keep d28 | | | | | | | | | | | | | | | | | 74.#237 d29 Kill Keep d29 | | | | | | | | | | | | | | | | | 74.#238 d30 Kill Keep d30 | | | | | | | | | | | | | | | | | 74.#239 d31 Kill Keep d31 | | | | | | | | | | | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 76.#240 I23 Def ORDER(A) d16 | | | | | | | | | | | | | | | |I23a| 77.#241 I23 Use * Keep d16 | | | | | | | | | | | | | | | |I23a| 78.#242 V7 Def COVRS(A) d16 | | | | | | | | | | | | | | | |V7 a| -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 80.#243 I24 Def ORDER(A) d17 | | | | | | | | | | | | | | | |V7 a|I24a| 81.#244 I24 Use * Keep d17 | | | | | | | | | | | | | | | |V7 a|I24a| 85.#245 V7 Use * Keep d16 | | | | | | | | | | | | | | | |V7 a| | 88.#246 I25 Def Alloc x0 |I25a| | | | | | | | | | | | | | | | | 89.#247 x0 Fixd Keep x0 |I25a| | | | | | | | | | | | | | | | | 89.#248 I25 Use * Keep x0 |I25a| | | | | | | | | | | | | | | | | 90.#249 x0 Fixd Keep x0 | | | | | | | | | | | | | | | | | | 90.#250 I26 Def Alloc x0 |I26a| | | | | | | | | | | | | | | | | 92.#251 I27 Def Alloc x1 |I26a|I27a| | | | | | | | | | | | | | | | 93.#252 x1 Fixd Keep x1 |I26a|I27a| | | | | | | | | | | | | | | | 93.#253 I27 Use * Keep x1 |I26a|I27a| | | | | | | | | | | | | | | | 94.#254 x1 Fixd Keep x1 |I26a| | | | | | | | | | | | | | | | | 94.#255 I28 Def Alloc x1 |I26a|I28a| | | | | | | | | | | | | | | | 95.#256 x0 Fixd Keep x0 |I26a|I28a| | | | | | | | | | | | | | | | 95.#257 I26 Use * Keep x0 |I26a|I28a| | | | | | | | | | | | | | | | 95.#258 x1 Fixd Keep x1 |I26a|I28a| | | | | | | | | | | | | | | | 95.#259 I28 Use * Keep x1 |I26a|I28a| | | | | | | | | | | | | | | | 96.#260 x0 Kill Keep x0 | | | | | | | | | | | | | | | | | | 96.#261 x1 Kill Keep x1 | | | | | | | | | | | | | | | | | | 96.#262 x2 Kill Keep x2 | | | | | | | | | | | | | | | | | | 96.#263 x3 Kill Keep x3 | | | | | | | | | | | | | | | | | | 96.#264 x4 Kill Keep x4 | | | | | | | | | | | | | | | | | | 96.#265 x5 Kill Keep x5 | | | | | | | | | | | | | | | | | | 96.#266 x6 Kill Keep x6 | | | | | | | | | | | | | | | | | | 96.#267 x7 Kill Keep x7 | | | | | | | | | | | | | | | | | | 96.#268 x8 Kill Keep x8 | | | | | | | | | | | | | | | | | | 96.#269 x9 Kill Keep x9 | | | | | | | | | | | | | | | | | | 96.#270 x10 Kill Keep x10 | | | | | | | | | | | | | | | | | | 96.#271 x11 Kill Keep x11 | | | | | | | | | | | | | | | | | | 96.#272 x12 Kill Keep x12 | | | | | | | | | | | | | | | | | | 96.#273 x13 Kill Keep x13 | | | | | | | | | | | | | | | | | | 96.#274 x14 Kill Keep x14 | | | | | | | | | | | | | | | | | | 96.#275 x15 Kill Keep x15 | | | | | | | | | | | | | | | | | | 96.#276 xip0 Kill Keep xip0 | | | | | | | | | | | | | | | | | | 96.#277 xip1 Kill Keep xip1 | | | | | | | | | | | | | | | | | | 96.#278 lr Kill Keep lr | | | | | | | | | | | | | | | | | | 96.#279 d0 Kill Keep d0 | | | | | | | | | | | | | | | | | | 96.#280 d1 Kill Keep d1 | | | | | | | | | | | | | | | | | | 96.#281 d2 Kill Keep d2 | | | | | | | | | | | | | | | | | | 96.#282 d3 Kill Keep d3 | | | | | | | | | | | | | | | | | | 96.#283 d4 Kill Keep d4 | | | | | | | | | | | | | | | | | | 96.#284 d5 Kill Keep d5 | | | | | | | | | | | | | | | | | | 96.#285 d6 Kill Keep d6 | | | | | | | | | | | | | | | | | | 96.#286 d7 Kill Keep d7 | | | | | | | | | | | | | | | | | | 96.#287 d16 Kill Keep d16 | | | | | | | | | | | | | | | | | | 96.#288 d17 Kill Keep d17 | | | | | | | | | | | | | | | | | | 96.#289 d18 Kill Keep d18 | | | | | | | | | | | | | | | | | | 96.#290 d19 Kill Keep d19 | | | | | | | | | | | | | | | | | | 96.#291 d20 Kill Keep d20 | | | | | | | | | | | | | | | | | | 96.#292 d21 Kill Keep d21 | | | | | | | | | | | | | | | | | | 96.#293 d22 Kill Keep d22 | | | | | | | | | | | | | | | | | | 96.#294 d23 Kill Keep d23 | | | | | | | | | | | | | | | | | | 96.#295 d24 Kill Keep d24 | | | | | | | | | | | | | | | | | | 96.#296 d25 Kill Keep d25 | | | | | | | | | | | | | | | | | | 96.#297 d26 Kill Keep d26 | | | | | | | | | | | | | | | | | | 96.#298 d27 Kill Keep d27 | | | | | | | | | | | | | | | | | | 96.#299 d28 Kill Keep d28 | | | | | | | | | | | | | | | | | | 96.#300 d29 Kill Keep d29 | | | | | | | | | | | | | | | | | | 96.#301 d30 Kill Keep d30 | | | | | | | | | | | | | | | | | | 96.#302 d31 Kill Keep d31 | | | | | | | | | | | | | | | | | | 96.#303 x0 Fixd Keep x0 | | | | | | | | | | | | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 96.#304 I29 Def Alloc x0 |I29a| | | | | | | | | | | | | | | | | 97.#305 I29 Use * Keep x0 |I29a| | | | | | | | | | | | | | | | | 98.#306 I30 Def BSFIT(A) x0 |I30a| | | | | | | | | | | | | | | | | 99.#307 I30 Use * Keep x0 |I30a| | | | | | | | | | | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 101.#308 BB4 PredBB3 | | | | | | | | | | | | | | | | | | 106.#309 I31 Def Alloc x0 |I31a| | | | | | | | | | | | | | | | | 107.#310 x0 Fixd Keep x0 |I31a| | | | | | | | | | | | | | | | | 107.#311 I31 Use * Keep x0 |I31a| | | | | | | | | | | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 109.#312 BB5 PredBB0 | | | | | | | | | | | | | | | | | | 115.#313 END | | | | | | | | | | | | | | | | | | ------------ REFPOSITIONS AFTER ALLOCATION: ------------ BB00 regmask=[x19] minReg=1 regOptional wt=100.00> CNS_INT BB01 regmask=[x0] minReg=1 wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 last wt=100.00> BB01 regmask=[x1] minReg=1 last wt=100.00> BB01 regmask=[x2] minReg=1 last wt=100.00> BB01 regmask=[x3] minReg=1 last wt=100.00> BB01 regmask=[x4] minReg=1 last wt=100.00> BB01 regmask=[x5] minReg=1 last wt=100.00> BB01 regmask=[x6] minReg=1 last wt=100.00> BB01 regmask=[x7] minReg=1 last wt=100.00> BB01 regmask=[x8] minReg=1 last wt=100.00> BB01 regmask=[x9] minReg=1 last wt=100.00> BB01 regmask=[x10] minReg=1 last wt=100.00> BB01 regmask=[x11] minReg=1 last wt=100.00> BB01 regmask=[x12] minReg=1 last wt=100.00> BB01 regmask=[x13] minReg=1 last wt=100.00> BB01 regmask=[x14] minReg=1 last wt=100.00> BB01 regmask=[x15] minReg=1 last wt=100.00> BB01 regmask=[xip0] minReg=1 last wt=100.00> BB01 regmask=[xip1] minReg=1 last wt=100.00> BB01 regmask=[lr] minReg=1 last wt=100.00> BB01 regmask=[d0] minReg=1 last wt=100.00> BB01 regmask=[d1] minReg=1 last wt=100.00> BB01 regmask=[d2] minReg=1 last wt=100.00> BB01 regmask=[d3] minReg=1 last wt=100.00> BB01 regmask=[d4] minReg=1 last wt=100.00> BB01 regmask=[d5] minReg=1 last wt=100.00> BB01 regmask=[d6] minReg=1 last wt=100.00> BB01 regmask=[d7] minReg=1 last wt=100.00> BB01 regmask=[d16] minReg=1 last wt=100.00> BB01 regmask=[d17] minReg=1 last wt=100.00> BB01 regmask=[d18] minReg=1 last wt=100.00> BB01 regmask=[d19] minReg=1 last wt=100.00> BB01 regmask=[d20] minReg=1 last wt=100.00> BB01 regmask=[d21] minReg=1 last wt=100.00> BB01 regmask=[d22] minReg=1 last wt=100.00> BB01 regmask=[d23] minReg=1 last wt=100.00> BB01 regmask=[d24] minReg=1 last wt=100.00> BB01 regmask=[d25] minReg=1 last wt=100.00> BB01 regmask=[d26] minReg=1 last wt=100.00> BB01 regmask=[d27] minReg=1 last wt=100.00> BB01 regmask=[d28] minReg=1 last wt=100.00> BB01 regmask=[d29] minReg=1 last wt=100.00> BB01 regmask=[d30] minReg=1 last wt=100.00> BB01 regmask=[d31] minReg=1 last wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> CALL BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x0] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[x20] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x20] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x19] minReg=1 last wt=300.00> LCL_VAR BB01 regmask=[x20] minReg=1 last wt=600.00> STORE_LCL_VAR BB01 regmask=[x20] minReg=1 wt=600.00> BB01 regmask=[x1] minReg=1 wt=100.00> LCL_VAR BB01 regmask=[x1] minReg=1 copy fixed wt=600.00> BB01 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x1] minReg=1 fixed wt=400.00> CNS_INT BB01 regmask=[x0] minReg=1 wt=400.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB01 regmask=[x0] minReg=1 fixed wt=400.00> BB01 regmask=[x1] minReg=1 wt=100.00> BB01 regmask=[x1] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 wt=100.00> BB01 regmask=[x0] minReg=1 last fixed wt=100.00> BB01 regmask=[x0] minReg=1 last wt=100.00> BB01 regmask=[x1] minReg=1 last wt=100.00> BB01 regmask=[x2] minReg=1 last wt=100.00> BB01 regmask=[x3] minReg=1 last wt=100.00> BB01 regmask=[x4] minReg=1 last wt=100.00> BB01 regmask=[x5] minReg=1 last wt=100.00> BB01 regmask=[x6] minReg=1 last wt=100.00> BB01 regmask=[x7] minReg=1 last wt=100.00> BB01 regmask=[x8] minReg=1 last wt=100.00> BB01 regmask=[x9] minReg=1 last wt=100.00> BB01 regmask=[x10] minReg=1 last wt=100.00> BB01 regmask=[x11] minReg=1 last wt=100.00> BB01 regmask=[x12] minReg=1 last wt=100.00> BB01 regmask=[x13] minReg=1 last wt=100.00> BB01 regmask=[x14] minReg=1 last wt=100.00> BB01 regmask=[x15] minReg=1 last wt=100.00> BB01 regmask=[xip0] minReg=1 last wt=100.00> BB01 regmask=[xip1] minReg=1 last wt=100.00> BB01 regmask=[lr] minReg=1 last wt=100.00> BB01 regmask=[d0] minReg=1 last wt=100.00> BB01 regmask=[d1] minReg=1 last wt=100.00> BB01 regmask=[d2] minReg=1 last wt=100.00> BB01 regmask=[d3] minReg=1 last wt=100.00> BB01 regmask=[d4] minReg=1 last wt=100.00> BB01 regmask=[d5] minReg=1 last wt=100.00> BB01 regmask=[d6] minReg=1 last wt=100.00> BB01 regmask=[d7] minReg=1 last wt=100.00> BB01 regmask=[d16] minReg=1 last wt=100.00> BB01 regmask=[d17] minReg=1 last wt=100.00> BB01 regmask=[d18] minReg=1 last wt=100.00> BB01 regmask=[d19] minReg=1 last wt=100.00> BB01 regmask=[d20] minReg=1 last wt=100.00> BB01 regmask=[d21] minReg=1 last wt=100.00> BB01 regmask=[d22] minReg=1 last wt=100.00> BB01 regmask=[d23] minReg=1 last wt=100.00> BB01 regmask=[d24] minReg=1 last wt=100.00> BB01 regmask=[d25] minReg=1 last wt=100.00> BB01 regmask=[d26] minReg=1 last wt=100.00> BB01 regmask=[d27] minReg=1 last wt=100.00> BB01 regmask=[d28] minReg=1 last wt=100.00> BB01 regmask=[d29] minReg=1 last wt=100.00> BB01 regmask=[d30] minReg=1 last wt=100.00> BB01 regmask=[d31] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[x20] minReg=1 last wt=600.00> IND BB03 regmask=[d16] minReg=1 wt=400.00> BB03 regmask=[d16] minReg=1 last wt=100.00> CNS_INT BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> CNS_INT BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> CALL BB03 regmask=[x0] minReg=1 last fixed local wt=400.00> SIMD BB03 regmask=[d16] minReg=1 wt=400.00> BB03 regmask=[d16] minReg=1 last wt=100.00> CNS_INT BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 last wt=100.00> IND BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> LCL_VAR_ADDR BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[d16] minReg=1 wt=400.00> BB03 regmask=[d16] minReg=1 last wt=100.00> STORE_LCL_VAR BB03 regmask=[d16] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[d17] minReg=1 wt=400.00> BB03 regmask=[d17] minReg=1 last wt=100.00> LCL_VAR BB03 regmask=[d16] minReg=1 last wt=400.00> LCL_VAR_ADDR BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x0] minReg=1 fixed wt=400.00> LCL_VAR_ADDR BB03 regmask=[x1] minReg=1 wt=400.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> PUTARG_REG BB03 regmask=[x1] minReg=1 fixed wt=400.00> BB03 regmask=[x0] minReg=1 wt=100.00> BB03 regmask=[x0] minReg=1 last fixed wt=100.00> BB03 regmask=[x1] minReg=1 wt=100.00> BB03 regmask=[x1] minReg=1 last fixed wt=100.00> BB03 regmask=[x0] minReg=1 last wt=100.00> BB03 regmask=[x1] minReg=1 last wt=100.00> BB03 regmask=[x2] minReg=1 last wt=100.00> BB03 regmask=[x3] minReg=1 last wt=100.00> BB03 regmask=[x4] minReg=1 last wt=100.00> BB03 regmask=[x5] minReg=1 last wt=100.00> BB03 regmask=[x6] minReg=1 last wt=100.00> BB03 regmask=[x7] minReg=1 last wt=100.00> BB03 regmask=[x8] minReg=1 last wt=100.00> BB03 regmask=[x9] minReg=1 last wt=100.00> BB03 regmask=[x10] minReg=1 last wt=100.00> BB03 regmask=[x11] minReg=1 last wt=100.00> BB03 regmask=[x12] minReg=1 last wt=100.00> BB03 regmask=[x13] minReg=1 last wt=100.00> BB03 regmask=[x14] minReg=1 last wt=100.00> BB03 regmask=[x15] minReg=1 last wt=100.00> BB03 regmask=[xip0] minReg=1 last wt=100.00> BB03 regmask=[xip1] minReg=1 last wt=100.00> BB03 regmask=[lr] minReg=1 last wt=100.00> BB03 regmask=[d0] minReg=1 last wt=100.00> BB03 regmask=[d1] minReg=1 last wt=100.00> BB03 regmask=[d2] minReg=1 last wt=100.00> BB03 regmask=[d3] minReg=1 last wt=100.00> BB03 regmask=[d4] minReg=1 last wt=100.00> BB03 regmask=[d5] minReg=1 last wt=100.00> BB03 regmask=[d6] minReg=1 last wt=100.00> BB03 regmask=[d7] minReg=1 last wt=100.00> BB03 regmask=[d16] minReg=1 last wt=100.00> BB03 regmask=[d17] minReg=1 last wt=100.00> BB03 regmask=[d18] minReg=1 last wt=100.00> BB03 regmask=[d19] minReg=1 last wt=100.00> BB03 regmask=[d20] minReg=1 last wt=100.00> BB03 regmask=[d21] minReg=1 last wt=100.00> BB03 regmask=[d22] minReg=1 last wt=100.00> BB03 regmask=[d23] minReg=1 last wt=100.00> BB03 regmask=[d24] minReg=1 last wt=100.00> BB03 regmask=[d25] minReg=1 last wt=100.00> BB03 regmask=[d26] minReg=1 last wt=100.00> BB03 regmask=[d27] minReg=1 last wt=100.00> BB03 regmask=[d28] minReg=1 last wt=100.00> BB03 regmask=[d29] minReg=1 last wt=100.00> BB03 regmask=[d30] minReg=1 last wt=100.00> BB03 regmask=[d31] minReg=1 last wt=100.00> BB03 regmask=[x0] minReg=1 wt=100.00> CALL BB03 regmask=[x0] minReg=1 fixed wt=400.00> BB03 regmask=[x0] minReg=1 last wt=100.00> CAST BB03 regmask=[x0] minReg=1 wt=400.00> BB03 regmask=[x0] minReg=1 last wt=100.00> LCL_VAR BB04 regmask=[x0] minReg=1 wt=400.00> BB04 regmask=[x0] minReg=1 wt=100.00> BB04 regmask=[x0] minReg=1 last fixed wt=100.00> VAR REFPOSITIONS AFTER ALLOCATION --- V00 (Interval 0) BB00 regmask=[x19] minReg=1 regOptional wt=100.00> LCL_VAR BB01 regmask=[x19] minReg=1 last wt=300.00> --- V01 --- V02 --- V03 --- V04 (Interval 1) STORE_LCL_VAR BB01 regmask=[x20] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x20] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x20] minReg=1 last wt=600.00> --- V05 (Interval 2) STORE_LCL_VAR BB01 regmask=[x20] minReg=1 wt=600.00> LCL_VAR BB01 regmask=[x1] minReg=1 copy fixed wt=600.00> LCL_VAR BB03 regmask=[x20] minReg=1 last wt=600.00> --- V06 --- V07 (Interval 3) STORE_LCL_VAR BB03 regmask=[d16] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[d16] minReg=1 last wt=400.00> --- V08 --- V09 --- V10 --- V11 --- V12 --- V13 --- V14 --- V15 --- V16 Active intervals at end of allocation: ----------------------- RESOLVING BB BOUNDARIES ----------------------- Resolution Candidates: {V00 V05} Has No Critical Edges Prior to Resolution BB01 use def in out {V00} {V04 V05} {V00} {V05} Var=Reg beg of BB01: V00=x19 Var=Reg end of BB01: V05=x20 BB03 use def in out {V05} {V02 V06 V07 V16} {V05} {V02} Var=Reg beg of BB03: V05=x20 Var=Reg end of BB03: none BB04 use def in out {V02} {} {V02} {} Var=Reg beg of BB04: none Var=Reg end of BB04: none BB05 EH flow in EH flow out use def in out {} {V02} {} {V02} Var=Reg beg of BB05: none Var=Reg end of BB05: none RESOLVING EDGES Set V00 argument initial register to x19 Trees after linear scan register allocator (LSRA) ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???), preds={} succs={BB03} N003 (???,???) [000156] ------------ IL_OFFSET void IL offset: 0x0 REG NA N005 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class REG x0 $100 /--* t3 long N007 (???,???) [000159] ------------ t159 = * PUTARG_REG long REG x0 /--* t159 long arg0 in x0 N009 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST REG x0 $140 /--* t4 ref N011 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 x20 REG x20 N013 ( 1, 1) [000007] ------------ t7 = LCL_VAR ref V04 tmp1 u:2 x20 REG x20 $140 /--* t7 ref N015 ( 3, 4) [000009] -c---------- t9 = * LEA(b+8) byref REG NA N017 ( 1, 1) [000002] ------------ t2 = LCL_VAR long V00 arg0 u:1 x19 (last use) REG x19 $80 /--* t9 byref +--* t2 long N019 (???,???) [000157] -A---O------ * STOREIND long REG NA N021 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 x20 (last use) REG x20 $140 /--* t12 ref N023 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 x20 REG x20 N025 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 x20 REG x20 $140 /--* t17 ref N027 (???,???) [000160] ------------ t160 = * PUTARG_REG ref REG x1 N029 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class REG x0 $101 /--* t22 long N031 (???,???) [000161] ------------ t161 = * PUTARG_REG long REG x0 /--* t160 ref arg1 in x1 +--* t161 long arg0 in x0 N033 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX REG NA $143 ------------ BB03 [???..021), preds={BB01} succs={BB04} N037 ( 1, 1) [000021] ------------ t21 = LCL_VAR ref V05 tmp2 u:2 x20 (last use) REG x20 $140 /--* t21 ref N039 ( 3, 4) [000028] -c---------- t28 = * LEA(b+8) byref REG NA /--* t28 byref N041 ( 6, 6) [000029] n---GO------ t29 = * IND simd16 REG d16 N043 (???,???) [000162] Dc-----N---- t162 = LCL_VAR_ADDR byref V06 tmp3 NA REG NA /--* t162 byref +--* t29 simd16 N045 ( 6, 6) [000036] -A---------- * STOREIND simd16 REG NA N047 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 REG x0 $181 /--* t87 long N049 (???,???) [000163] ------------ t163 = * PUTARG_REG long REG x0 N051 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 REG x1 $42 /--* t88 int N053 (???,???) [000164] ------------ t164 = * PUTARG_REG int REG x1 /--* t163 long arg0 in x0 +--* t164 int arg1 in x1 N055 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE REG x0 $242 N057 ( 1, 2) [000081] -c---------- t81 = CNS_INT int 0 REG NA $40 /--* t81 int N059 (???,???) [000165] ------------ t165 = * SIMD simd16 float init REG d16 /--* t165 simd16 N061 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 NA REG NA N063 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] REG x1 $102 /--* t133 long N065 ( 6, 14) [000134] #---G------- t134 = * IND ref REG x1 $c9 /--* t134 ref N067 (???,???) [000166] ----G------- t166 = * PUTARG_REG ref REG x1 N069 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 x0 REG x0 $381 /--* t84 byref N071 (???,???) [000167] ------------ t167 = * PUTARG_REG byref REG x0 /--* t166 ref arg1 in x1 +--* t167 byref this in x0 N073 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor REG NA $VN.Void N075 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 d16 REG d16 $304 /--* t86 struct N077 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 d16 REG d16 N079 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 d17 (last use) REG d17 $303 /--* t100 struct N081 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 NA REG NA N083 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 d16 (last use) REG d16 $307 /--* t98 struct N085 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 NA REG NA N087 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 x0 REG x0 $87 /--* t114 long N089 (???,???) [000168] ------------ t168 = * PUTARG_REG long REG x0 N091 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 x1 REG x1 $88 /--* t116 long N093 (???,???) [000169] ------------ t169 = * PUTARG_REG long REG x1 /--* t168 long arg0 in x0 +--* t169 long arg1 in x1 N095 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore REG x0 $342 /--* t117 int N097 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int REG x0 $281 /--* t119 int N099 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 NA REG NA ------------ BB04 [02E..030) (return), preds={BB03,BB05} succs={} N103 (???,???) [000158] ------------ IL_OFFSET void IL offset: 0x2e REG NA N105 ( 3, 2) [000055] ------------ t55 = LCL_VAR int V02 loc1 u:3 x0 (last use) REG x0 $400 /--* t55 int N107 ( 4, 3) [000056] ------------ * RETURN int REG NA $345 ------------ BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} N111 ( 1, 2) [000076] -c---------- t76 = CNS_INT int 0 REG NA $40 /--* t76 int N113 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 NA REG NA ------------------------------------------------------------------------------------------------------------------- Final allocation -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 0.#0 V0 Parm Alloc x19 | | | | | | | | |V0 a| | | | | | | | | 1.#1 BB1 PredBB0 | | | | | | | | |V0 a| | | | | | | | | 6.#2 C5 Def Alloc x0 |C5 a| | | | | | | |V0 a| | | | | | | | | 7.#3 x0 Fixd Keep x0 |C5 a| | | | | | | |V0 a| | | | | | | | | 7.#4 C5 Use * Keep x0 |C5 i| | | | | | | |V0 a| | | | | | | | | 8.#5 x0 Fixd Keep x0 | | | | | | | | |V0 a| | | | | | | | | 8.#6 I6 Def Alloc x0 |I6 a| | | | | | | |V0 a| | | | | | | | | 9.#7 x0 Fixd Keep x0 |I6 a| | | | | | | |V0 a| | | | | | | | | 9.#8 I6 Use * Keep x0 |I6 i| | | | | | | |V0 a| | | | | | | | | 10.#9 x0 Kill Keep x0 | | | | | | | | |V0 a| | | | | | | | | 10.#10 x1 Kill Keep x1 | | | | | | | | |V0 a| | | | | | | | | 10.#11 x2 Kill Keep x2 | | | | | | | | |V0 a| | | | | | | | | 10.#12 x3 Kill Keep x3 | | | | | | | | |V0 a| | | | | | | | | 10.#13 x4 Kill Keep x4 | | | | | | | | |V0 a| | | | | | | | | 10.#14 x5 Kill Keep x5 | | | | | | | | |V0 a| | | | | | | | | 10.#15 x6 Kill Keep x6 | | | | | | | | |V0 a| | | | | | | | | 10.#16 x7 Kill Keep x7 | | | | | | | | |V0 a| | | | | | | | | 10.#17 x8 Kill Keep x8 | | | | | | | | |V0 a| | | | | | | | | 10.#18 x9 Kill Keep x9 | | | | | | | | |V0 a| | | | | | | | | 10.#19 x10 Kill Keep x10 | | | | | | | | |V0 a| | | | | | | | | 10.#20 x11 Kill Keep x11 | | | | | | | | |V0 a| | | | | | | | | 10.#21 x12 Kill Keep x12 | | | | | | | | |V0 a| | | | | | | | | 10.#22 x13 Kill Keep x13 | | | | | | | | |V0 a| | | | | | | | | 10.#23 x14 Kill Keep x14 | | | | | | | | |V0 a| | | | | | | | | 10.#24 x15 Kill Keep x15 | | | | | | | | |V0 a| | | | | | | | | 10.#25 xip0 Kill Keep xip0 | | | | | | | | |V0 a| | | | | | | | | 10.#26 xip1 Kill Keep xip1 | | | | | | | | |V0 a| | | | | | | | | 10.#27 lr Kill Keep lr | | | | | | | | |V0 a| | | | | | | | | 10.#28 d0 Kill Keep d0 | | | | | | | | |V0 a| | | | | | | | | 10.#29 d1 Kill Keep d1 | | | | | | | | |V0 a| | | | | | | | | 10.#30 d2 Kill Keep d2 | | | | | | | | |V0 a| | | | | | | | | 10.#31 d3 Kill Keep d3 | | | | | | | | |V0 a| | | | | | | | | 10.#32 d4 Kill Keep d4 | | | | | | | | |V0 a| | | | | | | | | 10.#33 d5 Kill Keep d5 | | | | | | | | |V0 a| | | | | | | | | 10.#34 d6 Kill Keep d6 | | | | | | | | |V0 a| | | | | | | | | 10.#35 d7 Kill Keep d7 | | | | | | | | |V0 a| | | | | | | | | 10.#36 d16 Kill Keep d16 | | | | | | | | |V0 a| | | | | | | | | 10.#37 d17 Kill Keep d17 | | | | | | | | |V0 a| | | | | | | | | 10.#38 d18 Kill Keep d18 | | | | | | | | |V0 a| | | | | | | | | 10.#39 d19 Kill Keep d19 | | | | | | | | |V0 a| | | | | | | | | 10.#40 d20 Kill Keep d20 | | | | | | | | |V0 a| | | | | | | | | 10.#41 d21 Kill Keep d21 | | | | | | | | |V0 a| | | | | | | | | 10.#42 d22 Kill Keep d22 | | | | | | | | |V0 a| | | | | | | | | 10.#43 d23 Kill Keep d23 | | | | | | | | |V0 a| | | | | | | | | 10.#44 d24 Kill Keep d24 | | | | | | | | |V0 a| | | | | | | | | 10.#45 d25 Kill Keep d25 | | | | | | | | |V0 a| | | | | | | | | 10.#46 d26 Kill Keep d26 | | | | | | | | |V0 a| | | | | | | | | 10.#47 d27 Kill Keep d27 | | | | | | | | |V0 a| | | | | | | | | 10.#48 d28 Kill Keep d28 | | | | | | | | |V0 a| | | | | | | | | 10.#49 d29 Kill Keep d29 | | | | | | | | |V0 a| | | | | | | | | 10.#50 d30 Kill Keep d30 | | | | | | | | |V0 a| | | | | | | | | 10.#51 d31 Kill Keep d31 | | | | | | | | |V0 a| | | | | | | | | 10.#52 x0 Fixd Keep x0 | | | | | | | | |V0 a| | | | | | | | | 10.#53 I7 Def Alloc x0 |I7 a| | | | | | | |V0 a| | | | | | | | | 11.#54 I7 Use * Keep x0 |I7 i| | | | | | | |V0 a| | | | | | | | | 12.#55 V4 Def Alloc x20 | | | | | | | | |V0 a|V4 a| | | | | | | | 19.#56 V4 Use Keep x20 | | | | | | | | |V0 a|V4 a| | | | | | | | 19.#57 V0 Use * Keep x19 | | | | | | | | |V0 i|V4 a| | | | | | | | 23.#58 V4 Use * Keep x20 | | | | | | | | | |V4 i| | | | | | | | 24.#59 V5 Def Alloc x20 | | | | | | | | | |V5 a| | | | | | | | 27.#60 x1 Fixd Keep x1 | | | | | | | | | |V5 a| | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 27.#61 V5 Use Copy x1 | |V5 a| | | | | | | |V5 a| | | | | | | | 28.#62 x1 Fixd Keep x1 | | | | | | | | | |V5 a| | | | | | | | 28.#63 I8 Def Alloc x1 | |I8 a| | | | | | | |V5 a| | | | | | | | 30.#64 C9 Def Alloc x0 |C9 a|I8 a| | | | | | | |V5 a| | | | | | | | 31.#65 x0 Fixd Keep x0 |C9 a|I8 a| | | | | | | |V5 a| | | | | | | | 31.#66 C9 Use * Keep x0 |C9 i|I8 a| | | | | | | |V5 a| | | | | | | | 32.#67 x0 Fixd Keep x0 | |I8 a| | | | | | | |V5 a| | | | | | | | 32.#68 I10 Def Alloc x0 |I10a|I8 a| | | | | | | |V5 a| | | | | | | | 33.#69 x1 Fixd Keep x1 |I10a|I8 a| | | | | | | |V5 a| | | | | | | | 33.#70 I8 Use * Keep x1 |I10a|I8 i| | | | | | | |V5 a| | | | | | | | 33.#71 x0 Fixd Keep x0 |I10a| | | | | | | | |V5 a| | | | | | | | 33.#72 I10 Use * Keep x0 |I10i| | | | | | | | |V5 a| | | | | | | | 34.#73 x0 Kill Keep x0 | | | | | | | | | |V5 a| | | | | | | | 34.#74 x1 Kill Keep x1 | | | | | | | | | |V5 a| | | | | | | | 34.#75 x2 Kill Keep x2 | | | | | | | | | |V5 a| | | | | | | | 34.#76 x3 Kill Keep x3 | | | | | | | | | |V5 a| | | | | | | | 34.#77 x4 Kill Keep x4 | | | | | | | | | |V5 a| | | | | | | | 34.#78 x5 Kill Keep x5 | | | | | | | | | |V5 a| | | | | | | | 34.#79 x6 Kill Keep x6 | | | | | | | | | |V5 a| | | | | | | | 34.#80 x7 Kill Keep x7 | | | | | | | | | |V5 a| | | | | | | | 34.#81 x8 Kill Keep x8 | | | | | | | | | |V5 a| | | | | | | | 34.#82 x9 Kill Keep x9 | | | | | | | | | |V5 a| | | | | | | | 34.#83 x10 Kill Keep x10 | | | | | | | | | |V5 a| | | | | | | | 34.#84 x11 Kill Keep x11 | | | | | | | | | |V5 a| | | | | | | | 34.#85 x12 Kill Keep x12 | | | | | | | | | |V5 a| | | | | | | | 34.#86 x13 Kill Keep x13 | | | | | | | | | |V5 a| | | | | | | | 34.#87 x14 Kill Keep x14 | | | | | | | | | |V5 a| | | | | | | | 34.#88 x15 Kill Keep x15 | | | | | | | | | |V5 a| | | | | | | | 34.#89 xip0 Kill Keep xip0 | | | | | | | | | |V5 a| | | | | | | | 34.#90 xip1 Kill Keep xip1 | | | | | | | | | |V5 a| | | | | | | | 34.#91 lr Kill Keep lr | | | | | | | | | |V5 a| | | | | | | | 34.#92 d0 Kill Keep d0 | | | | | | | | | |V5 a| | | | | | | | 34.#93 d1 Kill Keep d1 | | | | | | | | | |V5 a| | | | | | | | 34.#94 d2 Kill Keep d2 | | | | | | | | | |V5 a| | | | | | | | 34.#95 d3 Kill Keep d3 | | | | | | | | | |V5 a| | | | | | | | 34.#96 d4 Kill Keep d4 | | | | | | | | | |V5 a| | | | | | | | 34.#97 d5 Kill Keep d5 | | | | | | | | | |V5 a| | | | | | | | 34.#98 d6 Kill Keep d6 | | | | | | | | | |V5 a| | | | | | | | 34.#99 d7 Kill Keep d7 | | | | | | | | | |V5 a| | | | | | | | 34.#100 d16 Kill Keep d16 | | | | | | | | | |V5 a| | | | | | | | 34.#101 d17 Kill Keep d17 | | | | | | | | | |V5 a| | | | | | | | 34.#102 d18 Kill Keep d18 | | | | | | | | | |V5 a| | | | | | | | 34.#103 d19 Kill Keep d19 | | | | | | | | | |V5 a| | | | | | | | 34.#104 d20 Kill Keep d20 | | | | | | | | | |V5 a| | | | | | | | 34.#105 d21 Kill Keep d21 | | | | | | | | | |V5 a| | | | | | | | 34.#106 d22 Kill Keep d22 | | | | | | | | | |V5 a| | | | | | | | 34.#107 d23 Kill Keep d23 | | | | | | | | | |V5 a| | | | | | | | 34.#108 d24 Kill Keep d24 | | | | | | | | | |V5 a| | | | | | | | 34.#109 d25 Kill Keep d25 | | | | | | | | | |V5 a| | | | | | | | 34.#110 d26 Kill Keep d26 | | | | | | | | | |V5 a| | | | | | | | 34.#111 d27 Kill Keep d27 | | | | | | | | | |V5 a| | | | | | | | 34.#112 d28 Kill Keep d28 | | | | | | | | | |V5 a| | | | | | | | 34.#113 d29 Kill Keep d29 | | | | | | | | | |V5 a| | | | | | | | 34.#114 d30 Kill Keep d30 | | | | | | | | | |V5 a| | | | | | | | 34.#115 d31 Kill Keep d31 | | | | | | | | | |V5 a| | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 35.#116 BB3 PredBB1 | | | | | | | | | |V5 a| | | | | | | | 41.#117 V5 Use * Keep x20 | | | | | | | | | |V5 i| | | | | | | | 42.#118 I11 Def Alloc d16 | | | | | | | | | | | | | | | |I11a| | 45.#119 I11 Use * Keep d16 | | | | | | | | | | | | | | | |I11i| | 48.#120 C12 Def Alloc x0 |C12a| | | | | | | | | | | | | | | | | 49.#121 x0 Fixd Keep x0 |C12a| | | | | | | | | | | | | | | | | 49.#122 C12 Use * Keep x0 |C12i| | | | | | | | | | | | | | | | | 50.#123 x0 Fixd Keep x0 | | | | | | | | | | | | | | | | | | 50.#124 I13 Def Alloc x0 |I13a| | | | | | | | | | | | | | | | | 52.#125 C14 Def Alloc x1 |I13a|C14a| | | | | | | | | | | | | | | | 53.#126 x1 Fixd Keep x1 |I13a|C14a| | | | | | | | | | | | | | | | 53.#127 C14 Use * Keep x1 |I13a|C14i| | | | | | | | | | | | | | | | 54.#128 x1 Fixd Keep x1 |I13a| | | | | | | | | | | | | | | | | 54.#129 I15 Def Alloc x1 |I13a|I15a| | | | | | | | | | | | | | | | 55.#130 x0 Fixd Keep x0 |I13a|I15a| | | | | | | | | | | | | | | | 55.#131 I13 Use * Keep x0 |I13i|I15a| | | | | | | | | | | | | | | | 55.#132 x1 Fixd Keep x1 | |I15a| | | | | | | | | | | | | | | | 55.#133 I15 Use * Keep x1 | |I15i| | | | | | | | | | | | | | | | 56.#134 x0 Kill Keep x0 | | | | | | | | | | | | | | | | | | 56.#135 x1 Kill Keep x1 | | | | | | | | | | | | | | | | | | 56.#136 x2 Kill Keep x2 | | | | | | | | | | | | | | | | | | 56.#137 x3 Kill Keep x3 | | | | | | | | | | | | | | | | | | 56.#138 x4 Kill Keep x4 | | | | | | | | | | | | | | | | | | 56.#139 x5 Kill Keep x5 | | | | | | | | | | | | | | | | | | 56.#140 x6 Kill Keep x6 | | | | | | | | | | | | | | | | | | 56.#141 x7 Kill Keep x7 | | | | | | | | | | | | | | | | | | 56.#142 x8 Kill Keep x8 | | | | | | | | | | | | | | | | | | 56.#143 x9 Kill Keep x9 | | | | | | | | | | | | | | | | | | 56.#144 x10 Kill Keep x10 | | | | | | | | | | | | | | | | | | 56.#145 x11 Kill Keep x11 | | | | | | | | | | | | | | | | | | 56.#146 x12 Kill Keep x12 | | | | | | | | | | | | | | | | | | 56.#147 x13 Kill Keep x13 | | | | | | | | | | | | | | | | | | 56.#148 x14 Kill Keep x14 | | | | | | | | | | | | | | | | | | 56.#149 x15 Kill Keep x15 | | | | | | | | | | | | | | | | | | 56.#150 xip0 Kill Keep xip0 | | | | | | | | | | | | | | | | | | 56.#151 xip1 Kill Keep xip1 | | | | | | | | | | | | | | | | | | 56.#152 lr Kill Keep lr | | | | | | | | | | | | | | | | | | 56.#153 d0 Kill Keep d0 | | | | | | | | | | | | | | | | | | 56.#154 d1 Kill Keep d1 | | | | | | | | | | | | | | | | | | 56.#155 d2 Kill Keep d2 | | | | | | | | | | | | | | | | | | 56.#156 d3 Kill Keep d3 | | | | | | | | | | | | | | | | | | 56.#157 d4 Kill Keep d4 | | | | | | | | | | | | | | | | | | 56.#158 d5 Kill Keep d5 | | | | | | | | | | | | | | | | | | 56.#159 d6 Kill Keep d6 | | | | | | | | | | | | | | | | | | 56.#160 d7 Kill Keep d7 | | | | | | | | | | | | | | | | | | 56.#161 d16 Kill Keep d16 | | | | | | | | | | | | | | | | | | 56.#162 d17 Kill Keep d17 | | | | | | | | | | | | | | | | | | 56.#163 d18 Kill Keep d18 | | | | | | | | | | | | | | | | | | 56.#164 d19 Kill Keep d19 | | | | | | | | | | | | | | | | | | 56.#165 d20 Kill Keep d20 | | | | | | | | | | | | | | | | | | 56.#166 d21 Kill Keep d21 | | | | | | | | | | | | | | | | | | 56.#167 d22 Kill Keep d22 | | | | | | | | | | | | | | | | | | 56.#168 d23 Kill Keep d23 | | | | | | | | | | | | | | | | | | 56.#169 d24 Kill Keep d24 | | | | | | | | | | | | | | | | | | 56.#170 d25 Kill Keep d25 | | | | | | | | | | | | | | | | | | 56.#171 d26 Kill Keep d26 | | | | | | | | | | | | | | | | | | 56.#172 d27 Kill Keep d27 | | | | | | | | | | | | | | | | | | 56.#173 d28 Kill Keep d28 | | | | | | | | | | | | | | | | | | 56.#174 d29 Kill Keep d29 | | | | | | | | | | | | | | | | | | 56.#175 d30 Kill Keep d30 | | | | | | | | | | | | | | | | | | 56.#176 d31 Kill Keep d31 | | | | | | | | | | | | | | | | | | 56.#177 x0 Fixd Keep x0 | | | | | | | | | | | | | | | | | | 56.#178 I16 Def * Alloc x0 |I16i| | | | | | | | | | | | | | | | | 60.#179 I17 Def Alloc d16 | | | | | | | | | | | | | | | |I17a| | 61.#180 I17 Use * Keep d16 | | | | | | | | | | | | | | | |I17i| | 64.#181 C18 Def Alloc x1 | |C18a| | | | | | | | | | | | | | | | 65.#182 C18 Use * Keep x1 | |C18i| | | | | | | | | | | | | | | | 66.#183 I19 Def Alloc x1 | |I19a| | | | | | | | | | | | | | | | 67.#184 x1 Fixd Keep x1 | |I19a| | | | | | | | | | | | | | | | 67.#185 I19 Use * Keep x1 | |I19i| | | | | | | | | | | | | | | | 68.#186 x1 Fixd Keep x1 | | | | | | | | | | | | | | | | | | 68.#187 I20 Def Alloc x1 | |I20a| | | | | | | | | | | | | | | | 70.#188 I21 Def Alloc x0 |I21a|I20a| | | | | | | | | | | | | | | | 71.#189 x0 Fixd Keep x0 |I21a|I20a| | | | | | | | | | | | | | | | 71.#190 I21 Use * Keep x0 |I21i|I20a| | | | | | | | | | | | | | | | 72.#191 x0 Fixd Keep x0 | |I20a| | | | | | | | | | | | | | | | 72.#192 I22 Def Alloc x0 |I22a|I20a| | | | | | | | | | | | | | | | 73.#193 x1 Fixd Keep x1 |I22a|I20a| | | | | | | | | | | | | | | | 73.#194 I20 Use * Keep x1 |I22a|I20i| | | | | | | | | | | | | | | | 73.#195 x0 Fixd Keep x0 |I22a| | | | | | | | | | | | | | | | | 73.#196 I22 Use * Keep x0 |I22i| | | | | | | | | | | | | | | | | 74.#197 x0 Kill Keep x0 | | | | | | | | | | | | | | | | | | 74.#198 x1 Kill Keep x1 | | | | | | | | | | | | | | | | | | 74.#199 x2 Kill Keep x2 | | | | | | | | | | | | | | | | | | 74.#200 x3 Kill Keep x3 | | | | | | | | | | | | | | | | | | 74.#201 x4 Kill Keep x4 | | | | | | | | | | | | | | | | | | 74.#202 x5 Kill Keep x5 | | | | | | | | | | | | | | | | | | 74.#203 x6 Kill Keep x6 | | | | | | | | | | | | | | | | | | 74.#204 x7 Kill Keep x7 | | | | | | | | | | | | | | | | | | 74.#205 x8 Kill Keep x8 | | | | | | | | | | | | | | | | | | 74.#206 x9 Kill Keep x9 | | | | | | | | | | | | | | | | | | 74.#207 x10 Kill Keep x10 | | | | | | | | | | | | | | | | | | 74.#208 x11 Kill Keep x11 | | | | | | | | | | | | | | | | | | 74.#209 x12 Kill Keep x12 | | | | | | | | | | | | | | | | | | 74.#210 x13 Kill Keep x13 | | | | | | | | | | | | | | | | | | 74.#211 x14 Kill Keep x14 | | | | | | | | | | | | | | | | | | 74.#212 x15 Kill Keep x15 | | | | | | | | | | | | | | | | | | 74.#213 xip0 Kill Keep xip0 | | | | | | | | | | | | | | | | | | 74.#214 xip1 Kill Keep xip1 | | | | | | | | | | | | | | | | | | 74.#215 lr Kill Keep lr | | | | | | | | | | | | | | | | | | 74.#216 d0 Kill Keep d0 | | | | | | | | | | | | | | | | | | 74.#217 d1 Kill Keep d1 | | | | | | | | | | | | | | | | | | 74.#218 d2 Kill Keep d2 | | | | | | | | | | | | | | | | | | 74.#219 d3 Kill Keep d3 | | | | | | | | | | | | | | | | | | 74.#220 d4 Kill Keep d4 | | | | | | | | | | | | | | | | | | 74.#221 d5 Kill Keep d5 | | | | | | | | | | | | | | | | | | 74.#222 d6 Kill Keep d6 | | | | | | | | | | | | | | | | | | 74.#223 d7 Kill Keep d7 | | | | | | | | | | | | | | | | | | 74.#224 d16 Kill Keep d16 | | | | | | | | | | | | | | | | | | 74.#225 d17 Kill Keep d17 | | | | | | | | | | | | | | | | | | 74.#226 d18 Kill Keep d18 | | | | | | | | | | | | | | | | | | 74.#227 d19 Kill Keep d19 | | | | | | | | | | | | | | | | | | 74.#228 d20 Kill Keep d20 | | | | | | | | | | | | | | | | | | 74.#229 d21 Kill Keep d21 | | | | | | | | | | | | | | | | | | 74.#230 d22 Kill Keep d22 | | | | | | | | | | | | | | | | | | 74.#231 d23 Kill Keep d23 | | | | | | | | | | | | | | | | | | 74.#232 d24 Kill Keep d24 | | | | | | | | | | | | | | | | | | 74.#233 d25 Kill Keep d25 | | | | | | | | | | | | | | | | | | 74.#234 d26 Kill Keep d26 | | | | | | | | | | | | | | | | | | 74.#235 d27 Kill Keep d27 | | | | | | | | | | | | | | | | | | 74.#236 d28 Kill Keep d28 | | | | | | | | | | | | | | | | | | 74.#237 d29 Kill Keep d29 | | | | | | | | | | | | | | | | | | 74.#238 d30 Kill Keep d30 | | | | | | | | | | | | | | | | | | 74.#239 d31 Kill Keep d31 | | | | | | | | | | | | | | | | | | 76.#240 I23 Def Alloc d16 | | | | | | | | | | | | | | | |I23a| | 77.#241 I23 Use * Keep d16 | | | | | | | | | | | | | | | |I23i| | 78.#242 V7 Def Alloc d16 | | | | | | | | | | | | | | | |V7 a| | 80.#243 I24 Def Alloc d17 | | | | | | | | | | | | | | | |V7 a|I24a| 81.#244 I24 Use * Keep d17 | | | | | | | | | | | | | | | |V7 a|I24i| 85.#245 V7 Use * Keep d16 | | | | | | | | | | | | | | | |V7 i| | 88.#246 I25 Def Alloc x0 |I25a| | | | | | | | | | | | | | | | | 89.#247 x0 Fixd Keep x0 |I25a| | | | | | | | | | | | | | | | | 89.#248 I25 Use * Keep x0 |I25i| | | | | | | | | | | | | | | | | 90.#249 x0 Fixd Keep x0 | | | | | | | | | | | | | | | | | | 90.#250 I26 Def Alloc x0 |I26a| | | | | | | | | | | | | | | | | 92.#251 I27 Def Alloc x1 |I26a|I27a| | | | | | | | | | | | | | | | 93.#252 x1 Fixd Keep x1 |I26a|I27a| | | | | | | | | | | | | | | | 93.#253 I27 Use * Keep x1 |I26a|I27i| | | | | | | | | | | | | | | | 94.#254 x1 Fixd Keep x1 |I26a| | | | | | | | | | | | | | | | | 94.#255 I28 Def Alloc x1 |I26a|I28a| | | | | | | | | | | | | | | | 95.#256 x0 Fixd Keep x0 |I26a|I28a| | | | | | | | | | | | | | | | 95.#257 I26 Use * Keep x0 |I26i|I28a| | | | | | | | | | | | | | | | 95.#258 x1 Fixd Keep x1 | |I28a| | | | | | | | | | | | | | | | 95.#259 I28 Use * Keep x1 | |I28i| | | | | | | | | | | | | | | | 96.#260 x0 Kill Keep x0 | | | | | | | | | | | | | | | | | | 96.#261 x1 Kill Keep x1 | | | | | | | | | | | | | | | | | | 96.#262 x2 Kill Keep x2 | | | | | | | | | | | | | | | | | | 96.#263 x3 Kill Keep x3 | | | | | | | | | | | | | | | | | | 96.#264 x4 Kill Keep x4 | | | | | | | | | | | | | | | | | | 96.#265 x5 Kill Keep x5 | | | | | | | | | | | | | | | | | | 96.#266 x6 Kill Keep x6 | | | | | | | | | | | | | | | | | | 96.#267 x7 Kill Keep x7 | | | | | | | | | | | | | | | | | | 96.#268 x8 Kill Keep x8 | | | | | | | | | | | | | | | | | | 96.#269 x9 Kill Keep x9 | | | | | | | | | | | | | | | | | | 96.#270 x10 Kill Keep x10 | | | | | | | | | | | | | | | | | | 96.#271 x11 Kill Keep x11 | | | | | | | | | | | | | | | | | | 96.#272 x12 Kill Keep x12 | | | | | | | | | | | | | | | | | | 96.#273 x13 Kill Keep x13 | | | | | | | | | | | | | | | | | | 96.#274 x14 Kill Keep x14 | | | | | | | | | | | | | | | | | | 96.#275 x15 Kill Keep x15 | | | | | | | | | | | | | | | | | | 96.#276 xip0 Kill Keep xip0 | | | | | | | | | | | | | | | | | | 96.#277 xip1 Kill Keep xip1 | | | | | | | | | | | | | | | | | | 96.#278 lr Kill Keep lr | | | | | | | | | | | | | | | | | | 96.#279 d0 Kill Keep d0 | | | | | | | | | | | | | | | | | | 96.#280 d1 Kill Keep d1 | | | | | | | | | | | | | | | | | | 96.#281 d2 Kill Keep d2 | | | | | | | | | | | | | | | | | | 96.#282 d3 Kill Keep d3 | | | | | | | | | | | | | | | | | | 96.#283 d4 Kill Keep d4 | | | | | | | | | | | | | | | | | | 96.#284 d5 Kill Keep d5 | | | | | | | | | | | | | | | | | | 96.#285 d6 Kill Keep d6 | | | | | | | | | | | | | | | | | | 96.#286 d7 Kill Keep d7 | | | | | | | | | | | | | | | | | | 96.#287 d16 Kill Keep d16 | | | | | | | | | | | | | | | | | | 96.#288 d17 Kill Keep d17 | | | | | | | | | | | | | | | | | | 96.#289 d18 Kill Keep d18 | | | | | | | | | | | | | | | | | | 96.#290 d19 Kill Keep d19 | | | | | | | | | | | | | | | | | | 96.#291 d20 Kill Keep d20 | | | | | | | | | | | | | | | | | | 96.#292 d21 Kill Keep d21 | | | | | | | | | | | | | | | | | | 96.#293 d22 Kill Keep d22 | | | | | | | | | | | | | | | | | | 96.#294 d23 Kill Keep d23 | | | | | | | | | | | | | | | | | | 96.#295 d24 Kill Keep d24 | | | | | | | | | | | | | | | | | | 96.#296 d25 Kill Keep d25 | | | | | | | | | | | | | | | | | | 96.#297 d26 Kill Keep d26 | | | | | | | | | | | | | | | | | | 96.#298 d27 Kill Keep d27 | | | | | | | | | | | | | | | | | | 96.#299 d28 Kill Keep d28 | | | | | | | | | | | | | | | | | | 96.#300 d29 Kill Keep d29 | | | | | | | | | | | | | | | | | | 96.#301 d30 Kill Keep d30 | | | | | | | | | | | | | | | | | | 96.#302 d31 Kill Keep d31 | | | | | | | | | | | | | | | | | | 96.#303 x0 Fixd Keep x0 | | | | | | | | | | | | | | | | | | 96.#304 I29 Def Alloc x0 |I29a| | | | | | | | | | | | | | | | | 97.#305 I29 Use * Keep x0 |I29i| | | | | | | | | | | | | | | | | 98.#306 I30 Def Alloc x0 |I30a| | | | | | | | | | | | | | | | | 99.#307 I30 Use * Keep x0 |I30i| | | | | | | | | | | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 101.#308 BB4 PredBB3 | | | | | | | | | | | | | | | | | | 106.#309 I31 Def Alloc x0 |I31a| | | | | | | | | | | | | | | | | 107.#310 x0 Fixd Keep x0 |I31a| | | | | | | | | | | | | | | | | 107.#311 I31 Use * Keep x0 |I31i| | | | | | | | | | | | | | | | | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |x0 |x1 |x2 |x3 |x4 |x5 |x6 |x7 |x19 |x20 |d0 |d1 |d2 |d8 |d9 |d16 |d17 | -----------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 109.#312 BB5 PredBB0 | | | | | | | | | | | | | | | | | | Recording the maximum number of concurrent spills: ---------- LSRA Stats ---------- Register selection order: ABCDEFGHIJKLMNOPQ Total Tracked Vars: 7 Total Reg Cand Vars: 4 Total number of Intervals: 31 Total number of RefPositions: 313 Total Number of spill temps created: 0 .......... BB00 [ 100.00]: REG_ORDER = 1 BB01 [ 100.00]: COVERS = 1, REG_ORDER = 1 BB03 [ 100.00]: COVERS = 1, BEST_FIT = 2, REG_ORDER = 4 .......... Total SpillCount : 0 Weighted: 0.000000 Total CopyReg : 0 Weighted: 0.000000 Total ResolutionMovs : 0 Weighted: 0.000000 Total SplitEdges : 0 Weighted: 0.000000 .......... Total COVERS [# 4] : 2 Weighted: 200.000000 Total BEST_FIT [#11] : 2 Weighted: 200.000000 Total REG_ORDER [#13] : 6 Weighted: 600.000000 TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS Incoming Parameters: V00(x0=>x19) BB01 [000..???), preds={} succs={BB03} ===== N003. IL_OFFSET IL offset: 0x0 N005. x0 = CNS_INT(h) 0xd1ffab1e class N007. x0 = PUTARG_REG; x0 N009. x0 = CALL help; x0 * N011. V04(x20); x0 N013. V04(x20) N015. STK = LEA(b+8) ; x20 N017. V00(x19*) N019. STOREIND ; STK,x19* N021. V04(x20*) * N023. V05(x20); x20* N025. V05(x20) N027. x1 = PUTARG_REG; x20 N029. x0 = CNS_INT(h) 0xd1ffab1e class N031. x0 = PUTARG_REG; x0 N033. CALL help; x1,x0 Var=Reg end of BB01: V05=x20 BB03 [???..021), preds={BB01} succs={BB04} ===== Predecessor for variable locations: BB01 Var=Reg beg of BB03: V05=x20 N037. V05(x20*) N039. STK = LEA(b+8) ; x20* N041. d16 = IND ; STK N043. LCL_VAR_ADDR V06 tmp3 NA N045. STOREIND ; d16 N047. x0 = CNS_INT 0x7f2134dd40 N049. x0 = PUTARG_REG; x0 N051. x1 = CNS_INT 91 N053. x1 = PUTARG_REG; x1 * N055. x0 = CALL help; x0,x1 N057. CNS_INT 0 N059. d16 = SIMD N061. V10 MEM; d16 N063. x1 = CNS_INT(h) 0xD1FFAB1E [ICON_STR_HDL] N065. x1 = IND ; x1 N067. x1 = PUTARG_REG; x1 N069. x0 = LCL_VAR_ADDR V10 tmp7 x0 N071. x0 = PUTARG_REG; x0 N073. CALL ; x1,x0 N075. d16 = V10 MEM * N077. V07(d16); d16 N079. d17* = V06 MEM N081. V13 MEM; d17* N083. V07(d16*) N085. V14 MEM; d16* N087. x0 = LCL_VAR_ADDR V13 tmp10 x0 N089. x0 = PUTARG_REG; x0 N091. x1 = LCL_VAR_ADDR V14 tmp11 x1 N093. x1 = PUTARG_REG; x1 N095. x0 = CALL ; x0,x1 N097. x0 = CAST ; x0 N099. V02 MEM; x0 Var=Reg end of BB03: none BB04 [02E..030) (return), preds={BB03,BB05} succs={} ===== Predecessor for variable locations: BB03 Var=Reg beg of BB04: none N103. IL_OFFSET IL offset: 0x2e N105. x0* = V02 MEM N107. RETURN ; x0* Var=Reg end of BB04: none BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} ===== Predecessor for variable locations: BB00 Var=Reg beg of BB05: none N111. CNS_INT 0 N113. V02 MEM Var=Reg end of BB05: none *************** Finishing PHASE Linear scan register alloc *************** In genGenerateCode() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Generate code *************** In fgDebugCheckBBlist ; Assembly listing for method NullableTest16:BoxUnboxToNQGen(long):bool ; Emitting BLENDED_CODE for generic ARM64 CPU - Unix ; optimized code ; fp based frame ; fully interruptible ; No matching PGO data ; 0 inlinees with PGO data; 3 single block inlinees; 0 inlinees without PGO data Finalizing stack frame Recording Var Locations at start of BB01 V00(x19) Modified regs: [x0-xip1 x19-x20 lr d0-d7 d16-d31] Callee-saved registers pushed: 4 [x19-x20 fp lr] *************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT) Setting genSaveFpLrWithAllCalleeSavedRegisters to false Assign V15 PSPSym, size=8, stkOffs=-0x18 Assign V02 loc1, size=4, stkOffs=-0x1c Pad V06 tmp3, size=16, stkOffs=-0x20, pad=4 Assign V06 tmp3, size=16, stkOffs=-0x30 Assign V10 tmp7, size=16, stkOffs=-0x40 Assign V13 tmp10, size=16, stkOffs=-0x50 Assign V14 tmp11, size=16, stkOffs=-0x60 --- delta bump 112 for RBP frame --- virtual stack offset to actual stack offset delta is 112 -- V02 was -28, now 84 -- V03 was 0, now 112 -- V06 was -48, now 64 -- V10 was -64, now 48 -- V13 was -80, now 32 -- V14 was -96, now 16 -- V15 was -24, now 88 ; Final local variable assignments ; ; V00 arg0 [V00,T02] ( 3, 3 ) long -> x19 single-def ;* V01 loc0 [V01 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op ; V02 loc1 [V02,T05] ( 3, 2 ) bool -> [fp+54H] do-not-enreg[M] EH-live ;# V03 OutArgs [V03 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace" ; V04 tmp1 [V04,T00] ( 3, 6 ) ref -> x20 class-hnd exact single-def "Single-def Box Helper" ; V05 tmp2 [V05,T01] ( 3, 6 ) ref -> x20 single-def "inline UNBOX clone1" ; V06 tmp3 [V06,T03] ( 2, 4 ) struct (16) [fp+40H] do-not-enreg[SB] "impSpillLclRefs" ; V07 tmp4 [V07,T04] ( 2, 4 ) struct (16) d16 "struct address for call/obj" ;* V08 tmp5 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def "impSpillSpecialSideEff" ;* V09 tmp6 [V09 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Single-def Box Helper" ; V10 tmp7 [V10 ] ( 3, 6 ) struct (16) [fp+30H] do-not-enreg[XS] addr-exposed "NewObj constructor temp" ;* V11 tmp8 [V11 ] ( 0, 0 ) struct (16) zero-ref "Inlining Arg" ;* V12 tmp9 [V12 ] ( 0, 0 ) struct (16) zero-ref "Inlining Arg" ; V13 tmp10 [V13 ] ( 2, 4 ) struct (16) [fp+20H] do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" ; V14 tmp11 [V14 ] ( 2, 4 ) struct (16) [fp+10H] do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" ; V15 PSPSym [V15 ] ( 1, 1 ) long -> [fp+58H] do-not-enreg[X] addr-exposed "PSPSym" ;* V16 cse0 [V16,T06] ( 0, 0 ) long -> zero-ref "CSE - aggressive" ; ; Lcl frame size = 80 Mark labels for codegen BB01 : first block BB04 : branch target BB01 : try begin BB05 : hnd begin BB04 : try end *************** After genMarkLabelsForCodegen() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0 1 [000..???) T0 try { keep i try label hascall gcsafe newobj LIR BB03 [0006] 1 0 BB01 1 [???..021) T0 } keep i hascall gcsafe newobj LIR BB04 [0002] 2 BB03,BB05 1 [02E..030) (return) i label LIR +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ funclets follow BB05 [0001] 1 0 0 [021..02E)-> BB04 ( cret ) H0 F catch { } keep i rare label flet newobj LIR ----------------------------------------------------------------------------------------------------------------------------------------- Setting stack level from -572662307 to 0 =============== Generating BB01 [000..???), preds={} succs={BB03} flags=0x00000002.20490130: keep i try label hascall gcsafe newobj LIR BB01 IN (1)={ V00} + ByrefExposed + GcHeap OUT(1)={V05 } + ByrefExposed + GcHeap Recording Var Locations at start of BB01 V00(x19) Change life 0000000000000000 {} -> 0000000000000004 {V00} V00 in reg x19 is becoming live [------] Live regs: 0000 {} => 80000 {x19} New debug range: first Live regs: (unchanged) 80000 {x19} GC regs: (unchanged) 0000 {} Byref regs: (unchanged) 0000 {} L_M12172_BB01: Mapped BB01 to G_M12172_IG02 Label: IG02, GCvars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {} Scope info: begin block BB01, IL range [000..???) Added IP mapping: 0x0000 STACK_EMPTY (G_M12172_IG02,ins#0,ofs#0) label Generating: N003 (???,???) [000156] ------------ IL_OFFSET void IL offset: 0x0 REG NA Generating: N005 ( 3, 12) [000003] H----------- t3 = CNS_INT(h) long 0xd1ffab1e class REG x0 $100 IN0001: movz x0, #0xd1ffab1e IN0002: movk x0, #0xd1ffab1e LSL #16 IN0003: movk x0, #127 LSL #32 /--* t3 long Generating: N007 (???,???) [000159] ------------ t159 = * PUTARG_REG long REG x0 /--* t159 long arg0 in x0 Generating: N009 ( 17, 15) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST REG x0 $140 Call: GCvars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {} IN0004: bl CORINFO_HELP_NEWSFAST GC regs: 0000 {} => 0001 {x0} /--* t4 ref Generating: N011 ( 17, 15) [000006] DA---------- * STORE_LCL_VAR ref V04 tmp1 d:2 x20 REG x20 GC regs: 0001 {x0} => 0000 {} IN0005: mov x20, x0 V04 in reg x20 is becoming live [000006] Live regs: 80000 {x19} => 180000 {x19 x20} Live vars: {V00} => {V00 V04} GC regs: 0000 {} => 100000 {x20} Generating: N013 ( 1, 1) [000007] ------------ t7 = LCL_VAR ref V04 tmp1 u:2 x20 REG x20 $140 /--* t7 ref Generating: N015 ( 3, 4) [000009] -c---------- t9 = * LEA(b+8) byref REG NA Generating: N017 ( 1, 1) [000002] ------------ t2 = LCL_VAR long V00 arg0 u:1 x19 (last use) REG x19 $80 /--* t9 byref +--* t2 long Generating: N019 (???,???) [000157] -A---O------ * STOREIND long REG NA V00 in reg x19 is becoming dead [000002] Live regs: 180000 {x19 x20} => 100000 {x20} Live vars: {V00 V04} => {V04} IN0006: str x19, [x20,#8] Generating: N021 ( 1, 1) [000012] ------------ t12 = LCL_VAR ref V04 tmp1 u:2 x20 (last use) REG x20 $140 /--* t12 ref Generating: N023 ( 7, 5) [000016] DA---------- * STORE_LCL_VAR ref V05 tmp2 d:2 x20 REG x20 V04 in reg x20 is becoming dead [000012] Live regs: 100000 {x20} => 0000 {} Live vars: {V04} => {} GC regs: 100000 {x20} => 0000 {} V05 in reg x20 is becoming live [000016] Live regs: 0000 {} => 100000 {x20} Live vars: {} => {V05} GC regs: 0000 {} => 100000 {x20} Generating: N025 ( 1, 1) [000017] ------?----- t17 = LCL_VAR ref V05 tmp2 u:2 x20 REG x20 $140 /--* t17 ref Generating: N027 (???,???) [000160] ------------ t160 = * PUTARG_REG ref REG x1 IN0007: mov x1, x20 GC regs: 100000 {x20} => 100002 {x1 x20} Generating: N029 ( 3, 12) [000022] H-----?----- t22 = CNS_INT(h) long 0xd1ffab1e class REG x0 $101 IN0008: movz x0, #0xd1ffab1e IN0009: movk x0, #0xd1ffab1e LSL #16 IN000a: movk x0, #127 LSL #32 /--* t22 long Generating: N031 (???,???) [000161] ------------ t161 = * PUTARG_REG long REG x0 /--* t160 ref arg1 in x1 +--* t161 long arg0 in x0 Generating: N033 ( 18, 17) [000023] --CXG-?----- * CALL help void HELPER.CORINFO_HELP_UNBOX REG NA $143 GC regs: 100002 {x1 x20} => 100000 {x20} Call: GCvars=0000000000000000 {}, gcrefRegs=100000 {x20}, byrefRegs=0000 {} IN000b: bl CORINFO_HELP_UNBOX Scope info: ignoring block end Variable Live Range History Dump for BB01 V00 arg0: x19 [(G_M12172_IG02,ins#0,ofs#0), (G_M12172_IG02,ins#5,ofs#20)] =============== Generating BB03 [???..021), preds={BB01} succs={BB04} flags=0x00000002.20480030: keep i hascall gcsafe newobj LIR BB03 IN (1)={V05 } + ByrefExposed + GcHeap OUT(1)={ V02} Recording Var Locations at start of BB03 V05(x20) Liveness not changing: 0000000000000002 {V05} Live regs: 0000 {} => 100000 {x20} GC regs: 0000 {} => 100000 {x20} Byref regs: (unchanged) 0000 {} L_M12172_BB03: Scope info: begin block BB03, IL range [???..021) Scope info: ignoring block beginning Generating: N037 ( 1, 1) [000021] ------------ t21 = LCL_VAR ref V05 tmp2 u:2 x20 (last use) REG x20 $140 /--* t21 ref Generating: N039 ( 3, 4) [000028] -c---------- t28 = * LEA(b+8) byref REG NA /--* t28 byref Generating: N041 ( 6, 6) [000029] n---GO------ t29 = * IND simd16 REG d16 V05 in reg x20 is becoming dead [000021] Live regs: 100000 {x20} => 0000 {} Live vars: {V05} => {} GC regs: 100000 {x20} => 0000 {} IN000c: ldr q16, [x20,#8] Generating: N043 (???,???) [000162] Dc-----N---- t162 = LCL_VAR_ADDR byref V06 tmp3 NA REG NA /--* t162 byref +--* t29 simd16 Generating: N045 ( 6, 6) [000036] -A---------- * STOREIND simd16 REG NA IN000d: str q16, [fp,#64] Live vars: {} => {V06} Generating: N047 ( 3, 12) [000087] ------------ t87 = CNS_INT long 0x7f2134dd40 REG x0 $181 IN000e: movz x0, #0xd1ffab1e IN000f: movk x0, #0xd1ffab1e LSL #16 IN0010: movk x0, #127 LSL #32 /--* t87 long Generating: N049 (???,???) [000163] ------------ t163 = * PUTARG_REG long REG x0 Generating: N051 ( 1, 2) [000088] ------------ t88 = CNS_INT int 91 REG x1 $42 IN0011: mov w1, #91 /--* t88 int Generating: N053 (???,???) [000164] ------------ t164 = * PUTARG_REG int REG x1 /--* t163 long arg0 in x0 +--* t164 int arg1 in x1 Generating: N055 ( 18, 18) [000089] --CXG------- t89 = * CALL help long HELPER.CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE REG x0 $242 Call: GCvars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {} IN0012: bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE Generating: N057 ( 1, 2) [000081] -c---------- t81 = CNS_INT int 0 REG NA $40 /--* t81 int Generating: N059 (???,???) [000165] ------------ t165 = * SIMD simd16 float init REG d16 IN0013: dup v16.4s, wzr /--* t165 simd16 Generating: N061 ( 5, 5) [000082] DA--G------- * STORE_LCL_VAR struct(AX) V10 tmp7 NA REG NA IN0014: str q16, [fp,#48] // [V10 tmp7] Generating: N063 ( 3, 12) [000133] H----------- t133 = CNS_INT(h) long 0xD1FFAB1E [ICON_STR_HDL] REG x1 $102 IN0015: movz x1, #0xd1ffab1e IN0016: movk x1, #0xd1ffab1e LSL #16 IN0017: movk x1, #127 LSL #32 /--* t133 long Generating: N065 ( 6, 14) [000134] #---G------- t134 = * IND ref REG x1 $c9 IN0018: ldr x1, [x1] GC regs: 0000 {} => 0002 {x1} /--* t134 ref Generating: N067 (???,???) [000166] ----G------- t166 = * PUTARG_REG ref REG x1 GC regs: 0002 {x1} => 0000 {} GC regs: 0000 {} => 0002 {x1} Generating: N069 ( 3, 3) [000084] ------------ t84 = LCL_VAR_ADDR byref V10 tmp7 x0 REG x0 $381 IN0019: add x0, fp, #48 // [V10 tmp7] Byref regs: 0000 {} => 0001 {x0} /--* t84 byref Generating: N071 (???,???) [000167] ------------ t167 = * PUTARG_REG byref REG x0 Byref regs: 0001 {x0} => 0000 {} Byref regs: 0000 {} => 0001 {x0} /--* t166 ref arg1 in x1 +--* t167 byref this in x0 Generating: N073 ( 23, 22) [000085] --CXG------- * CALL void System.Guid..ctor REG NA $VN.Void GC regs: 0002 {x1} => 0000 {} Byref regs: 0001 {x0} => 0000 {} Call: GCvars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {} IN001a: bl System.Guid:.ctor(System.String):this Generating: N075 ( 3, 2) [000086] -------N---- t86 = LCL_VAR struct(AX) V10 tmp7 d16 REG d16 $304 IN001b: ldr q16, [fp,#48] // [V10 tmp7] /--* t86 struct Generating: N077 ( 3, 3) [000093] DA--G------- * STORE_LCL_VAR struct V07 tmp4 d:2 d16 REG d16 V07 in reg d16 is becoming live [000093] Live regs: 0000 {} => 0000 {d16} Live vars: {V06} => {V06 V07} Generating: N079 ( 1, 1) [000100] ------------ t100 = LCL_VAR struct V06 tmp3 u:2 d17 (last use) REG d17 $303 IN001c: ldr q17, [fp,#64] // [V06 tmp3] Live vars: {V06 V07} => {V07} /--* t100 struct Generating: N081 ( 5, 4) [000122] DA--G------- * STORE_LCL_VAR struct(AX) V13 tmp10 NA REG NA IN001d: str q17, [fp,#32] // [V13 tmp10] Generating: N083 ( 1, 1) [000098] ------------ t98 = LCL_VAR struct V07 tmp4 u:2 d16 (last use) REG d16 $307 /--* t98 struct Generating: N085 ( 5, 4) [000125] DA--G------- * STORE_LCL_VAR struct(AX) V14 tmp11 NA REG NA V07 in reg d16 is becoming dead [000098] Live regs: 0000 {d16} => 0000 {} Live vars: {V07} => {} IN001e: str q16, [fp,#16] // [V14 tmp11] Generating: N087 ( 3, 3) [000114] ------------ t114 = LCL_VAR_ADDR long V13 tmp10 x0 REG x0 $87 IN001f: add x0, fp, #32 // [V13 tmp10] /--* t114 long Generating: N089 (???,???) [000168] ------------ t168 = * PUTARG_REG long REG x0 Generating: N091 ( 3, 3) [000116] ------------ t116 = LCL_VAR_ADDR long V14 tmp11 x1 REG x1 $88 IN0020: add x1, fp, #16 // [V14 tmp11] /--* t116 long Generating: N093 (???,???) [000169] ------------ t169 = * PUTARG_REG long REG x1 /--* t168 long arg0 in x0 +--* t169 long arg1 in x1 Generating: N095 ( 20, 10) [000117] --CXG------- t117 = * CALL int System.Guid.EqualsCore REG x0 $342 Call: GCvars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {} IN0021: bl System.Guid:EqualsCore(byref,byref):bool /--* t117 int Generating: N097 ( 21, 12) [000119] ---XG------- t119 = * CAST int <- bool <- int REG x0 $281 IN0022: uxtb w0, w0 /--* t119 int Generating: N099 ( 25, 15) [000054] DA-XG------- * STORE_LCL_VAR int V02 loc1 d:4 NA REG NA IN0023: str w0, [fp,#84] // [V02 loc1] Live vars: {} => {V02} New debug range: first Variable Live Range History Dump for BB03 V02 loc1: fp[84] (1 slot) [(G_M12172_IG02,ins#35,ofs#140), ...] =============== Generating BB04 [02E..030) (return), preds={BB03,BB05} succs={} flags=0x00000000.20010020: i label LIR BB04 IN (1)={V02} OUT(0)={ } Recording Var Locations at start of BB04 Liveness not changing: 0000000000000020 {V02} Live regs: (unchanged) 0000 {} GC regs: (unchanged) 0000 {} Byref regs: (unchanged) 0000 {} L_M12172_BB04: G_M12172_IG02: ; offs=000000H, funclet=00, bbWeight=1 Mapped BB04 to G_M12172_IG03 Label: IG03, GCvars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {} Scope info: begin block BB04, IL range [02E..030) Added IP mapping: 0x002E STACK_EMPTY (G_M12172_IG03,ins#0,ofs#0) label Generating: N103 (???,???) [000158] ------------ IL_OFFSET void IL offset: 0x2e REG NA Generating: N105 ( 3, 2) [000055] ------------ t55 = LCL_VAR int V02 loc1 u:3 x0 (last use) REG x0 $400 IN0024: ldr w0, [fp,#84] // [V02 loc1] Live vars: {V02} => {} /--* t55 int Generating: N107 ( 4, 3) [000056] ------------ * RETURN int REG NA $345 Added IP mapping: EPILOG STACK_EMPTY (G_M12172_IG03,ins#1,ofs#4) label Reserving epilog IG for block BB04 G_M12172_IG03: ; offs=00008CH, funclet=00, bbWeight=1 *************** After placeholder IG creation G_M12172_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=0000 {} <-- Prolog IG G_M12172_IG02: ; offs=000000H, size=008CH, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB01 [0000], BB03 [0006], byref G_M12172_IG03: ; offs=00008CH, size=0004H, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB04 [0002], byref G_M12172_IG04: ; epilog placeholder, next placeholder=, BB04 [0002], epilog, extend <-- First placeholder <-- Last placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} G_M12172_IG05: ; offs=000190H, size=0000H, gcrefRegs=0000 {} <-- Current IG Variable Live Range History Dump for BB04 V02 loc1: fp[84] (1 slot) [(G_M12172_IG02,ins#35,ofs#140), (G_M12172_IG03,ins#1,ofs#4)] =============== Generating BB05 [021..02E) -> BB04 (cret), preds={} succs={BB04} flags=0x00000004.20411230: keep i rare label flet newobj LIR BB05 IN (0)={ } OUT(1)={V02} Recording Var Locations at start of BB05 Liveness not changing: 0000000000000000 {} Live regs: (unchanged) 0000 {} GC regs: (unchanged) 0000 {} Byref regs: (unchanged) 0000 {} L_M12172_BB05: Mapped BB05 to G_M12172_IG05 Label: IG05, GCvars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {} Scope info: found beginning of funclet region at block BB05; ignoring following blocks Reserving funclet prolog IG for block BB05 Added IP mapping: PROLOG STACK_EMPTY (G_M12172_IG05,ins#0,ofs#256) label *************** After placeholder IG creation G_M12172_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=0000 {} <-- Prolog IG G_M12172_IG02: ; offs=000000H, size=008CH, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB01 [0000], BB03 [0006], byref G_M12172_IG03: ; offs=00008CH, size=0004H, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB04 [0002], byref G_M12172_IG04: ; epilog placeholder, next placeholder=IG05 , BB04 [0002], epilog, extend <-- First placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} G_M12172_IG05: ; func=01, funclet prolog placeholder, next placeholder=, BB05 [0001], funclet prolog <-- Last placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} G_M12172_IG06: ; offs=000290H, size=0000H, gcrefRegs=0000 {} <-- Current IG Generating: N111 ( 1, 2) [000076] -c---------- t76 = CNS_INT int 0 REG NA $40 /--* t76 int Generating: N113 ( 5, 5) [000078] DA---------- * STORE_LCL_VAR int V02 loc1 d:2 NA REG NA IN0025: str wzr, [fp,#84] // [V02 loc1] Live vars: {} => {V02} New debug range: new var or location IN0026: adr x0, (LARGEADR)[L_M12172_BB04] Reserving funclet epilog IG for block BB05 G_M12172_IG06: ; offs=000290H, funclet=01, bbWeight=0 Added IP mapping: EPILOG STACK_EMPTY (G_M12172_IG07,ins#0,ofs#256) label *************** After placeholder IG creation G_M12172_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=0000 {} <-- Prolog IG G_M12172_IG02: ; offs=000000H, size=008CH, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB01 [0000], BB03 [0006], byref G_M12172_IG03: ; offs=00008CH, size=0004H, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB04 [0002], byref G_M12172_IG04: ; epilog placeholder, next placeholder=IG05 , BB04 [0002], epilog, extend <-- First placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} G_M12172_IG05: ; func=01, funclet prolog placeholder, next placeholder=IG07 , BB05 [0001], funclet prolog ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} G_M12172_IG06: ; offs=000290H, size=000CH, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB05 [0001], gcvars, byref G_M12172_IG07: ; funclet epilog placeholder, next placeholder=, BB05 [0001], funclet epilog, extend <-- Last placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} Variable Live Range History Dump for BB05 V02 loc1: fp[84] (1 slot) [(G_M12172_IG06,ins#1,ofs#4), (G_M12172_IG06,ins#1,ofs#4)] Change life 0000000000000020 {V02} -> 0000000000000000 {} # compCycleEstimate = 149, compSizeEstimate = 129 NullableTest16:BoxUnboxToNQGen(long):bool ; Final local variable assignments ; ; V00 arg0 [V00,T02] ( 3, 3 ) long -> x19 single-def ;* V01 loc0 [V01 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op ; V02 loc1 [V02,T05] ( 3, 2 ) bool -> [fp+54H] do-not-enreg[M] EH-live ;# V03 OutArgs [V03 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace" ; V04 tmp1 [V04,T00] ( 3, 6 ) ref -> x20 class-hnd exact single-def "Single-def Box Helper" ; V05 tmp2 [V05,T01] ( 3, 6 ) ref -> x20 single-def "inline UNBOX clone1" ; V06 tmp3 [V06,T03] ( 2, 4 ) struct (16) [fp+40H] do-not-enreg[SB] "impSpillLclRefs" ; V07 tmp4 [V07,T04] ( 2, 4 ) struct (16) d16 "struct address for call/obj" ;* V08 tmp5 [V08 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def "impSpillSpecialSideEff" ;* V09 tmp6 [V09 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Single-def Box Helper" ; V10 tmp7 [V10 ] ( 3, 6 ) struct (16) [fp+30H] do-not-enreg[XS] addr-exposed "NewObj constructor temp" ;* V11 tmp8 [V11 ] ( 0, 0 ) struct (16) zero-ref "Inlining Arg" ;* V12 tmp9 [V12 ] ( 0, 0 ) struct (16) zero-ref "Inlining Arg" ; V13 tmp10 [V13 ] ( 2, 4 ) struct (16) [fp+20H] do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" ; V14 tmp11 [V14 ] ( 2, 4 ) struct (16) [fp+10H] do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" ; V15 PSPSym [V15 ] ( 1, 1 ) long -> [fp+58H] do-not-enreg[X] addr-exposed "PSPSym" ;* V16 cse0 [V16,T06] ( 0, 0 ) long -> zero-ref "CSE - aggressive" ; ; Lcl frame size = 80 *************** Before prolog / epilog generation G_M12172_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=0000 {} <-- Prolog IG G_M12172_IG02: ; offs=000000H, size=008CH, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB01 [0000], BB03 [0006], byref G_M12172_IG03: ; offs=00008CH, size=0004H, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB04 [0002], byref G_M12172_IG04: ; epilog placeholder, next placeholder=IG05 , BB04 [0002], epilog, extend <-- First placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} G_M12172_IG05: ; func=01, funclet prolog placeholder, next placeholder=IG07 , BB05 [0001], funclet prolog ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} G_M12172_IG06: ; offs=000290H, size=000CH, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB05 [0001], gcvars, byref G_M12172_IG07: ; funclet epilog placeholder, next placeholder=, BB05 [0001], funclet epilog, extend <-- Last placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=0000 {}, PrevByrefRegs=0000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=0000 {}, InitByrefRegs=0000 {} Recording Var Locations at start of BB01 V00(x19) *************** In genFnProlog() Added IP mapping to front: PROLOG STACK_EMPTY (G_M12172_IG01,ins#0,ofs#0) label __prolog: New debug range: first Save float regs: [] Save int regs: [x19-x20 fp lr] Frame type 1. #outsz=0; #framesz=112; LclFrameSize=80 IN0027: stp fp, lr, [sp,#-112]! offset=96, calleeSaveSPDelta=0 IN0028: stp x19, x20, [sp,#96] offsetSpToSavedFp=0 IN0029: mov fp, sp IN002a: add x1, sp, #112 IN002b: str x1, [fp,#88] // [V15 PSPSym] *************** In genFnPrologCalleeRegArgs() for int regs IN002c: mov x19, x0 *************** In genEnregisterIncomingStackArgs() G_M12172_IG01: ; offs=000000H, funclet=00, bbWeight=1 Funclet prolog / epilog info Save regs: [x19-x20 fp lr] Function CallerSP-to-FP delta: -112 SP to FP/LR save location delta: 0 SP to PSP slot delta: 24 SP to callee-saved area delta: 32 Caller SP to PSP slot delta: -24 Frame type: 1 SP delta 1: -48 SP delta 2: 0 *************** In genFnEpilog() __epilog: gcVarPtrSetCur=0000000000000000 {}, gcRegGCrefSetCur=0000 {}, gcRegByrefSetCur=0000 {} Frame type 1. #outsz=0; #framesz=112; localloc? false calleeSaveSPOffset=96, calleeSaveSPDelta=0 IN002d: ldp x19, x20, [sp,#96] IN002e: ldp fp, lr, [sp],#112 IN002f: ret lr G_M12172_IG04: ; offs=000090H, funclet=00, bbWeight=1 *************** In genFuncletProlog() IN0030: stp fp, lr, [sp,#-48]! IN0031: stp x19, x20, [sp,#32] IN0032: add x3, fp, #112 IN0033: str x3, [sp,#24] G_M12172_IG05: ; offs=000190H, funclet=01, bbWeight=0 *************** In genFuncletEpilog() IN0034: ldp x19, x20, [sp,#32] IN0035: ldp fp, lr, [sp],#48 IN0036: ret lr G_M12172_IG07: ; offs=00029CH, funclet=01, bbWeight=0 0 prologs, 1 epilogs, 1 funclet prologs, 1 funclet epilogs *************** After prolog / epilog generation G_M12172_IG01: ; func=00, offs=000000H, size=0018H, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG G_M12172_IG02: ; offs=000018H, size=008CH, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB01 [0000], BB03 [0006], byref G_M12172_IG03: ; offs=0000A4H, size=0004H, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB04 [0002], byref G_M12172_IG04: ; offs=0000A8H, size=000CH, epilog, nogc, extend G_M12172_IG05: ; func=01, offs=0000B4H, size=0010H, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, funclet prolog, nogc G_M12172_IG06: ; offs=0000C4H, size=000CH, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB05 [0001], gcvars, byref G_M12172_IG07: ; offs=0000D0H, size=000CH, funclet epilog, nogc, extend *************** In emitJumpDistBind() Binding: IN0026: adr x0, (LARGEADR)[L_M12172_BB04] Binding L_M12172_BB04 to G_M12172_IG03 Estimate of bwd jump [D1FFAB1E/038]: 00C8 -> 00A4 = 0024 Shrinking jump [D1FFAB1E/038] Adjusted offset of BB07 from 00D0 to 00CC Total shrinkage = 4, min extra jump size = 4294967295 *************** Finishing PHASE Generate code *************** Starting PHASE Emit code Hot code size = 0xD8 bytes Cold code size = 0x0 bytes reserveUnwindInfo(isFunclet=false, isColdCode=false, unwindSize=0x10) reserveUnwindInfo(isFunclet=true, isColdCode=false, unwindSize=0x8) *************** In emitEndCodeGen() Converting emitMaxStackDepth from bytes (0) to elements (0) *************************************************************************** Instructions as they come out of the scheduler G_M12172_IG01: ; func=00, offs=000000H, size=0018H, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG IN0027: 000000 stp fp, lr, [sp,#-112]! IN0028: 000004 stp x19, x20, [sp,#96] IN0029: 000008 mov fp, sp IN002a: 00000C add x1, sp, #112 IN002b: 000010 str x1, [fp,#88] // [V15 PSPSym] IN002c: 000014 mov x19, x0 ;; bbWeight=1 PerfScore 4.50 G_M12172_IG02: ; func=00, offs=000018H, size=008CH, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB01 [0000], BB03 [0006], byref IN0001: 000018 movz x0, #0xd1ffab1e IN0002: 00001C movk x0, #0xd1ffab1e LSL #16 IN0003: 000020 movk x0, #127 LSL #32 IN0004: 000024 bl CORINFO_HELP_NEWSFAST ; gcrRegs +[x0] ; gcr arg pop 0 IN0005: 000028 mov x20, x0 ; gcrRegs +[x20] IN0006: 00002C str x19, [x20,#8] IN0007: 000030 mov x1, x20 ; gcrRegs +[x1] IN0008: 000034 movz x0, #0xd1ffab1e ; gcrRegs -[x0] IN0009: 000038 movk x0, #0xd1ffab1e LSL #16 IN000a: 00003C movk x0, #127 LSL #32 IN000b: 000040 bl CORINFO_HELP_UNBOX ; gcrRegs -[x1] ; gcr arg pop 0 IN000c: 000044 ldr q16, [x20,#8] IN000d: 000048 str q16, [fp,#64] IN000e: 00004C movz x0, #0xd1ffab1e IN000f: 000050 movk x0, #0xd1ffab1e LSL #16 IN0010: 000054 movk x0, #127 LSL #32 IN0011: 000058 mov w1, #91 IN0012: 00005C bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE ; gcrRegs -[x20] ; gcr arg pop 0 IN0013: 000060 dup v16.4s, wzr IN0014: 000064 str q16, [fp,#48] // [V10 tmp7] IN0015: 000068 movz x1, #0xd1ffab1e IN0016: 00006C movk x1, #0xd1ffab1e LSL #16 IN0017: 000070 movk x1, #127 LSL #32 IN0018: 000074 ldr x1, [x1] ; gcrRegs +[x1] IN0019: 000078 add x0, fp, #48 // [V10 tmp7] ; byrRegs +[x0] IN001a: 00007C bl System.Guid:.ctor(System.String):this ; gcrRegs -[x1] ; byrRegs -[x0] ; gcr arg pop 0 IN001b: 000080 ldr q16, [fp,#48] // [V10 tmp7] IN001c: 000084 ldr q17, [fp,#64] // [V06 tmp3] IN001d: 000088 str q17, [fp,#32] // [V13 tmp10] IN001e: 00008C str q16, [fp,#16] // [V14 tmp11] IN001f: 000090 add x0, fp, #32 // [V13 tmp10] IN0020: 000094 add x1, fp, #16 // [V14 tmp11] IN0021: 000098 bl System.Guid:EqualsCore(byref,byref):bool ; gcr arg pop 0 IN0022: 00009C uxtb w0, w0 IN0023: 0000A0 str w0, [fp,#84] // [V02 loc1] ;; bbWeight=1 PerfScore 32.50 G_M12172_IG03: ; func=00, offs=0000A4H, size=0004H, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB04 [0002], byref IN0024: 0000A4 ldr w0, [fp,#84] // [V02 loc1] ;; bbWeight=1 PerfScore 2.00 G_M12172_IG04: ; func=00, offs=0000A8H, size=000CH, epilog, nogc, extend IN002d: 0000A8 ldp x19, x20, [sp,#96] IN002e: 0000AC ldp fp, lr, [sp],#112 IN002f: 0000B0 ret lr ;; bbWeight=1 PerfScore 3.00 G_M12172_IG05: ; func=01, offs=0000B4H, size=0010H, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, funclet prolog, nogc IN0030: 0000B4 stp fp, lr, [sp,#-48]! IN0031: 0000B8 stp x19, x20, [sp,#32] IN0032: 0000BC add x3, fp, #112 IN0033: 0000C0 str x3, [sp,#24] ;; bbWeight=0 PerfScore 0.00 G_M12172_IG06: ; func=01, offs=0000C4H, size=0008H, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB05 [0001], gcvars, byref, isz IN0025: 0000C4 str wzr, [fp,#84] // [V02 loc1] IN0026: 0000C8 adr x0, [G_M12172_IG03] ;; bbWeight=0 PerfScore 0.00 G_M12172_IG07: ; func=01, offs=0000CCH, size=000CH, funclet epilog, nogc, extend IN0034: 0000CC ldp x19, x20, [sp,#32] IN0035: 0000D0 ldp fp, lr, [sp],#48 IN0036: 0000D4 ret lr ;; bbWeight=0 PerfScore 0.00 Allocated method code size = 216 , actual size = 216, unused size = 0 ; Total bytes of code 216, prolog size 24, PerfScore 63.60, instruction count 54, allocated bytes for code 216 (MethodHash=1570d073) for method NullableTest16:BoxUnboxToNQGen(long):bool ; ============================================================ *************** After end code gen, before unwindEmit() G_M12172_IG01: ; func=00, offs=000000H, size=0018H, bbWeight=1 PerfScore 4.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG IN0027: 000000 stp fp, lr, [sp,#-112]! IN0028: 000004 stp x19, x20, [sp,#96] IN0029: 000008 mov fp, sp IN002a: 00000C add x1, sp, #112 IN002b: 000010 str x1, [fp,#88] // [V15 PSPSym] IN002c: 000014 mov x19, x0 G_M12172_IG02: ; offs=000018H, size=008CH, bbWeight=1 PerfScore 32.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB01 [0000], BB03 [0006], byref IN0001: 000018 movz x0, #0xd1ffab1e IN0002: 00001C movk x0, #0xd1ffab1e LSL #16 IN0003: 000020 movk x0, #127 LSL #32 IN0004: 000024 bl CORINFO_HELP_NEWSFAST IN0005: 000028 mov x20, x0 IN0006: 00002C str x19, [x20,#8] IN0007: 000030 mov x1, x20 IN0008: 000034 movz x0, #0xd1ffab1e IN0009: 000038 movk x0, #0xd1ffab1e LSL #16 IN000a: 00003C movk x0, #127 LSL #32 IN000b: 000040 bl CORINFO_HELP_UNBOX IN000c: 000044 ldr q16, [x20,#8] IN000d: 000048 str q16, [fp,#64] IN000e: 00004C movz x0, #0xd1ffab1e IN000f: 000050 movk x0, #0xd1ffab1e LSL #16 IN0010: 000054 movk x0, #127 LSL #32 IN0011: 000058 mov w1, #91 IN0012: 00005C bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE IN0013: 000060 dup v16.4s, wzr IN0014: 000064 str q16, [fp,#48] // [V10 tmp7] IN0015: 000068 movz x1, #0xd1ffab1e IN0016: 00006C movk x1, #0xd1ffab1e LSL #16 IN0017: 000070 movk x1, #127 LSL #32 IN0018: 000074 ldr x1, [x1] IN0019: 000078 add x0, fp, #48 // [V10 tmp7] IN001a: 00007C bl System.Guid:.ctor(System.String):this IN001b: 000080 ldr q16, [fp,#48] // [V10 tmp7] IN001c: 000084 ldr q17, [fp,#64] // [V06 tmp3] IN001d: 000088 str q17, [fp,#32] // [V13 tmp10] IN001e: 00008C str q16, [fp,#16] // [V14 tmp11] IN001f: 000090 add x0, fp, #32 // [V13 tmp10] IN0020: 000094 add x1, fp, #16 // [V14 tmp11] IN0021: 000098 bl System.Guid:EqualsCore(byref,byref):bool IN0022: 00009C uxtb w0, w0 IN0023: 0000A0 str w0, [fp,#84] // [V02 loc1] G_M12172_IG03: ; offs=0000A4H, size=0004H, bbWeight=1 PerfScore 2.00, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB04 [0002], byref IN0024: 0000A4 ldr w0, [fp,#84] // [V02 loc1] G_M12172_IG04: ; offs=0000A8H, size=000CH, bbWeight=1 PerfScore 3.00, epilog, nogc, extend IN002d: 0000A8 ldp x19, x20, [sp,#96] IN002e: 0000AC ldp fp, lr, [sp],#112 IN002f: 0000B0 ret lr G_M12172_IG05: ; func=01, offs=0000B4H, size=0010H, bbWeight=0 PerfScore 0.00, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, funclet prolog, nogc IN0030: 0000B4 stp fp, lr, [sp,#-48]! IN0031: 0000B8 stp x19, x20, [sp,#32] IN0032: 0000BC add x3, fp, #112 IN0033: 0000C0 str x3, [sp,#24] G_M12172_IG06: ; offs=0000C4H, size=0008H, bbWeight=0 PerfScore 0.00, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, BB05 [0001], gcvars, byref, isz IN0025: 0000C4 str wzr, [fp,#84] // [V02 loc1] IN0026: 0000C8 adr x0, [G_M12172_IG03] G_M12172_IG07: ; offs=0000CCH, size=000CH, bbWeight=0 PerfScore 0.00, funclet epilog, nogc, extend IN0034: 0000CC ldp x19, x20, [sp,#32] IN0035: 0000D0 ldp fp, lr, [sp],#48 IN0036: 0000D4 ret lr *************** Finishing PHASE Emit code *************** Starting PHASE Emit GC+EH tables Unwind Info: >> Start offset : 0x000000 (not in unwind data) >> End offset : 0xd1ffab1e (not in unwind data) Code Words : 2 Epilog Count : 1 E bit : 0 X bit : 0 Vers : 0 Function Length : 45 (0x0002d) Actual length = 180 (0x0000b4) ---- Epilog scopes ---- ---- Scope 0 Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e) Epilog Start Index : 1 (0x01) ---- Unwind codes ---- E1 set_fp; mov fp, sp ---- Epilog start at index 1 ---- C8 0C save_regp X#0 Z#12 (0x0C); stp x19, x20, [sp, #96] 8D save_fplr_x #13 (0x0D); stp fp, lr, [sp, #-112]! E4 end E4 end E4 end E4 end allocUnwindInfo(pHotCode=0x00000000D1FFAB1E, pColdCode=0x0000000000000000, startOffset=0x0, endOffset=0xb4, unwindSize=0x10, pUnwindBlock=0x00000000D1FFAB1E, funKind=0 (main function)) Unwind Info: >> Start offset : 0xd1ffab1e (not in unwind data) >> End offset : 0xd1ffab1e (not in unwind data) Code Words : 1 Epilog Count : 0 E bit : 1 X bit : 0 Vers : 0 Function Length : 9 (0x00009) Actual length = 36 (0x000024) --- One epilog, unwind codes at 0 ---- Unwind codes ---- ---- Epilog start at index 0 ---- C8 04 save_regp X#0 Z#4 (0x04); stp x19, x20, [sp, #32] 85 save_fplr_x #5 (0x05); stp fp, lr, [sp, #-48]! E4 end allocUnwindInfo(pHotCode=0x00000000D1FFAB1E, pColdCode=0x0000000000000000, startOffset=0xb4, endOffset=0xd8, unwindSize=0x8, pUnwindBlock=0x00000000D1FFAB1E, funKind=1 (handler)) *************** In genIPmappingGen() IP mapping count : 6 IL offs PROLOG : 0x00000000 ( STACK_EMPTY ) IL offs 0x0000 : 0x00000018 ( STACK_EMPTY ) IL offs 0x002E : 0x000000A4 ( STACK_EMPTY ) IL offs EPILOG : 0x000000A8 ( STACK_EMPTY ) IL offs PROLOG : 0x000000B4 ( STACK_EMPTY ) IL offs EPILOG : 0x000000CC ( STACK_EMPTY ) *************** In genSetScopeInfo() VarLocInfo count is 4 ; Variable debug info: 4 live ranges, 2 vars for method NullableTest16:BoxUnboxToNQGen(long):bool 0( UNKNOWN) : From 00000000h to 00000018h, in x0 0( UNKNOWN) : From 00000018h to 0000002Ch, in x19 2( UNKNOWN) : From 000000A4h to 000000A8h, in fp[84] (1 slot) 2( UNKNOWN) : From 000000C8h to 000000C8h, in fp[84] (1 slot) VARIABLE LIVE RANGES: V00 arg0: x19 [18, 2C) V02 loc1: fp[84] (1 slot) [A4, A8); fp[84] (1 slot) [C8, C8) *************** EH table for NullableTest16:BoxUnboxToNQGen(long):bool 1 EH table entries, 0 duplicate clauses, 0 cloned finallys, 1 total EH entries reported to VM setEHcount(cEH=1) EH#0: try [G_M12172_IG02..G_M12172_IG03) handled by [G_M12172_IG05..END) (class: 1000006) *************** In gcInfoBlockHdrSave() Set code length to 216. Set ReturnKind to Scalar. Set stack base register to fp. Set PSPSym stack slot to -24. Set Outgoing stack arg area size to 0. Register slot id for reg x0 = 0. Register slot id for reg x20 = 1. Register slot id for reg x1 = 2. Register slot id for reg x0 (byref) = 3. Set state of slot 0 at instr offset 0x28 to Live. Set state of slot 1 at instr offset 0x2c to Live. Set state of slot 2 at instr offset 0x34 to Live. Set state of slot 0 at instr offset 0x38 to Dead. Set state of slot 2 at instr offset 0x44 to Dead. Set state of slot 1 at instr offset 0x60 to Dead. Set state of slot 2 at instr offset 0x78 to Live. Set state of slot 3 at instr offset 0x7c to Live. Set state of slot 2 at instr offset 0x80 to Dead. Set state of slot 3 at instr offset 0x80 to Dead. Defining interruptible range: [0x18, 0xa8). Defining interruptible range: [0xc4, 0xcc). *************** Finishing PHASE Emit GC+EH tables Method code size: 216 Allocations for NullableTest16:BoxUnboxToNQGen(long):bool (MethodHash=1570d073) count: 1977, size: 166874, max = 5120 allocateMemory: 196608, nraUsed: 172160 Alloc'd bytes by kind: kind | size | pct ---------------------+------------+-------- AssertionProp | 6716 | 4.02% ASTNode | 26280 | 15.75% InstDesc | 7612 | 4.56% ImpStack | 408 | 0.24% BasicBlock | 3800 | 2.28% fgArgInfo | 792 | 0.47% fgArgInfoPtrArr | 88 | 0.05% FlowList | 536 | 0.32% TreeStatementList | 192 | 0.12% SiScope | 0 | 0.00% DominatorMemory | 304 | 0.18% LSRA | 7488 | 4.49% LSRA_Interval | 2560 | 1.53% LSRA_RefPosition | 22608 | 13.55% Reachability | 16 | 0.01% SSA | 1936 | 1.16% ValueNumber | 13839 | 8.29% LvaTable | 6036 | 3.62% UnwindInfo | 96 | 0.06% hashBv | 120 | 0.07% bitset | 536 | 0.32% FixedBitVect | 64 | 0.04% Generic | 3090 | 1.85% LocalAddressVisitor | 0 | 0.00% FieldSeqStore | 56 | 0.03% ZeroOffsetFieldMap | 160 | 0.10% ArrayInfoMap | 272 | 0.16% MemoryPhiArg | 0 | 0.00% CSE | 2064 | 1.24% GC | 3080 | 1.85% CorTailCallInfo | 0 | 0.00% Inlining | 5184 | 3.11% ArrayStack | 0 | 0.00% DebugInfo | 312 | 0.19% DebugOnly | 46642 | 27.95% Codegen | 1088 | 0.65% LoopOpt | 96 | 0.06% LoopClone | 0 | 0.00% LoopHoist | 0 | 0.00% Unknown | 787 | 0.47% RangeCheck | 0 | 0.00% CopyProp | 968 | 0.58% SideEffects | 0 | 0.00% ObjectAllocator | 0 | 0.00% VariableLiveRanges | 760 | 0.46% ClassLayout | 64 | 0.04% TailMergeThrows | 0 | 0.00% EarlyProp | 0 | 0.00% ZeroInit | 224 | 0.13% Pgo | 0 | 0.00% ****** DONE compiling NullableTest16:BoxUnboxToNQGen(long):bool