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Expose AVX512 variants of AVX, AVX2, and FMA instructions #85228

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2 changes: 2 additions & 0 deletions src/coreclr/inc/clrconfigvalues.h
Original file line number Original file line Diff line number Diff line change
Expand Up @@ -768,6 +768,8 @@ RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512DQ, W("EnableAVX512DQ"), 1
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512DQ_VL, W("EnableAVX512DQ_VL"), 1, "Allows AVX512DQ_VL+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512DQ_VL, W("EnableAVX512DQ_VL"), 1, "Allows AVX512DQ_VL+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F, W("EnableAVX512F"), 1, "Allows AVX512F+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F, W("EnableAVX512F"), 1, "Allows AVX512F+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F_VL, W("EnableAVX512F_VL"), 1, "Allows AVX512F_VL+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F_VL, W("EnableAVX512F_VL"), 1, "Allows AVX512F_VL+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512VBMI, W("EnableAVX512VBMI"), 1, "Allows AVX512VBMI+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512VBMI_VL, W("EnableAVX512VBMI_VL"), 1, "Allows AVX512VBMI_VL+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNI, W("EnableAVXVNNI"), 1, "Allows AVXVNNI+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNI, W("EnableAVXVNNI"), 1, "Allows AVXVNNI+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI1, W("EnableBMI1"), 1, "Allows BMI1+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI1, W("EnableBMI1"), 1, "Allows BMI1+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI2, W("EnableBMI2"), 1, "Allows BMI2+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI2, W("EnableBMI2"), 1, "Allows BMI2+ hardware intrinsics to be disabled")
Expand Down
152 changes: 98 additions & 54 deletions src/coreclr/inc/corinfoinstructionset.h
Original file line number Original file line Diff line number Diff line change
Expand Up @@ -69,33 +69,37 @@ enum CORINFO_InstructionSet
InstructionSet_AVX512CD_VL=28, InstructionSet_AVX512CD_VL=28,
InstructionSet_AVX512DQ=29, InstructionSet_AVX512DQ=29,
InstructionSet_AVX512DQ_VL=30, InstructionSet_AVX512DQ_VL=30,
InstructionSet_X86Base_X64=31, InstructionSet_AVX512VBMI=31,
InstructionSet_SSE_X64=32, InstructionSet_AVX512VBMI_VL=32,
InstructionSet_SSE2_X64=33, InstructionSet_X86Base_X64=33,
InstructionSet_SSE3_X64=34, InstructionSet_SSE_X64=34,
InstructionSet_SSSE3_X64=35, InstructionSet_SSE2_X64=35,
InstructionSet_SSE41_X64=36, InstructionSet_SSE3_X64=36,
InstructionSet_SSE42_X64=37, InstructionSet_SSSE3_X64=37,
InstructionSet_AVX_X64=38, InstructionSet_SSE41_X64=38,
InstructionSet_AVX2_X64=39, InstructionSet_SSE42_X64=39,
InstructionSet_AES_X64=40, InstructionSet_AVX_X64=40,
InstructionSet_BMI1_X64=41, InstructionSet_AVX2_X64=41,
InstructionSet_BMI2_X64=42, InstructionSet_AES_X64=42,
InstructionSet_FMA_X64=43, InstructionSet_BMI1_X64=43,
InstructionSet_LZCNT_X64=44, InstructionSet_BMI2_X64=44,
InstructionSet_PCLMULQDQ_X64=45, InstructionSet_FMA_X64=45,
InstructionSet_POPCNT_X64=46, InstructionSet_LZCNT_X64=46,
InstructionSet_AVXVNNI_X64=47, InstructionSet_PCLMULQDQ_X64=47,
InstructionSet_MOVBE_X64=48, InstructionSet_POPCNT_X64=48,
InstructionSet_X86Serialize_X64=49, InstructionSet_AVXVNNI_X64=49,
InstructionSet_AVX512F_X64=50, InstructionSet_MOVBE_X64=50,
InstructionSet_AVX512F_VL_X64=51, InstructionSet_X86Serialize_X64=51,
InstructionSet_AVX512BW_X64=52, InstructionSet_AVX512F_X64=52,
InstructionSet_AVX512BW_VL_X64=53, InstructionSet_AVX512F_VL_X64=53,
InstructionSet_AVX512CD_X64=54, InstructionSet_AVX512BW_X64=54,
InstructionSet_AVX512CD_VL_X64=55, InstructionSet_AVX512BW_VL_X64=55,
InstructionSet_AVX512DQ_X64=56, InstructionSet_AVX512CD_X64=56,
InstructionSet_AVX512DQ_VL_X64=57, InstructionSet_AVX512CD_VL_X64=57,
InstructionSet_AVX512DQ_X64=58,
InstructionSet_AVX512DQ_VL_X64=59,
InstructionSet_AVX512VBMI_X64=60,
InstructionSet_AVX512VBMI_VL_X64=61,
#endif // TARGET_AMD64 #endif // TARGET_AMD64
#ifdef TARGET_X86 #ifdef TARGET_X86
InstructionSet_X86Base=1, InstructionSet_X86Base=1,
Expand Down Expand Up @@ -128,33 +132,37 @@ enum CORINFO_InstructionSet
InstructionSet_AVX512CD_VL=28, InstructionSet_AVX512CD_VL=28,
InstructionSet_AVX512DQ=29, InstructionSet_AVX512DQ=29,
InstructionSet_AVX512DQ_VL=30, InstructionSet_AVX512DQ_VL=30,
InstructionSet_X86Base_X64=31, InstructionSet_AVX512VBMI=31,
InstructionSet_SSE_X64=32, InstructionSet_AVX512VBMI_VL=32,
InstructionSet_SSE2_X64=33, InstructionSet_X86Base_X64=33,
InstructionSet_SSE3_X64=34, InstructionSet_SSE_X64=34,
InstructionSet_SSSE3_X64=35, InstructionSet_SSE2_X64=35,
InstructionSet_SSE41_X64=36, InstructionSet_SSE3_X64=36,
InstructionSet_SSE42_X64=37, InstructionSet_SSSE3_X64=37,
InstructionSet_AVX_X64=38, InstructionSet_SSE41_X64=38,
InstructionSet_AVX2_X64=39, InstructionSet_SSE42_X64=39,
InstructionSet_AES_X64=40, InstructionSet_AVX_X64=40,
InstructionSet_BMI1_X64=41, InstructionSet_AVX2_X64=41,
InstructionSet_BMI2_X64=42, InstructionSet_AES_X64=42,
InstructionSet_FMA_X64=43, InstructionSet_BMI1_X64=43,
InstructionSet_LZCNT_X64=44, InstructionSet_BMI2_X64=44,
InstructionSet_PCLMULQDQ_X64=45, InstructionSet_FMA_X64=45,
InstructionSet_POPCNT_X64=46, InstructionSet_LZCNT_X64=46,
InstructionSet_AVXVNNI_X64=47, InstructionSet_PCLMULQDQ_X64=47,
InstructionSet_MOVBE_X64=48, InstructionSet_POPCNT_X64=48,
InstructionSet_X86Serialize_X64=49, InstructionSet_AVXVNNI_X64=49,
InstructionSet_AVX512F_X64=50, InstructionSet_MOVBE_X64=50,
InstructionSet_AVX512F_VL_X64=51, InstructionSet_X86Serialize_X64=51,
InstructionSet_AVX512BW_X64=52, InstructionSet_AVX512F_X64=52,
InstructionSet_AVX512BW_VL_X64=53, InstructionSet_AVX512F_VL_X64=53,
InstructionSet_AVX512CD_X64=54, InstructionSet_AVX512BW_X64=54,
InstructionSet_AVX512CD_VL_X64=55, InstructionSet_AVX512BW_VL_X64=55,
InstructionSet_AVX512DQ_X64=56, InstructionSet_AVX512CD_X64=56,
InstructionSet_AVX512DQ_VL_X64=57, InstructionSet_AVX512CD_VL_X64=57,
InstructionSet_AVX512DQ_X64=58,
InstructionSet_AVX512DQ_VL_X64=59,
InstructionSet_AVX512VBMI_X64=60,
InstructionSet_AVX512VBMI_VL_X64=61,
#endif // TARGET_X86 #endif // TARGET_X86


}; };
Expand Down Expand Up @@ -322,6 +330,10 @@ struct CORINFO_InstructionSetFlags
AddInstructionSet(InstructionSet_AVX512DQ_X64); AddInstructionSet(InstructionSet_AVX512DQ_X64);
if (HasInstructionSet(InstructionSet_AVX512DQ_VL)) if (HasInstructionSet(InstructionSet_AVX512DQ_VL))
AddInstructionSet(InstructionSet_AVX512DQ_VL_X64); AddInstructionSet(InstructionSet_AVX512DQ_VL_X64);
if (HasInstructionSet(InstructionSet_AVX512VBMI))
AddInstructionSet(InstructionSet_AVX512VBMI_X64);
if (HasInstructionSet(InstructionSet_AVX512VBMI_VL))
AddInstructionSet(InstructionSet_AVX512VBMI_VL_X64);
#endif // TARGET_AMD64 #endif // TARGET_AMD64
#ifdef TARGET_X86 #ifdef TARGET_X86
#endif // TARGET_X86 #endif // TARGET_X86
Expand Down Expand Up @@ -502,6 +514,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL); resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL);
if (resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL)) if (resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL))
resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL_X64); resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL_X64);
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_X64))
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI);
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI))
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_X64);
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL_X64))
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL);
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL))
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL_X64);
if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base)) if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
resultflags.RemoveInstructionSet(InstructionSet_SSE); resultflags.RemoveInstructionSet(InstructionSet_SSE);
if (resultflags.HasInstructionSet(InstructionSet_SSE2) && !resultflags.HasInstructionSet(InstructionSet_SSE)) if (resultflags.HasInstructionSet(InstructionSet_SSE2) && !resultflags.HasInstructionSet(InstructionSet_SSE))
Expand Down Expand Up @@ -560,6 +580,10 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ); resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ);
if (resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512F_VL)) if (resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512F_VL))
resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL); resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL);
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW))
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI);
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL))
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL);
#endif // TARGET_AMD64 #endif // TARGET_AMD64
#ifdef TARGET_X86 #ifdef TARGET_X86
if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base)) if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
Expand Down Expand Up @@ -620,6 +644,10 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ); resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ);
if (resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512F_VL)) if (resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512F_VL))
resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL); resultflags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL);
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW))
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI);
if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL))
resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL);
#endif // TARGET_X86 #endif // TARGET_X86


} while (!oldflags.Equals(resultflags)); } while (!oldflags.Equals(resultflags));
Expand Down Expand Up @@ -794,6 +822,14 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "AVX512DQ_VL"; return "AVX512DQ_VL";
case InstructionSet_AVX512DQ_VL_X64 : case InstructionSet_AVX512DQ_VL_X64 :
return "AVX512DQ_VL_X64"; return "AVX512DQ_VL_X64";
case InstructionSet_AVX512VBMI :
return "AVX512VBMI";
case InstructionSet_AVX512VBMI_X64 :
return "AVX512VBMI_X64";
case InstructionSet_AVX512VBMI_VL :
return "AVX512VBMI_VL";
case InstructionSet_AVX512VBMI_VL_X64 :
return "AVX512VBMI_VL_X64";
#endif // TARGET_AMD64 #endif // TARGET_AMD64
#ifdef TARGET_X86 #ifdef TARGET_X86
case InstructionSet_X86Base : case InstructionSet_X86Base :
Expand Down Expand Up @@ -856,6 +892,10 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "AVX512DQ"; return "AVX512DQ";
case InstructionSet_AVX512DQ_VL : case InstructionSet_AVX512DQ_VL :
return "AVX512DQ_VL"; return "AVX512DQ_VL";
case InstructionSet_AVX512VBMI :
return "AVX512VBMI";
case InstructionSet_AVX512VBMI_VL :
return "AVX512VBMI_VL";
#endif // TARGET_X86 #endif // TARGET_X86


default: default:
Expand Down Expand Up @@ -915,6 +955,8 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
case READYTORUN_INSTRUCTION_Avx512CD_VL: return InstructionSet_AVX512CD_VL; case READYTORUN_INSTRUCTION_Avx512CD_VL: return InstructionSet_AVX512CD_VL;
case READYTORUN_INSTRUCTION_Avx512DQ: return InstructionSet_AVX512DQ; case READYTORUN_INSTRUCTION_Avx512DQ: return InstructionSet_AVX512DQ;
case READYTORUN_INSTRUCTION_Avx512DQ_VL: return InstructionSet_AVX512DQ_VL; case READYTORUN_INSTRUCTION_Avx512DQ_VL: return InstructionSet_AVX512DQ_VL;
case READYTORUN_INSTRUCTION_Avx512Vbmi: return InstructionSet_AVX512VBMI;
case READYTORUN_INSTRUCTION_Avx512Vbmi_VL: return InstructionSet_AVX512VBMI_VL;
#endif // TARGET_AMD64 #endif // TARGET_AMD64
#ifdef TARGET_X86 #ifdef TARGET_X86
case READYTORUN_INSTRUCTION_X86Base: return InstructionSet_X86Base; case READYTORUN_INSTRUCTION_X86Base: return InstructionSet_X86Base;
Expand Down Expand Up @@ -944,6 +986,8 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
case READYTORUN_INSTRUCTION_Avx512CD_VL: return InstructionSet_AVX512CD_VL; case READYTORUN_INSTRUCTION_Avx512CD_VL: return InstructionSet_AVX512CD_VL;
case READYTORUN_INSTRUCTION_Avx512DQ: return InstructionSet_AVX512DQ; case READYTORUN_INSTRUCTION_Avx512DQ: return InstructionSet_AVX512DQ;
case READYTORUN_INSTRUCTION_Avx512DQ_VL: return InstructionSet_AVX512DQ_VL; case READYTORUN_INSTRUCTION_Avx512DQ_VL: return InstructionSet_AVX512DQ_VL;
case READYTORUN_INSTRUCTION_Avx512Vbmi: return InstructionSet_AVX512VBMI;
case READYTORUN_INSTRUCTION_Avx512Vbmi_VL: return InstructionSet_AVX512VBMI_VL;
#endif // TARGET_X86 #endif // TARGET_X86


default: default:
Expand Down
10 changes: 5 additions & 5 deletions src/coreclr/inc/jiteeversionguid.h
Original file line number Original file line Diff line number Diff line change
Expand Up @@ -43,11 +43,11 @@ typedef const GUID *LPCGUID;
#define GUID_DEFINED #define GUID_DEFINED
#endif // !GUID_DEFINED #endif // !GUID_DEFINED


constexpr GUID JITEEVersionIdentifier = { /* 236d7997-3d71-45f9-b7d7-5241ad89a56f */ constexpr GUID JITEEVersionIdentifier = { /* d5079702-9480-4e42-a720-6f38a0d9413d */
0x236d7997, 0xd5079702,
0x3d71, 0x9480,
0x45f9, 0x4e42,
{ 0xb7, 0xd7, 0x52, 0x41, 0xad, 0x89, 0xa5, 0x6f } {0xa7, 0x20, 0x6f, 0x38, 0xa0, 0xd9, 0x41, 0x3d}
}; };


////////////////////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////////////////////
Expand Down
2 changes: 2 additions & 0 deletions src/coreclr/inc/readytoruninstructionset.h
Original file line number Original file line Diff line number Diff line change
Expand Up @@ -45,6 +45,8 @@ enum ReadyToRunInstructionSet
READYTORUN_INSTRUCTION_Avx512CD_VL=34, READYTORUN_INSTRUCTION_Avx512CD_VL=34,
READYTORUN_INSTRUCTION_Avx512DQ=35, READYTORUN_INSTRUCTION_Avx512DQ=35,
READYTORUN_INSTRUCTION_Avx512DQ_VL=36, READYTORUN_INSTRUCTION_Avx512DQ_VL=36,
READYTORUN_INSTRUCTION_Avx512Vbmi=37,
READYTORUN_INSTRUCTION_Avx512Vbmi_VL=38,


}; };


Expand Down
2 changes: 2 additions & 0 deletions src/coreclr/jit/codegenxarch.cpp
Original file line number Original file line Diff line number Diff line change
Expand Up @@ -5632,6 +5632,8 @@ void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
case NI_AVX2_ExtractVector128: case NI_AVX2_ExtractVector128:
case NI_AVX512F_ExtractVector128: case NI_AVX512F_ExtractVector128:
case NI_AVX512F_ExtractVector256: case NI_AVX512F_ExtractVector256:
case NI_AVX512DQ_ExtractVector128:
case NI_AVX512DQ_ExtractVector256:
{ {
// These intrinsics are "ins reg/mem, xmm, imm8" // These intrinsics are "ins reg/mem, xmm, imm8"
ins = HWIntrinsicInfo::lookupIns(intrinsicId, baseType); ins = HWIntrinsicInfo::lookupIns(intrinsicId, baseType);
Expand Down
18 changes: 16 additions & 2 deletions src/coreclr/jit/compiler.cpp
Original file line number Original file line Diff line number Diff line change
Expand Up @@ -2326,10 +2326,12 @@ void Compiler::compSetProcessor()
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512F_VL); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512F_VL);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512BW); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512BW);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512BW_VL); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512BW_VL);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512DQ);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512CD); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512CD);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512CD_VL); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512CD_VL);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512DQ);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512VBMI);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL);


#ifdef TARGET_AMD64 #ifdef TARGET_AMD64
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512F_X64); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512F_X64);
Expand All @@ -2340,6 +2342,8 @@ void Compiler::compSetProcessor()
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512CD_VL_X64); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512CD_VL_X64);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512DQ_X64); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512DQ_X64);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL_X64); instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512DQ_VL_X64);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512VBMI_X64);
instructionSetFlags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL_X64);
#endif // TARGET_AMD64 #endif // TARGET_AMD64
} }
#elif defined(TARGET_ARM64) #elif defined(TARGET_ARM64)
Expand Down Expand Up @@ -6093,6 +6097,16 @@ int Compiler::compCompile(CORINFO_MODULE_HANDLE classPtr,
{ {
instructionSetFlags.AddInstructionSet(InstructionSet_AVX512DQ_VL); instructionSetFlags.AddInstructionSet(InstructionSet_AVX512DQ_VL);
} }

if (JitConfig.EnableAVX512VBMI() != 0)
{
instructionSetFlags.AddInstructionSet(InstructionSet_AVX512VBMI);
}

if (JitConfig.EnableAVX512VBMI_VL() != 0)
{
instructionSetFlags.AddInstructionSet(InstructionSet_AVX512VBMI_VL);
}
#endif #endif


// These calls are important and explicitly ordered to ensure that the flags are correct in // These calls are important and explicitly ordered to ensure that the flags are correct in
Expand Down
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