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dschaefer/fpga-bounce

Example fpga bounce with Yosys simulation.
  • SystemVerilog
  • 0
  • Updated
    on Nov 13, 2021
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Sponsor open source projects you depend on

Contributors are working behind the scenes to make open source better for everyone—give them the help and recognition they deserve.Explore sponsorable projects
ProTip! 
Press the
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key to activate the search input again and adjust your query.