This README file contains the following sections:
- OVERVIEW
- HOW TO DOWLOAD THE REPOSITORY
- SOFTWARE TOOLS AND SYSTEM REQUIREMENTS
- DESIGN FILE HIERARCHY
- COMPILATION AND EXECUTION
- EXECUTION IN CLOUD ENVIRONMENTS
- SUPPORT
- LICENSE AND CONTRIBUTING TO THE REPOSITORY
- ACKNOWLEDGEMENTS
This is an example of wrapping an hls4ml project for use on AWS
KEY CONCEPTS: HLS C Kernel, OpenCL Host APIs
KEYWORDS: gmem, bundle, #pragma HLS INTERFACE, m_axi, s_axi4lite
To get a local copy of the SDAccel example repository, clone this repository to the local system with the following command:
git clone https://github.com/Xilinx/SDAccel_Examples examples
where examples is the name of the directory where the repository will be stored on the local system.This command needs to be executed only once to retrieve the latest version of all SDAccel examples. The only required software is a local installation of git.
| Board | Device Name | Software Version |
|---|---|---|
| Xilinx Kintex UltraScale KCU1500 | xilinx:kcu1500:dynamic | SDAccel 2017.4 |
| Xilinx Kintex UltraScalePlus VCU1525 | xilinx:vcu1525:dynamic | SDAccel 2017.4 |
NOTE: The board/device used for compilation can be changed by adding the DEVICES variable to the make command as shown below
make DEVICES=<device name>
where the DEVICES variable accepts either 1 device from the table above or a comma separated list of device names.
Application code is located in the src directory. Accelerator binary files will be compiled to the xclbin directory. The xclbin directory is required by the Makefile and its contents will be filled during compilation. A listing of all the files in this example is shown below
Makefile
README.md
description.json
src/aws_hls4ml.cpp
src/host.cpp
src/kernel_params.h
As part of the capabilities available to an application developer, SDAccel includes environments to test the correctness of an application at both a software functional level and a hardware emulated level. These modes, which are named sw_emu and hw_emu, allow the developer to profile and evaluate the performance of a design before compiling for board execution. It is recommended that all applications are executed in at least the sw_emu mode before being compiled and executed on an FPGA board.
make TARGETS=<sw_emu|hw_emu> all
where
sw_emu = software emulation
hw_emu = hardware emulation
NOTE: The software emulation flow is a functional correctness check only. It does not estimate the performance of the application in hardware. The hardware emulation flow is a cycle accurate simulation of the hardware generated for the application. As such, it is expected for this simulation to take a long time. It is recommended that for this example the user skips running hardware emulation or modifies the example to work on a reduced data set.
Recommended Execution Flow for Example Applications in Emulation
The makefile for the application can directly executed the application with the following command:
make TARGETS=<sw_emu|hw_emu> check
where
sw_emu = software emulation
hw_emu = hardware emulation
If the application has not been previously compiled, the check makefile rule will compile and execute the application in the emulation mode selected by the user.
Alternative Execution Flow for Example Applications in Emulation
An emulated application can also be executed directly from the command line without using the check makefile rule as long as the user environment has been properly configured. To manually configure the environment to run the application, set the following
export LD_LIBRARY_PATH=$XILINX_SDX/runtime/lib/x86_64/:$LD_LIBRARY_PATH
export XCL_EMULATION_MODE=<sw_emu|hw_emu>
emconfigutil --xdevice 'xilinx:kcu1500:dynamic' --nd 1
Once the environment has been configured, the application can be executed by
./host
This is the same command executed by the check makefile rule
The command to compile the application for execution on the FPGA acceleration board is
make all
The default target for the makefile is to compile for hardware. Therefore, setting the TARGETS option is not required. NOTE: Compilation for application execution in hardware generates custom logic to implement the functionality of the kernels in an application. It is typical for hardware compile times to range from 30 minutes to a couple of hours.
FPGA acceleration boards have been deployed to the cloud. For information on how to execute the example within a specific cloud, take a look at the following guides.
- AWS F1 Application Execution on Xilinx Virtex UltraScale Devices
- Nimbix Application Execution on Xilinx Kintex UltraScale Devices
- IBM SuperVessel Research Cloud on Xilinx Virtex Devices
For more information about SDAccel check the SDAccel User Guides
For questions and to get help on this project or your own projects, visit the SDAccel Forums.
To execute this example using the SDAccel GUI, follow the setup instructions in SDAccel GUI README
The source for this project is licensed under the 3-Clause BSD License
To contribute to this project, follow the guidelines in the Repository Contribution README
This example is written by developers at