diff --git a/stm32-data-gen/src/memory.rs b/stm32-data-gen/src/memory.rs
index e63215f2a..3e24a5912 100644
--- a/stm32-data-gen/src/memory.rs
+++ b/stm32-data-gen/src/memory.rs
@@ -182,13 +182,14 @@ static MEMS: RegexMap<&[Mem]> = RegexMap::new(&[
     ("STM32L4P..E",                  mem!(BANK_1 0x08000000 512, SRAM2 0x10000000 0, SRAM 0x20000000 192)),
     ("STM32L5...C",                  mem!(BANK_1 0x08000000 256, SRAM 0x20000000 256, SRAM2 0x20030000 0)),
     ("STM32L5...E",                  mem!(BANK_1 0x08000000 512, SRAM 0x20000000 256, SRAM2 0x20030000 0)),
-    ("STM32U5...B",                  mem!(BANK_1 0x08000000 128, SRAM 0x20000000 64, SRAM2 0x20030000 0)),
-    ("STM32U5...C",                  mem!(BANK_1 0x08000000 256, SRAM 0x20000000 64, SRAM2 0x20030000 0)),
-    ("STM32U5...E",                  mem!(BANK_1 0x08000000 512, SRAM 0x20000000 64, SRAM2 0x20030000 0)),
-    ("STM32U5...G",                  mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 768, SRAM2 0x20030000 0)),
-    ("STM32U5...J",                  mem!(BANK_1 0x08000000 4096, SRAM 0x20000000 32, SRAM2 0x200c0000 0)),
-    ("STM32U5[78]..I",               mem!(BANK_1 0x08000000 2048, SRAM 0x20000000 768, SRAM2 0x20030000 0)),
-    ("STM32U59..I",                  mem!(BANK_1 0x08000000 2048, SRAM 0x20000000 32, SRAM2 0x200c0000 0)),
+    ("STM32U5[34]..B",               mem!(BANK_1 0x08000000 64, BANK_2 0x08010000 64, SRAM 0x20000000 192, SRAM2 0x20030000 64)),
+    ("STM32U5[34]..C",               mem!(BANK_1 0x08000000 128, BANK_2 0x08020000 128, SRAM 0x20000000 192, SRAM2 0x20030000 64)),
+    ("STM32U5[43]..E",               mem!(BANK_1 0x08000000 256, BANK_2 0x08040000 256, SRAM 0x20000000 192, SRAM2 0x20030000 64)),
+    ("STM32U5[78]..G",               mem!(BANK_1 0x08000000 512, BANK_2 0x08080000 512, SRAM 0x20000000 192, SRAM2 0x20030000 64, SRAM3 0x20040000 512)),
+    ("STM32U5[78]..I",               mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM 0x20000000 192, SRAM2 0x20030000 64, SRAM3 0x20040000 512)),
+    ("STM32U5[9A]..I",               mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM 0x20000000 768, SRAM2 0x200c0000 64, SRAM3 0x200d0000 832, SRAM5 0x201a0000 832)),
+    ("STM32U5[9A]..J",               mem!(BANK_1 0x08000000 2048, BANK_2 0x08200000 2048, SRAM 0x20000000 768, SRAM2 0x200c0000 64, SRAM3 0x200d0000 832, SRAM5 0x201a0000 832)),
+    ("STM32U5[FG]..J",               mem!(BANK_1 0x08000000 2048, BANK_2 0x08200000 2048, SRAM 0x20000000 768, SRAM2 0x200c0000 64, SRAM3 0x200d0000 832, SRAM5 0x201a0000 832, SRAM6 0x20270000 512)),
     ("STM32WB...Y",                  mem!(BANK_1 0x08000000 640, SRAM 0x20000000 192)),
     ("STM32WB.(0C|5V)G",             mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 128)),
     ("STM32WB.(5C|5R)G",             mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 192)),