PPUSim Register access Corruption ($2007 I/F Bug)

[ogamespec]

Sometimes there are some white strips under the menu. Scrolling bug? SPR0 Hit?

Super Mario Bros. (JU) [!]_RegDump.zip

Reported by @eugene-s-nesdev

[ogamespec]

It looks like the model to use CPU-PPU I/F is unsatisfactory and needs to be converted to CPU clock (PHI0) so that the registers writes are not different from the real 6502.

@Gumball2415 made a demo with palette entries "flying by" for this reason:
https://github.com/Gumball2415/nes-scribbles/tree/main/nrom-composite-waveform

[ogamespec]

Remade the model in CPU Clock (identical to how the CPU does LDA/STA in the PPU registers), but it did not help.
After some research it turned out that most likely it is inaccurate simulation of PPU DB internal bus impedance (values from it do not go where they should after turning off CPU I/F).
Obviously it is somewhere in our favorite VRAM controller ($2007 I/F) (vram_ctrl.cpp).
Further research is needed.

[ogamespec]

Fixed. Bug in TVZB signal evaluation:

        // TVZ/TVZB

        temp[0] = NOT(BLNK);
        temp[1] = NOT(TVIN);
        temp[2] = ppu->wire.n_TVO[0];
        temp[3] = ppu->wire.TVO[1];            // !!!   --- bug, should be in TVZ only
        temp[4] = ppu->wire.n_TVO[2];
        temp[5] = ppu->wire.n_TVO[3];
        temp[6] = ppu->wire.n_TVO[4];
        TVZB = NOR7(temp);

        temp[0] = BLNK;
        TVZ = NOR7(temp);

[ogamespec]

it's back :/

[ogamespec]

mariwa_ppu.zip

[ogamespec]

On the full NESBoard simulator, everything is ok.

[ogamespec]

Add the PPU regdump to breaknes and compare it to what comes out of Nintendulator. Maybe the problem is in the writes to registers, which are not very correctly performed from regdump.