Working with multidimensional input and output

[yashkant]

Hi,

Thank you for the great library!

I want to use multi-dimensional input and output arrays in the setup [without reshaping to 1-D].

For this, I'm using system verilog instead of verilog, but the netlist file created from system verilog is not being processed properly by V2SCD_Main.

When I pass my netlist file (generated using system verilog) to V2SCD_Main it throws the following error in the log file:

parse_netlist.cpp:300 ERROR: The input name is not valid \g_input[1][3]
valid choice: { p_init, g_init, e_init, p_input, g_input, e_input}:   input clk, rst, \g_input[1][3] , \g_input[1][2] , \g_input[1][1] ,
v_2_scd.cpp:34 ERROR: parsing verilog netlist failed.
v_2_scd_main.cpp:83 ERROR: Verilog to SCD failed.

Could you please shed some light on what I should do next to get it working? I'll also contribute back my changes (if desirable).

Thanks.

[siamumar]

Right now the parser in TinyGarble does not support multi-dimensional inputs, unfortunately. We will let you know if we add it in future.

[siaaron045]

Due to some force majeure factors,I cannot download the source code of Tinygarble .
Could you send the source code to me?
Thanks a million.
email: siaaron@outlook.com