From ece70e99a4fc32545d2e471dde00f0c80eb39540 Mon Sep 17 00:00:00 2001
From: dimi <dimi.polonski@gmail.com>
Date: Mon, 7 Nov 2022 19:53:03 +0100
Subject: [PATCH] Add Mcpwm0 and Mcpwm1 to `system::Peripheral`

---
 esp-hal-common/src/system.rs | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/esp-hal-common/src/system.rs b/esp-hal-common/src/system.rs
index 397578eea67..fa5e5820c8e 100644
--- a/esp-hal-common/src/system.rs
+++ b/esp-hal-common/src/system.rs
@@ -24,6 +24,10 @@ pub enum Peripheral {
     #[cfg(not(esp32c2))]
     Rmt,
     Ledc,
+    #[cfg(any(esp32, esp32s3))]
+    Mcpwm0,
+    #[cfg(any(esp32, esp32s3))]
+    Mcpwm1,
     #[cfg(any(esp32c2, esp32c3))]
     ApbSarAdc,
     #[cfg(any(esp32c2, esp32c3, esp32s3))]
@@ -86,6 +90,16 @@ impl PeripheralClockControl {
                 perip_clk_en0.modify(|_, w| w.ledc_clk_en().set_bit());
                 perip_rst_en0.modify(|_, w| w.ledc_rst().clear_bit());
             }
+            #[cfg(any(esp32, esp32s3))]
+            Peripheral::Mcpwm0 => {
+                perip_clk_en0.modify(|_, w| w.pwm0_clk_en().set_bit());
+                perip_rst_en0.modify(|_, w| w.pwm0_rst().clear_bit());
+            }
+            #[cfg(any(esp32, esp32s3))]
+            Peripheral::Mcpwm1 => {
+                perip_clk_en0.modify(|_, w| w.pwm1_clk_en().set_bit());
+                perip_rst_en0.modify(|_, w| w.pwm1_rst().clear_bit());
+            }
             #[cfg(any(esp32c2, esp32c3))]
             Peripheral::ApbSarAdc => {
                 perip_clk_en0.modify(|_, w| w.apb_saradc_clk_en().set_bit());