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bootlog-interrupt1.log
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bootlog-interrupt1.log
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----
BTRM
V1.3
MEM?
MEMP
CACH
CODE
ZBSS
MAIN
OTP?
OTPP
USBT
SNAN
IMG?
IMGL
UHD?
UHDP
RLO?
RLOP
UBI?
UBIP
PASS
----
U-Boot SPL 2019.07 A01 (Jul 02 2021 - 23:35:01 +0800)
Strap register: 0x7fffffef
Board is non secure
$SPL: 5.04L.02@314035 $
Apply trim code 0x2 reg 0x8 from otp to LDO controller...
SPI NAND ID: 0xef 0xaa
128 MiB, block size: 128 KiB, page size: 2048
FFinit done
find magic number 0x75456e76 at address 0x40000
blob not found for magic 0xcb00cb sel 0x142f!
FFinit find magic number 0xcb00cb at address 0x45000
reading blob from 0x45000 offset 0x532c len 608
digest sha256 OK
FFinit find magic number 0x64447233 at address 0x20000
reading blob from 0x20000 offset 0xc len 34264
digest sha256 OK
mcb selector 0x142f checksum 0x7a750b53 safe_mode 0
MemsysInit hpg0_generic 3.3.1.0 20180919
DDR3
8529DB48 80180000 801A0000 00000000 00000000 00E0549A
MCB rev=0x00000501 Ref ID=0x0549A Sub Bld=0x00E
Dram Timing 13-13-13
start of memsys_begin
mc_cfg_init(): Initialize the default values on mc_cfg
init_memc_dram_profile(): Initializing MEMC DRAM profile
---------------------------------------------------------------
MEMC DRAM profile (memc_dram_profile_struct) values:
dram_type = DDR3
====================================================
PART values:
part_speed_grade = 1866 CL13
part_size_Mbits = 4096 (DRAM size in MegaBits)
part_row_bits = 15 (number of row bits)
part_col_bits = 10 (number of column bits)
part_ba_bits = 3 (number of bank bits)
part_width_bits = 16 (DRAM width in bits)
NUMER OF PARTS:
part_num = 1 (Number of parts)
TOTAL values:
total_size_Mbits = 4096 (DRAM size in MegaBits)
total_cs_bits = 0 (number of cs bits, for dual_rank mode)
total_width_bits = 16 (DRAM width in bits)
total_burst_bytes = 16 (Number of bytes per DRAM access)
total_max_byte_addr = 0x1fffffff (Maximum/last DRAM byte address)
(Number of bits in total_max_byte_addr is 29)
(i.e. total_max_byte_addr goes from bit 0 to bit 28)
ddr_2T_mode = 0
ddr_hdp_mode = 0
large_page = 1
ddr_dual_rank = 0
cs_mode = 0
MEMC timing (memc_dram_timing_cfg_struct) values:
====================================================
MC_CHN_TIM_TIM1_0 register fields:
tCwl = 9
tRP = 13
tCL = 13
tRCD = 13
MC_CHN_TIM_TIM1_1 register fields:
tCCD_L = 4
tCCD = 4
tRRD_L = 6
tRRD = 6
MC_CHN_TIM_TIM1_2 register fields:
tFAW = 33
tRTP = 7
tRCr = 45
MC_CHN_TIM_TIM1_3 register fields:
tWTR_L = 7
tWTR = 7
tWR_L = 14
tWR = 14
MC_CHN_TIM_TIM2 register fields:
tR2R = 0
tR2W = 2
tW2R = 2
tW2W = 0
tAL = 0
tRFC = 244
====================================================
%1 SSC enabled
Poll PHY Status register
PHY Status= 1
Disable Auto-Refresh
[80180200] = 0x00000305
End of memsys_begin
Add/Ctl Alignment
Coarse Adj=0x087 deg, cmd steps=0x0C2
reg 0x801A0090 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A0094 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A0098 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A009C set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00A0 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00A4 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00A8 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00AC set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00B0 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00B4 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00B8 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00BC set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00C0 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00C4 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00C8 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00CC set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00D0 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00D4 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00D8 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00DC set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00E0 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00E4 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00E8 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00EC set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00F0 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00F4 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00F8 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A00FC set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A0100 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A0108 set to VDL 0x04A with Fine Adj=0x01 deg
reg 0x801A010C set to VDL 0x04A with Fine Adj=0x01 deg
HP RX TRIM
itrim = 0x0
lstrim = 0xA
ZQ Cal HP PHY
R in Ohm
P: Finger=0x364 Term=0x7C Drv=0x27
N: Finger=0x336 Term=0x75 Drv=0x27
PLL Ref(Hz)=0x02FAF080 UI STEPS=0x061
DDR CLK(MHz)=0x39F WL CLK dly(ps)=0x0C8 bitT(ps)=0x21B VDLsize(fs)=0x15B4 CLK_VDL=0x024
start of memc_init
[80180004] = 0x0110061f
[80180234] = 0x00000101
Enable Auto-Refresh
[80180110] = 0x11100f0e
[80180114] = 0x15141312
[80180118] = 0x19181716
[8018011c] = 0x001c1b1a
[80180124] = 0x04000000
[80180128] = 0x08070605
[8018012c] = 0x00000a09
[80180134] = 0x000d0c0b
Writing to MC_CHN_CFG_CNFG reg; data=0x00000000
[80180100] = 0x00000000
cfg_memc_timing_ctrl() Called
[80180214] = 0x090d0d0d
[80180218] = 0x04040606
[8018021c] = 0x2100072d
[80180220] = 0x07070e0e
[80180224] = 0x120000f4
End of memc_init
start of pre_shmoo
[80180004] = 0xc110071f
end of pre_shmoo
SHMOO 28nm
801A0000 801A0000 00000000 00020000 00000000
Shmoo WL
One UI Steps : 0x6E
auto-clk result = 00B (filter=0C steps)
initial CLK shift = 024
final CLK shift = 00B
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111
00000000001111111111222222222233333333334444444444555555555566666666667777777777888888888899999999990000000000
01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789
00 S------------------X------------------------------------------------------------------------------------------
01 S---------------------X---------------------------------------------------------------------------------------
Shmoo RD En
FORCED WR ODT = 0x00001800
DQSN DRIVE PAD CONTROL (from) (to)
B0 00039ED5 00079ED5
B1 00039ED5 00079ED5
B0 RISE UI=1 VDL=1B PICK UI=2 VDL=1B
B1 RISE UI=1 VDL=19 PICK UI=2 VDL=19
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111
00000000001111111111222222222233333333334444444444555555555566666666667777777777888888888899999999990000000000
01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789
00 --S-----------------------+X+++++++++++++++-------------------------------------------------------------------
01 --S----------------------X+++++++++++++++---------------------------------------------------------------------
Shmoo RD DQ NP
DQS :
B0 VDL=61 ok
B1 VDL=61 ok
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111
00000000001111111111222222222233333333334444444444555555555566666666667777777777888888888899999999990000000000
01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789
00 -------------------------------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++
01 ------------------------++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++--------
02 ------------------------------++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++--
03 -------------------------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++------
04 --------------------------------+++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++--
05 --------------------------+++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++---------
06 --------------------------+++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++-----
07 ------------------------------+++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++---------
08 -----------------------------++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++-----------
09 -----------------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++--------------
10 -----------------------------++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++-------
11 ----------------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++---------------
12 -----------------------+++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++------------
13 -----------------------+++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++-----------
14 -----------------------++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++-------------
15 --------------------------+++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++-------------
Shmoo RD DQ P
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111
00000000001111111111222222222233333333334444444444555555555566666666667777777777888888888899999999990000000000
01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789
00 -------------------------------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++
01 ------------------------++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++--------
02 ------------------------------++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++--
03 ------------------------------++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++------
04 --------------------------------+++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++--
05 --------------------------+++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++---------
06 --------------------------+++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++-----
07 ------------------------------+++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++--------
08 -----------------------------+++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++----------
09 -----------------------+++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++---------------
10 ----------------------------+++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++-------
11 ----------------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++---------------
12 ------------------------++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++------------
13 -----------------------+++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++-----------
14 ------------------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++-------------
15 -------------------------+++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++-------------
Shmoo RD DQ N
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111
00000000001111111111222222222233333333334444444444555555555566666666667777777777888888888899999999990000000000
01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789
00 ---------------------------------++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++
01 -----------------------+++++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++++----
02 ------------------------------+++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++++
03 ---------------------------+++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++----
04 ----------------------------++++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++++
05 ----------------------++++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++++------
06 -----------------------++++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++++-----
07 --------------------------+++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++-----
08 -----------------------+++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++--------
09 ----------------+++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++++--------------
10 ---------------------+++++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++++------
11 ---------------+++++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++++------------
12 -----------------++++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++++------------
13 ---------------++++++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++++++----------
14 ------------------++++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++++-----------
15 ------------------+++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++++------------
RD DQS adjustments :
BL0: Start: 0x61 Final: 0x61
BL1: Start: 0x61 Final: 0x61
Shmoo WR DQ
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111
00000000001111111111222222222233333333334444444444555555555566666666667777777777888888888899999999990000000000
01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789
00 -----------------++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++-----------------------
01 ----+++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++-------------------------------
02 ------------++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++------------------------
03 ------------+++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++--------------------------
04 -------------++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++-----------------------
05 -------+++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++---------------------------
06 -------++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++--------------------------
07 -----------+++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++---------------------------
08 ------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++-------------------------
09 ---++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++-----------------------------
10 ------------++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++-------------------------
11 -----++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++-------------------------------
12 ------++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++---------------------------
13 -++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++--------------------------------
14 -------++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++--------------------------
15 --------+++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++------------------------------
Shmoo WR DM
WR DM
00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111
00000000001111111111222222222233333333334444444444555555555566666666667777777777888888888899999999990000000000
01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789
00 --++++++++++++++++++++++++++++++++++++++++X++++++++++++++++++++++++++++++++++++++++---------------------------
01 -+++++++++++++++++++++++++++++++++++++++++X+++++++++++++++++++++++++++++++++++++++++--------------------------
start of memsys_end
[80180004] = 0x8110071f
[80180010] = 0x00000009
end of memsys_end
DDR test done successfully
FFinit find magic number 0x75456e76 at address 0x40000
FFinit find magic number 0x74506c21 at address 0x80000
reading blob from 0x80000 offset 0xc len 154424
digest sha256 OK
U-Boot TPL 2019.07 A01 (Jul 02 2021 - 23:34:48 +0800)
Board is non secure
$TPL: 5.04L.02@314035 $
set cpu freq to 1500MHz
IMAGE is NAND
Trying to boot from NAND
SPI NAND ID: 0xef 0xaa
128 MiB, block size: 128 KiB, page size: 2048
image from 2097152 to 134217728
RESET STATUS is 0x80000000
SELECTED Image 1 FIT_VOL_ID is 3
Found FIT format U-Boot
tpl_load_read: sector 7000000, count 3178, buf 07000000
tpl_load_read: sector 7000000, count 4176, buf 07000000
fit read sector 7000000, sectors=16758, dst=00000000, count=117440512, size=0x4176
tpl_load_read: sector 7003640, count 4044, buf 00004000
## Checking hash(es) for Image atf ... sha256+ OK
tpl_load_read: sector 7007680, count d89c4, buf 01000000
## Checking hash(es) for Image uboot ... sha256+ OK
tpl_load_read: sector 7882440, count d6d9, buf 010d89c0
## Checking hash(es) for Image fdt_WE7202242TA ... sha256+ OK
tpl_load_read: sector 775ec40, count 6f37, buf 000c0000
## Checking hash(es) for Image pmcfw_code ... sha256+ OK
tpl_load_read: sector 7765b40, count 674, buf 80380100
## Checking hash(es) for Image pmcfw_data ... sha256+ OK
U-Boot 2019.07 A01 (Dec 08 2022 - 15:40:53 +0800) Arcadyan Build, Build: 5.04L.02@314035
Model: Arcadyan RE-TA
DRAM: 512 MiB
max supported leds 32[32]
Parallel CLED interface found
BCA CLED Controller initialized
SW led 15 registered
SW led 16 registered
SW led 17 registered
SW led 26 registered
pmc firmware data has been loaded to 0x80380100, size=1596B
pmc firmware code has been loaded to 0xc0000, size=28419B
Take PMC out of reset
waiting for PMC finish booting
PMC rev: 3.2.2.265063 running
pmc_init:PMC using DQM mode
Chip ID: BCM6755_A1
$Uboot: 5.04L.02@314035 $
WDT: Started with servicing (80s timeout)
NAND: SPINAND ID 0xef 0xaa 0x21 0x0
128 MiB
MMC: sdhci: 0
Loading Environment from BOOT_MAGIC... ENV_BOOT_MAGIC_LOAD
found magic at 40000
good crc
resize from 16384 to 8192
OK
In: serial0
Out: serial0
Err: serial0
Model: Arcadyan RE-TA
Board is non secure
Now we are in UBOOT proper
HTTPD: ready for starting
boot_device is NAND
adjusted to skip last 8 blocks
image in NAND from 2097152 to 133169152
device nand0 <spi1.0>, # parts = 2
#: name size offset mask_flags
0: loader 0x00200000 0x00000000 0
1: image 0x07d00000 0x00200000 0
active partition: nand0,0 - (loader) 0x00200000 @ 0x00000000
defaults:
mtdids : nand0=spi1.0
mtdparts: spi1.0:2097152(loader)
Net: switch set mdio_base 80411300
calling phy_wkard_timeout 25000
eth0: systemport@0x80400000
Hit any key to stop autoboot: 0
=>