From b5ffcdb35df6e035b2138cb7bb33cb41528f9333 Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Wed, 30 Dec 2020 20:36:29 +0100 Subject: [PATCH] Regenerate with final KHR Ray Tracing spec (#174) * Run cargo update * Fix clippy::redundant_static_lifetimes * Fix clippy::ptr_arg * Fix clippy::len_zero * Fix clippy::into_iter_on_ref * Fix clippy::expect_fun_call * OpTerminateRayKHR and OpIgnoreIntersectionKHR are terminal instrs * dr: TerminateRayKHR and IgnoreIntersectionKHR are terminator instrs * Regenerate with final KHR Ray Tracing spec * binary/assemble: Add FragmentShadingRate operand * grammar: Remodel terminator instruction handling after SPIRV-Tools See: https://github.com/KhronosGroup/SPIRV-Tools/pull/4050/commits/94b11bcea920a497a0f075beffd59c4a6d6867c9 Also add the missing TerminateInvocation instruction. --- Cargo.lock | 364 ++++++++--------- autogen/external/SPIRV-Headers | 2 +- autogen/src/binary.rs | 14 +- autogen/src/dr.rs | 83 ++-- autogen/src/header.rs | 6 +- autogen/src/main.rs | 2 +- autogen/src/sr.rs | 2 +- autogen/src/structs.rs | 1 - autogen/src/table.rs | 2 +- autogen/src/utils.rs | 2 +- rspirv/binary/assemble.rs | 1 + rspirv/binary/autogen_decode_operand.rs | 11 + rspirv/binary/autogen_disas_operand.rs | 42 ++ rspirv/binary/autogen_error.rs | 6 + rspirv/binary/autogen_parse_operand.rs | 60 +++ rspirv/dr/autogen_operand.rs | 11 + rspirv/dr/build/autogen_norm_insts.rs | 506 +++++++++++++++++------- rspirv/dr/build/autogen_terminator.rs | 36 ++ rspirv/dr/loader.rs | 2 +- rspirv/grammar/autogen_table.rs | 200 ++++++---- rspirv/grammar/reflect.rs | 46 ++- rspirv/lift/autogen_context.rs | 281 +++++++++---- rspirv/sr/autogen_decoration.rs | 13 + rspirv/sr/autogen_ops.rs | 71 +++- spirv/autogen_spirv.rs | 260 +++++++++--- 25 files changed, 1403 insertions(+), 621 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 4739f626..a5e5c0d5 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2,527 +2,531 @@ # It is not intended for manual editing. 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f027d53ded7e230e008d37c8b47ede7cd308e19d diff --git a/autogen/src/binary.rs b/autogen/src/binary.rs index db8bb097..598805fa 100644 --- a/autogen/src/binary.rs +++ b/autogen/src/binary.rs @@ -24,7 +24,7 @@ fn get_decode_method(kind: &str) -> Ident { /// Returns the generated operand decoding errors for binary::Decoder by /// walking the given SPIR-V operand kinds `grammar`. -pub fn gen_operand_decode_errors(grammar: &Vec) -> TokenStream { +pub fn gen_operand_decode_errors(grammar: &[structs::OperandKind]) -> TokenStream { let kinds: Vec<&str> = grammar .iter() .filter(|element| { @@ -83,7 +83,7 @@ pub fn gen_operand_decode_errors(grammar: &Vec) -> TokenSt /// Returns the generated operand decoding methods for binary::Decoder by /// walking the given SPIR-V operand kinds `grammar. -pub fn gen_operand_decode_methods(grammar: &Vec) -> TokenStream { +pub fn gen_operand_decode_methods(grammar: &[structs::OperandKind]) -> TokenStream { let methods = grammar.iter().filter(|element| { // For kinds whose values may occupy more than one word, we need to // implement manually. @@ -124,12 +124,10 @@ pub fn gen_operand_decode_methods(grammar: &Vec) -> TokenS /// Returns a vector of tuples, with the first element being the enumerant /// symbol, and the second element being a list of parameter kinds to that /// enumerant. -fn gen_operand_param_parse_methods( - grammar: &Vec, -) -> Vec<(&str, TokenStream)> { +fn gen_operand_param_parse_methods(grammar: &[structs::OperandKind]) -> Vec<(&str, TokenStream)> { grammar.iter().filter(|element| { // Filter out all the operand kinds without any enumerants. - element.enumerants.len() != 0 + !element.enumerants.is_empty() }).filter_map(|element| { // Get the symbol and all the parameters for each enumerant. let pairs: Vec<(&str, Vec<&str>)> = @@ -216,7 +214,7 @@ fn gen_operand_param_parse_methods( /// Returns the generated operand parsing methods for binary::Parser by /// walking the given SPIR-V operand kinds `grammar`. -pub fn gen_operand_parse_methods(grammar: &Vec) -> TokenStream { +pub fn gen_operand_parse_methods(grammar: &[structs::OperandKind]) -> TokenStream { // Operand kinds whose enumerants have parameters. For these kinds, we need // to decode more than just the enumerants themselves. let (further_parse_kinds, further_parse_methods): (Vec<_>, Vec<_>) = @@ -306,7 +304,7 @@ pub fn gen_operand_parse_methods(grammar: &Vec) -> TokenSt } } -pub fn gen_disas_bit_enum_operands(grammar: &Vec) -> TokenStream { +pub fn gen_disas_bit_enum_operands(grammar: &[structs::OperandKind]) -> TokenStream { let elements = grammar .iter() .filter(|op_kind| op_kind.category == structs::Category::BitEnum) diff --git a/autogen/src/dr.rs b/autogen/src/dr.rs index 1dae2435..e548ca92 100644 --- a/autogen/src/dr.rs +++ b/autogen/src/dr.rs @@ -372,42 +372,60 @@ pub fn gen_dr_builder_types(grammar: &structs::Grammar) -> TokenStream { } } +fn is_terminator_instruction(inst: &structs::Instruction) -> bool { + match inst.class { + Some(structs::Class::Reserved) => matches!( + inst.opname.as_str(), + "OpTerminateRayKHR" | "OpIgnoreIntersectionKHR" + ), + Some(structs::Class::Branch) => !matches!(inst.opname.as_str(), "OpPhi" | "OpLabel"), + _ => false, + } +} + pub fn gen_dr_builder_terminator(grammar: &structs::Grammar) -> TokenStream { let kinds = &grammar.operand_kinds; // Generate build methods for all types. - let elements = grammar.instructions.iter().filter(|inst| { - inst.class == Some(structs::Class::Terminator) || - (inst.class == Some(structs::Class::Branch) && inst.opname != "OpPhi" && inst.opname != "OpLabel") - }).map(|inst| { - let params = get_param_list(&inst.operands, false, kinds); - let extras = get_push_extras(&inst.operands, kinds, quote! { inst.operands }); - let opcode = as_ident(&inst.opname[2..]); - let comment = format!("Appends an Op{} instruction and ends the current block.", opcode); - let insert_comment = format!("Insert an Op{} instruction and ends the current block.", opcode); - let name = get_function_name(&inst.opname); - let init = get_init_list(&inst.operands); - let insert_name = get_function_name_with_prepend("insert_", &inst.opname); + let elements = grammar + .instructions + .iter() + .filter(|inst| is_terminator_instruction(inst)) + .map(|inst| { + let params = get_param_list(&inst.operands, false, kinds); + let extras = get_push_extras(&inst.operands, kinds, quote! { inst.operands }); + let opcode = as_ident(&inst.opname[2..]); + let comment = format!( + "Appends an Op{} instruction and ends the current block.", + opcode + ); + let insert_comment = format!( + "Insert an Op{} instruction and ends the current block.", + opcode + ); + let name = get_function_name(&inst.opname); + let init = get_init_list(&inst.operands); + let insert_name = get_function_name_with_prepend("insert_", &inst.opname); - quote! { - #[doc = #comment] - pub fn #name(&mut self,#(#params),*) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new( - spirv::Op::#opcode, None, None, vec![#(#init),*]); - #(#extras)* - self.end_block(inst) - } + quote! { + #[doc = #comment] + pub fn #name(&mut self,#(#params),*) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::#opcode, None, None, vec![#(#init),*]); + #(#extras)* + self.end_block(inst) + } - #[doc = #insert_comment] - pub fn #insert_name(&mut self, insert_point: InsertPoint, #(#params),*) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new( - spirv::Op::#opcode, None, None, vec![#(#init),*]); - #(#extras)* - self.insert_end_block(insert_point, inst) + #[doc = #insert_comment] + pub fn #insert_name(&mut self, insert_point: InsertPoint, #(#params),*) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::#opcode, None, None, vec![#(#init),*]); + #(#extras)* + self.insert_end_block(insert_point, inst) + } } - } - }); + }); quote! { impl Builder { #(#elements)* @@ -429,8 +447,9 @@ pub fn gen_dr_builder_normal_insts(grammar: &structs::Grammar) -> TokenStream { (inst.class == Some(FunctionStruct) && inst.opname != "OpFunctionCall") || inst.class == Some(Debug) || inst.class == Some(Annotation) || - inst.class == Some(Terminator) || - (inst.class == Some(Branch) && inst.opname != "OpPhi") || + is_terminator_instruction(inst) || + // Labels should not be inserted but attached instead. + inst.opname == "OpLabel" || inst.class == Some(ModeSetting) || inst.class == Some(Exclude) || inst.opname == "OpTypeForwardPointer" || diff --git a/autogen/src/header.rs b/autogen/src/header.rs index 32b85654..6f3b0fd7 100644 --- a/autogen/src/header.rs +++ b/autogen/src/header.rs @@ -6,10 +6,10 @@ use proc_macro2::TokenStream; use quote::quote; use std::collections::BTreeMap; -static GLSL_STD_450_SPEC_LINK: &'static str = "\ +static GLSL_STD_450_SPEC_LINK: &str = "\ https://www.khronos.org/registry/spir-v/specs/unified1/GLSL.std.450.html"; -static OPENCL_STD_SPEC_LINK: &'static str = "\ +static OPENCL_STD_SPEC_LINK: &str = "\ https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html"; /// Returns the markdown string containing a link to the spec for the given @@ -135,7 +135,7 @@ fn gen_value_enum_operand_kind(grammar: &structs::OperandKind) -> TokenStream { let capabilities = capability_clauses.into_iter().map(|(k, v)| { let kinds = std::iter::repeat(&kind); - let capabilities = k.into_iter().map(|cap| as_ident(cap)); + let capabilities = k.iter().map(|cap| as_ident(cap)); quote! { #( #kinds::#v )|* => &[#( Capability::#capabilities ),*] } diff --git a/autogen/src/main.rs b/autogen/src/main.rs index fe134e35..1f4cc310 100644 --- a/autogen/src/main.rs +++ b/autogen/src/main.rs @@ -17,7 +17,7 @@ use std::{ use utils::write_autogen_comment; fn write(path: &PathBuf, contents: impl ToString) { - let mut f = fs::File::create(path).expect(&format!("cannot open file: {:?}", path)); + let mut f = fs::File::create(path).unwrap_or_else(|_| panic!("cannot open file: {:?}", path)); write_autogen_comment(&mut f); write!(f, "{}", contents.to_string()).unwrap() } diff --git a/autogen/src/sr.rs b/autogen/src/sr.rs index e5fc686a..6bfe12fe 100644 --- a/autogen/src/sr.rs +++ b/autogen/src/sr.rs @@ -401,7 +401,7 @@ pub fn gen_sr_code_from_instruction_grammar( }); } } - Some(Terminator) => { + Some(Reserved) if matches!(inst_name, "TerminateRayKHR" | "IgnoreIntersectionKHR") => { if field_names.is_empty() { terminator_variants.push(quote! { #name_ident }); terminator_lifts.push(quote! { diff --git a/autogen/src/structs.rs b/autogen/src/structs.rs index eb504844..03267f65 100644 --- a/autogen/src/structs.rs +++ b/autogen/src/structs.rs @@ -120,7 +120,6 @@ pub enum Class { FunctionStruct, #[serde(rename = "Mode-Setting")] ModeSetting, - Terminator, #[serde(rename = "Type-Declaration")] Type, Variable, diff --git a/autogen/src/table.rs b/autogen/src/table.rs index 7ca40954..04e836b0 100644 --- a/autogen/src/table.rs +++ b/autogen/src/table.rs @@ -20,7 +20,7 @@ fn convert_quantifier(quantifier: structs::Quantifier) -> Ident { /// `name` is the name of the generated table. /// `is_ext` indicates whether the grammar is for an extended instruction set. fn gen_instruction_table( - grammar: &Vec, + grammar: &[structs::Instruction], name: &str, is_ext: bool, ) -> TokenStream { diff --git a/autogen/src/utils.rs b/autogen/src/utils.rs index 4a08469f..017abef5 100644 --- a/autogen/src/utils.rs +++ b/autogen/src/utils.rs @@ -8,7 +8,7 @@ use proc_macro2::{Ident, Span, TokenStream}; use quote::quote; #[rustfmt::skip] -static AUTOGEN_COMMENT : &'static str = "\ +static AUTOGEN_COMMENT : &str = "\ // AUTOMATICALLY GENERATED from the SPIR-V JSON grammar: // external/spirv.core.grammar.json. // DO NOT MODIFY!"; diff --git a/rspirv/binary/assemble.rs b/rspirv/binary/assemble.rs index 98269715..efdb2fd5 100644 --- a/rspirv/binary/assemble.rs +++ b/rspirv/binary/assemble.rs @@ -85,6 +85,7 @@ impl Assemble for dr::Operand { dr::Operand::RayQueryIntersection(v) => result.push(v as u32), dr::Operand::RayQueryCommittedIntersectionType(v) => result.push(v as u32), dr::Operand::RayQueryCandidateIntersectionType(v) => result.push(v as u32), + dr::Operand::FragmentShadingRate(v) => result.push(v.bits()), } } } diff --git a/rspirv/binary/autogen_decode_operand.rs b/rspirv/binary/autogen_decode_operand.rs index 20dddde1..aa579797 100644 --- a/rspirv/binary/autogen_decode_operand.rs +++ b/rspirv/binary/autogen_decode_operand.rs @@ -101,6 +101,17 @@ impl<'a> Decoder<'a> { Err(Error::StreamExpected(self.offset)) } } + #[doc = "Decodes and returns the next SPIR-V word as\na SPIR-V FragmentShadingRate value."] + pub fn fragment_shading_rate(&mut self) -> Result { + if let Ok(word) = self.word() { + spirv::FragmentShadingRate::from_bits(word).ok_or(Error::FragmentShadingRateUnknown( + self.offset - WORD_NUM_BYTES, + word, + )) + } else { + Err(Error::StreamExpected(self.offset)) + } + } #[doc = "Decodes and returns the next SPIR-V word as\na SPIR-V SourceLanguage value."] pub fn source_language(&mut self) -> Result { if let Ok(word) = self.word() { diff --git a/rspirv/binary/autogen_disas_operand.rs b/rspirv/binary/autogen_disas_operand.rs index a7650beb..03b0311c 100644 --- a/rspirv/binary/autogen_disas_operand.rs +++ b/rspirv/binary/autogen_disas_operand.rs @@ -137,6 +137,27 @@ impl Disassemble for spirv::LoopControl { if self.contains(spirv::LoopControl::PARTIAL_COUNT) { bits.push("PartialCount") } + if self.contains(spirv::LoopControl::INITIATION_INTERVAL_INTEL) { + bits.push("InitiationIntervalINTEL") + } + if self.contains(spirv::LoopControl::MAX_CONCURRENCY_INTEL) { + bits.push("MaxConcurrencyINTEL") + } + if self.contains(spirv::LoopControl::DEPENDENCY_ARRAY_INTEL) { + bits.push("DependencyArrayINTEL") + } + if self.contains(spirv::LoopControl::PIPELINE_ENABLE_INTEL) { + bits.push("PipelineEnableINTEL") + } + if self.contains(spirv::LoopControl::LOOP_COALESCE_INTEL) { + bits.push("LoopCoalesceINTEL") + } + if self.contains(spirv::LoopControl::MAX_INTERLEAVING_INTEL) { + bits.push("MaxInterleavingINTEL") + } + if self.contains(spirv::LoopControl::SPECULATED_ITERATIONS_INTEL) { + bits.push("SpeculatedIterationsINTEL") + } bits.join("|") } } @@ -308,3 +329,24 @@ impl Disassemble for spirv::RayFlags { bits.join("|") } } +impl Disassemble for spirv::FragmentShadingRate { + fn disassemble(&self) -> String { + if self.is_empty() { + return "None".to_string(); + } + let mut bits = vec![]; + if self.contains(spirv::FragmentShadingRate::VERTICAL2_PIXELS) { + bits.push("Vertical2Pixels") + } + if self.contains(spirv::FragmentShadingRate::VERTICAL4_PIXELS) { + bits.push("Vertical4Pixels") + } + if self.contains(spirv::FragmentShadingRate::HORIZONTAL2_PIXELS) { + bits.push("Horizontal2Pixels") + } + if self.contains(spirv::FragmentShadingRate::HORIZONTAL4_PIXELS) { + bits.push("Horizontal4Pixels") + } + bits.join("|") + } +} diff --git a/rspirv/binary/autogen_error.rs b/rspirv/binary/autogen_error.rs index 4e9e24f0..b36d2033 100644 --- a/rspirv/binary/autogen_error.rs +++ b/rspirv/binary/autogen_error.rs @@ -18,6 +18,7 @@ pub enum Error { MemoryAccessUnknown(usize, spirv::Word), KernelProfilingInfoUnknown(usize, spirv::Word), RayFlagsUnknown(usize, spirv::Word), + FragmentShadingRateUnknown(usize, spirv::Word), SourceLanguageUnknown(usize, spirv::Word), ExecutionModelUnknown(usize, spirv::Word), AddressingModelUnknown(usize, spirv::Word), @@ -102,6 +103,11 @@ impl fmt::Display for Error { "unknown value {} for operand kind RayFlags at index {}", word, index ), + Error::FragmentShadingRateUnknown(index, word) => write!( + f, + "unknown value {} for operand kind FragmentShadingRate at index {}", + word, index + ), Error::SourceLanguageUnknown(index, word) => write!( f, "unknown value {} for operand kind SourceLanguage at index {}", diff --git a/rspirv/binary/autogen_parse_operand.rs b/rspirv/binary/autogen_parse_operand.rs index c7772e3f..3c788c44 100644 --- a/rspirv/binary/autogen_parse_operand.rs +++ b/rspirv/binary/autogen_parse_operand.rs @@ -21,6 +21,9 @@ impl<'c, 'd> Parser<'c, 'd> { self.decoder.kernel_profiling_info()?, )], GOpKind::RayFlags => vec![dr::Operand::RayFlags(self.decoder.ray_flags()?)], + GOpKind::FragmentShadingRate => vec![dr::Operand::FragmentShadingRate( + self.decoder.fragment_shading_rate()?, + )], GOpKind::SourceLanguage => { vec![dr::Operand::SourceLanguage(self.decoder.source_language()?)] } @@ -200,6 +203,27 @@ impl<'c, 'd> Parser<'c, 'd> { if loop_control.contains(spirv::LoopControl::PARTIAL_COUNT) { params.append(&mut vec![dr::Operand::LiteralInt32(self.decoder.int32()?)]); } + if loop_control.contains(spirv::LoopControl::INITIATION_INTERVAL_INTEL) { + params.append(&mut vec![dr::Operand::LiteralInt32(self.decoder.int32()?)]); + } + if loop_control.contains(spirv::LoopControl::MAX_CONCURRENCY_INTEL) { + params.append(&mut vec![dr::Operand::LiteralInt32(self.decoder.int32()?)]); + } + if loop_control.contains(spirv::LoopControl::DEPENDENCY_ARRAY_INTEL) { + params.append(&mut vec![dr::Operand::LiteralInt32(self.decoder.int32()?)]); + } + if loop_control.contains(spirv::LoopControl::PIPELINE_ENABLE_INTEL) { + params.append(&mut vec![dr::Operand::LiteralInt32(self.decoder.int32()?)]); + } + if loop_control.contains(spirv::LoopControl::LOOP_COALESCE_INTEL) { + params.append(&mut vec![dr::Operand::LiteralInt32(self.decoder.int32()?)]); + } + if loop_control.contains(spirv::LoopControl::MAX_INTERLEAVING_INTEL) { + params.append(&mut vec![dr::Operand::LiteralInt32(self.decoder.int32()?)]); + } + if loop_control.contains(spirv::LoopControl::SPECULATED_ITERATIONS_INTEL) { + params.append(&mut vec![dr::Operand::LiteralInt32(self.decoder.int32()?)]); + } Ok(params) } fn parse_memory_access_arguments( @@ -282,6 +306,17 @@ impl<'c, 'd> Parser<'c, 'd> { spirv::ExecutionMode::OutputPrimitivesNV => { vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] } + spirv::ExecutionMode::MaxWorkgroupSizeINTEL => vec![ + dr::Operand::LiteralInt32(self.decoder.int32()?), + dr::Operand::LiteralInt32(self.decoder.int32()?), + dr::Operand::LiteralInt32(self.decoder.int32()?), + ], + spirv::ExecutionMode::MaxWorkDimINTEL => { + vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] + } + spirv::ExecutionMode::NumSIMDWorkitemsINTEL => { + vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] + } _ => vec![], }) } @@ -349,6 +384,31 @@ impl<'c, 'd> Parser<'c, 'd> { spirv::Decoration::UserTypeGOOGLE => { vec![dr::Operand::LiteralString(self.decoder.string()?)] } + spirv::Decoration::MemoryINTEL => { + vec![dr::Operand::LiteralString(self.decoder.string()?)] + } + spirv::Decoration::NumbanksINTEL => { + vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] + } + spirv::Decoration::BankwidthINTEL => { + vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] + } + spirv::Decoration::MaxPrivateCopiesINTEL => { + vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] + } + spirv::Decoration::MaxReplicatesINTEL => { + vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] + } + spirv::Decoration::MergeINTEL => vec![ + dr::Operand::LiteralString(self.decoder.string()?), + dr::Operand::LiteralString(self.decoder.string()?), + ], + spirv::Decoration::BankBitsINTEL => { + vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] + } + spirv::Decoration::ForcePow2DepthINTEL => { + vec![dr::Operand::LiteralInt32(self.decoder.int32()?)] + } _ => vec![], }) } diff --git a/rspirv/dr/autogen_operand.rs b/rspirv/dr/autogen_operand.rs index 070ac5fe..02bcbc54 100644 --- a/rspirv/dr/autogen_operand.rs +++ b/rspirv/dr/autogen_operand.rs @@ -14,6 +14,7 @@ pub enum Operand { MemoryAccess(spirv::MemoryAccess), KernelProfilingInfo(spirv::KernelProfilingInfo), RayFlags(spirv::RayFlags), + FragmentShadingRate(spirv::FragmentShadingRate), SourceLanguage(spirv::SourceLanguage), ExecutionModel(spirv::ExecutionModel), AddressingModel(spirv::AddressingModel), @@ -62,6 +63,7 @@ impl fmt::Display for Operand { Operand::MemoryAccess(ref v) => write!(f, "{:?}", v), Operand::KernelProfilingInfo(ref v) => write!(f, "{:?}", v), Operand::RayFlags(ref v) => write!(f, "{:?}", v), + Operand::FragmentShadingRate(ref v) => write!(f, "{:?}", v), Operand::SourceLanguage(ref v) => write!(f, "{:?}", v), Operand::ExecutionModel(ref v) => write!(f, "{:?}", v), Operand::AddressingModel(ref v) => write!(f, "{:?}", v), @@ -158,6 +160,15 @@ impl Operand { ref other => panic!("Expected Operand::RayFlags, got {} instead", other), } } + pub fn unwrap_fragment_shading_rate(&self) -> spirv::FragmentShadingRate { + match *self { + Self::FragmentShadingRate(v) => v, + ref other => panic!( + "Expected Operand::FragmentShadingRate, got {} instead", + other + ), + } + } pub fn unwrap_source_language(&self) -> spirv::SourceLanguage { match *self { Self::SourceLanguage(v) => v, diff --git a/rspirv/dr/build/autogen_norm_insts.rs b/rspirv/dr/build/autogen_norm_insts.rs index 3fb8e9e9..4f62acbe 100644 --- a/rspirv/dr/build/autogen_norm_insts.rs +++ b/rspirv/dr/build/autogen_norm_insts.rs @@ -12363,6 +12363,157 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpTraceRayKHR instruction to the current block."] + pub fn trace_ray_khr( + &mut self, + accel: spirv::Word, + ray_flags: spirv::Word, + cull_mask: spirv::Word, + sbt_offset: spirv::Word, + sbt_stride: spirv::Word, + miss_index: spirv::Word, + ray_origin: spirv::Word, + ray_tmin: spirv::Word, + ray_direction: spirv::Word, + ray_tmax: spirv::Word, + payload: spirv::Word, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TraceRayKHR, + None, + None, + vec![ + dr::Operand::IdRef(accel), + dr::Operand::IdRef(ray_flags), + dr::Operand::IdRef(cull_mask), + dr::Operand::IdRef(sbt_offset), + dr::Operand::IdRef(sbt_stride), + dr::Operand::IdRef(miss_index), + dr::Operand::IdRef(ray_origin), + dr::Operand::IdRef(ray_tmin), + dr::Operand::IdRef(ray_direction), + dr::Operand::IdRef(ray_tmax), + dr::Operand::IdRef(payload), + ], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpTraceRayKHR instruction to the current block."] + pub fn insert_trace_ray_khr( + &mut self, + insert_point: InsertPoint, + accel: spirv::Word, + ray_flags: spirv::Word, + cull_mask: spirv::Word, + sbt_offset: spirv::Word, + sbt_stride: spirv::Word, + miss_index: spirv::Word, + ray_origin: spirv::Word, + ray_tmin: spirv::Word, + ray_direction: spirv::Word, + ray_tmax: spirv::Word, + payload: spirv::Word, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TraceRayKHR, + None, + None, + vec![ + dr::Operand::IdRef(accel), + dr::Operand::IdRef(ray_flags), + dr::Operand::IdRef(cull_mask), + dr::Operand::IdRef(sbt_offset), + dr::Operand::IdRef(sbt_stride), + dr::Operand::IdRef(miss_index), + dr::Operand::IdRef(ray_origin), + dr::Operand::IdRef(ray_tmin), + dr::Operand::IdRef(ray_direction), + dr::Operand::IdRef(ray_tmax), + dr::Operand::IdRef(payload), + ], + ); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } + #[doc = "Appends an OpExecuteCallableKHR instruction to the current block."] + pub fn execute_callable_khr( + &mut self, + sbt_index: spirv::Word, + callable_data: spirv::Word, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ExecuteCallableKHR, + None, + None, + vec![ + dr::Operand::IdRef(sbt_index), + dr::Operand::IdRef(callable_data), + ], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpExecuteCallableKHR instruction to the current block."] + pub fn insert_execute_callable_khr( + &mut self, + insert_point: InsertPoint, + sbt_index: spirv::Word, + callable_data: spirv::Word, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ExecuteCallableKHR, + None, + None, + vec![ + dr::Operand::IdRef(sbt_index), + dr::Operand::IdRef(callable_data), + ], + ); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } + #[doc = "Appends an OpConvertUToAccelerationStructureKHR instruction to the current block."] + pub fn convert_u_to_acceleration_structure_khr( + &mut self, + result_type: spirv::Word, + result_id: Option, + accel: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConvertUToAccelerationStructureKHR, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(accel)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpConvertUToAccelerationStructureKHR instruction to the current block."] + pub fn insert_convert_u_to_acceleration_structure_khr( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + accel: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConvertUToAccelerationStructureKHR, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(accel)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } #[doc = "Appends an OpRayQueryInitializeKHR instruction to the current block."] pub fn ray_query_initialize_khr( &mut self, @@ -13352,20 +13503,6 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(()) } - #[doc = "Appends an OpIgnoreIntersectionKHR instruction to the current block."] - pub fn ignore_intersection_khr(&mut self) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new(spirv::Op::IgnoreIntersectionKHR, None, None, vec![]); - self.insert_into_block(InsertPoint::End, inst)?; - Ok(()) - } - #[doc = "Appends an OpIgnoreIntersectionKHR instruction to the current block."] - pub fn insert_ignore_intersection_khr(&mut self, insert_point: InsertPoint) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new(spirv::Op::IgnoreIntersectionKHR, None, None, vec![]); - self.insert_into_block(insert_point, inst)?; - Ok(()) - } #[doc = "Appends an OpTerminateRayNV instruction to the current block."] pub fn terminate_ray_nv(&mut self) -> BuildResult<()> { #[allow(unused_mut)] @@ -13380,20 +13517,6 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(()) } - #[doc = "Appends an OpTerminateRayKHR instruction to the current block."] - pub fn terminate_ray_khr(&mut self) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new(spirv::Op::TerminateRayKHR, None, None, vec![]); - self.insert_into_block(InsertPoint::End, inst)?; - Ok(()) - } - #[doc = "Appends an OpTerminateRayKHR instruction to the current block."] - pub fn insert_terminate_ray_khr(&mut self, insert_point: InsertPoint) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new(spirv::Op::TerminateRayKHR, None, None, vec![]); - self.insert_into_block(insert_point, inst)?; - Ok(()) - } #[doc = "Appends an OpTraceNV instruction to the current block."] pub fn trace_nv( &mut self, @@ -13469,81 +13592,6 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(()) } - #[doc = "Appends an OpTraceRayKHR instruction to the current block."] - pub fn trace_ray_khr( - &mut self, - accel: spirv::Word, - ray_flags: spirv::Word, - cull_mask: spirv::Word, - sbt_offset: spirv::Word, - sbt_stride: spirv::Word, - miss_index: spirv::Word, - ray_origin: spirv::Word, - ray_tmin: spirv::Word, - ray_direction: spirv::Word, - ray_tmax: spirv::Word, - payload_id: spirv::Word, - ) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new( - spirv::Op::TraceRayKHR, - None, - None, - vec![ - dr::Operand::IdRef(accel), - dr::Operand::IdRef(ray_flags), - dr::Operand::IdRef(cull_mask), - dr::Operand::IdRef(sbt_offset), - dr::Operand::IdRef(sbt_stride), - dr::Operand::IdRef(miss_index), - dr::Operand::IdRef(ray_origin), - dr::Operand::IdRef(ray_tmin), - dr::Operand::IdRef(ray_direction), - dr::Operand::IdRef(ray_tmax), - dr::Operand::IdRef(payload_id), - ], - ); - self.insert_into_block(InsertPoint::End, inst)?; - Ok(()) - } - #[doc = "Appends an OpTraceRayKHR instruction to the current block."] - pub fn insert_trace_ray_khr( - &mut self, - insert_point: InsertPoint, - accel: spirv::Word, - ray_flags: spirv::Word, - cull_mask: spirv::Word, - sbt_offset: spirv::Word, - sbt_stride: spirv::Word, - miss_index: spirv::Word, - ray_origin: spirv::Word, - ray_tmin: spirv::Word, - ray_direction: spirv::Word, - ray_tmax: spirv::Word, - payload_id: spirv::Word, - ) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new( - spirv::Op::TraceRayKHR, - None, - None, - vec![ - dr::Operand::IdRef(accel), - dr::Operand::IdRef(ray_flags), - dr::Operand::IdRef(cull_mask), - dr::Operand::IdRef(sbt_offset), - dr::Operand::IdRef(sbt_stride), - dr::Operand::IdRef(miss_index), - dr::Operand::IdRef(ray_origin), - dr::Operand::IdRef(ray_tmin), - dr::Operand::IdRef(ray_direction), - dr::Operand::IdRef(ray_tmax), - dr::Operand::IdRef(payload_id), - ], - ); - self.insert_into_block(insert_point, inst)?; - Ok(()) - } #[doc = "Appends an OpExecuteCallableNV instruction to the current block."] pub fn execute_callable_nv( &mut self, @@ -13583,45 +13631,6 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(()) } - #[doc = "Appends an OpExecuteCallableKHR instruction to the current block."] - pub fn execute_callable_khr( - &mut self, - sbt_index: spirv::Word, - callable_data_id: spirv::Word, - ) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new( - spirv::Op::ExecuteCallableKHR, - None, - None, - vec![ - dr::Operand::IdRef(sbt_index), - dr::Operand::IdRef(callable_data_id), - ], - ); - self.insert_into_block(InsertPoint::End, inst)?; - Ok(()) - } - #[doc = "Appends an OpExecuteCallableKHR instruction to the current block."] - pub fn insert_execute_callable_khr( - &mut self, - insert_point: InsertPoint, - sbt_index: spirv::Word, - callable_data_id: spirv::Word, - ) -> BuildResult<()> { - #[allow(unused_mut)] - let mut inst = dr::Instruction::new( - spirv::Op::ExecuteCallableKHR, - None, - None, - vec![ - dr::Operand::IdRef(sbt_index), - dr::Operand::IdRef(callable_data_id), - ], - ); - self.insert_into_block(insert_point, inst)?; - Ok(()) - } #[doc = "Appends an OpCooperativeMatrixLoadNV instruction to the current block."] pub fn cooperative_matrix_load_nv( &mut self, @@ -14898,6 +14907,166 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpLoopControlINTEL instruction to the current block."] + pub fn loop_control_intel( + &mut self, + loop_control_parameters: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::LoopControlINTEL, None, None, vec![]); + inst.operands.extend( + loop_control_parameters + .into_iter() + .map(dr::Operand::LiteralInt32), + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpLoopControlINTEL instruction to the current block."] + pub fn insert_loop_control_intel( + &mut self, + insert_point: InsertPoint, + loop_control_parameters: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::LoopControlINTEL, None, None, vec![]); + inst.operands.extend( + loop_control_parameters + .into_iter() + .map(dr::Operand::LiteralInt32), + ); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } + #[doc = "Appends an OpReadPipeBlockingINTEL instruction to the current block."] + pub fn read_pipe_blocking_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + packet_size: spirv::Word, + packet_alignment: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ReadPipeBlockingINTEL, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(packet_size), + dr::Operand::IdRef(packet_alignment), + ], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpReadPipeBlockingINTEL instruction to the current block."] + pub fn insert_read_pipe_blocking_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + packet_size: spirv::Word, + packet_alignment: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ReadPipeBlockingINTEL, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(packet_size), + dr::Operand::IdRef(packet_alignment), + ], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpWritePipeBlockingINTEL instruction to the current block."] + pub fn write_pipe_blocking_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + packet_size: spirv::Word, + packet_alignment: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::WritePipeBlockingINTEL, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(packet_size), + dr::Operand::IdRef(packet_alignment), + ], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpWritePipeBlockingINTEL instruction to the current block."] + pub fn insert_write_pipe_blocking_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + packet_size: spirv::Word, + packet_alignment: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::WritePipeBlockingINTEL, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(packet_size), + dr::Operand::IdRef(packet_alignment), + ], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpFPGARegINTEL instruction to the current block."] + pub fn fpga_reg_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + result: spirv::Word, + input: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::FPGARegINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(result), dr::Operand::IdRef(input)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpFPGARegINTEL instruction to the current block."] + pub fn insert_fpga_reg_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + result: spirv::Word, + input: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::FPGARegINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(result), dr::Operand::IdRef(input)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } #[doc = "Appends an OpRayQueryGetRayTMinKHR instruction to the current block."] pub fn ray_query_get_ray_t_min_khr( &mut self, @@ -15623,4 +15792,57 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpAtomicFAddEXT instruction to the current block."] + pub fn atomic_f_add_ext( + &mut self, + result_type: spirv::Word, + result_id: Option, + pointer: spirv::Word, + memory: spirv::Word, + semantics: spirv::Word, + value: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::AtomicFAddEXT, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(pointer), + dr::Operand::IdScope(memory), + dr::Operand::IdMemorySemantics(semantics), + dr::Operand::IdRef(value), + ], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpAtomicFAddEXT instruction to the current block."] + pub fn insert_atomic_f_add_ext( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + pointer: spirv::Word, + memory: spirv::Word, + semantics: spirv::Word, + value: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::AtomicFAddEXT, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(pointer), + dr::Operand::IdScope(memory), + dr::Operand::IdMemorySemantics(semantics), + dr::Operand::IdRef(value), + ], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } } diff --git a/rspirv/dr/build/autogen_terminator.rs b/rspirv/dr/build/autogen_terminator.rs index 1a320013..a5bcc909 100644 --- a/rspirv/dr/build/autogen_terminator.rs +++ b/rspirv/dr/build/autogen_terminator.rs @@ -315,4 +315,40 @@ impl Builder { ); self.insert_end_block(insert_point, inst) } + #[doc = "Appends an OpTerminateInvocation instruction and ends the current block."] + pub fn terminate_invocation(&mut self) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::TerminateInvocation, None, None, vec![]); + self.end_block(inst) + } + #[doc = "Insert an OpTerminateInvocation instruction and ends the current block."] + pub fn insert_terminate_invocation(&mut self, insert_point: InsertPoint) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::TerminateInvocation, None, None, vec![]); + self.insert_end_block(insert_point, inst) + } + #[doc = "Appends an OpIgnoreIntersectionKHR instruction and ends the current block."] + pub fn ignore_intersection_khr(&mut self) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::IgnoreIntersectionKHR, None, None, vec![]); + self.end_block(inst) + } + #[doc = "Insert an OpIgnoreIntersectionKHR instruction and ends the current block."] + pub fn insert_ignore_intersection_khr(&mut self, insert_point: InsertPoint) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::IgnoreIntersectionKHR, None, None, vec![]); + self.insert_end_block(insert_point, inst) + } + #[doc = "Appends an OpTerminateRayKHR instruction and ends the current block."] + pub fn terminate_ray_khr(&mut self) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::TerminateRayKHR, None, None, vec![]); + self.end_block(inst) + } + #[doc = "Insert an OpTerminateRayKHR instruction and ends the current block."] + pub fn insert_terminate_ray_khr(&mut self, insert_point: InsertPoint) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::TerminateRayKHR, None, None, vec![]); + self.insert_end_block(insert_point, inst) + } } diff --git a/rspirv/dr/loader.rs b/rspirv/dr/loader.rs index ebdad5b3..4fe11617 100644 --- a/rspirv/dr/loader.rs +++ b/rspirv/dr/loader.rs @@ -174,7 +174,7 @@ impl binary::Consumer for Loader { block.label = Some(inst); self.block = Some(block) } - opcode if grammar::reflect::is_terminator(opcode) => { + opcode if grammar::reflect::is_block_terminator(opcode) => { // Make sure the block exists here. Once the block exists, // we are certain the function exists because the above checks. if_ret_err!(self.block.is_none(), MismatchedTerminator); diff --git a/rspirv/grammar/autogen_table.rs b/rspirv/grammar/autogen_table.rs index 62c9d2f8..2a6b4fd8 100644 --- a/rspirv/grammar/autogen_table.rs +++ b/rspirv/grammar/autogen_table.rs @@ -14,6 +14,7 @@ pub enum OperandKind { MemoryAccess, KernelProfilingInfo, RayFlags, + FragmentShadingRate, SourceLanguage, ExecutionModel, AddressingModel, @@ -2877,6 +2878,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), + inst!(TerminateInvocation, [Shader], []), inst!( SubgroupBallotKHR, [SubgroupBallotKHR], @@ -2913,13 +2915,38 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ] ), inst!( - TypeRayQueryProvisionalKHR, - [RayQueryProvisionalKHR], - [(IdResult, One)] + TraceRayKHR, + [RayTracingKHR], + [ + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One) + ] + ), + inst!( + ExecuteCallableKHR, + [RayTracingKHR], + [(IdRef, One), (IdRef, One)] ), + inst!( + ConvertUToAccelerationStructureKHR, + [RayTracingKHR, RayQueryKHR], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), + inst!(IgnoreIntersectionKHR, [RayTracingKHR], []), + inst!(TerminateRayKHR, [RayTracingKHR], []), + inst!(TypeRayQueryKHR, [RayQueryKHR], [(IdResult, One)]), inst!( RayQueryInitializeKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdRef, One), (IdRef, One), @@ -2931,29 +2958,25 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), - inst!( - RayQueryTerminateKHR, - [RayQueryProvisionalKHR], - [(IdRef, One)] - ), + inst!(RayQueryTerminateKHR, [RayQueryKHR], [(IdRef, One)]), inst!( RayQueryGenerateIntersectionKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [(IdRef, One), (IdRef, One)] ), inst!( RayQueryConfirmIntersectionKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [(IdRef, One)] ), inst!( RayQueryProceedKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), inst!( RayQueryGetIntersectionTypeKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -3100,7 +3123,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( ReportIntersectionNV, - [RayTracingNV, RayTracingProvisionalKHR], + [RayTracingNV, RayTracingKHR], [ (IdResultType, One), (IdResult, One), @@ -3110,7 +3133,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( ReportIntersectionKHR, - [RayTracingNV, RayTracingProvisionalKHR], + [RayTracingNV, RayTracingKHR], [ (IdResultType, One), (IdResult, One), @@ -3118,42 +3141,11 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), - inst!( - IgnoreIntersectionNV, - [RayTracingNV, RayTracingProvisionalKHR], - [] - ), - inst!( - IgnoreIntersectionKHR, - [RayTracingNV, RayTracingProvisionalKHR], - [] - ), - inst!(TerminateRayNV, [RayTracingNV, RayTracingProvisionalKHR], []), - inst!( - TerminateRayKHR, - [RayTracingNV, RayTracingProvisionalKHR], - [] - ), + inst!(IgnoreIntersectionNV, [RayTracingNV], []), + inst!(TerminateRayNV, [RayTracingNV], []), inst!( TraceNV, - [RayTracingNV, RayTracingProvisionalKHR], - [ - (IdRef, One), - (IdRef, One), - (IdRef, One), - (IdRef, One), - (IdRef, One), - (IdRef, One), - (IdRef, One), - (IdRef, One), - (IdRef, One), - (IdRef, One), - (IdRef, One) - ] - ), - inst!( - TraceRayKHR, - [RayTracingNV, RayTracingProvisionalKHR], + [RayTracingNV], [ (IdRef, One), (IdRef, One), @@ -3170,30 +3162,17 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( TypeAccelerationStructureNV, - [ - RayTracingNV, - RayTracingProvisionalKHR, - RayQueryProvisionalKHR - ], + [RayTracingNV, RayTracingKHR, RayQueryKHR], [(IdResult, One)] ), inst!( TypeAccelerationStructureKHR, - [ - RayTracingNV, - RayTracingProvisionalKHR, - RayQueryProvisionalKHR - ], + [RayTracingNV, RayTracingKHR, RayQueryKHR], [(IdResult, One)] ), inst!( ExecuteCallableNV, - [RayTracingNV, RayTracingProvisionalKHR], - [(IdRef, One), (IdRef, One)] - ), - inst!( - ExecuteCallableKHR, - [RayTracingNV, RayTracingProvisionalKHR], + [RayTracingNV], [(IdRef, One), (IdRef, One)] ), inst!( @@ -3494,6 +3473,16 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), + inst!( + FunctionPointerINTEL, + [FunctionPointersINTEL], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), + inst!( + FunctionPointerCallINTEL, + [FunctionPointersINTEL], + [(IdResultType, One), (IdResult, One), (IdRef, ZeroOrMore)] + ), inst!(DecorateString, [], [(IdRef, One), (Decoration, One)]), inst!(DecorateStringGOOGLE, [], [(IdRef, One), (Decoration, One)]), inst!( @@ -4504,19 +4493,54 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ [SubgroupAvcMotionEstimationINTEL], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), + inst!( + LoopControlINTEL, + [UnstructuredLoopControlsINTEL], + [(LiteralInteger, ZeroOrMore)] + ), + inst!( + ReadPipeBlockingINTEL, + [BlockingPipesINTEL], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One) + ] + ), + inst!( + WritePipeBlockingINTEL, + [BlockingPipesINTEL], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One) + ] + ), + inst!( + FPGARegINTEL, + [FPGARegINTEL], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One) + ] + ), inst!( RayQueryGetRayTMinKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), inst!( RayQueryGetRayFlagsKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), inst!( RayQueryGetIntersectionTKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4526,7 +4550,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionInstanceCustomIndexKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4536,7 +4560,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionInstanceIdKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4546,7 +4570,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionInstanceShaderBindingTableRecordOffsetKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4556,7 +4580,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionGeometryIndexKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4566,7 +4590,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionPrimitiveIndexKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4576,7 +4600,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionBarycentricsKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4586,7 +4610,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionFrontFaceKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4596,12 +4620,12 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionCandidateAABBOpaqueKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), inst!( RayQueryGetIntersectionObjectRayDirectionKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4611,7 +4635,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionObjectRayOriginKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4621,17 +4645,17 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetWorldRayDirectionKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), inst!( RayQueryGetWorldRayOriginKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), inst!( RayQueryGetIntersectionObjectToWorldKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], [ (IdResultType, One), (IdResult, One), @@ -4641,11 +4665,23 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( RayQueryGetIntersectionWorldToObjectKHR, - [RayQueryProvisionalKHR], + [RayQueryKHR], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One) + ] + ), + inst!( + AtomicFAddEXT, + [AtomicFloat32AddEXT, AtomicFloat64AddEXT], [ (IdResultType, One), (IdResult, One), (IdRef, One), + (IdScope, One), + (IdMemorySemantics, One), (IdRef, One) ] ), diff --git a/rspirv/grammar/reflect.rs b/rspirv/grammar/reflect.rs index 204fe22f..aa5c1f9e 100644 --- a/rspirv/grammar/reflect.rs +++ b/rspirv/grammar/reflect.rs @@ -66,7 +66,7 @@ pub fn is_type(opcode: spirv::Op) -> bool { | spirv::Op::TypeQueue | spirv::Op::TypePipe | spirv::Op::TypeAccelerationStructureKHR - | spirv::Op::TypeRayQueryProvisionalKHR + | spirv::Op::TypeRayQueryKHR | spirv::Op::TypeForwardPointer => true, _ => false, } @@ -95,16 +95,38 @@ pub fn is_variable(opcode: spirv::Op) -> bool { opcode == spirv::Op::Variable } +/// Returns true if the given opcode is a return instruction. +pub fn is_return(opcode: spirv::Op) -> bool { + matches!(opcode, spirv::Op::Return | spirv::Op::ReturnValue) +} + +/// Returns true if the given opcode aborts execution. +pub fn is_abort(opcode: spirv::Op) -> bool { + matches!( + opcode, + spirv::Op::Kill + | spirv::Op::TerminateInvocation + | spirv::Op::TerminateRayKHR + | spirv::Op::IgnoreIntersectionKHR + | spirv::Op::Unreachable + ) +} + +/// Returns true if the given opcode is a return instruction or it aborts +/// execution. +pub fn is_return_or_abort(opcode: spirv::Op) -> bool { + is_return(opcode) || is_abort(opcode) +} + +/// Returns true if the given opcode is a branch instruction. +pub fn is_branch(opcode: spirv::Op) -> bool { + matches!( + opcode, + spirv::Op::Branch | spirv::Op::BranchConditional | spirv::Op::Switch + ) +} + /// Returns true if the given opcode is for a terminator instruction. -pub fn is_terminator(opcode: spirv::Op) -> bool { - match opcode { - spirv::Op::Branch - | spirv::Op::BranchConditional - | spirv::Op::Switch - | spirv::Op::Kill - | spirv::Op::Return - | spirv::Op::ReturnValue - | spirv::Op::Unreachable => true, - _ => false, - } +pub fn is_block_terminator(opcode: spirv::Op) -> bool { + is_branch(opcode) || is_return_or_abort(opcode) } diff --git a/rspirv/lift/autogen_context.rs b/rspirv/lift/autogen_context.rs index 08d0b74a..5401907e 100644 --- a/rspirv/lift/autogen_context.rs +++ b/rspirv/lift/autogen_context.rs @@ -162,6 +162,7 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 4416u32 => Ok(ops::Branch::TerminateInvocation), _ => Err(InstructionError::WrongOpcode), } } @@ -170,6 +171,8 @@ impl LiftContext { raw: &dr::Instruction, ) -> Result { match raw.class.opcode as u32 { + 4448u32 => Ok(ops::Terminator::IgnoreIntersectionKHR), + 4449u32 => Ok(ops::Terminator::TerminateRayKHR), _ => self.lift_branch(raw).map(ops::Terminator::Branch), } } @@ -5045,7 +5048,97 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), - 4472u32 => Ok(ops::Op::TypeRayQueryProvisionalKHR), + 4445u32 => Ok(ops::Op::TraceRayKHR { + accel: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + ray_flags: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + cull_mask: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + sbt_offset: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + sbt_stride: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + miss_index: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + ray_origin: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + ray_tmin: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + ray_direction: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + ray_tmax: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + payload: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 4446u32 => Ok(ops::Op::ExecuteCallableKHR { + sbt_index: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + callable_data: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 4447u32 => Ok(ops::Op::ConvertUToAccelerationStructureKHR { + accel: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 4472u32 => Ok(ops::Op::TypeRayQueryKHR), 4473u32 => Ok(ops::Op::RayQueryInitializeKHR { ray_query: (match operands.next() { Some(&dr::Operand::IdRef(ref value)) => Some(*value), @@ -5432,9 +5525,7 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5335u32 => Ok(ops::Op::IgnoreIntersectionNV), - 5335u32 => Ok(ops::Op::IgnoreIntersectionKHR), 5336u32 => Ok(ops::Op::TerminateRayNV), - 5336u32 => Ok(ops::Op::TerminateRayKHR), 5337u32 => Ok(ops::Op::TraceNV { accel: (match operands.next() { Some(&dr::Operand::IdRef(ref value)) => Some(*value), @@ -5503,74 +5594,6 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), - 5337u32 => Ok(ops::Op::TraceRayKHR { - accel: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - ray_flags: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - cull_mask: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - sbt_offset: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - sbt_stride: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - miss_index: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - ray_origin: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - ray_tmin: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - ray_direction: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - ray_tmax: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - payload_id: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - }), 5341u32 => Ok(ops::Op::TypeAccelerationStructureNV), 5341u32 => Ok(ops::Op::TypeAccelerationStructureKHR), 5344u32 => Ok(ops::Op::ExecuteCallableNV { @@ -5587,20 +5610,6 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), - 5344u32 => Ok(ops::Op::ExecuteCallableKHR { - sbt_index: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - callable_data_id: (match operands.next() { - Some(&dr::Operand::IdRef(ref value)) => Some(*value), - Some(_) => Err(OperandError::WrongType)?, - None => None, - }) - .ok_or(OperandError::Missing)?, - }), 5358u32 => Ok(ops::Op::TypeCooperativeMatrixNV { component_type: (match operands.next() { Some(&dr::Operand::IdRef(ref value)) => Some(self.types.lookup_token(*value)), @@ -6081,6 +6090,27 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 5600u32 => Ok(ops::Op::FunctionPointerINTEL { + function: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 5601u32 => Ok(ops::Op::FunctionPointerCallINTEL { + operand_1: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + } { + vec.push(item); + } + vec + }, + }), 5632u32 => Ok(ops::Op::DecorateString { target: (match operands.next() { Some(&dr::Operand::IdRef(ref value)) => Some(*value), @@ -7822,6 +7852,61 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 5887u32 => Ok(ops::Op::LoopControlINTEL { + loop_control_parameters: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(&dr::Operand::LiteralInt32(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + } { + vec.push(item); + } + vec + }, + }), + 5946u32 => Ok(ops::Op::ReadPipeBlockingINTEL { + packet_size: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + packet_alignment: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 5947u32 => Ok(ops::Op::WritePipeBlockingINTEL { + packet_size: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + packet_alignment: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 5949u32 => Ok(ops::Op::FPGARegINTEL { + result: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + input: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + }), 6016u32 => Ok(ops::Op::RayQueryGetRayTMinKHR { ray_query: (match operands.next() { Some(&dr::Operand::IdRef(ref value)) => Some(*value), @@ -8032,6 +8117,32 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 6035u32 => Ok(ops::Op::AtomicFAddEXT { + pointer: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + memory: (match operands.next() { + Some(&dr::Operand::IdScope(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + semantics: (match operands.next() { + Some(&dr::Operand::IdMemorySemantics(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + value: (match operands.next() { + Some(&dr::Operand::IdRef(ref value)) => Some(*value), + Some(_) => Err(OperandError::WrongType)?, + None => None, + }) + .ok_or(OperandError::Missing)?, + }), _ => Err(InstructionError::WrongOpcode), } } diff --git a/rspirv/sr/autogen_decoration.rs b/rspirv/sr/autogen_decoration.rs index 6899b8a4..ace64096 100644 --- a/rspirv/sr/autogen_decoration.rs +++ b/rspirv/sr/autogen_decoration.rs @@ -71,9 +71,22 @@ pub enum Decoration { RestrictPointerEXT, AliasedPointer, AliasedPointerEXT, + ReferencedIndirectlyINTEL, CounterBuffer(spirv::Word), HlslCounterBufferGOOGLE(spirv::Word), UserSemantic(String), HlslSemanticGOOGLE(String), UserTypeGOOGLE(String), + RegisterINTEL, + MemoryINTEL(String), + NumbanksINTEL(u32), + BankwidthINTEL(u32), + MaxPrivateCopiesINTEL(u32), + SinglepumpINTEL, + DoublepumpINTEL, + MaxReplicatesINTEL(u32), + SimpleDualPortINTEL, + MergeINTEL(String, String), + BankBitsINTEL(Vec), + ForcePow2DepthINTEL(u32), } diff --git a/rspirv/sr/autogen_ops.rs b/rspirv/sr/autogen_ops.rs index 6eee968a..0d7d1c6c 100644 --- a/rspirv/sr/autogen_ops.rs +++ b/rspirv/sr/autogen_ops.rs @@ -46,10 +46,13 @@ pub enum Branch { pointer: spirv::Word, size: u32, }, + TerminateInvocation, } #[derive(Clone, Debug, Eq, PartialEq)] pub enum Terminator { Branch(Branch), + IgnoreIntersectionKHR, + TerminateRayKHR, } #[derive(Clone, Debug, Eq, PartialEq)] pub enum Op { @@ -1340,7 +1343,27 @@ pub enum Op { value: spirv::Word, index: spirv::Word, }, - TypeRayQueryProvisionalKHR, + TraceRayKHR { + accel: spirv::Word, + ray_flags: spirv::Word, + cull_mask: spirv::Word, + sbt_offset: spirv::Word, + sbt_stride: spirv::Word, + miss_index: spirv::Word, + ray_origin: spirv::Word, + ray_tmin: spirv::Word, + ray_direction: spirv::Word, + ray_tmax: spirv::Word, + payload: spirv::Word, + }, + ExecuteCallableKHR { + sbt_index: spirv::Word, + callable_data: spirv::Word, + }, + ConvertUToAccelerationStructureKHR { + accel: spirv::Word, + }, + TypeRayQueryKHR, RayQueryInitializeKHR { ray_query: spirv::Word, accel: spirv::Word, @@ -1443,9 +1466,7 @@ pub enum Op { hit_kind: spirv::Word, }, IgnoreIntersectionNV, - IgnoreIntersectionKHR, TerminateRayNV, - TerminateRayKHR, TraceNV { accel: spirv::Word, ray_flags: spirv::Word, @@ -1459,29 +1480,12 @@ pub enum Op { ray_tmax: spirv::Word, payload_id: spirv::Word, }, - TraceRayKHR { - accel: spirv::Word, - ray_flags: spirv::Word, - cull_mask: spirv::Word, - sbt_offset: spirv::Word, - sbt_stride: spirv::Word, - miss_index: spirv::Word, - ray_origin: spirv::Word, - ray_tmin: spirv::Word, - ray_direction: spirv::Word, - ray_tmax: spirv::Word, - payload_id: spirv::Word, - }, TypeAccelerationStructureNV, TypeAccelerationStructureKHR, ExecuteCallableNV { sbt_index: spirv::Word, callable_data_id: spirv::Word, }, - ExecuteCallableKHR { - sbt_index: spirv::Word, - callable_data_id: spirv::Word, - }, TypeCooperativeMatrixNV { component_type: Token, execution: spirv::Word, @@ -1614,6 +1618,12 @@ pub enum Op { operand_1: spirv::Word, operand_2: spirv::Word, }, + FunctionPointerINTEL { + function: spirv::Word, + }, + FunctionPointerCallINTEL { + operand_1: Vec, + }, DecorateString { target: spirv::Word, decoration: spirv::Decoration, @@ -2083,6 +2093,21 @@ pub enum Op { SubgroupAvcSicGetInterRawSadsINTEL { payload: spirv::Word, }, + LoopControlINTEL { + loop_control_parameters: Vec, + }, + ReadPipeBlockingINTEL { + packet_size: spirv::Word, + packet_alignment: spirv::Word, + }, + WritePipeBlockingINTEL { + packet_size: spirv::Word, + packet_alignment: spirv::Word, + }, + FPGARegINTEL { + result: spirv::Word, + input: spirv::Word, + }, RayQueryGetRayTMinKHR { ray_query: spirv::Word, }, @@ -2146,4 +2171,10 @@ pub enum Op { ray_query: spirv::Word, intersection: spirv::Word, }, + AtomicFAddEXT { + pointer: spirv::Word, + memory: spirv::Word, + semantics: spirv::Word, + value: spirv::Word, + }, } diff --git a/spirv/autogen_spirv.rs b/spirv/autogen_spirv.rs index 6a9a28b5..d4bf7dee 100644 --- a/spirv/autogen_spirv.rs +++ b/spirv/autogen_spirv.rs @@ -6,16 +6,17 @@ pub type Word = u32; pub const MAGIC_NUMBER: u32 = 0x07230203; pub const MAJOR_VERSION: u8 = 1u8; pub const MINOR_VERSION: u8 = 5u8; -pub const REVISION: u8 = 3u8; -bitflags! { # [ doc = "SPIR-V operand kind: [ImageOperands](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_image_operands_a_image_operands)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct ImageOperands : u32 { const NONE = 0u32 ; const BIAS = 1u32 ; const LOD = 2u32 ; const GRAD = 4u32 ; const CONST_OFFSET = 8u32 ; const OFFSET = 16u32 ; const CONST_OFFSETS = 32u32 ; const SAMPLE = 64u32 ; const MIN_LOD = 128u32 ; const MAKE_TEXEL_AVAILABLE = 256u32 ; const MAKE_TEXEL_AVAILABLE_KHR = 256u32 ; const MAKE_TEXEL_VISIBLE = 512u32 ; const MAKE_TEXEL_VISIBLE_KHR = 512u32 ; const NON_PRIVATE_TEXEL = 1024u32 ; const NON_PRIVATE_TEXEL_KHR = 1024u32 ; const VOLATILE_TEXEL = 2048u32 ; const VOLATILE_TEXEL_KHR = 2048u32 ; const SIGN_EXTEND = 4096u32 ; const ZERO_EXTEND = 8192u32 ; } } -bitflags! { # [ doc = "SPIR-V operand kind: [FPFastMathMode](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_fp_fast_math_mode_a_fp_fast_math_mode)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct FPFastMathMode : u32 { const NONE = 0u32 ; const NOT_NAN = 1u32 ; const NOT_INF = 2u32 ; const NSZ = 4u32 ; const ALLOW_RECIP = 8u32 ; const FAST = 16u32 ; } } -bitflags! { # [ doc = "SPIR-V operand kind: [SelectionControl](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_selection_control_a_selection_control)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct SelectionControl : u32 { const NONE = 0u32 ; const FLATTEN = 1u32 ; const DONT_FLATTEN = 2u32 ; } } -bitflags! { # [ doc = "SPIR-V operand kind: [LoopControl](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_loop_control_a_loop_control)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct LoopControl : u32 { const NONE = 0u32 ; const UNROLL = 1u32 ; const DONT_UNROLL = 2u32 ; const DEPENDENCY_INFINITE = 4u32 ; const DEPENDENCY_LENGTH = 8u32 ; const MIN_ITERATIONS = 16u32 ; const MAX_ITERATIONS = 32u32 ; const ITERATION_MULTIPLE = 64u32 ; const PEEL_COUNT = 128u32 ; const PARTIAL_COUNT = 256u32 ; } } -bitflags! { # [ doc = "SPIR-V operand kind: [FunctionControl](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_function_control_a_function_control)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct FunctionControl : u32 { const NONE = 0u32 ; const INLINE = 1u32 ; const DONT_INLINE = 2u32 ; const PURE = 4u32 ; const CONST = 8u32 ; } } -bitflags! { # [ doc = "SPIR-V operand kind: [MemorySemantics](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_memory_semantics_a_memory_semantics)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct MemorySemantics : u32 { const RELAXED = 0u32 ; const NONE = 0u32 ; const ACQUIRE = 2u32 ; const RELEASE = 4u32 ; const ACQUIRE_RELEASE = 8u32 ; const SEQUENTIALLY_CONSISTENT = 16u32 ; const UNIFORM_MEMORY = 64u32 ; const SUBGROUP_MEMORY = 128u32 ; const WORKGROUP_MEMORY = 256u32 ; const CROSS_WORKGROUP_MEMORY = 512u32 ; const ATOMIC_COUNTER_MEMORY = 1024u32 ; const IMAGE_MEMORY = 2048u32 ; const OUTPUT_MEMORY = 4096u32 ; const OUTPUT_MEMORY_KHR = 4096u32 ; const MAKE_AVAILABLE = 8192u32 ; const MAKE_AVAILABLE_KHR = 8192u32 ; const MAKE_VISIBLE = 16384u32 ; const MAKE_VISIBLE_KHR = 16384u32 ; const VOLATILE = 32768u32 ; } } -bitflags! { # [ doc = "SPIR-V operand kind: [MemoryAccess](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_memory_access_a_memory_access)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct MemoryAccess : u32 { const NONE = 0u32 ; const VOLATILE = 1u32 ; const ALIGNED = 2u32 ; const NONTEMPORAL = 4u32 ; const MAKE_POINTER_AVAILABLE = 8u32 ; const MAKE_POINTER_AVAILABLE_KHR = 8u32 ; const MAKE_POINTER_VISIBLE = 16u32 ; const MAKE_POINTER_VISIBLE_KHR = 16u32 ; const NON_PRIVATE_POINTER = 32u32 ; const NON_PRIVATE_POINTER_KHR = 32u32 ; } } -bitflags! { # [ doc = "SPIR-V operand kind: [KernelProfilingInfo](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_kernel_profiling_info_a_kernel_profiling_info)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct KernelProfilingInfo : u32 { const NONE = 0u32 ; const CMD_EXEC_TIME = 1u32 ; } } -bitflags! { # [ doc = "SPIR-V operand kind: [RayFlags](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_ray_flags_a_ray_flags)" ] # [ cfg_attr ( feature = "serialize" , derive ( serde :: Serialize ) ) ] # [ cfg_attr ( feature = "deserialize" , derive ( serde :: Deserialize ) ) ] pub struct RayFlags : u32 { const NONE_KHR = 0u32 ; const OPAQUE_KHR = 1u32 ; const NO_OPAQUE_KHR = 2u32 ; const TERMINATE_ON_FIRST_HIT_KHR = 4u32 ; const SKIP_CLOSEST_HIT_SHADER_KHR = 8u32 ; const CULL_BACK_FACING_TRIANGLES_KHR = 16u32 ; const CULL_FRONT_FACING_TRIANGLES_KHR = 32u32 ; const CULL_OPAQUE_KHR = 64u32 ; const CULL_NO_OPAQUE_KHR = 128u32 ; const SKIP_TRIANGLES_KHR = 256u32 ; const SKIP_AAB_BS_KHR = 512u32 ; } } +pub const REVISION: u8 = 4u8; +bitflags! { # [doc = "SPIR-V operand kind: [ImageOperands](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_image_operands_a_image_operands)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct ImageOperands : u32 { const NONE = 0u32 ; const BIAS = 1u32 ; const LOD = 2u32 ; const GRAD = 4u32 ; const CONST_OFFSET = 8u32 ; const OFFSET = 16u32 ; const CONST_OFFSETS = 32u32 ; const SAMPLE = 64u32 ; const MIN_LOD = 128u32 ; const MAKE_TEXEL_AVAILABLE = 256u32 ; const MAKE_TEXEL_AVAILABLE_KHR = 256u32 ; const MAKE_TEXEL_VISIBLE = 512u32 ; const MAKE_TEXEL_VISIBLE_KHR = 512u32 ; const NON_PRIVATE_TEXEL = 1024u32 ; const NON_PRIVATE_TEXEL_KHR = 1024u32 ; const VOLATILE_TEXEL = 2048u32 ; const VOLATILE_TEXEL_KHR = 2048u32 ; const SIGN_EXTEND = 4096u32 ; const ZERO_EXTEND = 8192u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [FPFastMathMode](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_fp_fast_math_mode_a_fp_fast_math_mode)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct FPFastMathMode : u32 { const NONE = 0u32 ; const NOT_NAN = 1u32 ; const NOT_INF = 2u32 ; const NSZ = 4u32 ; const ALLOW_RECIP = 8u32 ; const FAST = 16u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [SelectionControl](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_selection_control_a_selection_control)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct SelectionControl : u32 { const NONE = 0u32 ; const FLATTEN = 1u32 ; const DONT_FLATTEN = 2u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [LoopControl](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_loop_control_a_loop_control)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct LoopControl : u32 { const NONE = 0u32 ; const UNROLL = 1u32 ; const DONT_UNROLL = 2u32 ; const DEPENDENCY_INFINITE = 4u32 ; const DEPENDENCY_LENGTH = 8u32 ; const MIN_ITERATIONS = 16u32 ; const MAX_ITERATIONS = 32u32 ; const ITERATION_MULTIPLE = 64u32 ; const PEEL_COUNT = 128u32 ; const PARTIAL_COUNT = 256u32 ; const INITIATION_INTERVAL_INTEL = 65536u32 ; const MAX_CONCURRENCY_INTEL = 131072u32 ; const DEPENDENCY_ARRAY_INTEL = 262144u32 ; const PIPELINE_ENABLE_INTEL = 524288u32 ; const LOOP_COALESCE_INTEL = 1048576u32 ; const MAX_INTERLEAVING_INTEL = 2097152u32 ; const SPECULATED_ITERATIONS_INTEL = 4194304u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [FunctionControl](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_function_control_a_function_control)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct FunctionControl : u32 { const NONE = 0u32 ; const INLINE = 1u32 ; const DONT_INLINE = 2u32 ; const PURE = 4u32 ; const CONST = 8u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [MemorySemantics](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_memory_semantics_a_memory_semantics)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct MemorySemantics : u32 { const RELAXED = 0u32 ; const NONE = 0u32 ; const ACQUIRE = 2u32 ; const RELEASE = 4u32 ; const ACQUIRE_RELEASE = 8u32 ; const SEQUENTIALLY_CONSISTENT = 16u32 ; const UNIFORM_MEMORY = 64u32 ; const SUBGROUP_MEMORY = 128u32 ; const WORKGROUP_MEMORY = 256u32 ; const CROSS_WORKGROUP_MEMORY = 512u32 ; const ATOMIC_COUNTER_MEMORY = 1024u32 ; const IMAGE_MEMORY = 2048u32 ; const OUTPUT_MEMORY = 4096u32 ; const OUTPUT_MEMORY_KHR = 4096u32 ; const MAKE_AVAILABLE = 8192u32 ; const MAKE_AVAILABLE_KHR = 8192u32 ; const MAKE_VISIBLE = 16384u32 ; const MAKE_VISIBLE_KHR = 16384u32 ; const VOLATILE = 32768u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [MemoryAccess](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_memory_access_a_memory_access)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct MemoryAccess : u32 { const NONE = 0u32 ; const VOLATILE = 1u32 ; const ALIGNED = 2u32 ; const NONTEMPORAL = 4u32 ; const MAKE_POINTER_AVAILABLE = 8u32 ; const MAKE_POINTER_AVAILABLE_KHR = 8u32 ; const MAKE_POINTER_VISIBLE = 16u32 ; const MAKE_POINTER_VISIBLE_KHR = 16u32 ; const NON_PRIVATE_POINTER = 32u32 ; const NON_PRIVATE_POINTER_KHR = 32u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [KernelProfilingInfo](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_kernel_profiling_info_a_kernel_profiling_info)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct KernelProfilingInfo : u32 { const NONE = 0u32 ; const CMD_EXEC_TIME = 1u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [RayFlags](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_ray_flags_a_ray_flags)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct RayFlags : u32 { const NONE_KHR = 0u32 ; const OPAQUE_KHR = 1u32 ; const NO_OPAQUE_KHR = 2u32 ; const TERMINATE_ON_FIRST_HIT_KHR = 4u32 ; const SKIP_CLOSEST_HIT_SHADER_KHR = 8u32 ; const CULL_BACK_FACING_TRIANGLES_KHR = 16u32 ; const CULL_FRONT_FACING_TRIANGLES_KHR = 32u32 ; const CULL_OPAQUE_KHR = 64u32 ; const CULL_NO_OPAQUE_KHR = 128u32 ; const SKIP_TRIANGLES_KHR = 256u32 ; const SKIP_AAB_BS_KHR = 512u32 ; } } +bitflags! { # [doc = "SPIR-V operand kind: [FragmentShadingRate](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_fragment_shading_rate_a_fragment_shading_rate)"] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct FragmentShadingRate : u32 { const VERTICAL2_PIXELS = 1u32 ; const VERTICAL4_PIXELS = 2u32 ; const HORIZONTAL2_PIXELS = 4u32 ; const HORIZONTAL4_PIXELS = 8u32 ; } } #[doc = "/// SPIR-V operand kind: [SourceLanguage](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_source_language_a_source_language)"] #[repr(u32)] #[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)] @@ -113,10 +114,7 @@ impl ExecutionModel { | ExecutionModel::AnyHitNV | ExecutionModel::ClosestHitNV | ExecutionModel::MissNV - | ExecutionModel::CallableNV => &[ - Capability::RayTracingNV, - Capability::RayTracingProvisionalKHR, - ], + | ExecutionModel::CallableNV => &[Capability::RayTracingNV, Capability::RayTracingKHR], ExecutionModel::Vertex | ExecutionModel::Fragment | ExecutionModel::GLCompute => { &[Capability::Shader] } @@ -345,6 +343,10 @@ pub enum ExecutionMode { SampleInterlockUnorderedEXT = 5369u32, ShadingRateInterlockOrderedEXT = 5370u32, ShadingRateInterlockUnorderedEXT = 5371u32, + MaxWorkgroupSizeINTEL = 5893u32, + MaxWorkDimINTEL = 5894u32, + NoGlobalOffsetINTEL = 5895u32, + NumSIMDWorkitemsINTEL = 5896u32, } #[allow(non_upper_case_globals)] impl ExecutionMode { @@ -355,6 +357,7 @@ impl ExecutionMode { ExecutionMode::DerivativeGroupQuadsNV => &[Capability::ComputeDerivativeGroupQuadsNV], ExecutionMode::DenormFlushToZero => &[Capability::DenormFlushToZero], ExecutionMode::DenormPreserve => &[Capability::DenormPreserve], + ExecutionMode::NumSIMDWorkitemsINTEL => &[Capability::FPGAKernelAttributesINTEL], ExecutionMode::PixelInterlockOrderedEXT | ExecutionMode::PixelInterlockUnorderedEXT => { &[Capability::FragmentShaderPixelInterlockEXT] } @@ -386,6 +389,9 @@ impl ExecutionMode { | ExecutionMode::Initializer | ExecutionMode::Finalizer | ExecutionMode::LocalSizeHintId => &[Capability::Kernel], + ExecutionMode::MaxWorkgroupSizeINTEL + | ExecutionMode::MaxWorkDimINTEL + | ExecutionMode::NoGlobalOffsetINTEL => &[Capability::KernelAttributesINTEL], ExecutionMode::OutputLinesNV | ExecutionMode::OutputPrimitivesNV | ExecutionMode::OutputTrianglesNV => &[Capability::MeshShadingNV], @@ -477,6 +483,10 @@ impl num_traits::FromPrimitive for ExecutionMode { 5369u32 => Self::SampleInterlockUnorderedEXT, 5370u32 => Self::ShadingRateInterlockOrderedEXT, 5371u32 => Self::ShadingRateInterlockUnorderedEXT, + 5893u32 => Self::MaxWorkgroupSizeINTEL, + 5894u32 => Self::MaxWorkDimINTEL, + 5895u32 => Self::NoGlobalOffsetINTEL, + 5896u32 => Self::NumSIMDWorkitemsINTEL, _ => return None, }) } @@ -544,6 +554,10 @@ impl std::str::FromStr for ExecutionMode { "SampleInterlockUnorderedEXT" => Ok(Self::SampleInterlockUnorderedEXT), "ShadingRateInterlockOrderedEXT" => Ok(Self::ShadingRateInterlockOrderedEXT), "ShadingRateInterlockUnorderedEXT" => Ok(Self::ShadingRateInterlockUnorderedEXT), + "MaxWorkgroupSizeINTEL" => Ok(Self::MaxWorkgroupSizeINTEL), + "MaxWorkDimINTEL" => Ok(Self::MaxWorkDimINTEL), + "NoGlobalOffsetINTEL" => Ok(Self::NoGlobalOffsetINTEL), + "NumSIMDWorkitemsINTEL" => Ok(Self::NumSIMDWorkitemsINTEL), _ => Err(()), } } @@ -574,6 +588,7 @@ pub enum StorageClass { IncomingRayPayloadNV = 5342u32, ShaderRecordBufferNV = 5343u32, PhysicalStorageBuffer = 5349u32, + CodeSectionINTEL = 5605u32, } #[allow(non_upper_case_globals)] impl StorageClass { @@ -593,6 +608,7 @@ impl StorageClass { | StorageClass::Function | StorageClass::Image => &[], StorageClass::AtomicCounter => &[Capability::AtomicStorage], + StorageClass::CodeSectionINTEL => &[Capability::FunctionPointersINTEL], StorageClass::Generic => &[Capability::GenericPointer], StorageClass::PhysicalStorageBuffer => &[Capability::PhysicalStorageBufferAddresses], StorageClass::CallableDataNV @@ -600,10 +616,9 @@ impl StorageClass { | StorageClass::RayPayloadNV | StorageClass::HitAttributeNV | StorageClass::IncomingRayPayloadNV - | StorageClass::ShaderRecordBufferNV => &[ - Capability::RayTracingNV, - Capability::RayTracingProvisionalKHR, - ], + | StorageClass::ShaderRecordBufferNV => { + &[Capability::RayTracingNV, Capability::RayTracingKHR] + } StorageClass::Uniform | StorageClass::Output | StorageClass::Private @@ -636,6 +651,7 @@ impl num_traits::FromPrimitive for StorageClass { 5342u32 => Self::IncomingRayPayloadNV, 5343u32 => Self::ShaderRecordBufferNV, 5349u32 => Self::PhysicalStorageBuffer, + 5605u32 => Self::CodeSectionINTEL, _ => return None, }) } @@ -674,6 +690,7 @@ impl std::str::FromStr for StorageClass { "ShaderRecordBufferKHR" => Ok(Self::ShaderRecordBufferNV), "PhysicalStorageBuffer" => Ok(Self::PhysicalStorageBuffer), "PhysicalStorageBufferEXT" => Ok(Self::PhysicalStorageBuffer), + "CodeSectionINTEL" => Ok(Self::CodeSectionINTEL), _ => Err(()), } } @@ -882,12 +899,15 @@ pub enum ImageFormat { Rg8ui = 37u32, R16ui = 38u32, R8ui = 39u32, + R64ui = 40u32, + R64i = 41u32, } #[allow(non_upper_case_globals)] impl ImageFormat { pub fn required_capabilities(self) -> &'static [Capability] { match self { ImageFormat::Unknown => &[], + ImageFormat::R64ui | ImageFormat::R64i => &[Capability::Int64ImageEXT], ImageFormat::Rgba32f | ImageFormat::Rgba16f | ImageFormat::R32f @@ -974,6 +994,8 @@ impl num_traits::FromPrimitive for ImageFormat { 37u32 => Self::Rg8ui, 38u32 => Self::R16ui, 39u32 => Self::R8ui, + 40u32 => Self::R64ui, + 41u32 => Self::R64i, _ => return None, }) } @@ -1025,6 +1047,8 @@ impl std::str::FromStr for ImageFormat { "Rg8ui" => Ok(Self::Rg8ui), "R16ui" => Ok(Self::R16ui), "R8ui" => Ok(Self::R8ui), + "R64ui" => Ok(Self::R64ui), + "R64i" => Ok(Self::R64i), _ => Err(()), } } @@ -1509,9 +1533,22 @@ pub enum Decoration { NonUniform = 5300u32, RestrictPointer = 5355u32, AliasedPointer = 5356u32, + ReferencedIndirectlyINTEL = 5602u32, CounterBuffer = 5634u32, UserSemantic = 5635u32, UserTypeGOOGLE = 5636u32, + RegisterINTEL = 5825u32, + MemoryINTEL = 5826u32, + NumbanksINTEL = 5827u32, + BankwidthINTEL = 5828u32, + MaxPrivateCopiesINTEL = 5829u32, + SinglepumpINTEL = 5830u32, + DoublepumpINTEL = 5831u32, + MaxReplicatesINTEL = 5832u32, + SimpleDualPortINTEL = 5833u32, + MergeINTEL = 5834u32, + BankBitsINTEL = 5835u32, + ForcePow2DepthINTEL = 5836u32, } #[allow(non_upper_case_globals)] impl Decoration { @@ -1537,9 +1574,22 @@ impl Decoration { | Decoration::UserSemantic | Decoration::UserTypeGOOGLE => &[], Decoration::MaxByteOffset | Decoration::MaxByteOffsetId => &[Capability::Addresses], + Decoration::RegisterINTEL + | Decoration::MemoryINTEL + | Decoration::NumbanksINTEL + | Decoration::BankwidthINTEL + | Decoration::MaxPrivateCopiesINTEL + | Decoration::SinglepumpINTEL + | Decoration::DoublepumpINTEL + | Decoration::MaxReplicatesINTEL + | Decoration::SimpleDualPortINTEL + | Decoration::MergeINTEL + | Decoration::BankBitsINTEL + | Decoration::ForcePow2DepthINTEL => &[Capability::FPGAMemoryAttributesINTEL], Decoration::PerVertexNV => &[Capability::FragmentBarycentricNV], Decoration::PassthroughNV => &[Capability::GeometryShaderPassthroughNV], Decoration::Stream => &[Capability::GeometryStreams], + Decoration::ReferencedIndirectlyINTEL => &[Capability::IndirectReferencesINTEL], Decoration::InputAttachmentIndex => &[Capability::InputAttachment], Decoration::CPacked | Decoration::Constant @@ -1653,9 +1703,22 @@ impl num_traits::FromPrimitive for Decoration { 5300u32 => Self::NonUniform, 5355u32 => Self::RestrictPointer, 5356u32 => Self::AliasedPointer, + 5602u32 => Self::ReferencedIndirectlyINTEL, 5634u32 => Self::CounterBuffer, 5635u32 => Self::UserSemantic, 5636u32 => Self::UserTypeGOOGLE, + 5825u32 => Self::RegisterINTEL, + 5826u32 => Self::MemoryINTEL, + 5827u32 => Self::NumbanksINTEL, + 5828u32 => Self::BankwidthINTEL, + 5829u32 => Self::MaxPrivateCopiesINTEL, + 5830u32 => Self::SinglepumpINTEL, + 5831u32 => Self::DoublepumpINTEL, + 5832u32 => Self::MaxReplicatesINTEL, + 5833u32 => Self::SimpleDualPortINTEL, + 5834u32 => Self::MergeINTEL, + 5835u32 => Self::BankBitsINTEL, + 5836u32 => Self::ForcePow2DepthINTEL, _ => return None, }) } @@ -1731,11 +1794,24 @@ impl std::str::FromStr for Decoration { "RestrictPointerEXT" => Ok(Self::RestrictPointer), "AliasedPointer" => Ok(Self::AliasedPointer), "AliasedPointerEXT" => Ok(Self::AliasedPointer), + "ReferencedIndirectlyINTEL" => Ok(Self::ReferencedIndirectlyINTEL), "CounterBuffer" => Ok(Self::CounterBuffer), "HlslCounterBufferGOOGLE" => Ok(Self::CounterBuffer), "UserSemantic" => Ok(Self::UserSemantic), "HlslSemanticGOOGLE" => Ok(Self::UserSemantic), "UserTypeGOOGLE" => Ok(Self::UserTypeGOOGLE), + "RegisterINTEL" => Ok(Self::RegisterINTEL), + "MemoryINTEL" => Ok(Self::MemoryINTEL), + "NumbanksINTEL" => Ok(Self::NumbanksINTEL), + "BankwidthINTEL" => Ok(Self::BankwidthINTEL), + "MaxPrivateCopiesINTEL" => Ok(Self::MaxPrivateCopiesINTEL), + "SinglepumpINTEL" => Ok(Self::SinglepumpINTEL), + "DoublepumpINTEL" => Ok(Self::DoublepumpINTEL), + "MaxReplicatesINTEL" => Ok(Self::MaxReplicatesINTEL), + "SimpleDualPortINTEL" => Ok(Self::SimpleDualPortINTEL), + "MergeINTEL" => Ok(Self::MergeINTEL), + "BankBitsINTEL" => Ok(Self::BankBitsINTEL), + "ForcePow2DepthINTEL" => Ok(Self::ForcePow2DepthINTEL), _ => Err(()), } } @@ -1795,8 +1871,10 @@ pub enum BuiltIn { BaseVertex = 4424u32, BaseInstance = 4425u32, DrawIndex = 4426u32, + PrimitiveShadingRateKHR = 4432u32, DeviceIndex = 4438u32, ViewIndex = 4440u32, + ShadingRateKHR = 4444u32, BaryCoordNoPerspAMD = 4992u32, BaryCoordNoPerspCentroidAMD = 4993u32, BaryCoordNoPerspSampleAMD = 4994u32, @@ -1863,7 +1941,6 @@ impl BuiltIn { pub const InstanceCustomIndexKHR: Self = Self::InstanceCustomIndexNV; pub const ObjectToWorldKHR: Self = Self::ObjectToWorldNV; pub const WorldToObjectKHR: Self = Self::WorldToObjectNV; - pub const HitTKHR: Self = Self::HitTNV; pub const HitKindKHR: Self = Self::HitKindNV; pub const IncomingRayFlagsKHR: Self = Self::IncomingRayFlagsNV; pub fn required_capabilities(self) -> &'static [Capability] { @@ -1893,17 +1970,22 @@ impl BuiltIn { &[Capability::FragmentDensityEXT, Capability::ShadingRateNV] } BuiltIn::FullyCoveredEXT => &[Capability::FragmentFullyCoveredEXT], + BuiltIn::PrimitiveShadingRateKHR | BuiltIn::ShadingRateKHR => { + &[Capability::FragmentShadingRateKHR] + } BuiltIn::Layer => &[ Capability::Geometry, Capability::ShaderLayer, Capability::ShaderViewportIndexLayerEXT, + Capability::MeshShadingNV, ], BuiltIn::InvocationId => &[Capability::Geometry, Capability::Tessellation], BuiltIn::PrimitiveId => &[ Capability::Geometry, Capability::Tessellation, Capability::RayTracingNV, - Capability::RayTracingProvisionalKHR, + Capability::RayTracingKHR, + Capability::MeshShadingNV, ], BuiltIn::WorkDim | BuiltIn::GlobalSize @@ -1933,10 +2015,13 @@ impl BuiltIn { Capability::MultiViewport, Capability::ShaderViewportIndex, Capability::ShaderViewportIndexLayerEXT, + Capability::MeshShadingNV, ], BuiltIn::PositionPerViewNV | BuiltIn::ViewportMaskPerViewNV => { &[Capability::PerViewAttributesNV, Capability::MeshShadingNV] } + BuiltIn::RayGeometryIndexKHR => &[Capability::RayTracingKHR], + BuiltIn::HitTNV => &[Capability::RayTracingNV], BuiltIn::LaunchIdNV | BuiltIn::LaunchSizeNV | BuiltIn::WorldRayOriginNV @@ -1948,13 +2033,8 @@ impl BuiltIn { | BuiltIn::InstanceCustomIndexNV | BuiltIn::ObjectToWorldNV | BuiltIn::WorldToObjectNV - | BuiltIn::HitTNV | BuiltIn::HitKindNV - | BuiltIn::IncomingRayFlagsNV => &[ - Capability::RayTracingNV, - Capability::RayTracingProvisionalKHR, - ], - BuiltIn::RayGeometryIndexKHR => &[Capability::RayTracingProvisionalKHR], + | BuiltIn::IncomingRayFlagsNV => &[Capability::RayTracingNV, Capability::RayTracingKHR], BuiltIn::SampleId | BuiltIn::SamplePosition => &[Capability::SampleRateShading], BuiltIn::Position | BuiltIn::PointSize @@ -2046,8 +2126,10 @@ impl num_traits::FromPrimitive for BuiltIn { 4424u32 => Self::BaseVertex, 4425u32 => Self::BaseInstance, 4426u32 => Self::DrawIndex, + 4432u32 => Self::PrimitiveShadingRateKHR, 4438u32 => Self::DeviceIndex, 4440u32 => Self::ViewIndex, + 4444u32 => Self::ShadingRateKHR, 4992u32 => Self::BaryCoordNoPerspAMD, 4993u32 => Self::BaryCoordNoPerspCentroidAMD, 4994u32 => Self::BaryCoordNoPerspSampleAMD, @@ -2158,8 +2240,10 @@ impl std::str::FromStr for BuiltIn { "BaseVertex" => Ok(Self::BaseVertex), "BaseInstance" => Ok(Self::BaseInstance), "DrawIndex" => Ok(Self::DrawIndex), + "PrimitiveShadingRateKHR" => Ok(Self::PrimitiveShadingRateKHR), "DeviceIndex" => Ok(Self::DeviceIndex), "ViewIndex" => Ok(Self::ViewIndex), + "ShadingRateKHR" => Ok(Self::ShadingRateKHR), "BaryCoordNoPerspAMD" => Ok(Self::BaryCoordNoPerspAMD), "BaryCoordNoPerspCentroidAMD" => Ok(Self::BaryCoordNoPerspCentroidAMD), "BaryCoordNoPerspSampleAMD" => Ok(Self::BaryCoordNoPerspSampleAMD), @@ -2211,7 +2295,6 @@ impl std::str::FromStr for BuiltIn { "WorldToObjectNV" => Ok(Self::WorldToObjectNV), "WorldToObjectKHR" => Ok(Self::WorldToObjectNV), "HitTNV" => Ok(Self::HitTNV), - "HitTKHR" => Ok(Self::HitTNV), "HitKindNV" => Ok(Self::HitKindNV), "HitKindKHR" => Ok(Self::HitKindNV), "IncomingRayFlagsNV" => Ok(Self::IncomingRayFlagsNV), @@ -2249,7 +2332,7 @@ impl Scope { | Scope::Workgroup | Scope::Subgroup | Scope::Invocation => &[], - Scope::ShaderCallKHR => &[Capability::RayTracingProvisionalKHR], + Scope::ShaderCallKHR => &[Capability::RayTracingKHR], Scope::QueueFamily => &[Capability::VulkanMemoryModel], } } @@ -2475,6 +2558,7 @@ pub enum Capability { GroupNonUniformQuad = 68u32, ShaderLayer = 69u32, ShaderViewportIndex = 70u32, + FragmentShadingRateKHR = 4422u32, SubgroupBallotKHR = 4423u32, DrawParameters = 4427u32, SubgroupVoteKHR = 4431u32, @@ -2497,12 +2581,15 @@ pub enum Capability { RoundingModeRTE = 4467u32, RoundingModeRTZ = 4468u32, RayQueryProvisionalKHR = 4471u32, - RayTraversalPrimitiveCullingProvisionalKHR = 4478u32, + RayQueryKHR = 4472u32, + RayTraversalPrimitiveCullingKHR = 4478u32, + RayTracingKHR = 4479u32, Float16ImageAMD = 5008u32, ImageGatherBiasLodAMD = 5009u32, FragmentMaskAMD = 5010u32, StencilExportEXT = 5013u32, ImageReadWriteLodAMD = 5015u32, + Int64ImageEXT = 5016u32, ShaderClockKHR = 5055u32, SampleMaskOverrideCoverageNV = 5249u32, GeometryShaderPassthroughNV = 5251u32, @@ -2546,9 +2633,20 @@ pub enum Capability { SubgroupImageBlockIOINTEL = 5570u32, SubgroupImageMediaBlockIOINTEL = 5579u32, IntegerFunctions2INTEL = 5584u32, + FunctionPointersINTEL = 5603u32, + IndirectReferencesINTEL = 5604u32, SubgroupAvcMotionEstimationINTEL = 5696u32, SubgroupAvcMotionEstimationIntraINTEL = 5697u32, SubgroupAvcMotionEstimationChromaINTEL = 5698u32, + FPGAMemoryAttributesINTEL = 5824u32, + UnstructuredLoopControlsINTEL = 5886u32, + FPGALoopControlsINTEL = 5888u32, + KernelAttributesINTEL = 5892u32, + FPGAKernelAttributesINTEL = 5897u32, + BlockingPipesINTEL = 5945u32, + FPGARegINTEL = 5948u32, + AtomicFloat32AddEXT = 6033u32, + AtomicFloat64AddEXT = 6034u32, } #[allow(non_upper_case_globals)] impl Capability { @@ -2624,9 +2722,18 @@ impl Capability { | Capability::SubgroupBufferBlockIOINTEL | Capability::SubgroupImageBlockIOINTEL | Capability::SubgroupImageMediaBlockIOINTEL + | Capability::FunctionPointersINTEL + | Capability::IndirectReferencesINTEL | Capability::SubgroupAvcMotionEstimationINTEL | Capability::SubgroupAvcMotionEstimationIntraINTEL - | Capability::SubgroupAvcMotionEstimationChromaINTEL => &[], + | Capability::SubgroupAvcMotionEstimationChromaINTEL + | Capability::FPGAMemoryAttributesINTEL + | Capability::UnstructuredLoopControlsINTEL + | Capability::FPGALoopControlsINTEL + | Capability::KernelAttributesINTEL + | Capability::FPGAKernelAttributesINTEL + | Capability::BlockingPipesINTEL + | Capability::FPGARegINTEL => &[], Capability::GenericPointer => &[Capability::Addresses], Capability::SubgroupDispatch => &[Capability::DeviceEnqueue], Capability::GeometryPointSize @@ -2661,10 +2768,9 @@ impl Capability { Capability::PerViewAttributesNV => &[Capability::MultiView], Capability::ShaderViewportIndexLayerEXT => &[Capability::MultiViewport], Capability::PipeStorage => &[Capability::Pipes], - Capability::RayTraversalPrimitiveCullingProvisionalKHR => &[ - Capability::RayQueryProvisionalKHR, - Capability::RayTracingProvisionalKHR, - ], + Capability::RayTraversalPrimitiveCullingKHR => { + &[Capability::RayQueryKHR, Capability::RayTracingKHR] + } Capability::SampleMaskOverrideCoverageNV => &[Capability::SampleRateShading], Capability::Image1D => &[Capability::Sampled1D], Capability::ImageBuffer | Capability::UniformTexelBufferArrayDynamicIndexing => { @@ -2700,15 +2806,19 @@ impl Capability { | Capability::TransformFeedback | Capability::StorageImageReadWithoutFormat | Capability::StorageImageWriteWithoutFormat + | Capability::FragmentShadingRateKHR | Capability::DrawParameters | Capability::MultiView | Capability::VariablePointersStorageBuffer | Capability::RayQueryProvisionalKHR + | Capability::RayQueryKHR + | Capability::RayTracingKHR | Capability::Float16ImageAMD | Capability::ImageGatherBiasLodAMD | Capability::FragmentMaskAMD | Capability::StencilExportEXT | Capability::ImageReadWriteLodAMD + | Capability::Int64ImageEXT | Capability::ShaderClockKHR | Capability::FragmentFullyCoveredEXT | Capability::MeshShadingNV @@ -2724,7 +2834,9 @@ impl Capability { | Capability::ShaderSMBuiltinsNV | Capability::FragmentShaderPixelInterlockEXT | Capability::DemoteToHelperInvocationEXT - | Capability::IntegerFunctions2INTEL => &[Capability::Shader], + | Capability::IntegerFunctions2INTEL + | Capability::AtomicFloat32AddEXT + | Capability::AtomicFloat64AddEXT => &[Capability::Shader], Capability::UniformBufferArrayNonUniformIndexing | Capability::SampledImageArrayNonUniformIndexing | Capability::StorageBufferArrayNonUniformIndexing @@ -2814,6 +2926,7 @@ impl num_traits::FromPrimitive for Capability { 68u32 => Self::GroupNonUniformQuad, 69u32 => Self::ShaderLayer, 70u32 => Self::ShaderViewportIndex, + 4422u32 => Self::FragmentShadingRateKHR, 4423u32 => Self::SubgroupBallotKHR, 4427u32 => Self::DrawParameters, 4431u32 => Self::SubgroupVoteKHR, @@ -2836,12 +2949,15 @@ impl num_traits::FromPrimitive for Capability { 4467u32 => Self::RoundingModeRTE, 4468u32 => Self::RoundingModeRTZ, 4471u32 => Self::RayQueryProvisionalKHR, - 4478u32 => Self::RayTraversalPrimitiveCullingProvisionalKHR, + 4472u32 => Self::RayQueryKHR, + 4478u32 => Self::RayTraversalPrimitiveCullingKHR, + 4479u32 => Self::RayTracingKHR, 5008u32 => Self::Float16ImageAMD, 5009u32 => Self::ImageGatherBiasLodAMD, 5010u32 => Self::FragmentMaskAMD, 5013u32 => Self::StencilExportEXT, 5015u32 => Self::ImageReadWriteLodAMD, + 5016u32 => Self::Int64ImageEXT, 5055u32 => Self::ShaderClockKHR, 5249u32 => Self::SampleMaskOverrideCoverageNV, 5251u32 => Self::GeometryShaderPassthroughNV, @@ -2885,9 +3001,20 @@ impl num_traits::FromPrimitive for Capability { 5570u32 => Self::SubgroupImageBlockIOINTEL, 5579u32 => Self::SubgroupImageMediaBlockIOINTEL, 5584u32 => Self::IntegerFunctions2INTEL, + 5603u32 => Self::FunctionPointersINTEL, + 5604u32 => Self::IndirectReferencesINTEL, 5696u32 => Self::SubgroupAvcMotionEstimationINTEL, 5697u32 => Self::SubgroupAvcMotionEstimationIntraINTEL, 5698u32 => Self::SubgroupAvcMotionEstimationChromaINTEL, + 5824u32 => Self::FPGAMemoryAttributesINTEL, + 5886u32 => Self::UnstructuredLoopControlsINTEL, + 5888u32 => Self::FPGALoopControlsINTEL, + 5892u32 => Self::KernelAttributesINTEL, + 5897u32 => Self::FPGAKernelAttributesINTEL, + 5945u32 => Self::BlockingPipesINTEL, + 5948u32 => Self::FPGARegINTEL, + 6033u32 => Self::AtomicFloat32AddEXT, + 6034u32 => Self::AtomicFloat64AddEXT, _ => return None, }) } @@ -2968,6 +3095,7 @@ impl std::str::FromStr for Capability { "GroupNonUniformQuad" => Ok(Self::GroupNonUniformQuad), "ShaderLayer" => Ok(Self::ShaderLayer), "ShaderViewportIndex" => Ok(Self::ShaderViewportIndex), + "FragmentShadingRateKHR" => Ok(Self::FragmentShadingRateKHR), "SubgroupBallotKHR" => Ok(Self::SubgroupBallotKHR), "DrawParameters" => Ok(Self::DrawParameters), "SubgroupVoteKHR" => Ok(Self::SubgroupVoteKHR), @@ -2992,14 +3120,15 @@ impl std::str::FromStr for Capability { "RoundingModeRTE" => Ok(Self::RoundingModeRTE), "RoundingModeRTZ" => Ok(Self::RoundingModeRTZ), "RayQueryProvisionalKHR" => Ok(Self::RayQueryProvisionalKHR), - "RayTraversalPrimitiveCullingProvisionalKHR" => { - Ok(Self::RayTraversalPrimitiveCullingProvisionalKHR) - } + "RayQueryKHR" => Ok(Self::RayQueryKHR), + "RayTraversalPrimitiveCullingKHR" => Ok(Self::RayTraversalPrimitiveCullingKHR), + "RayTracingKHR" => Ok(Self::RayTracingKHR), "Float16ImageAMD" => Ok(Self::Float16ImageAMD), "ImageGatherBiasLodAMD" => Ok(Self::ImageGatherBiasLodAMD), "FragmentMaskAMD" => Ok(Self::FragmentMaskAMD), "StencilExportEXT" => Ok(Self::StencilExportEXT), "ImageReadWriteLodAMD" => Ok(Self::ImageReadWriteLodAMD), + "Int64ImageEXT" => Ok(Self::Int64ImageEXT), "ShaderClockKHR" => Ok(Self::ShaderClockKHR), "SampleMaskOverrideCoverageNV" => Ok(Self::SampleMaskOverrideCoverageNV), "GeometryShaderPassthroughNV" => Ok(Self::GeometryShaderPassthroughNV), @@ -3096,6 +3225,8 @@ impl std::str::FromStr for Capability { "SubgroupImageBlockIOINTEL" => Ok(Self::SubgroupImageBlockIOINTEL), "SubgroupImageMediaBlockIOINTEL" => Ok(Self::SubgroupImageMediaBlockIOINTEL), "IntegerFunctions2INTEL" => Ok(Self::IntegerFunctions2INTEL), + "FunctionPointersINTEL" => Ok(Self::FunctionPointersINTEL), + "IndirectReferencesINTEL" => Ok(Self::IndirectReferencesINTEL), "SubgroupAvcMotionEstimationINTEL" => Ok(Self::SubgroupAvcMotionEstimationINTEL), "SubgroupAvcMotionEstimationIntraINTEL" => { Ok(Self::SubgroupAvcMotionEstimationIntraINTEL) @@ -3103,6 +3234,15 @@ impl std::str::FromStr for Capability { "SubgroupAvcMotionEstimationChromaINTEL" => { Ok(Self::SubgroupAvcMotionEstimationChromaINTEL) } + "FPGAMemoryAttributesINTEL" => Ok(Self::FPGAMemoryAttributesINTEL), + "UnstructuredLoopControlsINTEL" => Ok(Self::UnstructuredLoopControlsINTEL), + "FPGALoopControlsINTEL" => Ok(Self::FPGALoopControlsINTEL), + "KernelAttributesINTEL" => Ok(Self::KernelAttributesINTEL), + "FPGAKernelAttributesINTEL" => Ok(Self::FPGAKernelAttributesINTEL), + "BlockingPipesINTEL" => Ok(Self::BlockingPipesINTEL), + "FPGARegINTEL" => Ok(Self::FPGARegINTEL), + "AtomicFloat32AddEXT" => Ok(Self::AtomicFloat32AddEXT), + "AtomicFloat64AddEXT" => Ok(Self::AtomicFloat64AddEXT), _ => Err(()), } } @@ -3121,9 +3261,7 @@ impl RayQueryIntersection { pub fn required_capabilities(self) -> &'static [Capability] { match self { RayQueryIntersection::RayQueryCandidateIntersectionKHR - | RayQueryIntersection::RayQueryCommittedIntersectionKHR => { - &[Capability::RayQueryProvisionalKHR] - } + | RayQueryIntersection::RayQueryCommittedIntersectionKHR => &[Capability::RayQueryKHR], } } } @@ -3167,7 +3305,7 @@ impl RayQueryCommittedIntersectionType { RayQueryCommittedIntersectionType::RayQueryCommittedIntersectionNoneKHR | RayQueryCommittedIntersectionType::RayQueryCommittedIntersectionTriangleKHR | RayQueryCommittedIntersectionType::RayQueryCommittedIntersectionGeneratedKHR => { - &[Capability::RayQueryProvisionalKHR] + &[Capability::RayQueryKHR] } } } @@ -3218,7 +3356,7 @@ impl RayQueryCandidateIntersectionType { match self { RayQueryCandidateIntersectionType::RayQueryCandidateIntersectionTriangleKHR | RayQueryCandidateIntersectionType::RayQueryCandidateIntersectionAABBKHR => { - &[Capability::RayQueryProvisionalKHR] + &[Capability::RayQueryKHR] } } } @@ -3600,13 +3738,19 @@ pub enum Op { PtrEqual = 401u32, PtrNotEqual = 402u32, PtrDiff = 403u32, + TerminateInvocation = 4416u32, SubgroupBallotKHR = 4421u32, SubgroupFirstInvocationKHR = 4422u32, SubgroupAllKHR = 4428u32, SubgroupAnyKHR = 4429u32, SubgroupAllEqualKHR = 4430u32, SubgroupReadInvocationKHR = 4432u32, - TypeRayQueryProvisionalKHR = 4472u32, + TraceRayKHR = 4445u32, + ExecuteCallableKHR = 4446u32, + ConvertUToAccelerationStructureKHR = 4447u32, + IgnoreIntersectionKHR = 4448u32, + TerminateRayKHR = 4449u32, + TypeRayQueryKHR = 4472u32, RayQueryInitializeKHR = 4473u32, RayQueryTerminateKHR = 4474u32, RayQueryGenerateIntersectionKHR = 4475u32, @@ -3666,6 +3810,8 @@ pub enum Op { USubSatINTEL = 5596u32, IMul32x16INTEL = 5597u32, UMul32x16INTEL = 5598u32, + FunctionPointerINTEL = 5600u32, + FunctionPointerCallINTEL = 5601u32, DecorateString = 5632u32, MemberDecorateString = 5633u32, VmeImageINTEL = 5699u32, @@ -3786,6 +3932,10 @@ pub enum Op { SubgroupAvcSicGetPackedSkcLumaCountThresholdINTEL = 5814u32, SubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL = 5815u32, SubgroupAvcSicGetInterRawSadsINTEL = 5816u32, + LoopControlINTEL = 5887u32, + ReadPipeBlockingINTEL = 5946u32, + WritePipeBlockingINTEL = 5947u32, + FPGARegINTEL = 5949u32, RayQueryGetRayTMinKHR = 6016u32, RayQueryGetRayFlagsKHR = 6017u32, RayQueryGetIntersectionTKHR = 6018u32, @@ -3803,15 +3953,12 @@ pub enum Op { RayQueryGetWorldRayOriginKHR = 6030u32, RayQueryGetIntersectionObjectToWorldKHR = 6031u32, RayQueryGetIntersectionWorldToObjectKHR = 6032u32, + AtomicFAddEXT = 6035u32, } #[allow(non_upper_case_globals)] impl Op { pub const ReportIntersectionKHR: Op = Op::ReportIntersectionNV; - pub const IgnoreIntersectionKHR: Op = Op::IgnoreIntersectionNV; - pub const TerminateRayKHR: Op = Op::TerminateRayNV; - pub const TraceRayKHR: Op = Op::TraceNV; pub const TypeAccelerationStructureKHR: Op = Op::TypeAccelerationStructureNV; - pub const ExecuteCallableKHR: Op = Op::ExecuteCallableNV; pub const DecorateStringGOOGLE: Op = Op::DecorateString; pub const MemberDecorateStringGOOGLE: Op = Op::MemberDecorateString; } @@ -4163,13 +4310,19 @@ impl num_traits::FromPrimitive for Op { 401u32 => Op::PtrEqual, 402u32 => Op::PtrNotEqual, 403u32 => Op::PtrDiff, + 4416u32 => Op::TerminateInvocation, 4421u32 => Op::SubgroupBallotKHR, 4422u32 => Op::SubgroupFirstInvocationKHR, 4428u32 => Op::SubgroupAllKHR, 4429u32 => Op::SubgroupAnyKHR, 4430u32 => Op::SubgroupAllEqualKHR, 4432u32 => Op::SubgroupReadInvocationKHR, - 4472u32 => Op::TypeRayQueryProvisionalKHR, + 4445u32 => Op::TraceRayKHR, + 4446u32 => Op::ExecuteCallableKHR, + 4447u32 => Op::ConvertUToAccelerationStructureKHR, + 4448u32 => Op::IgnoreIntersectionKHR, + 4449u32 => Op::TerminateRayKHR, + 4472u32 => Op::TypeRayQueryKHR, 4473u32 => Op::RayQueryInitializeKHR, 4474u32 => Op::RayQueryTerminateKHR, 4475u32 => Op::RayQueryGenerateIntersectionKHR, @@ -4229,6 +4382,8 @@ impl num_traits::FromPrimitive for Op { 5596u32 => Op::USubSatINTEL, 5597u32 => Op::IMul32x16INTEL, 5598u32 => Op::UMul32x16INTEL, + 5600u32 => Op::FunctionPointerINTEL, + 5601u32 => Op::FunctionPointerCallINTEL, 5632u32 => Op::DecorateString, 5633u32 => Op::MemberDecorateString, 5699u32 => Op::VmeImageINTEL, @@ -4349,6 +4504,10 @@ impl num_traits::FromPrimitive for Op { 5814u32 => Op::SubgroupAvcSicGetPackedSkcLumaCountThresholdINTEL, 5815u32 => Op::SubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL, 5816u32 => Op::SubgroupAvcSicGetInterRawSadsINTEL, + 5887u32 => Op::LoopControlINTEL, + 5946u32 => Op::ReadPipeBlockingINTEL, + 5947u32 => Op::WritePipeBlockingINTEL, + 5949u32 => Op::FPGARegINTEL, 6016u32 => Op::RayQueryGetRayTMinKHR, 6017u32 => Op::RayQueryGetRayFlagsKHR, 6018u32 => Op::RayQueryGetIntersectionTKHR, @@ -4366,6 +4525,7 @@ impl num_traits::FromPrimitive for Op { 6030u32 => Op::RayQueryGetWorldRayOriginKHR, 6031u32 => Op::RayQueryGetIntersectionObjectToWorldKHR, 6032u32 => Op::RayQueryGetIntersectionWorldToObjectKHR, + 6035u32 => Op::AtomicFAddEXT, _ => return None, }) }