diff --git a/esp-hal-common/src/sha.rs b/esp-hal-common/src/sha.rs index e7b28c482eb..e921f55630a 100644 --- a/esp-hal-common/src/sha.rs +++ b/esp-hal-common/src/sha.rs @@ -3,6 +3,7 @@ use core::convert::Infallible; use crate::{ peripheral::{Peripheral, PeripheralRef}, peripherals::SHA, + system::PeripheralClockControl, }; // All the hash algorithms introduced in FIPS PUB 180-4 Spec. @@ -227,8 +228,13 @@ fn mode_as_bits(mode: ShaMode) -> u8 { // This implementation might fail after u32::MAX/8 bytes, to increase please see // ::finish() length/self.cursor usage impl<'d> Sha<'d> { - pub fn new(sha: impl Peripheral

+ 'd, mode: ShaMode) -> Self { + pub fn new( + sha: impl Peripheral

+ 'd, + mode: ShaMode, + peripheral_clock_control: &mut PeripheralClockControl, + ) -> Self { crate::into_ref!(sha); + peripheral_clock_control.enable(crate::system::Peripheral::Sha); // Setup SHA Mode #[cfg(not(esp32))] diff --git a/esp-hal-common/src/system.rs b/esp-hal-common/src/system.rs index add084ec8e8..7b4908b970f 100644 --- a/esp-hal-common/src/system.rs +++ b/esp-hal-common/src/system.rs @@ -54,6 +54,19 @@ pub enum Peripheral { Twai0, #[cfg(twai1)] Twai1, + #[cfg(timg0)] + Timg0, + #[cfg(timg1)] + Timg1, + #[cfg(lp_wdt)] + Wdt, + Sha, + #[cfg(usb_device)] + UsbDevice, + Uart0, + Uart1, + #[cfg(uart2)] + Uart2, } /// Controls the enablement of peripheral clocks. @@ -190,6 +203,60 @@ impl PeripheralClockControl { perip_clk_en1.modify(|_, w| w.crypto_aes_clk_en().set_bit()); perip_rst_en1.modify(|_, w| w.crypto_aes_rst().clear_bit()); } + #[cfg(timg0)] + Peripheral::Timg0 => { + #[cfg(any(esp32c3, esp32s2, esp32s3))] + perip_clk_en0.modify(|_, w| w.timers_clk_en().set_bit()); + perip_clk_en0.modify(|_, w| w.timergroup_clk_en().set_bit()); + + #[cfg(any(esp32c3, esp32s2, esp32s3))] + perip_rst_en0.modify(|_, w| w.timers_rst().clear_bit()); + perip_rst_en0.modify(|_, w| w.timergroup_rst().clear_bit()); + } + #[cfg(timg1)] + Peripheral::Timg1 => { + #[cfg(any(esp32c3, esp32s2, esp32s3))] + perip_clk_en0.modify(|_, w| w.timers_clk_en().set_bit()); + perip_clk_en0.modify(|_, w| w.timergroup1_clk_en().set_bit()); + + #[cfg(any(esp32c3, esp32s2, esp32s3))] + perip_rst_en0.modify(|_, w| w.timers_rst().clear_bit()); + perip_rst_en0.modify(|_, w| w.timergroup1_rst().clear_bit()); + } + Peripheral::Sha => { + #[cfg(not(esp32))] + perip_clk_en1.modify(|_, w| w.crypto_sha_clk_en().set_bit()); + #[cfg(not(esp32))] + perip_rst_en1.modify(|_, w| w.crypto_sha_rst().clear_bit()); + } + #[cfg(esp32c3)] + Peripheral::UsbDevice => { + perip_clk_en0.modify(|_, w| w.usb_device_clk_en().set_bit()); + perip_rst_en0.modify(|_, w| w.usb_device_rst().clear_bit()); + } + #[cfg(esp32s3)] + Peripheral::UsbDevice => { + perip_clk_en1.modify(|_, w| w.usb_device_clk_en().set_bit()); + perip_rst_en1.modify(|_, w| w.usb_device_rst().clear_bit()); + } + Peripheral::Uart0 => { + perip_clk_en0.modify(|_, w| w.uart_clk_en().set_bit()); + perip_rst_en0.modify(|_, w| w.uart_rst().clear_bit()); + } + Peripheral::Uart1 => { + perip_clk_en0.modify(|_, w| w.uart1_clk_en().set_bit()); + perip_rst_en0.modify(|_, w| w.uart1_rst().clear_bit()); + } + #[cfg(all(uart2, esp32s3))] + Peripheral::Uart2 => { + perip_clk_en1.modify(|_, w| w.uart2_clk_en().set_bit()); + perip_rst_en1.modify(|_, w| w.uart2_rst().clear_bit()); + } + #[cfg(all(uart2, esp32))] + Peripheral::Uart2 => { + perip_clk_en0.modify(|_, w| w.uart2_clk_en().set_bit()); + perip_rst_en0.modify(|_, w| w.uart2_rst().clear_bit()); + } } } } @@ -273,6 +340,64 @@ impl PeripheralClockControl { system.pcnt_conf.modify(|_, w| w.pcnt_clk_en().set_bit()); system.pcnt_conf.modify(|_, w| w.pcnt_rst_en().clear_bit()); } + #[cfg(timg0)] + Peripheral::Timg0 => { + system + .timergroup0_timer_clk_conf + .write(|w| w.tg0_timer_clk_en().set_bit()); + system + .timergroup0_timer_clk_conf + .write(|w| unsafe { w.tg0_timer_clk_sel().bits(1) }); + } + #[cfg(timg1)] + Peripheral::Timg1 => { + system + .timergroup1_timer_clk_conf + .write(|w| w.tg1_timer_clk_en().set_bit()); + system + .timergroup1_timer_clk_conf + .write(|w| unsafe { w.tg1_timer_clk_sel().bits(1) }); + } + #[cfg(lp_wdt)] + Peripheral::Wdt => { + system + .timergroup0_wdt_clk_conf + .write(|w| w.tg0_wdt_clk_en().set_bit()); + system + .timergroup0_wdt_clk_conf + .write(|w| unsafe { w.tg0_wdt_clk_sel().bits(1) }); + + system + .timergroup1_timer_clk_conf + .write(|w| w.tg1_timer_clk_en().set_bit()); + system + .timergroup1_timer_clk_conf + .write(|w| unsafe { w.tg1_timer_clk_sel().bits(1) }); + } + Peripheral::Sha => { + system.sha_conf.modify(|_, w| w.sha_clk_en().set_bit()); + system.sha_conf.modify(|_, w| w.sha_rst_en().clear_bit()); + } + Peripheral::UsbDevice => { + system + .usb_device_conf + .modify(|_, w| w.usb_device_clk_en().set_bit()); + system + .usb_device_conf + .modify(|_, w| w.usb_device_rst_en().clear_bit()); + } + Peripheral::Uart0 => { + system.uart0_conf.modify(|_, w| w.uart0_clk_en().set_bit()); + system + .uart0_conf + .modify(|_, w| w.uart0_rst_en().clear_bit()); + } + Peripheral::Uart1 => { + system.uart1_conf.modify(|_, w| w.uart1_clk_en().set_bit()); + system + .uart1_conf + .modify(|_, w| w.uart1_rst_en().clear_bit()); + } } } } diff --git a/esp-hal-common/src/timer.rs b/esp-hal-common/src/timer.rs index b43777fb52b..89d69fabb93 100644 --- a/esp-hal-common/src/timer.rs +++ b/esp-hal-common/src/timer.rs @@ -18,6 +18,7 @@ use crate::{ clock::Clocks, peripheral::{Peripheral, PeripheralRef}, peripherals::{timg0::RegisterBlock, TIMG0}, + system::PeripheralClockControl, }; /// Custom timer error type @@ -64,7 +65,11 @@ impl<'d, T> TimerGroup<'d, T> where T: TimerGroupInstance, { - pub fn new(timer_group: impl Peripheral

+ 'd, clocks: &Clocks) -> Self { + pub fn new( + timer_group: impl Peripheral

+ 'd, + clocks: &Clocks, + peripheral_clock_control: &mut PeripheralClockControl, + ) -> Self { crate::into_ref!(timer_group); let timer0 = Timer::new( @@ -72,6 +77,7 @@ where phantom: PhantomData::default(), }, clocks.apb_clock, + peripheral_clock_control, ); #[cfg(not(any(esp32c2, esp32c3, esp32c6)))] @@ -80,9 +86,10 @@ where phantom: PhantomData::default(), }, clocks.apb_clock, + peripheral_clock_control, ); - let wdt = Wdt::new(); + let wdt = Wdt::new(peripheral_clock_control); Self { _timer_group: timer_group, @@ -106,11 +113,14 @@ where T: Instance, { /// Create a new timer instance - pub fn new(timg: T, apb_clk_freq: HertzU32) -> Self { + pub fn new( + timg: T, + apb_clk_freq: HertzU32, + peripheral_clock_control: &mut PeripheralClockControl, + ) -> Self { // TODO: this currently assumes APB_CLK is being used, as we don't yet have a // way to select the XTAL_CLK. - #[cfg(esp32c6)] - Self::enable_clock(); + timg.enable_peripheral(peripheral_clock_control); Self { timg, apb_clk_freq } } @@ -118,20 +128,6 @@ where pub fn free(self) -> T { self.timg } - - #[cfg(esp32c6)] - fn enable_clock() { - let pcr = unsafe { &*crate::peripherals::PCR::ptr() }; - pcr.timergroup0_timer_clk_conf - .write(|w| w.tg0_timer_clk_en().set_bit()); - pcr.timergroup0_timer_clk_conf - .write(|w| unsafe { w.tg0_timer_clk_sel().bits(1) }); - - pcr.timergroup1_timer_clk_conf - .write(|w| w.tg1_timer_clk_en().set_bit()); - pcr.timergroup1_timer_clk_conf - .write(|w| unsafe { w.tg1_timer_clk_sel().bits(1) }); - } } impl Deref for Timer @@ -185,6 +181,8 @@ pub trait Instance { fn set_divider(&mut self, divider: u16); fn is_interrupt_set(&self) -> bool; + + fn enable_peripheral(&self, peripheral_clock_control: &mut PeripheralClockControl); } pub struct Timer0 { @@ -328,6 +326,10 @@ where .t0config .modify(|_, w| unsafe { w.divider().bits(divider) }) } + + fn enable_peripheral(&self, peripheral_clock_control: &mut PeripheralClockControl) { + peripheral_clock_control.enable(crate::system::Peripheral::Timg0); + } } #[cfg(not(any(esp32c2, esp32c3, esp32c6)))] @@ -473,6 +475,10 @@ where .t1config .modify(|_, w| unsafe { w.divider().bits(divider) }) } + + fn enable_peripheral(&self, peripheral_clock_control: &mut PeripheralClockControl) { + peripheral_clock_control.enable(crate::system::Peripheral::Timg1); + } } fn timeout_to_ticks(timeout: T, clock: F, divider: u32) -> u64 @@ -565,28 +571,14 @@ where TG: TimerGroupInstance, { /// Create a new watchdog timer instance - pub fn new() -> Self { - #[cfg(esp32c6)] - Self::enable_clock(); + pub fn new(_peripheral_clock_control: &mut PeripheralClockControl) -> Self { + #[cfg(lp_wdt)] + _peripheral_clock_control.enable(crate::system::Peripheral::Wdt); Self { phantom: PhantomData::default(), } } - #[cfg(esp32c6)] - fn enable_clock() { - let pcr = unsafe { &*crate::peripherals::PCR::ptr() }; - pcr.timergroup0_wdt_clk_conf - .write(|w| w.tg0_wdt_clk_en().set_bit()); - pcr.timergroup0_wdt_clk_conf - .write(|w| unsafe { w.tg0_wdt_clk_sel().bits(1) }); - - pcr.timergroup1_timer_clk_conf - .write(|w| w.tg1_timer_clk_en().set_bit()); - pcr.timergroup1_timer_clk_conf - .write(|w| unsafe { w.tg1_timer_clk_sel().bits(1) }); - } - fn set_wdt_enabled(&mut self, enabled: bool) { let reg_block = unsafe { &*TG::register_block() }; diff --git a/esp-hal-common/src/uart.rs b/esp-hal-common/src/uart.rs index f3b15f75abd..04b6b3c75a4 100644 --- a/esp-hal-common/src/uart.rs +++ b/esp-hal-common/src/uart.rs @@ -12,6 +12,7 @@ use crate::{ UART0, UART1, }, + system::PeripheralClockControl, }; const UART_FIFO_SIZE: u16 = 128; @@ -256,11 +257,13 @@ where config: Option, mut pins: Option

, clocks: &Clocks, + peripheral_clock_control: &mut PeripheralClockControl, ) -> Self where P: UartPins, { crate::into_ref!(uart); + uart.enable_peripheral(peripheral_clock_control); let mut serial = Uart { uart }; serial.uart.disable_rx_interrupts(); serial.uart.disable_tx_interrupts(); @@ -285,8 +288,12 @@ where } /// Create a new UART instance with defaults - pub fn new(uart: impl Peripheral

+ 'd) -> Self { + pub fn new( + uart: impl Peripheral

+ 'd, + peripheral_clock_control: &mut PeripheralClockControl, + ) -> Self { crate::into_ref!(uart); + uart.enable_peripheral(peripheral_clock_control); let mut serial = Uart { uart }; serial.uart.disable_rx_interrupts(); serial.uart.disable_tx_interrupts(); @@ -787,6 +794,8 @@ pub trait Instance { fn cts_signal(&self) -> InputSignal; fn rts_signal(&self) -> OutputSignal; + + fn enable_peripheral(&self, peripheral_clock_control: &mut PeripheralClockControl); } impl Instance for UART0 { @@ -815,6 +824,10 @@ impl Instance for UART0 { fn rts_signal(&self) -> OutputSignal { OutputSignal::U0RTS } + + fn enable_peripheral(&self, peripheral_clock_control: &mut PeripheralClockControl) { + peripheral_clock_control.enable(crate::system::Peripheral::Uart0); + } } impl Instance for UART1 { @@ -843,6 +856,10 @@ impl Instance for UART1 { fn rts_signal(&self) -> OutputSignal { OutputSignal::U1RTS } + + fn enable_peripheral(&self, peripheral_clock_control: &mut PeripheralClockControl) { + peripheral_clock_control.enable(crate::system::Peripheral::Uart1); + } } #[cfg(uart2)] @@ -872,6 +889,10 @@ impl Instance for UART2 { fn rts_signal(&self) -> OutputSignal { OutputSignal::U2RTS } + + fn enable_peripheral(&self, peripheral_clock_control: &mut PeripheralClockControl) { + peripheral_clock_control.enable(crate::system::Peripheral::Uart2); + } } #[cfg(feature = "ufmt")] diff --git a/esp-hal-common/src/usb_serial_jtag.rs b/esp-hal-common/src/usb_serial_jtag.rs index 29cb1af04de..a984eea94e6 100644 --- a/esp-hal-common/src/usb_serial_jtag.rs +++ b/esp-hal-common/src/usb_serial_jtag.rs @@ -3,6 +3,7 @@ use core::convert::Infallible; use crate::{ peripheral::{Peripheral, PeripheralRef}, peripherals::{usb_device::RegisterBlock, USB_DEVICE}, + system::PeripheralClockControl, }; pub struct UsbSerialJtag<'d, T> { @@ -17,8 +18,13 @@ where T: Instance, { /// Create a new USB serial/JTAG instance with defaults - pub fn new(usb_serial: impl Peripheral

+ 'd) -> Self { + pub fn new( + usb_serial: impl Peripheral

+ 'd, + peripheral_clock_control: &mut PeripheralClockControl, + ) -> Self { crate::into_ref!(usb_serial); + // #[cfg(usb_device)] + peripheral_clock_control.enable(crate::system::Peripheral::Sha); let mut dev = Self { usb_serial }; dev.usb_serial.disable_rx_interrupts(); dev.usb_serial.disable_tx_interrupts(); diff --git a/esp32-hal/examples/adc.rs b/esp32-hal/examples/adc.rs index e0d4cfc2ead..78154a327a8 100644 --- a/esp32-hal/examples/adc.rs +++ b/esp32-hal/examples/adc.rs @@ -21,10 +21,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/advanced_serial.rs b/esp32-hal/examples/advanced_serial.rs index df97e4212ee..707f3f365e5 100644 --- a/esp32-hal/examples/advanced_serial.rs +++ b/esp32-hal/examples/advanced_serial.rs @@ -27,10 +27,14 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); @@ -51,7 +55,13 @@ fn main() -> ! { io.pins.gpio17.into_floating_input(), ); - let mut serial1 = Uart::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks); + let mut serial1 = Uart::new_with_config( + peripherals.UART1, + Some(config), + Some(pins), + &clocks, + &mut system.peripheral_clock_control, + ); let mut delay = Delay::new(&clocks); diff --git a/esp32-hal/examples/aes.rs b/esp32-hal/examples/aes.rs index 73f9069ffe5..5404e0dfb0d 100644 --- a/esp32-hal/examples/aes.rs +++ b/esp32-hal/examples/aes.rs @@ -24,9 +24,17 @@ fn main() -> ! { // Disable the RTC and TIMG watchdog timers let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.rwdt.disable(); diff --git a/esp32-hal/examples/blinky.rs b/esp32-hal/examples/blinky.rs index d3ae25e5fdd..e5fa6a828ea 100644 --- a/esp32-hal/examples/blinky.rs +++ b/esp32-hal/examples/blinky.rs @@ -19,10 +19,14 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/blinky_erased_pins.rs b/esp32-hal/examples/blinky_erased_pins.rs index adb795edab1..dd184506207 100644 --- a/esp32-hal/examples/blinky_erased_pins.rs +++ b/esp32-hal/examples/blinky_erased_pins.rs @@ -19,10 +19,14 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/dac.rs b/esp32-hal/examples/dac.rs index 7e3c42d16d0..67beaced45c 100644 --- a/esp32-hal/examples/dac.rs +++ b/esp32-hal/examples/dac.rs @@ -20,10 +20,14 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/embassy_hello_world.rs b/esp32-hal/examples/embassy_hello_world.rs index 65eff0f1501..bce0eb0d3c2 100644 --- a/esp32-hal/examples/embassy_hello_world.rs +++ b/esp32-hal/examples/embassy_hello_world.rs @@ -42,13 +42,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32-hal/examples/embassy_spi.rs b/esp32-hal/examples/embassy_spi.rs index 17dbba21cfa..c4b424e3072 100644 --- a/esp32-hal/examples/embassy_spi.rs +++ b/esp32-hal/examples/embassy_spi.rs @@ -66,9 +66,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32-hal/examples/embassy_wait.rs b/esp32-hal/examples/embassy_wait.rs index b197373fe58..1ad1ec355d3 100644 --- a/esp32-hal/examples/embassy_wait.rs +++ b/esp32-hal/examples/embassy_wait.rs @@ -38,13 +38,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32-hal/examples/gpio_interrupt.rs b/esp32-hal/examples/gpio_interrupt.rs index 1f4f371bda6..9866a2ebbf4 100644 --- a/esp32-hal/examples/gpio_interrupt.rs +++ b/esp32-hal/examples/gpio_interrupt.rs @@ -28,10 +28,14 @@ static BUTTON: Mutex>>>> = Mutex::new(RefCe #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/hello_rgb.rs b/esp32-hal/examples/hello_rgb.rs index 279f2474e96..6eaadb1bb20 100644 --- a/esp32-hal/examples/hello_rgb.rs +++ b/esp32-hal/examples/hello_rgb.rs @@ -40,7 +40,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); diff --git a/esp32-hal/examples/hello_world.rs b/esp32-hal/examples/hello_world.rs index b177ccf5717..d33dd14f999 100644 --- a/esp32-hal/examples/hello_world.rs +++ b/esp32-hal/examples/hello_world.rs @@ -20,13 +20,17 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; - let mut serial0 = Uart::new(peripherals.UART0); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); let mut rtc = Rtc::new(peripherals.RTC_CNTL); // Disable MWDT and RWDT (Watchdog) flash boot protection diff --git a/esp32-hal/examples/i2c_bmp180_calibration_data.rs b/esp32-hal/examples/i2c_bmp180_calibration_data.rs index 88d8667aa4d..f1ddb3a4586 100644 --- a/esp32-hal/examples/i2c_bmp180_calibration_data.rs +++ b/esp32-hal/examples/i2c_bmp180_calibration_data.rs @@ -27,7 +27,11 @@ fn main() -> ! { let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/i2c_display.rs b/esp32-hal/examples/i2c_display.rs index dccf4ba7f78..8d183dd91da 100644 --- a/esp32-hal/examples/i2c_display.rs +++ b/esp32-hal/examples/i2c_display.rs @@ -38,7 +38,11 @@ fn main() -> ! { let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/i2s_read.rs b/esp32-hal/examples/i2s_read.rs index bde777f35ad..28b4427f86b 100644 --- a/esp32-hal/examples/i2s_read.rs +++ b/esp32-hal/examples/i2s_read.rs @@ -33,7 +33,11 @@ fn main() -> ! { let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/i2s_sound.rs b/esp32-hal/examples/i2s_sound.rs index 7e22767cb7e..96043932e94 100644 --- a/esp32-hal/examples/i2s_sound.rs +++ b/esp32-hal/examples/i2s_sound.rs @@ -56,7 +56,11 @@ fn main() -> ! { let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/ledc.rs b/esp32-hal/examples/ledc.rs index 1e9b8a7037a..8c92feb4613 100644 --- a/esp32-hal/examples/ledc.rs +++ b/esp32-hal/examples/ledc.rs @@ -28,7 +28,11 @@ fn main() -> ! { let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/mcpwm.rs b/esp32-hal/examples/mcpwm.rs index 746a92ab854..b3d134152b0 100644 --- a/esp32-hal/examples/mcpwm.rs +++ b/esp32-hal/examples/mcpwm.rs @@ -23,7 +23,11 @@ fn main() -> ! { let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/multicore.rs b/esp32-hal/examples/multicore.rs index 1fed537efdd..42384d7aadd 100644 --- a/esp32-hal/examples/multicore.rs +++ b/esp32-hal/examples/multicore.rs @@ -23,14 +23,22 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer1 = timer_group1.timer0; let mut wdt1 = timer_group1.wdt; diff --git a/esp32-hal/examples/pcnt_encoder.rs b/esp32-hal/examples/pcnt_encoder.rs index 22b93aa5231..c26cb84018b 100644 --- a/esp32-hal/examples/pcnt_encoder.rs +++ b/esp32-hal/examples/pcnt_encoder.rs @@ -39,7 +39,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); diff --git a/esp32-hal/examples/pulse_control.rs b/esp32-hal/examples/pulse_control.rs index 322723f4ba3..f2b244ce7c5 100644 --- a/esp32-hal/examples/pulse_control.rs +++ b/esp32-hal/examples/pulse_control.rs @@ -23,7 +23,11 @@ fn main() -> ! { let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/qspi_flash.rs b/esp32-hal/examples/qspi_flash.rs index 93893330bfd..8ec01a6560c 100644 --- a/esp32-hal/examples/qspi_flash.rs +++ b/esp32-hal/examples/qspi_flash.rs @@ -41,9 +41,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32, this includes // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.rwdt.disable(); diff --git a/esp32-hal/examples/ram.rs b/esp32-hal/examples/ram.rs index 35e09bd95b2..9f0fcd73cb0 100644 --- a/esp32-hal/examples/ram.rs +++ b/esp32-hal/examples/ram.rs @@ -31,10 +31,14 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8]; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; diff --git a/esp32-hal/examples/read_efuse.rs b/esp32-hal/examples/read_efuse.rs index 7a5476093ab..d221f986e9c 100644 --- a/esp32-hal/examples/read_efuse.rs +++ b/esp32-hal/examples/read_efuse.rs @@ -18,10 +18,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/rng.rs b/esp32-hal/examples/rng.rs index 1c9b86f27f4..c4c7fa0647d 100644 --- a/esp32-hal/examples/rng.rs +++ b/esp32-hal/examples/rng.rs @@ -17,10 +17,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32-hal/examples/serial_interrupts.rs b/esp32-hal/examples/serial_interrupts.rs index 44a889229dc..9082e693734 100644 --- a/esp32-hal/examples/serial_interrupts.rs +++ b/esp32-hal/examples/serial_interrupts.rs @@ -26,18 +26,26 @@ static SERIAL: Mutex>>> = Mutex::new(RefCell::new(Non #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the TIMG watchdog timer. - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; - let mut serial0 = Uart::new(peripherals.UART0); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); let mut rtc = Rtc::new(peripherals.RTC_CNTL); // Disable MWDT and RWDT (Watchdog) flash boot protection diff --git a/esp32-hal/examples/sha.rs b/esp32-hal/examples/sha.rs index 0bc32e11102..df40c4c4ba8 100644 --- a/esp32-hal/examples/sha.rs +++ b/esp32-hal/examples/sha.rs @@ -21,10 +21,14 @@ use sha2::{Digest, Sha512}; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); @@ -34,7 +38,11 @@ fn main() -> ! { let source_data = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa".as_bytes(); let mut remaining = source_data.clone(); - let mut hasher = Sha::new(peripherals.SHA, ShaMode::SHA512); + let mut hasher = Sha::new( + peripherals.SHA, + ShaMode::SHA512, + &mut system.peripheral_clock_control, + ); // Short hashes can be created by decreasing the output buffer to the desired // length diff --git a/esp32-hal/examples/spi_eh1_device_loopback.rs b/esp32-hal/examples/spi_eh1_device_loopback.rs index 4b7d56684de..e721e452544 100644 --- a/esp32-hal/examples/spi_eh1_device_loopback.rs +++ b/esp32-hal/examples/spi_eh1_device_loopback.rs @@ -41,7 +41,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32-hal/examples/spi_eh1_loopback.rs b/esp32-hal/examples/spi_eh1_loopback.rs index f82e9f702de..cbf158ae4b6 100644 --- a/esp32-hal/examples/spi_eh1_loopback.rs +++ b/esp32-hal/examples/spi_eh1_loopback.rs @@ -39,7 +39,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32-hal/examples/spi_halfduplex_read_manufacturer_id.rs b/esp32-hal/examples/spi_halfduplex_read_manufacturer_id.rs index 90cf05cc3f3..318a25fe839 100644 --- a/esp32-hal/examples/spi_halfduplex_read_manufacturer_id.rs +++ b/esp32-hal/examples/spi_halfduplex_read_manufacturer_id.rs @@ -39,9 +39,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32, this includes // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.rwdt.disable(); diff --git a/esp32-hal/examples/spi_loopback.rs b/esp32-hal/examples/spi_loopback.rs index 00f18fb14a4..1d73ccee0c9 100644 --- a/esp32-hal/examples/spi_loopback.rs +++ b/esp32-hal/examples/spi_loopback.rs @@ -38,7 +38,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32-hal/examples/spi_loopback_dma.rs b/esp32-hal/examples/spi_loopback_dma.rs index 4eab7f413ad..283cd147c28 100644 --- a/esp32-hal/examples/spi_loopback_dma.rs +++ b/esp32-hal/examples/spi_loopback_dma.rs @@ -40,7 +40,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32 this includes // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32-hal/examples/timer_interrupt.rs b/esp32-hal/examples/timer_interrupt.rs index fbe36b133d2..b63c96ba5f0 100644 --- a/esp32-hal/examples/timer_interrupt.rs +++ b/esp32-hal/examples/timer_interrupt.rs @@ -27,16 +27,24 @@ static TIMER11: Mutex>>>> = Mutex::new(RefCel #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the TIMG watchdog timer. - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer00 = timer_group0.timer0; let mut timer01 = timer_group0.timer1; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer10 = timer_group1.timer0; let mut timer11 = timer_group1.timer1; let mut wdt1 = timer_group1.wdt; diff --git a/esp32-hal/examples/watchdog.rs b/esp32-hal/examples/watchdog.rs index 923cfee0467..0cd19b35cf6 100644 --- a/esp32-hal/examples/watchdog.rs +++ b/esp32-hal/examples/watchdog.rs @@ -19,10 +19,14 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.DPORT.split(); + let mut system = peripherals.DPORT.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32c2-hal/examples/adc.rs b/esp32c2-hal/examples/adc.rs index 58154e7e4ce..6a07f74bb4a 100644 --- a/esp32c2-hal/examples/adc.rs +++ b/esp32c2-hal/examples/adc.rs @@ -27,7 +27,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/advanced_serial.rs b/esp32c2-hal/examples/advanced_serial.rs index a68bdd9d1be..22eacf04b91 100644 --- a/esp32c2-hal/examples/advanced_serial.rs +++ b/esp32c2-hal/examples/advanced_serial.rs @@ -26,11 +26,15 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; @@ -52,7 +56,13 @@ fn main() -> ! { io.pins.gpio2.into_floating_input(), ); - let mut serial1 = Uart::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks); + let mut serial1 = Uart::new_with_config( + peripherals.UART1, + Some(config), + Some(pins), + &clocks, + &mut system.peripheral_clock_control, + ); timer0.start(250u64.millis()); diff --git a/esp32c2-hal/examples/blinky.rs b/esp32c2-hal/examples/blinky.rs index fb51e004f7c..784d903d25b 100644 --- a/esp32c2-hal/examples/blinky.rs +++ b/esp32c2-hal/examples/blinky.rs @@ -19,13 +19,17 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/blinky_erased_pins.rs b/esp32c2-hal/examples/blinky_erased_pins.rs index 96512decca8..d3f734e29b7 100644 --- a/esp32c2-hal/examples/blinky_erased_pins.rs +++ b/esp32c2-hal/examples/blinky_erased_pins.rs @@ -19,13 +19,17 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/embassy_hello_world.rs b/esp32c2-hal/examples/embassy_hello_world.rs index ed9b42dfc1b..34f89e778e2 100644 --- a/esp32c2-hal/examples/embassy_hello_world.rs +++ b/esp32c2-hal/examples/embassy_hello_world.rs @@ -42,11 +42,15 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; // Disable watchdog timers diff --git a/esp32c2-hal/examples/embassy_spi.rs b/esp32c2-hal/examples/embassy_spi.rs index 53ace3f8bcc..2c805b5a59f 100644 --- a/esp32c2-hal/examples/embassy_spi.rs +++ b/esp32c2-hal/examples/embassy_spi.rs @@ -66,7 +66,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; // Disable watchdog timers diff --git a/esp32c2-hal/examples/embassy_wait.rs b/esp32c2-hal/examples/embassy_wait.rs index 2c3e9484ab2..99403a11203 100644 --- a/esp32c2-hal/examples/embassy_wait.rs +++ b/esp32c2-hal/examples/embassy_wait.rs @@ -38,11 +38,15 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; // Disable watchdog timers rtc.swd.disable(); diff --git a/esp32c2-hal/examples/gpio_interrupt.rs b/esp32c2-hal/examples/gpio_interrupt.rs index 36f86ab1b62..1b72d954780 100644 --- a/esp32c2-hal/examples/gpio_interrupt.rs +++ b/esp32c2-hal/examples/gpio_interrupt.rs @@ -27,13 +27,17 @@ static BUTTON: Mutex>>>> = Mutex::new(RefCe #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/hello_world.rs b/esp32c2-hal/examples/hello_world.rs index 25d820a4bac..7ae9d0cce64 100644 --- a/esp32c2-hal/examples/hello_world.rs +++ b/esp32c2-hal/examples/hello_world.rs @@ -20,12 +20,16 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let mut serial0 = Uart::new(peripherals.UART0); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; diff --git a/esp32c2-hal/examples/i2c_bmp180_calibration_data.rs b/esp32c2-hal/examples/i2c_bmp180_calibration_data.rs index d7d5303d5e2..493ae8b5f57 100644 --- a/esp32c2-hal/examples/i2c_bmp180_calibration_data.rs +++ b/esp32c2-hal/examples/i2c_bmp180_calibration_data.rs @@ -28,7 +28,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; // Disable watchdog timers diff --git a/esp32c2-hal/examples/i2c_display.rs b/esp32c2-hal/examples/i2c_display.rs index a02541ab17c..57f01f75a6c 100644 --- a/esp32c2-hal/examples/i2c_display.rs +++ b/esp32c2-hal/examples/i2c_display.rs @@ -39,7 +39,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; diff --git a/esp32c2-hal/examples/ledc.rs b/esp32c2-hal/examples/ledc.rs index 000dc2342c7..9ec8e2ffc87 100644 --- a/esp32c2-hal/examples/ledc.rs +++ b/esp32c2-hal/examples/ledc.rs @@ -30,7 +30,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; // Disable watchdog timers diff --git a/esp32c2-hal/examples/qspi_flash.rs b/esp32c2-hal/examples/qspi_flash.rs index b2b3f778dd2..c989460e75a 100644 --- a/esp32c2-hal/examples/qspi_flash.rs +++ b/esp32c2-hal/examples/qspi_flash.rs @@ -41,7 +41,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/read_efuse.rs b/esp32c2-hal/examples/read_efuse.rs index 8265c39125d..0ff8ac95a92 100644 --- a/esp32c2-hal/examples/read_efuse.rs +++ b/esp32c2-hal/examples/read_efuse.rs @@ -18,11 +18,15 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; // Disable watchdog timers diff --git a/esp32c2-hal/examples/rng.rs b/esp32c2-hal/examples/rng.rs index a75a16f7234..88c51f4e959 100644 --- a/esp32c2-hal/examples/rng.rs +++ b/esp32c2-hal/examples/rng.rs @@ -17,11 +17,15 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; // Disable watchdog timers: diff --git a/esp32c2-hal/examples/serial_interrupts.rs b/esp32c2-hal/examples/serial_interrupts.rs index 9e00aa8eae2..fb12798b4f4 100644 --- a/esp32c2-hal/examples/serial_interrupts.rs +++ b/esp32c2-hal/examples/serial_interrupts.rs @@ -28,12 +28,16 @@ static SERIAL: Mutex>>> = Mutex::new(RefCell::new(Non #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let mut serial0 = Uart::new(peripherals.UART0); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; diff --git a/esp32c2-hal/examples/sha.rs b/esp32c2-hal/examples/sha.rs index f73ace31815..0dcbdf2f150 100644 --- a/esp32c2-hal/examples/sha.rs +++ b/esp32c2-hal/examples/sha.rs @@ -20,10 +20,14 @@ use sha2::{Digest, Sha256}; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); @@ -34,7 +38,11 @@ fn main() -> ! { let source_data = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa".as_bytes(); let mut remaining = source_data.clone(); - let mut hasher = Sha::new(peripherals.SHA, ShaMode::SHA256); + let mut hasher = Sha::new( + peripherals.SHA, + ShaMode::SHA256, + &mut system.peripheral_clock_control, + ); // Short hashes can be created by decreasing the output buffer to the desired // length diff --git a/esp32c2-hal/examples/spi_eh1_device_loopback.rs b/esp32c2-hal/examples/spi_eh1_device_loopback.rs index 5564bbf55e2..84b0283d94f 100644 --- a/esp32c2-hal/examples/spi_eh1_device_loopback.rs +++ b/esp32c2-hal/examples/spi_eh1_device_loopback.rs @@ -41,7 +41,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/spi_eh1_loopback.rs b/esp32c2-hal/examples/spi_eh1_loopback.rs index 9414d456cbb..b3c419fd8e0 100644 --- a/esp32c2-hal/examples/spi_eh1_loopback.rs +++ b/esp32c2-hal/examples/spi_eh1_loopback.rs @@ -39,7 +39,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/spi_halfduplex_read_manufacturer_id.rs b/esp32c2-hal/examples/spi_halfduplex_read_manufacturer_id.rs index e266e178226..97a2a8ffd9d 100644 --- a/esp32c2-hal/examples/spi_halfduplex_read_manufacturer_id.rs +++ b/esp32c2-hal/examples/spi_halfduplex_read_manufacturer_id.rs @@ -39,7 +39,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/spi_loopback.rs b/esp32c2-hal/examples/spi_loopback.rs index 8d675629f5a..5f67a123d0e 100644 --- a/esp32c2-hal/examples/spi_loopback.rs +++ b/esp32c2-hal/examples/spi_loopback.rs @@ -38,7 +38,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/spi_loopback_dma.rs b/esp32c2-hal/examples/spi_loopback_dma.rs index 615a48aec39..79743740d5d 100644 --- a/esp32c2-hal/examples/spi_loopback_dma.rs +++ b/esp32c2-hal/examples/spi_loopback_dma.rs @@ -40,7 +40,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDT. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; rtc.swd.disable(); diff --git a/esp32c2-hal/examples/systimer.rs b/esp32c2-hal/examples/systimer.rs index c227b2b207f..4e9fef36b63 100644 --- a/esp32c2-hal/examples/systimer.rs +++ b/esp32c2-hal/examples/systimer.rs @@ -28,10 +28,14 @@ static ALARM2: Mutex>>> = Mutex::new(RefCell::ne #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32c2-hal/examples/timer_interrupt.rs b/esp32c2-hal/examples/timer_interrupt.rs index 1998ea3120a..ba72e667136 100644 --- a/esp32c2-hal/examples/timer_interrupt.rs +++ b/esp32c2-hal/examples/timer_interrupt.rs @@ -23,13 +23,17 @@ static TIMER0: Mutex>>>> = Mutex::new(RefCell #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C2, this includes the Super WDT, // the RTC WDT, and the TIMG WDT. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; diff --git a/esp32c2-hal/examples/watchdog.rs b/esp32c2-hal/examples/watchdog.rs index ff305a49937..863422eb7ac 100644 --- a/esp32c2-hal/examples/watchdog.rs +++ b/esp32c2-hal/examples/watchdog.rs @@ -19,11 +19,15 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; diff --git a/esp32c3-hal/examples/adc.rs b/esp32c3-hal/examples/adc.rs index c6fd7d197eb..d836d8d59b6 100644 --- a/esp32c3-hal/examples/adc.rs +++ b/esp32c3-hal/examples/adc.rs @@ -27,9 +27,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/advanced_serial.rs b/esp32c3-hal/examples/advanced_serial.rs index 4bc71ec0854..0c4094e072b 100644 --- a/esp32c3-hal/examples/advanced_serial.rs +++ b/esp32c3-hal/examples/advanced_serial.rs @@ -26,14 +26,22 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers @@ -55,7 +63,13 @@ fn main() -> ! { io.pins.gpio2.into_floating_input(), ); - let mut serial1 = Uart::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks); + let mut serial1 = Uart::new_with_config( + peripherals.UART1, + Some(config), + Some(pins), + &clocks, + &mut system.peripheral_clock_control, + ); timer0.start(250u64.millis()); diff --git a/esp32c3-hal/examples/aes.rs b/esp32c3-hal/examples/aes.rs index 4e743e79a73..88a5f8e86a7 100644 --- a/esp32c3-hal/examples/aes.rs +++ b/esp32c3-hal/examples/aes.rs @@ -24,9 +24,17 @@ fn main() -> ! { // Disable the RTC and TIMG watchdog timers let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/blinky.rs b/esp32c3-hal/examples/blinky.rs index a1b2a4dd231..04241fb7109 100644 --- a/esp32c3-hal/examples/blinky.rs +++ b/esp32c3-hal/examples/blinky.rs @@ -19,15 +19,23 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/blinky_erased_pins.rs b/esp32c3-hal/examples/blinky_erased_pins.rs index bb86b38a7c5..710037d427e 100644 --- a/esp32c3-hal/examples/blinky_erased_pins.rs +++ b/esp32c3-hal/examples/blinky_erased_pins.rs @@ -19,15 +19,23 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/embassy_hello_world.rs b/esp32c3-hal/examples/embassy_hello_world.rs index fac86013463..44ed7a682be 100644 --- a/esp32c3-hal/examples/embassy_hello_world.rs +++ b/esp32c3-hal/examples/embassy_hello_world.rs @@ -42,13 +42,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/embassy_spi.rs b/esp32c3-hal/examples/embassy_spi.rs index 4eba8ec9a7e..f39414bccc1 100644 --- a/esp32c3-hal/examples/embassy_spi.rs +++ b/esp32c3-hal/examples/embassy_spi.rs @@ -66,9 +66,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/embassy_wait.rs b/esp32c3-hal/examples/embassy_wait.rs index 9f593815d06..cc0b6d9b21e 100644 --- a/esp32c3-hal/examples/embassy_wait.rs +++ b/esp32c3-hal/examples/embassy_wait.rs @@ -38,13 +38,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/gpio_interrupt.rs b/esp32c3-hal/examples/gpio_interrupt.rs index ed112d8bdd2..880af13882f 100644 --- a/esp32c3-hal/examples/gpio_interrupt.rs +++ b/esp32c3-hal/examples/gpio_interrupt.rs @@ -27,15 +27,23 @@ static BUTTON: Mutex>>>> = Mutex::new(RefCe #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/hello_rgb.rs b/esp32c3-hal/examples/hello_rgb.rs index ccf7dce8bbe..747757a9489 100644 --- a/esp32c3-hal/examples/hello_rgb.rs +++ b/esp32c3-hal/examples/hello_rgb.rs @@ -39,7 +39,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); diff --git a/esp32c3-hal/examples/hello_world.rs b/esp32c3-hal/examples/hello_world.rs index 6b1b6f9f95b..b5dd83f637e 100644 --- a/esp32c3-hal/examples/hello_world.rs +++ b/esp32c3-hal/examples/hello_world.rs @@ -20,15 +20,23 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let mut uart0 = Uart::new(peripherals.UART0); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let mut uart0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/i2c_bmp180_calibration_data.rs b/esp32c3-hal/examples/i2c_bmp180_calibration_data.rs index ecf8024f74d..9c2651fa859 100644 --- a/esp32c3-hal/examples/i2c_bmp180_calibration_data.rs +++ b/esp32c3-hal/examples/i2c_bmp180_calibration_data.rs @@ -28,9 +28,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/i2c_display.rs b/esp32c3-hal/examples/i2c_display.rs index a902de012a0..1f1ec70d057 100644 --- a/esp32c3-hal/examples/i2c_display.rs +++ b/esp32c3-hal/examples/i2c_display.rs @@ -39,10 +39,18 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/i2s_read.rs b/esp32c3-hal/examples/i2s_read.rs index acd311dafe5..ade7b7a5920 100644 --- a/esp32c3-hal/examples/i2s_read.rs +++ b/esp32c3-hal/examples/i2s_read.rs @@ -35,9 +35,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/i2s_sound.rs b/esp32c3-hal/examples/i2s_sound.rs index b516525f677..145aa14899b 100644 --- a/esp32c3-hal/examples/i2s_sound.rs +++ b/esp32c3-hal/examples/i2s_sound.rs @@ -58,9 +58,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/ledc.rs b/esp32c3-hal/examples/ledc.rs index c6305e066dc..9d79f58deb7 100644 --- a/esp32c3-hal/examples/ledc.rs +++ b/esp32c3-hal/examples/ledc.rs @@ -30,9 +30,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/pulse_control.rs b/esp32c3-hal/examples/pulse_control.rs index 2c8b9c9ba76..c1416df9ae8 100644 --- a/esp32c3-hal/examples/pulse_control.rs +++ b/esp32c3-hal/examples/pulse_control.rs @@ -26,9 +26,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/qspi_flash.rs b/esp32c3-hal/examples/qspi_flash.rs index 3d7bcb4b509..51f0c2185a3 100644 --- a/esp32c3-hal/examples/qspi_flash.rs +++ b/esp32c3-hal/examples/qspi_flash.rs @@ -41,9 +41,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/ram.rs b/esp32c3-hal/examples/ram.rs index 7e60f220b76..40f645505a4 100644 --- a/esp32c3-hal/examples/ram.rs +++ b/esp32c3-hal/examples/ram.rs @@ -31,10 +31,14 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8]; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; diff --git a/esp32c3-hal/examples/read_efuse.rs b/esp32c3-hal/examples/read_efuse.rs index 3cd965e6188..e1b329a11d6 100644 --- a/esp32c3-hal/examples/read_efuse.rs +++ b/esp32c3-hal/examples/read_efuse.rs @@ -18,13 +18,21 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/rng.rs b/esp32c3-hal/examples/rng.rs index eb37f28a60e..b52d3f93e1e 100644 --- a/esp32c3-hal/examples/rng.rs +++ b/esp32c3-hal/examples/rng.rs @@ -17,13 +17,21 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers: diff --git a/esp32c3-hal/examples/serial_interrupts.rs b/esp32c3-hal/examples/serial_interrupts.rs index 8937b6c1145..501a28f45e2 100644 --- a/esp32c3-hal/examples/serial_interrupts.rs +++ b/esp32c3-hal/examples/serial_interrupts.rs @@ -28,15 +28,23 @@ static SERIAL: Mutex>>> = Mutex::new(RefCell::new(Non #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let mut serial0 = Uart::new(peripherals.UART0); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/sha.rs b/esp32c3-hal/examples/sha.rs index 9e696197435..17da1512a06 100644 --- a/esp32c3-hal/examples/sha.rs +++ b/esp32c3-hal/examples/sha.rs @@ -20,10 +20,14 @@ use sha2::{Digest, Sha256}; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); @@ -34,7 +38,11 @@ fn main() -> ! { let source_data = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa".as_bytes(); let mut remaining = source_data.clone(); - let mut hasher = Sha::new(peripherals.SHA, ShaMode::SHA256); + let mut hasher = Sha::new( + peripherals.SHA, + ShaMode::SHA256, + &mut system.peripheral_clock_control, + ); // Short hashes can be created by decreasing the output buffer to the desired // length diff --git a/esp32c3-hal/examples/spi_eh1_device_loopback.rs b/esp32c3-hal/examples/spi_eh1_device_loopback.rs index 6f51e5dccb7..cf02dd41b10 100644 --- a/esp32c3-hal/examples/spi_eh1_device_loopback.rs +++ b/esp32c3-hal/examples/spi_eh1_device_loopback.rs @@ -41,9 +41,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/spi_eh1_loopback.rs b/esp32c3-hal/examples/spi_eh1_loopback.rs index 1c2587b63bb..424adcf03d6 100644 --- a/esp32c3-hal/examples/spi_eh1_loopback.rs +++ b/esp32c3-hal/examples/spi_eh1_loopback.rs @@ -39,9 +39,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/spi_halfduplex_read_manufacturer_id.rs b/esp32c3-hal/examples/spi_halfduplex_read_manufacturer_id.rs index 838f83c9364..20cb53e5124 100644 --- a/esp32c3-hal/examples/spi_halfduplex_read_manufacturer_id.rs +++ b/esp32c3-hal/examples/spi_halfduplex_read_manufacturer_id.rs @@ -39,9 +39,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/spi_loopback.rs b/esp32c3-hal/examples/spi_loopback.rs index 8753da8d33c..83a2ff1e2ee 100644 --- a/esp32c3-hal/examples/spi_loopback.rs +++ b/esp32c3-hal/examples/spi_loopback.rs @@ -38,9 +38,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/spi_loopback_dma.rs b/esp32c3-hal/examples/spi_loopback_dma.rs index 45bb0e22723..8bc8910fbed 100644 --- a/esp32c3-hal/examples/spi_loopback_dma.rs +++ b/esp32c3-hal/examples/spi_loopback_dma.rs @@ -40,9 +40,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c3-hal/examples/systimer.rs b/esp32c3-hal/examples/systimer.rs index 793e881ef3a..e7195f2d96d 100644 --- a/esp32c3-hal/examples/systimer.rs +++ b/esp32c3-hal/examples/systimer.rs @@ -28,10 +28,14 @@ static ALARM2: Mutex>>> = Mutex::new(RefCell::ne #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32c3-hal/examples/timer_interrupt.rs b/esp32c3-hal/examples/timer_interrupt.rs index fde48cc893d..f1d4d63a57a 100644 --- a/esp32c3-hal/examples/timer_interrupt.rs +++ b/esp32c3-hal/examples/timer_interrupt.rs @@ -25,16 +25,24 @@ static TIMER1: Mutex>>>> = Mutex::new(RefCell #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer1 = timer_group1.timer0; let mut wdt1 = timer_group1.wdt; diff --git a/esp32c3-hal/examples/twai.rs b/esp32c3-hal/examples/twai.rs index 81025f97723..35e6ca70403 100644 --- a/esp32c3-hal/examples/twai.rs +++ b/esp32c3-hal/examples/twai.rs @@ -30,9 +30,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c3-hal/examples/usb_serial_jtag.rs b/esp32c3-hal/examples/usb_serial_jtag.rs index 5c570f06961..d71482a7f00 100644 --- a/esp32c3-hal/examples/usb_serial_jtag.rs +++ b/esp32c3-hal/examples/usb_serial_jtag.rs @@ -29,14 +29,22 @@ static USB_SERIAL: Mutex>>> = #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers @@ -45,7 +53,8 @@ fn main() -> ! { wdt0.disable(); wdt1.disable(); - let mut usb_serial = UsbSerialJtag::new(peripherals.USB_DEVICE); + let mut usb_serial = + UsbSerialJtag::new(peripherals.USB_DEVICE, &mut system.peripheral_clock_control); usb_serial.listen_rx_packet_recv_interrupt(); diff --git a/esp32c3-hal/examples/watchdog.rs b/esp32c3-hal/examples/watchdog.rs index 5a656daf102..c070515a9c7 100644 --- a/esp32c3-hal/examples/watchdog.rs +++ b/esp32c3-hal/examples/watchdog.rs @@ -19,14 +19,22 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/adc.rs b/esp32c6-hal/examples/adc.rs index 592aa0d4833..bb003ac64dd 100644 --- a/esp32c6-hal/examples/adc.rs +++ b/esp32c6-hal/examples/adc.rs @@ -27,9 +27,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c6-hal/examples/advanced_serial.rs b/esp32c6-hal/examples/advanced_serial.rs index b76ea57d8ad..322374c5a89 100644 --- a/esp32c6-hal/examples/advanced_serial.rs +++ b/esp32c6-hal/examples/advanced_serial.rs @@ -26,16 +26,24 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); @@ -56,7 +64,13 @@ fn main() -> ! { io.pins.gpio2.into_floating_input(), ); - let mut serial1 = Uart::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks); + let mut serial1 = Uart::new_with_config( + peripherals.UART1, + Some(config), + Some(pins), + &clocks, + &mut system.peripheral_clock_control, + ); timer0.start(250u64.millis()); diff --git a/esp32c6-hal/examples/aes.rs b/esp32c6-hal/examples/aes.rs index e0c6861a2b3..b9785234180 100644 --- a/esp32c6-hal/examples/aes.rs +++ b/esp32c6-hal/examples/aes.rs @@ -27,9 +27,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c6-hal/examples/blinky.rs b/esp32c6-hal/examples/blinky.rs index 8f59ed87e47..324ac9f19d9 100644 --- a/esp32c6-hal/examples/blinky.rs +++ b/esp32c6-hal/examples/blinky.rs @@ -19,15 +19,23 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c6-hal/examples/blinky_erased_pins.rs b/esp32c6-hal/examples/blinky_erased_pins.rs index 776a31e14d8..b7fe66cda16 100644 --- a/esp32c6-hal/examples/blinky_erased_pins.rs +++ b/esp32c6-hal/examples/blinky_erased_pins.rs @@ -19,15 +19,23 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c6-hal/examples/embassy_hello_world.rs b/esp32c6-hal/examples/embassy_hello_world.rs index 197d4b56411..26df159be51 100644 --- a/esp32c6-hal/examples/embassy_hello_world.rs +++ b/esp32c6-hal/examples/embassy_hello_world.rs @@ -42,13 +42,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/embassy_spi.rs b/esp32c6-hal/examples/embassy_spi.rs index 455b0596f04..78747dfaeee 100644 --- a/esp32c6-hal/examples/embassy_spi.rs +++ b/esp32c6-hal/examples/embassy_spi.rs @@ -68,9 +68,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/embassy_wait.rs b/esp32c6-hal/examples/embassy_wait.rs index 84c37947354..4904fc529d3 100644 --- a/esp32c6-hal/examples/embassy_wait.rs +++ b/esp32c6-hal/examples/embassy_wait.rs @@ -38,13 +38,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/gpio_interrupt.rs b/esp32c6-hal/examples/gpio_interrupt.rs index 64d6de3b4a1..f960a04c42d 100644 --- a/esp32c6-hal/examples/gpio_interrupt.rs +++ b/esp32c6-hal/examples/gpio_interrupt.rs @@ -27,15 +27,23 @@ static BUTTON: Mutex>>>> = Mutex::new(RefCe #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/hello_rgb.rs b/esp32c6-hal/examples/hello_rgb.rs index 6c5e3027170..9c7c9038938 100644 --- a/esp32c6-hal/examples/hello_rgb.rs +++ b/esp32c6-hal/examples/hello_rgb.rs @@ -39,9 +39,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/hello_world.rs b/esp32c6-hal/examples/hello_world.rs index c7c35d53b49..e68bca37197 100644 --- a/esp32c6-hal/examples/hello_world.rs +++ b/esp32c6-hal/examples/hello_world.rs @@ -20,15 +20,23 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let mut uart0 = Uart::new(peripherals.UART0); + let mut uart0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/i2c_bmp180_calibration_data.rs b/esp32c6-hal/examples/i2c_bmp180_calibration_data.rs index 3181beee3e2..c8f457ac0be 100644 --- a/esp32c6-hal/examples/i2c_bmp180_calibration_data.rs +++ b/esp32c6-hal/examples/i2c_bmp180_calibration_data.rs @@ -28,9 +28,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/i2c_display.rs b/esp32c6-hal/examples/i2c_display.rs index 399857ae523..3dfb617cc6b 100644 --- a/esp32c6-hal/examples/i2c_display.rs +++ b/esp32c6-hal/examples/i2c_display.rs @@ -39,10 +39,18 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/i2s_read.rs b/esp32c6-hal/examples/i2s_read.rs index f6ad4289331..63192948d39 100644 --- a/esp32c6-hal/examples/i2s_read.rs +++ b/esp32c6-hal/examples/i2s_read.rs @@ -37,9 +37,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/i2s_sound.rs b/esp32c6-hal/examples/i2s_sound.rs index 8f79b53a518..9f57452af8b 100644 --- a/esp32c6-hal/examples/i2s_sound.rs +++ b/esp32c6-hal/examples/i2s_sound.rs @@ -58,9 +58,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/ledc.rs b/esp32c6-hal/examples/ledc.rs index 02066ce3f1d..86b6805c288 100644 --- a/esp32c6-hal/examples/ledc.rs +++ b/esp32c6-hal/examples/ledc.rs @@ -32,9 +32,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/mcpwm.rs b/esp32c6-hal/examples/mcpwm.rs index 19e23ad793f..ac18d300ba6 100644 --- a/esp32c6-hal/examples/mcpwm.rs +++ b/esp32c6-hal/examples/mcpwm.rs @@ -26,9 +26,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/pcnt_encoder.rs b/esp32c6-hal/examples/pcnt_encoder.rs index 858b58ecbab..a5c02415e91 100644 --- a/esp32c6-hal/examples/pcnt_encoder.rs +++ b/esp32c6-hal/examples/pcnt_encoder.rs @@ -41,9 +41,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/pulse_control.rs b/esp32c6-hal/examples/pulse_control.rs index 597735e9ede..9b628738c31 100644 --- a/esp32c6-hal/examples/pulse_control.rs +++ b/esp32c6-hal/examples/pulse_control.rs @@ -26,9 +26,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/qspi_flash.rs b/esp32c6-hal/examples/qspi_flash.rs index bbaf8e9a587..b2e79e6cf30 100644 --- a/esp32c6-hal/examples/qspi_flash.rs +++ b/esp32c6-hal/examples/qspi_flash.rs @@ -41,9 +41,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c6-hal/examples/ram.rs b/esp32c6-hal/examples/ram.rs index 1a66ce75318..7120fd8443d 100644 --- a/esp32c6-hal/examples/ram.rs +++ b/esp32c6-hal/examples/ram.rs @@ -31,15 +31,23 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8]; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable MWDT flash boot protection diff --git a/esp32c6-hal/examples/read_efuse.rs b/esp32c6-hal/examples/read_efuse.rs index f5534858a35..02af03076dc 100644 --- a/esp32c6-hal/examples/read_efuse.rs +++ b/esp32c6-hal/examples/read_efuse.rs @@ -18,13 +18,21 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/rng.rs b/esp32c6-hal/examples/rng.rs index f23829fd2f5..53e352b8f73 100644 --- a/esp32c6-hal/examples/rng.rs +++ b/esp32c6-hal/examples/rng.rs @@ -17,13 +17,21 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers: diff --git a/esp32c6-hal/examples/rtc_watchdog.rs b/esp32c6-hal/examples/rtc_watchdog.rs index 73601b1d70f..a3c37f7ffb1 100644 --- a/esp32c6-hal/examples/rtc_watchdog.rs +++ b/esp32c6-hal/examples/rtc_watchdog.rs @@ -26,12 +26,20 @@ static RWDT: Mutex>> = Mutex::new(RefCell::new(None)); #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; wdt0.disable(); diff --git a/esp32c6-hal/examples/serial_interrupts.rs b/esp32c6-hal/examples/serial_interrupts.rs index 842630497c4..99bb26b4825 100644 --- a/esp32c6-hal/examples/serial_interrupts.rs +++ b/esp32c6-hal/examples/serial_interrupts.rs @@ -28,15 +28,23 @@ static SERIAL: Mutex>>> = Mutex::new(RefCell::new(Non #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let mut serial0 = Uart::new(peripherals.UART0); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/sha.rs b/esp32c6-hal/examples/sha.rs index 8373f900e88..8fb4fc42020 100644 --- a/esp32c6-hal/examples/sha.rs +++ b/esp32c6-hal/examples/sha.rs @@ -20,10 +20,13 @@ use sha2::{Digest, Sha256}; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.LP_CLKRST); @@ -34,7 +37,11 @@ fn main() -> ! { let source_data = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa".as_bytes(); let mut remaining = source_data.clone(); - let mut hasher = Sha::new(peripherals.SHA, ShaMode::SHA256); + let mut hasher = Sha::new( + peripherals.SHA, + ShaMode::SHA256, + &mut system.peripheral_clock_control, + ); // Short hashes can be created by decreasing the output buffer to the desired // length diff --git a/esp32c6-hal/examples/spi_eh1_device_loopback.rs b/esp32c6-hal/examples/spi_eh1_device_loopback.rs index 8f90179ec9f..249204c29ea 100644 --- a/esp32c6-hal/examples/spi_eh1_device_loopback.rs +++ b/esp32c6-hal/examples/spi_eh1_device_loopback.rs @@ -41,9 +41,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/spi_eh1_loopback.rs b/esp32c6-hal/examples/spi_eh1_loopback.rs index 22bdcefe4f6..da47f6d9093 100644 --- a/esp32c6-hal/examples/spi_eh1_loopback.rs +++ b/esp32c6-hal/examples/spi_eh1_loopback.rs @@ -39,9 +39,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/spi_halfduplex_read_manufacturer_id.rs b/esp32c6-hal/examples/spi_halfduplex_read_manufacturer_id.rs index 87712e47aca..4480c3c856f 100644 --- a/esp32c6-hal/examples/spi_halfduplex_read_manufacturer_id.rs +++ b/esp32c6-hal/examples/spi_halfduplex_read_manufacturer_id.rs @@ -39,9 +39,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32c6-hal/examples/spi_loopback.rs b/esp32c6-hal/examples/spi_loopback.rs index 2f3615d2fab..4d56e73fd7e 100644 --- a/esp32c6-hal/examples/spi_loopback.rs +++ b/esp32c6-hal/examples/spi_loopback.rs @@ -38,9 +38,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/spi_loopback_dma.rs b/esp32c6-hal/examples/spi_loopback_dma.rs index 059ffd45c34..945a62bcfa9 100644 --- a/esp32c6-hal/examples/spi_loopback_dma.rs +++ b/esp32c6-hal/examples/spi_loopback_dma.rs @@ -40,9 +40,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/systimer.rs b/esp32c6-hal/examples/systimer.rs index d252594f2c0..7152d1657a5 100644 --- a/esp32c6-hal/examples/systimer.rs +++ b/esp32c6-hal/examples/systimer.rs @@ -28,15 +28,23 @@ static ALARM2: Mutex>>> = Mutex::new(RefCell::ne #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32c6-hal/examples/timer_interrupt.rs b/esp32c6-hal/examples/timer_interrupt.rs index 048c44b89c2..8dd425c68ef 100644 --- a/esp32c6-hal/examples/timer_interrupt.rs +++ b/esp32c6-hal/examples/timer_interrupt.rs @@ -25,16 +25,24 @@ static TIMER1: Mutex>>>> = Mutex::new(RefCell #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT, // and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer1 = timer_group1.timer0; let mut wdt1 = timer_group1.wdt; diff --git a/esp32c6-hal/examples/usb_serial_jtag.rs b/esp32c6-hal/examples/usb_serial_jtag.rs index c13607194bd..ca2fb33afe8 100644 --- a/esp32c6-hal/examples/usb_serial_jtag.rs +++ b/esp32c6-hal/examples/usb_serial_jtag.rs @@ -28,14 +28,22 @@ static USB_SERIAL: Mutex>>> = #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers @@ -44,7 +52,8 @@ fn main() -> ! { wdt0.disable(); wdt1.disable(); - let mut usb_serial = UsbSerialJtag::new(peripherals.USB_DEVICE); + let mut usb_serial = + UsbSerialJtag::new(peripherals.USB_DEVICE, &mut system.peripheral_clock_control); usb_serial.listen_rx_packet_recv_interrupt(); diff --git a/esp32c6-hal/examples/watchdog.rs b/esp32c6-hal/examples/watchdog.rs index 92221f6751a..0cf7dad810b 100644 --- a/esp32c6-hal/examples/watchdog.rs +++ b/esp32c6-hal/examples/watchdog.rs @@ -19,14 +19,22 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.PCR.split(); + let mut system = peripherals.PCR.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.LP_CLKRST); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s2-hal/examples/adc.rs b/esp32s2-hal/examples/adc.rs index 2847ff920b8..4c6dfd12d44 100644 --- a/esp32s2-hal/examples/adc.rs +++ b/esp32s2-hal/examples/adc.rs @@ -21,10 +21,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/advanced_serial.rs b/esp32s2-hal/examples/advanced_serial.rs index be9f0921066..3a8e65c50f5 100644 --- a/esp32s2-hal/examples/advanced_serial.rs +++ b/esp32s2-hal/examples/advanced_serial.rs @@ -27,10 +27,14 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); @@ -51,7 +55,13 @@ fn main() -> ! { io.pins.gpio2.into_floating_input(), ); - let mut serial1 = Uart::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks); + let mut serial1 = Uart::new_with_config( + peripherals.UART1, + Some(config), + Some(pins), + &clocks, + &mut system.peripheral_clock_control, + ); let mut delay = Delay::new(&clocks); diff --git a/esp32s2-hal/examples/aes.rs b/esp32s2-hal/examples/aes.rs index 5cee0a37709..1b67f5abbbf 100644 --- a/esp32s2-hal/examples/aes.rs +++ b/esp32s2-hal/examples/aes.rs @@ -24,9 +24,17 @@ fn main() -> ! { // Disable the RTC and TIMG watchdog timers let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.rwdt.disable(); diff --git a/esp32s2-hal/examples/blinky.rs b/esp32s2-hal/examples/blinky.rs index ee0c86d3f38..2d96ea16722 100644 --- a/esp32s2-hal/examples/blinky.rs +++ b/esp32s2-hal/examples/blinky.rs @@ -19,10 +19,14 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/blinky_erased_pins.rs b/esp32s2-hal/examples/blinky_erased_pins.rs index bdb78b74fc6..64f56abb49c 100644 --- a/esp32s2-hal/examples/blinky_erased_pins.rs +++ b/esp32s2-hal/examples/blinky_erased_pins.rs @@ -19,10 +19,14 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/dac.rs b/esp32s2-hal/examples/dac.rs index dd34af20fb5..1e1b26efb63 100644 --- a/esp32s2-hal/examples/dac.rs +++ b/esp32s2-hal/examples/dac.rs @@ -20,10 +20,14 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/embassy_hello_world.rs b/esp32s2-hal/examples/embassy_hello_world.rs index a812b5741a4..aa59efa4121 100644 --- a/esp32s2-hal/examples/embassy_hello_world.rs +++ b/esp32s2-hal/examples/embassy_hello_world.rs @@ -43,13 +43,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s2-hal/examples/embassy_spi.rs b/esp32s2-hal/examples/embassy_spi.rs index 602124f330b..7f6d14abc51 100644 --- a/esp32s2-hal/examples/embassy_spi.rs +++ b/esp32s2-hal/examples/embassy_spi.rs @@ -66,9 +66,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s2-hal/examples/embassy_wait.rs b/esp32s2-hal/examples/embassy_wait.rs index fbca2bed9cc..e02ef436e9d 100644 --- a/esp32s2-hal/examples/embassy_wait.rs +++ b/esp32s2-hal/examples/embassy_wait.rs @@ -38,13 +38,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s2-hal/examples/gpio_interrupt.rs b/esp32s2-hal/examples/gpio_interrupt.rs index b3ee1bfd19c..37cfa76471a 100644 --- a/esp32s2-hal/examples/gpio_interrupt.rs +++ b/esp32s2-hal/examples/gpio_interrupt.rs @@ -29,10 +29,14 @@ static BUTTON: Mutex>>>> = Mutex::new(RefCe #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/hello_rgb.rs b/esp32s2-hal/examples/hello_rgb.rs index 1a30d64497b..8f8d20398dd 100644 --- a/esp32s2-hal/examples/hello_rgb.rs +++ b/esp32s2-hal/examples/hello_rgb.rs @@ -38,7 +38,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); diff --git a/esp32s2-hal/examples/hello_world.rs b/esp32s2-hal/examples/hello_world.rs index d684d9ef380..171ee27ad5d 100644 --- a/esp32s2-hal/examples/hello_world.rs +++ b/esp32s2-hal/examples/hello_world.rs @@ -20,14 +20,18 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let mut serial0 = Uart::new(peripherals.UART0); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); // Disable MWDT and RWDT (Watchdog) flash boot protection wdt.disable(); diff --git a/esp32s2-hal/examples/i2c_bmp180_calibration_data.rs b/esp32s2-hal/examples/i2c_bmp180_calibration_data.rs index 92b9defee3a..b3a9348e769 100644 --- a/esp32s2-hal/examples/i2c_bmp180_calibration_data.rs +++ b/esp32s2-hal/examples/i2c_bmp180_calibration_data.rs @@ -27,7 +27,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/i2c_display.rs b/esp32s2-hal/examples/i2c_display.rs index fdba6a06f2c..cc866ef605d 100644 --- a/esp32s2-hal/examples/i2c_display.rs +++ b/esp32s2-hal/examples/i2c_display.rs @@ -39,7 +39,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/i2s_read.rs b/esp32s2-hal/examples/i2s_read.rs index 59547ce9094..b860ab7a838 100644 --- a/esp32s2-hal/examples/i2s_read.rs +++ b/esp32s2-hal/examples/i2s_read.rs @@ -33,7 +33,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/i2s_sound.rs b/esp32s2-hal/examples/i2s_sound.rs index c6731fc7160..48dbbe603eb 100644 --- a/esp32s2-hal/examples/i2s_sound.rs +++ b/esp32s2-hal/examples/i2s_sound.rs @@ -57,7 +57,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/ledc.rs b/esp32s2-hal/examples/ledc.rs index f2c5fd7b44b..8c5adc24690 100644 --- a/esp32s2-hal/examples/ledc.rs +++ b/esp32s2-hal/examples/ledc.rs @@ -30,7 +30,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/pcnt_encoder.rs b/esp32s2-hal/examples/pcnt_encoder.rs index c8a77f2a1c3..4400a4895c1 100644 --- a/esp32s2-hal/examples/pcnt_encoder.rs +++ b/esp32s2-hal/examples/pcnt_encoder.rs @@ -39,7 +39,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); diff --git a/esp32s2-hal/examples/pulse_control.rs b/esp32s2-hal/examples/pulse_control.rs index 50a51e3ed0c..ebab8aef27a 100644 --- a/esp32s2-hal/examples/pulse_control.rs +++ b/esp32s2-hal/examples/pulse_control.rs @@ -23,7 +23,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/qspi_flash.rs b/esp32s2-hal/examples/qspi_flash.rs index a5c3b9c7300..581c44b349e 100644 --- a/esp32s2-hal/examples/qspi_flash.rs +++ b/esp32s2-hal/examples/qspi_flash.rs @@ -41,9 +41,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-S2, this includes // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.rwdt.disable(); diff --git a/esp32s2-hal/examples/ram.rs b/esp32s2-hal/examples/ram.rs index 1f719cf320b..00d152c69af 100644 --- a/esp32s2-hal/examples/ram.rs +++ b/esp32s2-hal/examples/ram.rs @@ -31,10 +31,14 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8]; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; diff --git a/esp32s2-hal/examples/read_efuse.rs b/esp32s2-hal/examples/read_efuse.rs index dfc6736cc59..64392aa8279 100644 --- a/esp32s2-hal/examples/read_efuse.rs +++ b/esp32s2-hal/examples/read_efuse.rs @@ -18,10 +18,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/rng.rs b/esp32s2-hal/examples/rng.rs index 3cb6ed07bdd..98b4919eecc 100644 --- a/esp32s2-hal/examples/rng.rs +++ b/esp32s2-hal/examples/rng.rs @@ -17,10 +17,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/serial_interrupts.rs b/esp32s2-hal/examples/serial_interrupts.rs index 50021c41d5e..53ce6563b9c 100644 --- a/esp32s2-hal/examples/serial_interrupts.rs +++ b/esp32s2-hal/examples/serial_interrupts.rs @@ -26,18 +26,26 @@ static SERIAL: Mutex>>> = Mutex::new(RefCell::new(Non #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the TIMG watchdog timer. - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; - let mut serial0 = Uart::new(peripherals.UART0); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); let mut rtc = Rtc::new(peripherals.RTC_CNTL); // Disable MWDT and RWDT (Watchdog) flash boot protection diff --git a/esp32s2-hal/examples/sha.rs b/esp32s2-hal/examples/sha.rs index bc2d45f4a0f..ca228bb369c 100644 --- a/esp32s2-hal/examples/sha.rs +++ b/esp32s2-hal/examples/sha.rs @@ -21,10 +21,14 @@ use sha2::{Digest, Sha512}; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); @@ -34,7 +38,11 @@ fn main() -> ! { let source_data = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa".as_bytes(); let mut remaining = source_data.clone(); - let mut hasher = Sha::new(peripherals.SHA, ShaMode::SHA512); + let mut hasher = Sha::new( + peripherals.SHA, + ShaMode::SHA512, + &mut system.peripheral_clock_control, + ); // Short hashes can be created by decreasing the output buffer to the desired // length diff --git a/esp32s2-hal/examples/spi_eh1_device_loopback.rs b/esp32s2-hal/examples/spi_eh1_device_loopback.rs index fc024ca0294..8145a7683e7 100644 --- a/esp32s2-hal/examples/spi_eh1_device_loopback.rs +++ b/esp32s2-hal/examples/spi_eh1_device_loopback.rs @@ -41,7 +41,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32s2-hal/examples/spi_eh1_loopback.rs b/esp32s2-hal/examples/spi_eh1_loopback.rs index a17c4244942..723da97776a 100644 --- a/esp32s2-hal/examples/spi_eh1_loopback.rs +++ b/esp32s2-hal/examples/spi_eh1_loopback.rs @@ -39,7 +39,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32s2-hal/examples/spi_halfduplex_read_manufacturer_id.rs b/esp32s2-hal/examples/spi_halfduplex_read_manufacturer_id.rs index 33182640f0e..bc3a562e3a7 100644 --- a/esp32s2-hal/examples/spi_halfduplex_read_manufacturer_id.rs +++ b/esp32s2-hal/examples/spi_halfduplex_read_manufacturer_id.rs @@ -39,9 +39,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-S2, this includes // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.rwdt.disable(); diff --git a/esp32s2-hal/examples/spi_loopback.rs b/esp32s2-hal/examples/spi_loopback.rs index 170bfa23e79..c971c7c4b33 100644 --- a/esp32s2-hal/examples/spi_loopback.rs +++ b/esp32s2-hal/examples/spi_loopback.rs @@ -38,7 +38,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32s2-hal/examples/spi_loopback_dma.rs b/esp32s2-hal/examples/spi_loopback_dma.rs index 5f6dc4bd15b..0f64b55b88f 100644 --- a/esp32s2-hal/examples/spi_loopback_dma.rs +++ b/esp32s2-hal/examples/spi_loopback_dma.rs @@ -40,7 +40,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32s2-hal/examples/systimer.rs b/esp32s2-hal/examples/systimer.rs index 31f841baeba..9407652333e 100644 --- a/esp32s2-hal/examples/systimer.rs +++ b/esp32s2-hal/examples/systimer.rs @@ -28,10 +28,14 @@ static ALARM2: Mutex>>> = Mutex::new(RefCell::ne #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/timer_interrupt.rs b/esp32s2-hal/examples/timer_interrupt.rs index a364d71cfa2..51e18827c81 100644 --- a/esp32s2-hal/examples/timer_interrupt.rs +++ b/esp32s2-hal/examples/timer_interrupt.rs @@ -28,16 +28,24 @@ static TIMER11: Mutex>>>> = Mutex::new(RefCel #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the TIMG watchdog timer. - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer00 = timer_group0.timer0; let mut timer01 = timer_group0.timer1; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer10 = timer_group1.timer0; let mut timer11 = timer_group1.timer1; let mut wdt1 = timer_group1.wdt; diff --git a/esp32s2-hal/examples/usb_serial.rs b/esp32s2-hal/examples/usb_serial.rs index d84d6c50762..58bafa9b132 100644 --- a/esp32s2-hal/examples/usb_serial.rs +++ b/esp32s2-hal/examples/usb_serial.rs @@ -25,7 +25,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::configure(system.clock_control, CpuClock::Clock240MHz).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s2-hal/examples/watchdog.rs b/esp32s2-hal/examples/watchdog.rs index 6e3e32026ac..330ab7ea8ec 100644 --- a/esp32s2-hal/examples/watchdog.rs +++ b/esp32s2-hal/examples/watchdog.rs @@ -19,10 +19,14 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/adc.rs b/esp32s3-hal/examples/adc.rs index d35717dbfb7..d5a046e1100 100644 --- a/esp32s3-hal/examples/adc.rs +++ b/esp32s3-hal/examples/adc.rs @@ -21,10 +21,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/advanced_serial.rs b/esp32s3-hal/examples/advanced_serial.rs index d6a2dbf1e9c..ecc524a5375 100644 --- a/esp32s3-hal/examples/advanced_serial.rs +++ b/esp32s3-hal/examples/advanced_serial.rs @@ -27,10 +27,14 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); @@ -51,7 +55,13 @@ fn main() -> ! { io.pins.gpio2.into_floating_input(), ); - let mut serial1 = Uart::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks); + let mut serial1 = Uart::new_with_config( + peripherals.UART1, + Some(config), + Some(pins), + &clocks, + &mut system.peripheral_clock_control, + ); let mut delay = Delay::new(&clocks); diff --git a/esp32s3-hal/examples/aes.rs b/esp32s3-hal/examples/aes.rs index d0e5a00dfa0..cfd23d44f79 100644 --- a/esp32s3-hal/examples/aes.rs +++ b/esp32s3-hal/examples/aes.rs @@ -24,9 +24,17 @@ fn main() -> ! { // Disable the RTC and TIMG watchdog timers let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.rwdt.disable(); diff --git a/esp32s3-hal/examples/blinky.rs b/esp32s3-hal/examples/blinky.rs index 9ce0697212f..c459d797baa 100644 --- a/esp32s3-hal/examples/blinky.rs +++ b/esp32s3-hal/examples/blinky.rs @@ -19,10 +19,14 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/blinky_erased_pins.rs b/esp32s3-hal/examples/blinky_erased_pins.rs index 0cfefe4c301..daaf47fe544 100644 --- a/esp32s3-hal/examples/blinky_erased_pins.rs +++ b/esp32s3-hal/examples/blinky_erased_pins.rs @@ -19,10 +19,14 @@ use esp_backtrace as _; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/embassy_hello_world.rs b/esp32s3-hal/examples/embassy_hello_world.rs index 2b9b9d1f858..cb2b503f9ae 100644 --- a/esp32s3-hal/examples/embassy_hello_world.rs +++ b/esp32s3-hal/examples/embassy_hello_world.rs @@ -42,13 +42,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s3-hal/examples/embassy_spi.rs b/esp32s3-hal/examples/embassy_spi.rs index d356da051aa..4044e51491a 100644 --- a/esp32s3-hal/examples/embassy_spi.rs +++ b/esp32s3-hal/examples/embassy_spi.rs @@ -66,9 +66,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s3-hal/examples/embassy_wait.rs b/esp32s3-hal/examples/embassy_wait.rs index 73196c0ad5e..a9e7f3a3b18 100644 --- a/esp32s3-hal/examples/embassy_wait.rs +++ b/esp32s3-hal/examples/embassy_wait.rs @@ -38,13 +38,21 @@ static EXECUTOR: StaticCell = StaticCell::new(); fn main() -> ! { esp_println::println!("Init!"); let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s3-hal/examples/gpio_interrupt.rs b/esp32s3-hal/examples/gpio_interrupt.rs index 36c2ce90458..1c6496f9362 100644 --- a/esp32s3-hal/examples/gpio_interrupt.rs +++ b/esp32s3-hal/examples/gpio_interrupt.rs @@ -28,10 +28,14 @@ static BUTTON: Mutex>>>> = Mutex::new(RefCe #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/hello_rgb.rs b/esp32s3-hal/examples/hello_rgb.rs index 89e15daa66b..30fede848e0 100644 --- a/esp32s3-hal/examples/hello_rgb.rs +++ b/esp32s3-hal/examples/hello_rgb.rs @@ -39,7 +39,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); diff --git a/esp32s3-hal/examples/hello_world.rs b/esp32s3-hal/examples/hello_world.rs index fa4743aec90..a0271fbec93 100644 --- a/esp32s3-hal/examples/hello_world.rs +++ b/esp32s3-hal/examples/hello_world.rs @@ -20,14 +20,18 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let mut serial0 = Uart::new(peripherals.UART0); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); // Disable MWDT and RWDT (Watchdog) flash boot protection wdt.disable(); diff --git a/esp32s3-hal/examples/i2c_bmp180_calibration_data.rs b/esp32s3-hal/examples/i2c_bmp180_calibration_data.rs index bcb36afa8d1..cf34694ea39 100644 --- a/esp32s3-hal/examples/i2c_bmp180_calibration_data.rs +++ b/esp32s3-hal/examples/i2c_bmp180_calibration_data.rs @@ -27,7 +27,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/i2c_display.rs b/esp32s3-hal/examples/i2c_display.rs index d5f33b50f98..a927d5d9e4c 100644 --- a/esp32s3-hal/examples/i2c_display.rs +++ b/esp32s3-hal/examples/i2c_display.rs @@ -38,7 +38,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/i2s_read.rs b/esp32s3-hal/examples/i2s_read.rs index fd5b8d935e6..c806ff053eb 100644 --- a/esp32s3-hal/examples/i2s_read.rs +++ b/esp32s3-hal/examples/i2s_read.rs @@ -35,9 +35,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s3-hal/examples/i2s_sound.rs b/esp32s3-hal/examples/i2s_sound.rs index c958767bd3f..412a129dd78 100644 --- a/esp32s3-hal/examples/i2s_sound.rs +++ b/esp32s3-hal/examples/i2s_sound.rs @@ -58,9 +58,17 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; // Disable watchdog timers diff --git a/esp32s3-hal/examples/ledc.rs b/esp32s3-hal/examples/ledc.rs index e03f1d88a3a..bde9c075819 100644 --- a/esp32s3-hal/examples/ledc.rs +++ b/esp32s3-hal/examples/ledc.rs @@ -29,7 +29,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/mcpwm.rs b/esp32s3-hal/examples/mcpwm.rs index 0db7e6b8de8..8796253d7a8 100644 --- a/esp32s3-hal/examples/mcpwm.rs +++ b/esp32s3-hal/examples/mcpwm.rs @@ -23,7 +23,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/multicore.rs b/esp32s3-hal/examples/multicore.rs index 334a8686f17..bd10022e7c4 100644 --- a/esp32s3-hal/examples/multicore.rs +++ b/esp32s3-hal/examples/multicore.rs @@ -23,14 +23,22 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer1 = timer_group1.timer0; let mut wdt1 = timer_group1.wdt; diff --git a/esp32s3-hal/examples/pcnt_encoder.rs b/esp32s3-hal/examples/pcnt_encoder.rs index a49e9b3e42d..e91d948a5fb 100644 --- a/esp32s3-hal/examples/pcnt_encoder.rs +++ b/esp32s3-hal/examples/pcnt_encoder.rs @@ -39,7 +39,11 @@ fn main() -> ! { let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); diff --git a/esp32s3-hal/examples/pulse_control.rs b/esp32s3-hal/examples/pulse_control.rs index 88356f02bc9..4171dcd6c98 100644 --- a/esp32s3-hal/examples/pulse_control.rs +++ b/esp32s3-hal/examples/pulse_control.rs @@ -23,7 +23,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/qspi_flash.rs b/esp32s3-hal/examples/qspi_flash.rs index e3f3e2b31eb..254dec1c4c8 100644 --- a/esp32s3-hal/examples/qspi_flash.rs +++ b/esp32s3-hal/examples/qspi_flash.rs @@ -41,9 +41,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32s3-hal/examples/ram.rs b/esp32s3-hal/examples/ram.rs index fffa24ccbdf..bdc2563604a 100644 --- a/esp32s3-hal/examples/ram.rs +++ b/esp32s3-hal/examples/ram.rs @@ -31,10 +31,14 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8]; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; diff --git a/esp32s3-hal/examples/read_efuse.rs b/esp32s3-hal/examples/read_efuse.rs index 836f5064888..1fb10e66dc9 100644 --- a/esp32s3-hal/examples/read_efuse.rs +++ b/esp32s3-hal/examples/read_efuse.rs @@ -18,10 +18,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/rng.rs b/esp32s3-hal/examples/rng.rs index efb1a9b14a3..be586863c05 100644 --- a/esp32s3-hal/examples/rng.rs +++ b/esp32s3-hal/examples/rng.rs @@ -17,10 +17,14 @@ use esp_println::println; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/serial_interrupts.rs b/esp32s3-hal/examples/serial_interrupts.rs index 300f5cdacf3..2bcaf3c9ce2 100644 --- a/esp32s3-hal/examples/serial_interrupts.rs +++ b/esp32s3-hal/examples/serial_interrupts.rs @@ -26,18 +26,26 @@ static SERIAL: Mutex>>> = Mutex::new(RefCell::new(Non #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the TIMG watchdog timer. - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; - let mut serial0 = Uart::new(peripherals.UART0); + let mut serial0 = Uart::new(peripherals.UART0, &mut system.peripheral_clock_control); let mut rtc = Rtc::new(peripherals.RTC_CNTL); // Disable MWDT and RWDT (Watchdog) flash boot protection diff --git a/esp32s3-hal/examples/sha.rs b/esp32s3-hal/examples/sha.rs index 72c4a98808c..b472d2d7b42 100644 --- a/esp32s3-hal/examples/sha.rs +++ b/esp32s3-hal/examples/sha.rs @@ -21,10 +21,14 @@ use sha2::{Digest, Sha512}; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); @@ -34,7 +38,11 @@ fn main() -> ! { let source_data = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa".as_bytes(); let mut remaining = source_data.clone(); - let mut hasher = Sha::new(peripherals.SHA, ShaMode::SHA512); + let mut hasher = Sha::new( + peripherals.SHA, + ShaMode::SHA512, + &mut system.peripheral_clock_control, + ); // Short hashes can be created by decreasing the output buffer to the desired // length diff --git a/esp32s3-hal/examples/spi_eh1_device_loopback.rs b/esp32s3-hal/examples/spi_eh1_device_loopback.rs index 10b4796ca3a..0d41021d0a2 100644 --- a/esp32s3-hal/examples/spi_eh1_device_loopback.rs +++ b/esp32s3-hal/examples/spi_eh1_device_loopback.rs @@ -41,7 +41,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32s3-hal/examples/spi_eh1_loopback.rs b/esp32s3-hal/examples/spi_eh1_loopback.rs index c27f6e40414..5c351d6d76d 100644 --- a/esp32s3-hal/examples/spi_eh1_loopback.rs +++ b/esp32s3-hal/examples/spi_eh1_loopback.rs @@ -39,7 +39,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32s3-hal/examples/spi_halfduplex_read_manufacturer_id.rs b/esp32s3-hal/examples/spi_halfduplex_read_manufacturer_id.rs index 09294d5f821..0adf7695f01 100644 --- a/esp32s3-hal/examples/spi_halfduplex_read_manufacturer_id.rs +++ b/esp32s3-hal/examples/spi_halfduplex_read_manufacturer_id.rs @@ -39,9 +39,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-S3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32s3-hal/examples/spi_loopback.rs b/esp32s3-hal/examples/spi_loopback.rs index 5080b7436d8..7cac0bed3b7 100644 --- a/esp32s3-hal/examples/spi_loopback.rs +++ b/esp32s3-hal/examples/spi_loopback.rs @@ -38,7 +38,11 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; wdt.disable(); diff --git a/esp32s3-hal/examples/spi_loopback_dma.rs b/esp32s3-hal/examples/spi_loopback_dma.rs index 3fac53b49db..0e2b6d9c6ba 100644 --- a/esp32s3-hal/examples/spi_loopback_dma.rs +++ b/esp32s3-hal/examples/spi_loopback_dma.rs @@ -40,9 +40,17 @@ fn main() -> ! { // Disable the watchdog timers. For the ESP32-S3, this includes the Super WDT, // the RTC WDT, and the TIMG WDTs. let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt1 = timer_group1.wdt; rtc.swd.disable(); diff --git a/esp32s3-hal/examples/systimer.rs b/esp32s3-hal/examples/systimer.rs index 61cda670e5d..e1d08141ced 100644 --- a/esp32s3-hal/examples/systimer.rs +++ b/esp32s3-hal/examples/systimer.rs @@ -28,10 +28,14 @@ static ALARM2: Mutex>>> = Mutex::new(RefCell::ne #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/timer_interrupt.rs b/esp32s3-hal/examples/timer_interrupt.rs index 9b3349a5e04..89b34f1a30c 100644 --- a/esp32s3-hal/examples/timer_interrupt.rs +++ b/esp32s3-hal/examples/timer_interrupt.rs @@ -28,16 +28,24 @@ static TIMER11: Mutex>>>> = Mutex::new(RefCel #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); // Disable the TIMG watchdog timer. - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer00 = timer_group0.timer0; let mut timer01 = timer_group0.timer1; let mut wdt0 = timer_group0.wdt; - let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer_group1 = TimerGroup::new( + peripherals.TIMG1, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer10 = timer_group1.timer0; let mut timer11 = timer_group1.timer1; let mut wdt1 = timer_group1.wdt; diff --git a/esp32s3-hal/examples/twai.rs b/esp32s3-hal/examples/twai.rs index 3ba498997e0..9d2531c596b 100644 --- a/esp32s3-hal/examples/twai.rs +++ b/esp32s3-hal/examples/twai.rs @@ -44,7 +44,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/usb_serial.rs b/esp32s3-hal/examples/usb_serial.rs index 9d5a62c27ba..3b0b1f9d2a1 100644 --- a/esp32s3-hal/examples/usb_serial.rs +++ b/esp32s3-hal/examples/usb_serial.rs @@ -25,7 +25,11 @@ fn main() -> ! { let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::configure(system.clock_control, CpuClock::Clock240MHz).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL); diff --git a/esp32s3-hal/examples/usb_serial_jtag.rs b/esp32s3-hal/examples/usb_serial_jtag.rs index d95eedc6df4..606dc8749f1 100644 --- a/esp32s3-hal/examples/usb_serial_jtag.rs +++ b/esp32s3-hal/examples/usb_serial_jtag.rs @@ -28,11 +28,15 @@ static USB_SERIAL: Mutex>>> = #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); let mut rtc = Rtc::new(peripherals.RTC_CNTL); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; @@ -40,7 +44,8 @@ fn main() -> ! { wdt.disable(); rtc.rwdt.disable(); - let mut usb_serial = UsbSerialJtag::new(peripherals.USB_DEVICE); + let mut usb_serial = + UsbSerialJtag::new(peripherals.USB_DEVICE, &mut system.peripheral_clock_control); usb_serial.listen_rx_packet_recv_interrupt(); diff --git a/esp32s3-hal/examples/watchdog.rs b/esp32s3-hal/examples/watchdog.rs index 7070b3910c9..5a6b0f83aeb 100644 --- a/esp32s3-hal/examples/watchdog.rs +++ b/esp32s3-hal/examples/watchdog.rs @@ -19,10 +19,14 @@ use nb::block; #[entry] fn main() -> ! { let peripherals = Peripherals::take(); - let system = peripherals.SYSTEM.split(); + let mut system = peripherals.SYSTEM.split(); let clocks = ClockControl::boot_defaults(system.clock_control).freeze(); - let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); + let timer_group0 = TimerGroup::new( + peripherals.TIMG0, + &clocks, + &mut system.peripheral_clock_control, + ); let mut timer0 = timer_group0.timer0; let mut wdt = timer_group0.wdt; let mut rtc = Rtc::new(peripherals.RTC_CNTL);