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Amiga 3000 library.dcm
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Amiga 3000 library.dcm
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EESchema-DOCLIB Version 2.0
#
$CMP +12V
D Power symbol creates a global label with name "+12V"
K power-flag
$ENDCMP
#
$CMP +12V_USER
D Power symbol creates a global label with name "+12V_USER"
K power-flag
$ENDCMP
#
$CMP +5V
D Power symbol creates a global label with name "+5V"
K power-flag
$ENDCMP
#
$CMP +5V_USER
D Power symbol creates a global label with name "+5V_USER"
K power-flag
$ENDCMP
#
$CMP +AUD
D Power symbol creates a global label with name "+AUD"
K power-flag
$ENDCMP
#
$CMP +AV
D Power symbol creates a global label with name "+AV"
K power-flag
$ENDCMP
#
$CMP -12V
D Power symbol creates a global label with name "+12V"
K power-flag
$ENDCMP
#
$CMP -12V_USER
D Power symbol creates a global label with name "+5V"
K power-flag
$ENDCMP
#
$CMP -5V
D Power symbol creates a global label with name "+5V"
K power-flag
$ENDCMP
#
$CMP -AV
D Power symbol creates a global label with name "-AV"
K power-flag
$ENDCMP
#
$CMP 1488
D Quad Line EIA-232D
F https://www.onsemi.com/pub/Collateral/MC1489-D.PDF
$ENDCMP
#
$CMP 1489
D Quad Line EIA-232D
F https://www.onsemi.com/pub/Collateral/MC1489-D.PDF
$ENDCMP
#
$CMP 16L8D
D Programmable Logic Array, DIP-20/SOIC-20/PLCC-20
K GAL PLD 16V8
$ENDCMP
#
$CMP 7400
D quad 2-input NAND gate
K TTL nand 2-input
F http://www.ti.com/lit/gpn/sn7400
$ENDCMP
#
$CMP 7407
D CMOS hex buffer (open drain) with 5V tolerant inputs
K CMOS hex buffer
F www.st.com/resource/en/datasheet/74lcx07.pdf
$ENDCMP
#
$CMP 74AHC04
D Hex Inverter
K AHCMOS not inv
F https://assets.nexperia.com/documents/data-sheet/74AHC_AHCT04.pdf
$ENDCMP
#
$CMP 74AHCT04
D Hex Inverter
K AHCTMOS not inv
F https://assets.nexperia.com/documents/data-sheet/74AHC_AHCT04.pdf
$ENDCMP
#
$CMP 74F08
D Quad And2
K TTL and2
F http://www.ti.com/lit/gpn/sn74LS08
$ENDCMP
#
$CMP 74F32
D Quad 2-input OR
K TTL Or2
F http://www.ti.com/lit/gpn/sn74LS32
$ENDCMP
#
$CMP 74F74
D Dual D-Type Positive Edge-Triggered Flip-Flop
F https://www.mouser.com/datasheet/2/308/74F74-1190299.pdf
$ENDCMP
#
$CMP 74F86
D Quad 2-input XOR
K TTL XOR2
F 74xx/74ls86.pdf
$ENDCMP
#
$CMP 74HC00
D quad 2-input NAND gate
K HCMOS nand 2-input
F http://www.ti.com/lit/gpn/sn74hc00
$ENDCMP
#
$CMP 74HC04
D Hex Inverter
K HCMOS not inv
F https://assets.nexperia.com/documents/data-sheet/74HC_HCT04.pdf
$ENDCMP
#
$CMP 74HC74
D Dual D Flip-flop, Set & Reset
K TTL DFF
F 74xx/74hc_hct74.pdf
$ENDCMP
#
$CMP 74HC86
D Quad 2-input XOR
K TTL XOR2
F http://www.ti.com/lit/gpn/sn74HC86
$ENDCMP
#
$CMP 74HCT00
D quad 2-input NAND gate
K HCTMOS nand 2-input
F http://www.ti.com/lit/gpn/sn74hct00
$ENDCMP
#
$CMP 74HCT04
D Hex Inverter
K HCTMOS not inv
F https://assets.nexperia.com/documents/data-sheet/74HC_HCT04.pdf
$ENDCMP
#
$CMP 74LS00
D quad 2-input NAND gate
K TTL nand 2-input
F http://www.ti.com/lit/gpn/sn74ls00
$ENDCMP
#
$CMP 74LS07
D Hex Buffers and Drivers With Open Collector High Voltage Outputs
K TTL hex buffer OpenCol
F www.ti.com/lit/ds/symlink/sn74ls07.pdf
$ENDCMP
#
$CMP 74LS09
D Quad 2-input AND Open Collect
K TTL and2 OpenCol
F http://www.ti.com/lit/gpn/sn74LS09
$ENDCMP
#
$CMP 74LS157
D Quad 2 to 1 line Multiplexer
K TTL MUX MUX2
F http://www.ti.com/lit/gpn/sn74LS157
$ENDCMP
#
$CMP 74LS174
D Hex D-type Flip-Flop, reset
K TTL REG REG6 DFF
F http://www.ti.com/lit/gpn/sn74LS174
$ENDCMP
#
$CMP 74LS37
D quad 2-input NAND buffer
K TTL nand 2-input buffer
F http://www.ti.com/lit/gpn/sn74ls37
$ENDCMP
#
$CMP 74LS74
D Dual D Flip-flop, Set & Reset
K TTL DFF
F 74xx/74hc_hct74.pdf
$ENDCMP
#
$CMP AUDIO
D Power symbol creates a global label with name "AUDIO" , reference supply ground
K power-flag
$ENDCMP
#
$CMP DB25_Female
D 25-pin female D-SUB connector
K female D-SUB connector
F ~
$ENDCMP
#
$CMP DB25_Male
D 25-pin male D-SUB connector
K male D-SUB connector
F ~
$ENDCMP
#
$CMP DELAYLINE
D 14 Pin DIP 5 Tap TTL Compatible High Speed Delay Line
F https://www.datasheets360.com/pdf/6416540649265052105
$ENDCMP
#
$CMP GND
D Power symbol creates a global label with name "GND" , reference supply ground
K power-flag
$ENDCMP
#
$CMP Gary
D Fat Gary
$ENDCMP
#
$CMP Internal_SCSI
D Generic connector, double row, 51 pins, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)
K connector
F ~
$ENDCMP
#
$CMP MC68030FE
D Motorola 68030 32 bit microprocessor
F https://www.alldatasheet.com/datasheet-pdf/pdf/122371/MOTOROLA/MC68030FE25.html
$ENDCMP
#
$CMP MC68881
D HCMOS Floating Point Co-processor
F http://bitsavers.trailing-edge.com/components/motorola/68000/MC68881_MC68882_Floating-Point_Coprocessor_Users_Manual_1ed_1987.pdf
$ENDCMP
#
$CMP MPF102
D N-JFET transistor, source/gate/drain
K transistor NJFET N-JFET
F ~
$ENDCMP
#
$CMP NE564
D Phase-locked loop
F http://www.komponenten.es.aau.dk/fileadmin/komponenten/Data_Sheet/Linear/NE564.pdf
$ENDCMP
#
$CMP PAL16L8
D Programmable Logic Array, DIP-20
K PAL PLD 16L8
$ENDCMP
#
$CMP PAL16R4A
D Programmable Logic Array, DIP-20
K PAL PLD 16L8
$ENDCMP
#
$CMP RCA_Jack
D coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)
K BNC SMA SMB SMC coaxial connector CINCH RCA
F ~
$ENDCMP
#
$CMP R_Network05_US
D 5 resistor network, star topology, bussed resistors, small US symbol
K R network star-topology
F http://www.vishay.com/docs/31509/csc.pdf
$ENDCMP
#
$CMP R_Pack07
D 7 resistor network, parallel topology, DIP package
K R network parallel topology isolated
F ~
$ENDCMP
#
$CMP Resistor_Isolated_10_Pin
D Resistor, US symbol
K R res resistor
F ~
$ENDCMP
#
$CMP Resistor_Isolated_8_Pin
D Resistor, US symbol
K R res resistor
F ~
$ENDCMP
#
$CMP Resistor_Network_-_Bussed_-_10_Pin
D 9 resistor network, star topology, bussed resistors, small US symbol
K R network star-topology
F http://www.vishay.com/docs/31509/csc.pdf
$ENDCMP
#
$CMP Resistor_Network_-_Bussed_-_9_Pin
D 7 resistor network, star topology, bussed resistors, small US symbol
K R network star-topology
F http://www.vishay.com/docs/31509/csc.pdf
$ENDCMP
#
$CMP Resistor_Network_-_|Isolated_8_Pin
D 9 resistor network, star topology, bussed resistors, small US symbol
K R network star-topology
F http://www.vishay.com/docs/31509/csc.pdf
$ENDCMP
#
$CMP Resistor_Network_Isolated_10_Pin
D 9 resistor network, star topology, bussed resistors, small US symbol
K R network star-topology
F http://www.vishay.com/docs/31509/csc.pdf
$ENDCMP
#
$CMP SCSI_resistor_pack
D 7 resistor network, star topology, bussed resistors, small US symbol
K R network star-topology
F http://www.vishay.com/docs/31509/csc.pdf
$ENDCMP
#
$CMP SG-210STF
D CMOS Crystal Oscillator SPXO
K Crystal Clock Oscillator
F https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-210STF
$ENDCMP
#
$CMP SG-211
D CMOS Crystal Oscillator SPXO
K Crystal Clock Oscillator
F https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-211SEE
$ENDCMP
#
$CMP SN74LS07
D Hex Buffers and Drivers With Open Collector High Voltage Outputs
K TTL hex buffer OpenCol
F www.ti.com/lit/ds/symlink/sn74ls07.pdf
$ENDCMP
#
$CMP SN74LS07N
D Hex Buffers and Drivers With Open Collector High Voltage Outputs
K TTL hex buffer OpenCol
F www.ti.com/lit/ds/symlink/sn74ls07.pdf
$ENDCMP
#
$CMP SW_DIP_x01
D 1x DIP Switch, Single Pole Single Throw (SPST) switch, small symbol
K dip switch
F ~
$ENDCMP
#
$CMP Vref
D Power symbol creates a global label with name "Vref"
K power-flag
$ENDCMP
#
#End Doc Library