diff --git a/openfasoc/generators/cryo-gen/Makefile b/openfasoc/generators/cryo-gen/Makefile
index 062e5653c..407330673 100644
--- a/openfasoc/generators/cryo-gen/Makefile
+++ b/openfasoc/generators/cryo-gen/Makefile
@@ -139,6 +139,7 @@ clean:
 	rm -f error_within_x.csv golden_error_opt.csv search_result.csv
 	rm -rf work
 	rm -rf tools/*.pyc tools/__pycache__/
+	rm -rf flow/design/src/cryo
 	cd flow && make nuke
 	cd simulation && rm -f *.log *.sp *.out *.ps
 
diff --git a/openfasoc/generators/cryo-gen/flow/design/src/.gitignore b/openfasoc/generators/cryo-gen/flow/design/src/.gitignore
new file mode 100644
index 000000000..944f24c37
--- /dev/null
+++ b/openfasoc/generators/cryo-gen/flow/design/src/.gitignore
@@ -0,0 +1 @@
+cryo/
\ No newline at end of file
diff --git a/openfasoc/generators/cryo-gen/flow/design/src/cryo/cryoInst.v b/openfasoc/generators/cryo-gen/flow/design/src/cryo/cryoInst.v
deleted file mode 100644
index d4222343f..000000000
--- a/openfasoc/generators/cryo-gen/flow/design/src/cryo/cryoInst.v
+++ /dev/null
@@ -1,19 +0,0 @@
-module cryoInst
-(
-	input EBL,
-	output OUT
-	);
-
-	wire ro_out;
-
-	cryo_ro cryo_ro_1(
-		.EN(EBL),
-		.OUT(ro_out)
-	);
-
-	divider divider_1(
-	       	.CLK_in(ro_out),
-		.CLK_out(OUT)
-	);
-
-endmodule
diff --git a/openfasoc/generators/cryo-gen/flow/design/src/cryo/cryo_ro.nl.v b/openfasoc/generators/cryo-gen/flow/design/src/cryo/cryo_ro.nl.v
deleted file mode 100644
index 69406b177..000000000
--- a/openfasoc/generators/cryo-gen/flow/design/src/cryo/cryo_ro.nl.v
+++ /dev/null
@@ -1,296 +0,0 @@
-
-module cryo_ro (EN, OUT);
-input  EN;
-output OUT;
-wire n1;
-wire n2;
-wire n3;
-wire n4;
-wire n5;
-wire n6;
-wire n7;
-wire n8;
-wire n9;
-wire n10;
-wire n11;
-wire n12;
-wire n13;
-wire n14;
-wire n15;
-wire n16;
-wire n17;
-wire n18;
-wire n19;
-wire n20;
-wire n21;
-wire n22;
-wire n23;
-wire n24;
-wire n25;
-wire n26;
-wire n27;
-wire n28;
-wire n29;
-wire n30;
-wire n31;
-wire n32;
-wire n33;
-wire n34;
-wire n35;
-wire n36;
-wire n37;
-wire n38;
-wire n39;
-wire n40;
-wire n41;
-wire n42;
-wire n43;
-wire n44;
-wire n45;
-wire n46;
-wire n47;
-wire n48;
-wire n49;
-wire n50;
-wire n51;
-wire n52;
-wire n53;
-wire n54;
-wire n55;
-wire n56;
-wire n57;
-wire n58;
-wire n59;
-wire n60;
-wire n61;
-wire n62;
-wire n63;
-wire n64;
-wire n65;
-wire n66;
-wire n67;
-wire n68;
-wire n69;
-wire n70;
-wire n71;
-wire n72;
-wire n73;
-wire n74;
-wire n75;
-wire n76;
-wire n77;
-wire n78;
-wire n79;
-wire n80;
-wire n81;
-wire n82;
-wire n83;
-wire n84;
-wire n85;
-wire n86;
-wire n87;
-wire n88;
-wire n89;
-wire n90;
-wire n91;
-wire n92;
-wire n93;
-wire n94;
-wire n95;
-wire n96;
-wire n97;
-wire n98;
-wire n99;
-wire n100;
-wire n101;
-wire n102;
-wire n103;
-wire n104;
-wire n105;
-wire n106;
-wire n107;
-wire n108;
-wire n109;
-wire n110;
-wire n111;
-wire n112;
-wire n113;
-wire n114;
-wire n115;
-wire n116;
-wire n117;
-wire n118;
-wire n119;
-wire n120;
-wire n121;
-wire n122;
-wire n123;
-wire n124;
-wire n125;
-wire n126;
-wire n127;
-wire n128;
-wire n129;
-wire n130;
-wire n131;
-wire n132;
-wire n133;
-wire n134;
-wire n135;
-wire n136;
-wire n137;
-wire n138;
-wire n139;
-wire n140;
-wire n141;
-wire n142;
-wire n143;
-wire n144;
-wire n145;
-sky130_fd_sc_hd__nand2_1 a_nand_0 ( .A(EN), .B(n145), .Y(n1));
-sky130_fd_sc_hd__inv_1 a_inv_0 ( .A(n1), .Y(n2));
-sky130_fd_sc_hd__inv_1 a_inv_1 ( .A(n2), .Y(n3));
-sky130_fd_sc_hd__inv_1 a_inv_2 ( .A(n3), .Y(n4));
-sky130_fd_sc_hd__inv_1 a_inv_3 ( .A(n4), .Y(n5));
-sky130_fd_sc_hd__inv_1 a_inv_4 ( .A(n5), .Y(n6));
-sky130_fd_sc_hd__inv_1 a_inv_5 ( .A(n6), .Y(n7));
-sky130_fd_sc_hd__inv_1 a_inv_6 ( .A(n7), .Y(n8));
-sky130_fd_sc_hd__inv_1 a_inv_7 ( .A(n8), .Y(n9));
-sky130_fd_sc_hd__inv_1 a_inv_8 ( .A(n9), .Y(n10));
-sky130_fd_sc_hd__inv_1 a_inv_9 ( .A(n10), .Y(n11));
-sky130_fd_sc_hd__inv_1 a_inv_10 ( .A(n11), .Y(n12));
-sky130_fd_sc_hd__inv_1 a_inv_11 ( .A(n12), .Y(n13));
-sky130_fd_sc_hd__inv_1 a_inv_12 ( .A(n13), .Y(n14));
-sky130_fd_sc_hd__inv_1 a_inv_13 ( .A(n14), .Y(n15));
-sky130_fd_sc_hd__inv_1 a_inv_14 ( .A(n15), .Y(n16));
-sky130_fd_sc_hd__inv_1 a_inv_15 ( .A(n16), .Y(n17));
-sky130_fd_sc_hd__inv_1 a_inv_16 ( .A(n17), .Y(n18));
-sky130_fd_sc_hd__inv_1 a_inv_17 ( .A(n18), .Y(n19));
-sky130_fd_sc_hd__inv_1 a_inv_18 ( .A(n19), .Y(n20));
-sky130_fd_sc_hd__inv_1 a_inv_19 ( .A(n20), .Y(n21));
-sky130_fd_sc_hd__inv_1 a_inv_20 ( .A(n21), .Y(n22));
-sky130_fd_sc_hd__inv_1 a_inv_21 ( .A(n22), .Y(n23));
-sky130_fd_sc_hd__inv_1 a_inv_22 ( .A(n23), .Y(n24));
-sky130_fd_sc_hd__inv_1 a_inv_23 ( .A(n24), .Y(n25));
-sky130_fd_sc_hd__inv_1 a_inv_24 ( .A(n25), .Y(n26));
-sky130_fd_sc_hd__inv_1 a_inv_25 ( .A(n26), .Y(n27));
-sky130_fd_sc_hd__inv_1 a_inv_26 ( .A(n27), .Y(n28));
-sky130_fd_sc_hd__inv_1 a_inv_27 ( .A(n28), .Y(n29));
-sky130_fd_sc_hd__inv_1 a_inv_28 ( .A(n29), .Y(n30));
-sky130_fd_sc_hd__inv_1 a_inv_29 ( .A(n30), .Y(n31));
-sky130_fd_sc_hd__inv_1 a_inv_30 ( .A(n31), .Y(n32));
-sky130_fd_sc_hd__inv_1 a_inv_31 ( .A(n32), .Y(n33));
-sky130_fd_sc_hd__inv_1 a_inv_32 ( .A(n33), .Y(n34));
-sky130_fd_sc_hd__inv_1 a_inv_33 ( .A(n34), .Y(n35));
-sky130_fd_sc_hd__inv_1 a_inv_34 ( .A(n35), .Y(n36));
-sky130_fd_sc_hd__inv_1 a_inv_35 ( .A(n36), .Y(n37));
-sky130_fd_sc_hd__inv_1 a_inv_36 ( .A(n37), .Y(n38));
-sky130_fd_sc_hd__inv_1 a_inv_37 ( .A(n38), .Y(n39));
-sky130_fd_sc_hd__inv_1 a_inv_38 ( .A(n39), .Y(n40));
-sky130_fd_sc_hd__inv_1 a_inv_39 ( .A(n40), .Y(n41));
-sky130_fd_sc_hd__inv_1 a_inv_40 ( .A(n41), .Y(n42));
-sky130_fd_sc_hd__inv_1 a_inv_41 ( .A(n42), .Y(n43));
-sky130_fd_sc_hd__inv_1 a_inv_42 ( .A(n43), .Y(n44));
-sky130_fd_sc_hd__inv_1 a_inv_43 ( .A(n44), .Y(n45));
-sky130_fd_sc_hd__inv_1 a_inv_44 ( .A(n45), .Y(n46));
-sky130_fd_sc_hd__inv_1 a_inv_45 ( .A(n46), .Y(n47));
-sky130_fd_sc_hd__inv_1 a_inv_46 ( .A(n47), .Y(n48));
-sky130_fd_sc_hd__inv_1 a_inv_47 ( .A(n48), .Y(n49));
-sky130_fd_sc_hd__inv_1 a_inv_48 ( .A(n49), .Y(n50));
-sky130_fd_sc_hd__inv_1 a_inv_49 ( .A(n50), .Y(n51));
-sky130_fd_sc_hd__inv_1 a_inv_50 ( .A(n51), .Y(n52));
-sky130_fd_sc_hd__inv_1 a_inv_51 ( .A(n52), .Y(n53));
-sky130_fd_sc_hd__inv_1 a_inv_52 ( .A(n53), .Y(n54));
-sky130_fd_sc_hd__inv_1 a_inv_53 ( .A(n54), .Y(n55));
-sky130_fd_sc_hd__inv_1 a_inv_54 ( .A(n55), .Y(n56));
-sky130_fd_sc_hd__inv_1 a_inv_55 ( .A(n56), .Y(n57));
-sky130_fd_sc_hd__inv_1 a_inv_56 ( .A(n57), .Y(n58));
-sky130_fd_sc_hd__inv_1 a_inv_57 ( .A(n58), .Y(n59));
-sky130_fd_sc_hd__inv_1 a_inv_58 ( .A(n59), .Y(n60));
-sky130_fd_sc_hd__inv_1 a_inv_59 ( .A(n60), .Y(n61));
-sky130_fd_sc_hd__inv_1 a_inv_60 ( .A(n61), .Y(n62));
-sky130_fd_sc_hd__inv_1 a_inv_61 ( .A(n62), .Y(n63));
-sky130_fd_sc_hd__inv_1 a_inv_62 ( .A(n63), .Y(n64));
-sky130_fd_sc_hd__inv_1 a_inv_63 ( .A(n64), .Y(n65));
-sky130_fd_sc_hd__inv_1 a_inv_64 ( .A(n65), .Y(n66));
-sky130_fd_sc_hd__inv_1 a_inv_65 ( .A(n66), .Y(n67));
-sky130_fd_sc_hd__inv_1 a_inv_66 ( .A(n67), .Y(n68));
-sky130_fd_sc_hd__inv_1 a_inv_67 ( .A(n68), .Y(n69));
-sky130_fd_sc_hd__inv_1 a_inv_68 ( .A(n69), .Y(n70));
-sky130_fd_sc_hd__inv_1 a_inv_69 ( .A(n70), .Y(n71));
-sky130_fd_sc_hd__inv_1 a_inv_70 ( .A(n71), .Y(n72));
-sky130_fd_sc_hd__inv_1 a_inv_71 ( .A(n72), .Y(n73));
-sky130_fd_sc_hd__inv_1 a_inv_72 ( .A(n73), .Y(n74));
-sky130_fd_sc_hd__inv_1 a_inv_73 ( .A(n74), .Y(n75));
-sky130_fd_sc_hd__inv_1 a_inv_74 ( .A(n75), .Y(n76));
-sky130_fd_sc_hd__inv_1 a_inv_75 ( .A(n76), .Y(n77));
-sky130_fd_sc_hd__inv_1 a_inv_76 ( .A(n77), .Y(n78));
-sky130_fd_sc_hd__inv_1 a_inv_77 ( .A(n78), .Y(n79));
-sky130_fd_sc_hd__inv_1 a_inv_78 ( .A(n79), .Y(n80));
-sky130_fd_sc_hd__inv_1 a_inv_79 ( .A(n80), .Y(n81));
-sky130_fd_sc_hd__inv_1 a_inv_80 ( .A(n81), .Y(n82));
-sky130_fd_sc_hd__inv_1 a_inv_81 ( .A(n82), .Y(n83));
-sky130_fd_sc_hd__inv_1 a_inv_82 ( .A(n83), .Y(n84));
-sky130_fd_sc_hd__inv_1 a_inv_83 ( .A(n84), .Y(n85));
-sky130_fd_sc_hd__inv_1 a_inv_84 ( .A(n85), .Y(n86));
-sky130_fd_sc_hd__inv_1 a_inv_85 ( .A(n86), .Y(n87));
-sky130_fd_sc_hd__inv_1 a_inv_86 ( .A(n87), .Y(n88));
-sky130_fd_sc_hd__inv_1 a_inv_87 ( .A(n88), .Y(n89));
-sky130_fd_sc_hd__inv_1 a_inv_88 ( .A(n89), .Y(n90));
-sky130_fd_sc_hd__inv_1 a_inv_89 ( .A(n90), .Y(n91));
-sky130_fd_sc_hd__inv_1 a_inv_90 ( .A(n91), .Y(n92));
-sky130_fd_sc_hd__inv_1 a_inv_91 ( .A(n92), .Y(n93));
-sky130_fd_sc_hd__inv_1 a_inv_92 ( .A(n93), .Y(n94));
-sky130_fd_sc_hd__inv_1 a_inv_93 ( .A(n94), .Y(n95));
-sky130_fd_sc_hd__inv_1 a_inv_94 ( .A(n95), .Y(n96));
-sky130_fd_sc_hd__inv_1 a_inv_95 ( .A(n96), .Y(n97));
-sky130_fd_sc_hd__inv_1 a_inv_96 ( .A(n97), .Y(n98));
-sky130_fd_sc_hd__inv_1 a_inv_97 ( .A(n98), .Y(n99));
-sky130_fd_sc_hd__inv_1 a_inv_98 ( .A(n99), .Y(n100));
-sky130_fd_sc_hd__inv_1 a_inv_99 ( .A(n100), .Y(n101));
-sky130_fd_sc_hd__inv_1 a_inv_100 ( .A(n101), .Y(n102));
-sky130_fd_sc_hd__inv_1 a_inv_101 ( .A(n102), .Y(n103));
-sky130_fd_sc_hd__inv_1 a_inv_102 ( .A(n103), .Y(n104));
-sky130_fd_sc_hd__inv_1 a_inv_103 ( .A(n104), .Y(n105));
-sky130_fd_sc_hd__inv_1 a_inv_104 ( .A(n105), .Y(n106));
-sky130_fd_sc_hd__inv_1 a_inv_105 ( .A(n106), .Y(n107));
-sky130_fd_sc_hd__inv_1 a_inv_106 ( .A(n107), .Y(n108));
-sky130_fd_sc_hd__inv_1 a_inv_107 ( .A(n108), .Y(n109));
-sky130_fd_sc_hd__inv_1 a_inv_108 ( .A(n109), .Y(n110));
-sky130_fd_sc_hd__inv_1 a_inv_109 ( .A(n110), .Y(n111));
-sky130_fd_sc_hd__inv_1 a_inv_110 ( .A(n111), .Y(n112));
-sky130_fd_sc_hd__inv_1 a_inv_111 ( .A(n112), .Y(n113));
-sky130_fd_sc_hd__inv_1 a_inv_112 ( .A(n113), .Y(n114));
-sky130_fd_sc_hd__inv_1 a_inv_113 ( .A(n114), .Y(n115));
-sky130_fd_sc_hd__inv_1 a_inv_114 ( .A(n115), .Y(n116));
-sky130_fd_sc_hd__inv_1 a_inv_115 ( .A(n116), .Y(n117));
-sky130_fd_sc_hd__inv_1 a_inv_116 ( .A(n117), .Y(n118));
-sky130_fd_sc_hd__inv_1 a_inv_117 ( .A(n118), .Y(n119));
-sky130_fd_sc_hd__inv_1 a_inv_118 ( .A(n119), .Y(n120));
-sky130_fd_sc_hd__inv_1 a_inv_119 ( .A(n120), .Y(n121));
-sky130_fd_sc_hd__inv_1 a_inv_120 ( .A(n121), .Y(n122));
-sky130_fd_sc_hd__inv_1 a_inv_121 ( .A(n122), .Y(n123));
-sky130_fd_sc_hd__inv_1 a_inv_122 ( .A(n123), .Y(n124));
-sky130_fd_sc_hd__inv_1 a_inv_123 ( .A(n124), .Y(n125));
-sky130_fd_sc_hd__inv_1 a_inv_124 ( .A(n125), .Y(n126));
-sky130_fd_sc_hd__inv_1 a_inv_125 ( .A(n126), .Y(n127));
-sky130_fd_sc_hd__inv_1 a_inv_126 ( .A(n127), .Y(n128));
-sky130_fd_sc_hd__inv_1 a_inv_127 ( .A(n128), .Y(n129));
-sky130_fd_sc_hd__inv_1 a_inv_128 ( .A(n129), .Y(n130));
-sky130_fd_sc_hd__inv_1 a_inv_129 ( .A(n130), .Y(n131));
-sky130_fd_sc_hd__inv_1 a_inv_130 ( .A(n131), .Y(n132));
-sky130_fd_sc_hd__inv_1 a_inv_131 ( .A(n132), .Y(n133));
-sky130_fd_sc_hd__inv_1 a_inv_132 ( .A(n133), .Y(n134));
-sky130_fd_sc_hd__inv_1 a_inv_133 ( .A(n134), .Y(n135));
-sky130_fd_sc_hd__inv_1 a_inv_134 ( .A(n135), .Y(n136));
-sky130_fd_sc_hd__inv_1 a_inv_135 ( .A(n136), .Y(n137));
-sky130_fd_sc_hd__inv_1 a_inv_136 ( .A(n137), .Y(n138));
-sky130_fd_sc_hd__inv_1 a_inv_137 ( .A(n138), .Y(n139));
-sky130_fd_sc_hd__inv_1 a_inv_138 ( .A(n139), .Y(n140));
-sky130_fd_sc_hd__inv_1 a_inv_139 ( .A(n140), .Y(n141));
-sky130_fd_sc_hd__inv_1 a_inv_140 ( .A(n141), .Y(n142));
-sky130_fd_sc_hd__inv_1 a_inv_141 ( .A(n142), .Y(n143));
-sky130_fd_sc_hd__inv_1 a_inv_142 ( .A(n143), .Y(n144));
-sky130_fd_sc_hd__inv_1 a_inv_143 ( .A(n144), .Y(n145));
-sky130_fd_sc_hd__inv_1 a_inv_out ( .A(n1), .Y(OUT));
-endmodule
diff --git a/openfasoc/generators/cryo-gen/flow/design/src/cryo/divider.v b/openfasoc/generators/cryo-gen/flow/design/src/cryo/divider.v
deleted file mode 100644
index de8ed8754..000000000
--- a/openfasoc/generators/cryo-gen/flow/design/src/cryo/divider.v
+++ /dev/null
@@ -1,49 +0,0 @@
-module divider
-(
-	input CLK_in,
-	output CLK_out
-);
-	reg Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10;
-
-	assign CLK_out=Q10;
-	always @ (posedge CLK_in )
-	begin
-		Q1<=~Q1;
-	end
-	always @ (posedge Q1 )
-	begin
-		Q2<=~Q2;
-	end
-	always @ (posedge Q2 )
-	begin
-		Q3<=~Q3;
-	end
-	always @ (posedge Q3 )
-	begin
-		Q4<=~Q4;
-	end
-	always @ (posedge Q4 )
-	begin
-		Q5<=~Q5;
-	end
-	always @ (posedge Q5 )
-	begin
-		Q6<=~Q6;
-	end
-	always @ (posedge Q6 )
-	begin
-		Q7<=~Q7;
-	end
-	always @ (posedge Q7 )
-	begin
-		Q8<=~Q8;
-	end
-	always @ (posedge Q8 )
-	begin
-		Q9<=~Q9;
-	end
-	always @ (posedge Q9 )
-	begin
-		Q10<=~Q10;
-	end
-endmodule
diff --git a/openfasoc/generators/cryo-gen/src/cryoInst.v b/openfasoc/generators/cryo-gen/src/cryoInst.v
index d4222343f..8ed68c391 100644
--- a/openfasoc/generators/cryo-gen/src/cryoInst.v
+++ b/openfasoc/generators/cryo-gen/src/cryoInst.v
@@ -1,4 +1,4 @@
-module cryoInst
+module ${design_name}
 (
 	input EBL,
 	output OUT
diff --git a/openfasoc/generators/cryo-gen/src/cryo_ro.nl.v b/openfasoc/generators/cryo-gen/src/cryo_ro.nl.v
deleted file mode 100644
index 69406b177..000000000
--- a/openfasoc/generators/cryo-gen/src/cryo_ro.nl.v
+++ /dev/null
@@ -1,296 +0,0 @@
-
-module cryo_ro (EN, OUT);
-input  EN;
-output OUT;
-wire n1;
-wire n2;
-wire n3;
-wire n4;
-wire n5;
-wire n6;
-wire n7;
-wire n8;
-wire n9;
-wire n10;
-wire n11;
-wire n12;
-wire n13;
-wire n14;
-wire n15;
-wire n16;
-wire n17;
-wire n18;
-wire n19;
-wire n20;
-wire n21;
-wire n22;
-wire n23;
-wire n24;
-wire n25;
-wire n26;
-wire n27;
-wire n28;
-wire n29;
-wire n30;
-wire n31;
-wire n32;
-wire n33;
-wire n34;
-wire n35;
-wire n36;
-wire n37;
-wire n38;
-wire n39;
-wire n40;
-wire n41;
-wire n42;
-wire n43;
-wire n44;
-wire n45;
-wire n46;
-wire n47;
-wire n48;
-wire n49;
-wire n50;
-wire n51;
-wire n52;
-wire n53;
-wire n54;
-wire n55;
-wire n56;
-wire n57;
-wire n58;
-wire n59;
-wire n60;
-wire n61;
-wire n62;
-wire n63;
-wire n64;
-wire n65;
-wire n66;
-wire n67;
-wire n68;
-wire n69;
-wire n70;
-wire n71;
-wire n72;
-wire n73;
-wire n74;
-wire n75;
-wire n76;
-wire n77;
-wire n78;
-wire n79;
-wire n80;
-wire n81;
-wire n82;
-wire n83;
-wire n84;
-wire n85;
-wire n86;
-wire n87;
-wire n88;
-wire n89;
-wire n90;
-wire n91;
-wire n92;
-wire n93;
-wire n94;
-wire n95;
-wire n96;
-wire n97;
-wire n98;
-wire n99;
-wire n100;
-wire n101;
-wire n102;
-wire n103;
-wire n104;
-wire n105;
-wire n106;
-wire n107;
-wire n108;
-wire n109;
-wire n110;
-wire n111;
-wire n112;
-wire n113;
-wire n114;
-wire n115;
-wire n116;
-wire n117;
-wire n118;
-wire n119;
-wire n120;
-wire n121;
-wire n122;
-wire n123;
-wire n124;
-wire n125;
-wire n126;
-wire n127;
-wire n128;
-wire n129;
-wire n130;
-wire n131;
-wire n132;
-wire n133;
-wire n134;
-wire n135;
-wire n136;
-wire n137;
-wire n138;
-wire n139;
-wire n140;
-wire n141;
-wire n142;
-wire n143;
-wire n144;
-wire n145;
-sky130_fd_sc_hd__nand2_1 a_nand_0 ( .A(EN), .B(n145), .Y(n1));
-sky130_fd_sc_hd__inv_1 a_inv_0 ( .A(n1), .Y(n2));
-sky130_fd_sc_hd__inv_1 a_inv_1 ( .A(n2), .Y(n3));
-sky130_fd_sc_hd__inv_1 a_inv_2 ( .A(n3), .Y(n4));
-sky130_fd_sc_hd__inv_1 a_inv_3 ( .A(n4), .Y(n5));
-sky130_fd_sc_hd__inv_1 a_inv_4 ( .A(n5), .Y(n6));
-sky130_fd_sc_hd__inv_1 a_inv_5 ( .A(n6), .Y(n7));
-sky130_fd_sc_hd__inv_1 a_inv_6 ( .A(n7), .Y(n8));
-sky130_fd_sc_hd__inv_1 a_inv_7 ( .A(n8), .Y(n9));
-sky130_fd_sc_hd__inv_1 a_inv_8 ( .A(n9), .Y(n10));
-sky130_fd_sc_hd__inv_1 a_inv_9 ( .A(n10), .Y(n11));
-sky130_fd_sc_hd__inv_1 a_inv_10 ( .A(n11), .Y(n12));
-sky130_fd_sc_hd__inv_1 a_inv_11 ( .A(n12), .Y(n13));
-sky130_fd_sc_hd__inv_1 a_inv_12 ( .A(n13), .Y(n14));
-sky130_fd_sc_hd__inv_1 a_inv_13 ( .A(n14), .Y(n15));
-sky130_fd_sc_hd__inv_1 a_inv_14 ( .A(n15), .Y(n16));
-sky130_fd_sc_hd__inv_1 a_inv_15 ( .A(n16), .Y(n17));
-sky130_fd_sc_hd__inv_1 a_inv_16 ( .A(n17), .Y(n18));
-sky130_fd_sc_hd__inv_1 a_inv_17 ( .A(n18), .Y(n19));
-sky130_fd_sc_hd__inv_1 a_inv_18 ( .A(n19), .Y(n20));
-sky130_fd_sc_hd__inv_1 a_inv_19 ( .A(n20), .Y(n21));
-sky130_fd_sc_hd__inv_1 a_inv_20 ( .A(n21), .Y(n22));
-sky130_fd_sc_hd__inv_1 a_inv_21 ( .A(n22), .Y(n23));
-sky130_fd_sc_hd__inv_1 a_inv_22 ( .A(n23), .Y(n24));
-sky130_fd_sc_hd__inv_1 a_inv_23 ( .A(n24), .Y(n25));
-sky130_fd_sc_hd__inv_1 a_inv_24 ( .A(n25), .Y(n26));
-sky130_fd_sc_hd__inv_1 a_inv_25 ( .A(n26), .Y(n27));
-sky130_fd_sc_hd__inv_1 a_inv_26 ( .A(n27), .Y(n28));
-sky130_fd_sc_hd__inv_1 a_inv_27 ( .A(n28), .Y(n29));
-sky130_fd_sc_hd__inv_1 a_inv_28 ( .A(n29), .Y(n30));
-sky130_fd_sc_hd__inv_1 a_inv_29 ( .A(n30), .Y(n31));
-sky130_fd_sc_hd__inv_1 a_inv_30 ( .A(n31), .Y(n32));
-sky130_fd_sc_hd__inv_1 a_inv_31 ( .A(n32), .Y(n33));
-sky130_fd_sc_hd__inv_1 a_inv_32 ( .A(n33), .Y(n34));
-sky130_fd_sc_hd__inv_1 a_inv_33 ( .A(n34), .Y(n35));
-sky130_fd_sc_hd__inv_1 a_inv_34 ( .A(n35), .Y(n36));
-sky130_fd_sc_hd__inv_1 a_inv_35 ( .A(n36), .Y(n37));
-sky130_fd_sc_hd__inv_1 a_inv_36 ( .A(n37), .Y(n38));
-sky130_fd_sc_hd__inv_1 a_inv_37 ( .A(n38), .Y(n39));
-sky130_fd_sc_hd__inv_1 a_inv_38 ( .A(n39), .Y(n40));
-sky130_fd_sc_hd__inv_1 a_inv_39 ( .A(n40), .Y(n41));
-sky130_fd_sc_hd__inv_1 a_inv_40 ( .A(n41), .Y(n42));
-sky130_fd_sc_hd__inv_1 a_inv_41 ( .A(n42), .Y(n43));
-sky130_fd_sc_hd__inv_1 a_inv_42 ( .A(n43), .Y(n44));
-sky130_fd_sc_hd__inv_1 a_inv_43 ( .A(n44), .Y(n45));
-sky130_fd_sc_hd__inv_1 a_inv_44 ( .A(n45), .Y(n46));
-sky130_fd_sc_hd__inv_1 a_inv_45 ( .A(n46), .Y(n47));
-sky130_fd_sc_hd__inv_1 a_inv_46 ( .A(n47), .Y(n48));
-sky130_fd_sc_hd__inv_1 a_inv_47 ( .A(n48), .Y(n49));
-sky130_fd_sc_hd__inv_1 a_inv_48 ( .A(n49), .Y(n50));
-sky130_fd_sc_hd__inv_1 a_inv_49 ( .A(n50), .Y(n51));
-sky130_fd_sc_hd__inv_1 a_inv_50 ( .A(n51), .Y(n52));
-sky130_fd_sc_hd__inv_1 a_inv_51 ( .A(n52), .Y(n53));
-sky130_fd_sc_hd__inv_1 a_inv_52 ( .A(n53), .Y(n54));
-sky130_fd_sc_hd__inv_1 a_inv_53 ( .A(n54), .Y(n55));
-sky130_fd_sc_hd__inv_1 a_inv_54 ( .A(n55), .Y(n56));
-sky130_fd_sc_hd__inv_1 a_inv_55 ( .A(n56), .Y(n57));
-sky130_fd_sc_hd__inv_1 a_inv_56 ( .A(n57), .Y(n58));
-sky130_fd_sc_hd__inv_1 a_inv_57 ( .A(n58), .Y(n59));
-sky130_fd_sc_hd__inv_1 a_inv_58 ( .A(n59), .Y(n60));
-sky130_fd_sc_hd__inv_1 a_inv_59 ( .A(n60), .Y(n61));
-sky130_fd_sc_hd__inv_1 a_inv_60 ( .A(n61), .Y(n62));
-sky130_fd_sc_hd__inv_1 a_inv_61 ( .A(n62), .Y(n63));
-sky130_fd_sc_hd__inv_1 a_inv_62 ( .A(n63), .Y(n64));
-sky130_fd_sc_hd__inv_1 a_inv_63 ( .A(n64), .Y(n65));
-sky130_fd_sc_hd__inv_1 a_inv_64 ( .A(n65), .Y(n66));
-sky130_fd_sc_hd__inv_1 a_inv_65 ( .A(n66), .Y(n67));
-sky130_fd_sc_hd__inv_1 a_inv_66 ( .A(n67), .Y(n68));
-sky130_fd_sc_hd__inv_1 a_inv_67 ( .A(n68), .Y(n69));
-sky130_fd_sc_hd__inv_1 a_inv_68 ( .A(n69), .Y(n70));
-sky130_fd_sc_hd__inv_1 a_inv_69 ( .A(n70), .Y(n71));
-sky130_fd_sc_hd__inv_1 a_inv_70 ( .A(n71), .Y(n72));
-sky130_fd_sc_hd__inv_1 a_inv_71 ( .A(n72), .Y(n73));
-sky130_fd_sc_hd__inv_1 a_inv_72 ( .A(n73), .Y(n74));
-sky130_fd_sc_hd__inv_1 a_inv_73 ( .A(n74), .Y(n75));
-sky130_fd_sc_hd__inv_1 a_inv_74 ( .A(n75), .Y(n76));
-sky130_fd_sc_hd__inv_1 a_inv_75 ( .A(n76), .Y(n77));
-sky130_fd_sc_hd__inv_1 a_inv_76 ( .A(n77), .Y(n78));
-sky130_fd_sc_hd__inv_1 a_inv_77 ( .A(n78), .Y(n79));
-sky130_fd_sc_hd__inv_1 a_inv_78 ( .A(n79), .Y(n80));
-sky130_fd_sc_hd__inv_1 a_inv_79 ( .A(n80), .Y(n81));
-sky130_fd_sc_hd__inv_1 a_inv_80 ( .A(n81), .Y(n82));
-sky130_fd_sc_hd__inv_1 a_inv_81 ( .A(n82), .Y(n83));
-sky130_fd_sc_hd__inv_1 a_inv_82 ( .A(n83), .Y(n84));
-sky130_fd_sc_hd__inv_1 a_inv_83 ( .A(n84), .Y(n85));
-sky130_fd_sc_hd__inv_1 a_inv_84 ( .A(n85), .Y(n86));
-sky130_fd_sc_hd__inv_1 a_inv_85 ( .A(n86), .Y(n87));
-sky130_fd_sc_hd__inv_1 a_inv_86 ( .A(n87), .Y(n88));
-sky130_fd_sc_hd__inv_1 a_inv_87 ( .A(n88), .Y(n89));
-sky130_fd_sc_hd__inv_1 a_inv_88 ( .A(n89), .Y(n90));
-sky130_fd_sc_hd__inv_1 a_inv_89 ( .A(n90), .Y(n91));
-sky130_fd_sc_hd__inv_1 a_inv_90 ( .A(n91), .Y(n92));
-sky130_fd_sc_hd__inv_1 a_inv_91 ( .A(n92), .Y(n93));
-sky130_fd_sc_hd__inv_1 a_inv_92 ( .A(n93), .Y(n94));
-sky130_fd_sc_hd__inv_1 a_inv_93 ( .A(n94), .Y(n95));
-sky130_fd_sc_hd__inv_1 a_inv_94 ( .A(n95), .Y(n96));
-sky130_fd_sc_hd__inv_1 a_inv_95 ( .A(n96), .Y(n97));
-sky130_fd_sc_hd__inv_1 a_inv_96 ( .A(n97), .Y(n98));
-sky130_fd_sc_hd__inv_1 a_inv_97 ( .A(n98), .Y(n99));
-sky130_fd_sc_hd__inv_1 a_inv_98 ( .A(n99), .Y(n100));
-sky130_fd_sc_hd__inv_1 a_inv_99 ( .A(n100), .Y(n101));
-sky130_fd_sc_hd__inv_1 a_inv_100 ( .A(n101), .Y(n102));
-sky130_fd_sc_hd__inv_1 a_inv_101 ( .A(n102), .Y(n103));
-sky130_fd_sc_hd__inv_1 a_inv_102 ( .A(n103), .Y(n104));
-sky130_fd_sc_hd__inv_1 a_inv_103 ( .A(n104), .Y(n105));
-sky130_fd_sc_hd__inv_1 a_inv_104 ( .A(n105), .Y(n106));
-sky130_fd_sc_hd__inv_1 a_inv_105 ( .A(n106), .Y(n107));
-sky130_fd_sc_hd__inv_1 a_inv_106 ( .A(n107), .Y(n108));
-sky130_fd_sc_hd__inv_1 a_inv_107 ( .A(n108), .Y(n109));
-sky130_fd_sc_hd__inv_1 a_inv_108 ( .A(n109), .Y(n110));
-sky130_fd_sc_hd__inv_1 a_inv_109 ( .A(n110), .Y(n111));
-sky130_fd_sc_hd__inv_1 a_inv_110 ( .A(n111), .Y(n112));
-sky130_fd_sc_hd__inv_1 a_inv_111 ( .A(n112), .Y(n113));
-sky130_fd_sc_hd__inv_1 a_inv_112 ( .A(n113), .Y(n114));
-sky130_fd_sc_hd__inv_1 a_inv_113 ( .A(n114), .Y(n115));
-sky130_fd_sc_hd__inv_1 a_inv_114 ( .A(n115), .Y(n116));
-sky130_fd_sc_hd__inv_1 a_inv_115 ( .A(n116), .Y(n117));
-sky130_fd_sc_hd__inv_1 a_inv_116 ( .A(n117), .Y(n118));
-sky130_fd_sc_hd__inv_1 a_inv_117 ( .A(n118), .Y(n119));
-sky130_fd_sc_hd__inv_1 a_inv_118 ( .A(n119), .Y(n120));
-sky130_fd_sc_hd__inv_1 a_inv_119 ( .A(n120), .Y(n121));
-sky130_fd_sc_hd__inv_1 a_inv_120 ( .A(n121), .Y(n122));
-sky130_fd_sc_hd__inv_1 a_inv_121 ( .A(n122), .Y(n123));
-sky130_fd_sc_hd__inv_1 a_inv_122 ( .A(n123), .Y(n124));
-sky130_fd_sc_hd__inv_1 a_inv_123 ( .A(n124), .Y(n125));
-sky130_fd_sc_hd__inv_1 a_inv_124 ( .A(n125), .Y(n126));
-sky130_fd_sc_hd__inv_1 a_inv_125 ( .A(n126), .Y(n127));
-sky130_fd_sc_hd__inv_1 a_inv_126 ( .A(n127), .Y(n128));
-sky130_fd_sc_hd__inv_1 a_inv_127 ( .A(n128), .Y(n129));
-sky130_fd_sc_hd__inv_1 a_inv_128 ( .A(n129), .Y(n130));
-sky130_fd_sc_hd__inv_1 a_inv_129 ( .A(n130), .Y(n131));
-sky130_fd_sc_hd__inv_1 a_inv_130 ( .A(n131), .Y(n132));
-sky130_fd_sc_hd__inv_1 a_inv_131 ( .A(n132), .Y(n133));
-sky130_fd_sc_hd__inv_1 a_inv_132 ( .A(n133), .Y(n134));
-sky130_fd_sc_hd__inv_1 a_inv_133 ( .A(n134), .Y(n135));
-sky130_fd_sc_hd__inv_1 a_inv_134 ( .A(n135), .Y(n136));
-sky130_fd_sc_hd__inv_1 a_inv_135 ( .A(n136), .Y(n137));
-sky130_fd_sc_hd__inv_1 a_inv_136 ( .A(n137), .Y(n138));
-sky130_fd_sc_hd__inv_1 a_inv_137 ( .A(n138), .Y(n139));
-sky130_fd_sc_hd__inv_1 a_inv_138 ( .A(n139), .Y(n140));
-sky130_fd_sc_hd__inv_1 a_inv_139 ( .A(n140), .Y(n141));
-sky130_fd_sc_hd__inv_1 a_inv_140 ( .A(n141), .Y(n142));
-sky130_fd_sc_hd__inv_1 a_inv_141 ( .A(n142), .Y(n143));
-sky130_fd_sc_hd__inv_1 a_inv_142 ( .A(n143), .Y(n144));
-sky130_fd_sc_hd__inv_1 a_inv_143 ( .A(n144), .Y(n145));
-sky130_fd_sc_hd__inv_1 a_inv_out ( .A(n1), .Y(OUT));
-endmodule
diff --git a/openfasoc/generators/cryo-gen/src/cryo_ro.v b/openfasoc/generators/cryo-gen/src/cryo_ro.v
index 7ea9dfa4a..992f3baeb 100644
--- a/openfasoc/generators/cryo-gen/src/cryo_ro.v
+++ b/openfasoc/generators/cryo-gen/src/cryo_ro.v
@@ -2,8 +2,16 @@
 module cryo_ro (EN, OUT);
 input  EN;
 output OUT;
-@@ wire n@nn;
-@@ @na a_nand_0 ( .A(EN), .B(n@n0), .Y(n1));
-@@ @nb a_inv_@ni ( .A(n@n1), .Y(n@n2));
-@@ @ng a_inv_out ( .A(n1), .Y(OUT));
+
+% for i in range(ninv + 1):
+wire n${i + 1};
+% endfor
+
+${cell('nand2')} a_nand_0 ( .A(EN), .B(n${ninv + 1}), .Y(n1));
+
+% for i in range(ninv):
+${cell('inv')} a_inv_${i} ( .A(n${i + 1}), .Y(n${i + 2}));
+% endfor
+
+${cell('inv')} a_inv_out ( .A(n1), .Y(OUT));
 endmodule
diff --git a/openfasoc/generators/cryo-gen/tools/cryo-gen.py b/openfasoc/generators/cryo-gen/tools/cryo-gen.py
index 8c97f436c..249624d3d 100755
--- a/openfasoc/generators/cryo-gen/tools/cryo-gen.py
+++ b/openfasoc/generators/cryo-gen/tools/cryo-gen.py
@@ -10,6 +10,10 @@
 import simulation
 from readparamgen import args, designName
 
+# TODO: Find a better way to import modules from parent directory
+sys.path.append(os.path.join(os.path.dirname(__file__), '..', '..'))
+from common.verilog_generation import generate_verilog, COMMON_PLATFORMS_PREFIX_MAP
+
 genDir = os.path.join(os.path.dirname(os.path.relpath(__file__)), "../")
 srcDir = genDir + "src/"
 flowDir = genDir + "flow/"
@@ -121,66 +125,20 @@
 print("# Verilog Generation")
 print("#----------------------------------------------------------------------")
 
-
-if args.platform == "sky130hd":
-    aux1 = "sky130_fd_sc_hd__nand2_1"
-    aux2 = "sky130_fd_sc_hd__inv_1"
-
-elif args.platform == "sky130hs":
-    aux1 = "sky130_fd_sc_hs__nand2_1"
-    aux2 = "sky130_fd_sc_hs__inv_1"
-
-elif args.platform == "sky130hvl":
-    aux1 = "sky130_fd_sc_hvl__nand2_1"
-    aux2 = "sky130_fd_sc_hvl__inv_1"
-
-elif args.platform == "sky130osu12Ths":
-    aux1 = "sky130_osu_sc_12T_hs__nand2_1"
-    aux2 = "sky130_osu_sc_12T_hs__inv_1"
-
-elif args.platform == "sky130osu12Tms":
-    aux1 = "sky130_osu_sc_12T_ms__nand2_1"
-    aux2 = "sky130_osu_sc_12T_ms__inv_1"
-
-elif args.platform == "sky130osu12Tls":
-    aux1 = "sky130_osu_sc_12T_ls__nand2_1"
-    aux2 = "sky130_osu_sc_12T_ls__inv_1"
-
-elif args.platform == "sky130osu15Ths":
-    aux1 = "sky130_osu_sc_15T_hs__nand2_1"
-    aux2 = "sky130_osu_sc_15T_hs__inv_1"
-
-elif args.platform == "sky130osu15Tms":
-    aux1 = "sky130_osu_sc_15T_ms__nand2_1"
-    aux2 = "sky130_osu_sc_15T_ms__inv_1"
-
-elif args.platform == "sky130osu15Tls":
-    aux1 = "sky130_osu_sc_15T_ls__nand2_1"
-    aux2 = "sky130_osu_sc_15T_ls__inv_1"
-
-elif args.platform == "sky130osu18Ths":
-    aux1 = "sky130_osu_sc_18T_hs__nand2_1"
-    aux2 = "sky130_osu_sc_18T_hs__inv_1"
-
-elif args.platform == "sky130osu18Tms":
-    aux1 = "sky130_osu_sc_18T_ms__nand2_1"
-    aux2 = "sky130_osu_sc_18T_ms__inv_1"
-
-elif args.platform == "sky130osu18Tls":
-    aux1 = "sky130_osu_sc_18T_ls__nand2_1"
-    aux2 = "sky130_osu_sc_18T_ls__inv_1"
-
-pdk_lib_name = aux1.split("__")[0]
-
-ninv = ninv + 1
-
-cryo_netlist.gen_cryo_netlist(ninv, aux1, aux2, srcDir)
-
-with open(srcDir + "cryoInst.v", "r") as rf:
-    filedata = rf.read()
-    filedata = re.sub("module\s*(\w+)\s*\n", "module " + designName + "\n", filedata)
-with open(srcDir + "cryoInst.v", "w") as wf:
-    wf.write(filedata)
+platform_prefix = COMMON_PLATFORMS_PREFIX_MAP[args.platform]
+pdk_lib_name = platform_prefix.split("__")[0]
+
+# The directory in which the output Verilog is generated
+verilog_gen_dir=os.path.join('flow', 'design', 'src', 'cryo')
+generate_verilog(
+    parameters={
+        "design_name": designName,
+        "cell_prefix": platform_prefix,
+        "cell_suffix": "_1",
+        "ninv": ninv
+    },
+    out_dir=verilog_gen_dir
+)
 
 # note that this python overwrites config.mk
 with open(flowDir + "design/" + args.platform + "/cryo/config.mk", "r") as rf:
@@ -191,10 +149,6 @@
 with open(flowDir + "design/" + args.platform + "/cryo/config.mk", "w") as wf:
     wf.write(filedata)
 
-shutil.copyfile(srcDir + "cryo_ro.nl.v", flowDir + "design/src/cryo/cryo_ro.nl.v")
-shutil.copyfile(srcDir + "cryoInst.v", flowDir + "design/src/cryo/" + designName + ".v")
-shutil.copyfile(srcDir + "divider.v", flowDir + "design/src/cryo/divider" + ".v")
-
 print("#----------------------------------------------------------------------")
 print("# Verilog Generated")
 print("#----------------------------------------------------------------------")