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Ahmet Inci | Ph.D.
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<h1>Ahmet Inci</h1>
<p style="line-height:23px;">Ph.D.<br>
<a href="https://www.ece.cmu.edu">Electrical and Computer Engineering</a><br>
<a href="https://www.cmu.edu">Carnegie Mellon University</a><br><br>
Email: inciaf [AT] gmail [DOT] com</a></p>
Affiliation: [<a href="https://enyac.org">EnyAC</a>] [<a href="https://www.andrew.cmu.edu/user/gaurij/Group.html">OPAL</a>]<br>
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<div class="intro">
<p>
I am a Senior Deep Learning Performance Architect at NVIDIA, working on future hardware architectures and optimizations to advance the state-of-the-art in deep learning performance and energy-efficiency. Previously, I was a Machine Learning Engineer in Apple Neural Engine Compiler Team at Apple. I received my Ph.D. from <a
href="https://www.cmu.edu">CMU</a>, co-advised by <a
href="http://users.ece.utexas.edu/~dianam">Prof. Diana Marculescu</a> and <a
href="https://www.andrew.cmu.edu/user/gaurij/">Prof. Gauri Joshi</a>. My dissertation was titled <a
href="https://www.proquest.com/docview/2723468951?pq-origsite=gscholar&fromopenview=true&sourcetype=Dissertations%20&%20Theses">"Scalable and Efficient Systems for Deep Learning"</a>. Before joining CMU, I received my B.Sc. degree in Electronics Engineering at <a href="https://www.sabanciuniv.edu/en" >Sabanci University</a>.
</p>
<p>
My research interests include <i>Systems for ML</i>, <i>HW/SW Co-Design</i>, and <i>Efficient Deep Learning</i>.
</p>
<!-- <p>
My research interests include <a>hardware-aware machine learning</a>, <a>DNN/HW co-design</a>, <a>neural architecture search</a>, and recently <a>reinforcement learning</a>
</p>
-->
<p>
<!-- I work in computer architecture, machine learning, and HW-efficient DL to improve the performance of DL models and increase the energy-efficiency of machine learning infrastructure. <br> <br> -->
<!-- <p>
My current research focuses on designing efficient systems and ML models using HW/ML model co-design techniques and neural architecture search methods to achieve the best of both worlds. Recently, I have been working on scalable and efficient reinforcement learning training on CPU-GPU systems.
-->
My Ph.D. research focused on designing <i>scalable</i> and <i>efficient</i> systems and ML models using HW/ML model co-design techniques to achieve the best of both worlds. I worked on quantization-aware DNN accelerator and model co-exploration through architecture-level modeling and efficient design space exploration. Before that, I worked on scalable and efficient reinforcement learning training on CPU-GPU systems. Additionally, my previous work has explored how to utilize emerging non-volatile memories in GPU architectures for DL workloads.
</p>
</div>
<!--
<h1>News</h1>
<div class="sixteen columns offset-by-six">
<ul>
<li>
[7/1/22] I succesfully defended my Ph.D. thesis titled "<i>Scalable and Efficient Systems for Deep Learning</i>"! One more thing... I will be joining Apple in August!<br>
<li>
[10/8/21] I passed my thesis prospectus and I am actively looking for full-time job opportunities!<br>
<li>
[6/11/21] Our paper <a href="https://arxiv.org/abs/2205.13045">"QADAM: Quantization-Aware DNN Accelerator Modeling for Pareto-Optimality"</a> has been accepted to the ML for Computer Architecture and Systems Workshop at <a href="https://sites.google.com/view/mlarchsys/">ISCA'21 </a> for oral presentation!<br>
<li>
[5/24/21] I have started my 2nd research internship in Architecture Research Group (ARG) in collobaration with AI Research at <a>NVIDIA Research</a> working on <i>Optimizing Power Management of Deep Learning Systems with Reinforcement Learning</i>. <br>
<li>
[4/1/21] Our paper <a href="https://arxiv.org/abs/2205.08648">"QAPPA: Quantization-Aware Power, Performance, and Area Modeling of DNN Accelerators"</a> has been accepted to 2nd On-Device Intelligence Workshop at <a href="https://www.arm.com/resources/research/ml/workshop?_ga=2.247034436.1133774933.1616437299-942946774.1615910633">MLSys'21 </a> for oral presentation!<br>
<li>
[1/29/21] Our paper <a href="docs/nvmw2021-paper37.pdf">"Cross-Layer Design Space Exploration of NVM-based Caches for Deep Learning"</a> has been accepted to <a href="http://nvmw.ucsd.edu">NVMW'21 </a> for oral presentation!<br>
<li>
[11/16/20] Our paper <a href="https://arxiv.org/abs/2012.04210">"The Architectural Implications of Distributed Reinforcement Learning on CPU-GPU Systems"</a> has been accepted to <a href="https://www.emc2-ai.org">EMC2'20 </a> for oral presentation!<br>
<li>
[5/26/20] I completed my research internship at <a>NVIDIA Research</a> working on <i>scalable and efficient reinforcement learning on CPU-GPU systems</i>. I will continue collobarating with Architecture Research Group (ARG) and AI Research from NVIDIA Research! <br>
<li>
[3/31/20] Our team has been selected as <a href= "https://www.qualcomm.com/invention/research/university-relations/innovation-fellowship/2020-north-america"> Qualcomm Innovation Fellowship Finalist</a> with our project "Hardware-Aware Multimodal 3D Object Detection for On-Device Augmented Reality Applications"! <br>
<li>
[11/7/19] Our paper <a href="https://ieeexplore.ieee.org/document/9116263">"DeepNVM: A Framework for Modeling and Analysis of Non-Volatile Memory Technologies for Deep Learning Applications"</a> has been accepted at <a href="https://www.date-conference.com">DATE'20!</a> <br>
<li>
[8/23/19] I finished my research internship in ML Technology Group at <a>ARM</a> working on <i>hardware-aware neural architecture search for heterogeneous systems</i>. We filed a patent application!<br>
<li>
[11/2/18] I have been selected as a CMU ECE finalist for <a>Google Ph.D. Fellowship!</a> <br>
<li>
[8/17/18] I completed my research internship in Virtuoso ML Team at <a>Cadence Design Systems</a> working on creating <i>ML-based recommendation systems for EDA tools</i>! <br>
<li>
[5/3/18] Our paper <a href="http://acs.ict.ac.cn/asbd2018/slides/AI_ASBD.pdf">"Solving the Non-Volatile Memory Conundrum for Deep Learning Workloads"</a> has been accepted at <a href="http://acs.ict.ac.cn/asbd2018/">8th Workshop on Architectures and Systems for Big Data (ASBD), ISCA'18</a> See you in Los Angeles!<br>
</ul>
</div>
-->
<h1>Publications</h1>
<div class="sixteen columns offset-by-six">
<ul>
<li>
<a href="https://arxiv.org/abs/2206.15463">QUIDAM: A Framework for Quantization-Aware DNN Accelerator and Model Co-Exploration</a><br>
<b>Ahmet Inci</b>, Siri Garudanagiri Virupaksha, Aman Jain, Rudy Chin, Venkata Vivek Thallam, Ruizhou Ding, Diana Marculescu<br>
<a href="https://dl.acm.org/doi/full/10.1145/3555807">ACM Transactions on Embedded Computing Systems</a> <br>
<li>
<a href="https://arxiv.org/abs/2206.13601">Efficient Deep Learning Using Non-Volatile Memory Technology</a><br>
<b>Ahmet Inci</b>, M. Meric Isgenc, Diana Marculescu<br>
<a href="https://arxiv.org/abs/2206.13601">Book Chapter in Embedded Machine Learning for Cyber Physical, IoT, and Edge Computing</a> <br>
<li>
<a href="https://arxiv.org/abs/2205.13045">QADAM: Quantization-Aware DNN Accelerator Modeling for Pareto-Optimality</a><br>
<b>Ahmet Inci</b>, Siri Garudanagiri Virupaksha, Aman Jain, Venkata Vivek Thallam, Ruizhou Ding, Diana Marculescu<br> <a href="https://sites.google.com/view/mlarchsys/">ML for Computer Architecture and Systems Workshop, ISCA'21</a> <br>
<li>
<a href="https://arxiv.org/abs/2205.08648">QAPPA: Quantization-Aware Power, Performance, and Area Modeling of DNN Accelerators</a><br>
<b>Ahmet Inci</b>, Siri Garudanagiri Virupaksha, Aman Jain, Venkata Vivek Thallam, Ruizhou Ding, Diana Marculescu<br> <a href="https://www.arm.com/resources/research/ml/workshop?_ga=2.247034436.1133774933.1616437299-942946774.1615910633">2nd On-Device Intelligence Workshop, MLSys'21</a> <br>
<li>
<a href="docs/nvmw2021-paper37.pdf">Cross-Layer Design Space Exploration of NVM-based Caches for Deep Learning</a><br>
<b>Ahmet Inci</b>, M. Meric Isgenc, Diana Marculescu<br> <a href="http://nvmw.ucsd.edu">12th Non-Volatile Memories Workshop (NVMW) 2021</a> <br>
<li>
<a href="https://arxiv.org/abs/2012.04210">The Architectural Implications of Distributed Reinforcement Learning on CPU-GPU Systems</a><br>
<b>Ahmet Inci</b>, Evgeny Bolotin, Yaosheng Fu, Gal Dalal, Shie Mannor, David Nellans, Diana Marculescu<br> <a href="https://www.emc2-ai.org">6th Workshop on Energy Efficient Machine Learning and Cognitive Computing (EMC2) 2020</a> <br>
<li>
<a href="https://arxiv.org/abs/2012.04559">DeepNVM++: Cross-Layer Modeling and Optimization Framework of Non-Volatile Memories for Deep Learning</a><br>
<b>Ahmet Inci</b>, M. Meric Isgenc, Diana Marculescu<br>
<a href="https://ieeexplore.ieee.org/document/9611539">IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</a> <br>
<li>
<a href="https://ieeexplore.ieee.org/document/9116263">DeepNVM: A Framework for Modeling and Analysis of Non-Volatile Memory Technologies for Deep Learning Applications</a><br>
<b>Ahmet Inci</b>, M. Meric Isgenc, Diana Marculescu<br>
<a href="https://www.date-conference.com">Design, Automation and Test in Europe Conference (DATE) 2020</a><br>
<li>
<a href="https://patentimages.storage.googleapis.com/dd/90/90/78552a30ad42cf/US20210192337A1.pdf">Specializing Neural Networks for Heterogeneous Systems</a><br>
<b>Ahmet Inci</b>, Danny Loh, Lingchuan Meng, Naveen Suda, Eric Kunze<br>
<a>US Patent Application 16/724,849, Filed: December 2019</a><br>
<li>
<a href="http://acs.ict.ac.cn/asbd2018/slides/AI_ASBD.pdf">Solving the Non-Volatile Memory Conundrum for Deep Learning Workloads</a><br>
<b>Ahmet Inci</b>, Diana Marculescu<br>
<a href="http://acs.ict.ac.cn/asbd2018/">8th Workshop on Architectures and Systems for Big Data (ASBD), ISCA'18</a><br>
</ul>
</div>
<h1>Work Experience</h1>
<div class="sixteen columns offset-by-six">
<img src="images/nvidia.svg" align="left" style="border:14px solid white; margin-top: -10px; margin-left: -20px;width:14%;">
<a>NVIDIA</a> - Deep Learning Compute Architecture<br>
January 2024 - Present <br>
<i></i><br>
<br>
<br><br>
<img src="images/apple.svg" align="left" style="border:24px solid white; margin-top: -30px; margin-left: -10px;width:10%;">
<a>Apple</a> - Apple Neural Engine Compiler Team<br>
August 2022 - January 2024 <br>
<i>Research and development on neural engine compiler for ultra-low power devices</i><br>
<br>
<br><br>
<img src="images/nvidia.svg" align="left" style="border:16px solid white; margin-top: -10px; margin-left: -20px;width:14%;">
<a>NVIDIA Research</a> - Architecture Research Group in collobaration with AI Research<br>
May 2021 - August 2021 <br>
<i>Optimizing Power Management of Deep Learning Systems with Reinforcement Learning</i><br>
<br>
<br><br>
<img src="images/nvidia.svg" align="left" style="border:16px solid white; margin-top: -10px; margin-left: -20px;width:14%;">
<a>NVIDIA Research</a> - Architecture Research Group in collobaration with AI Research<br>
<!-- 5/26/20 - 8/28/20<br> -->
May 2020 - August 2020 <br>
<i>Towards Scalable and Efficient Reinforcement Learning on CPU-GPU Systems</i><br>
<br><br>
<img src="images/arm3.svg" align="left" style="border:30px solid white; margin-left: -33px; width:12%;">
<a>ARM</a> - ML Technology Group<br>
<!-- 5/28/19 - 8/23/19<br> -->
May 2019 - August 2019 <br>
<i>NASH: Neural Architecture Search for Heterogeneous Systems</i><br>
<br><br>
<img src="images/cadence.svg" align="left" style="border:20px solid white; margin-left: -34px; width:15%;">
<a>Cadence Design Systems</a> - Virtuoso ML Team<br>
<!-- 5/21/18 - 8/17/18<br> -->
May 2018 - August 2018 <br>
<i>ML-based Recommendation System for EDA Tools</i><br><br>
</div>
<br> <br> <br>
<h1>Service</h1>
<div class="sixteen columns offset-by-six">
<ul>
<li>
Reviewer for <i>DAC'21</i>, <i>EMSOFT'21</i>, <i>MLSys'20</i>, <i>DAC'20</i>, <i>DAC'19</i>, <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, <i>IEEE Transactions on Computers</i>, <i>IEEE Journal of Selected Topics in Signal Processing</i><br>
<li>
Sub-reviewer for <i>ISCA'22</i>, <i>HPCA'22</i>, <i>MLSys'21</i>, <i>MLSys'19</i>, <i>ISCA'19</i>
</ul>
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