DPC++ daily 2021-07-09

[SYCL][ROCM] Added ROCm backend to device filter (#4077)

Adding rocm backend to SyclBeMap, so the device filter does not throw errors with ROCm backend
Updated error message from device filter to include ROCm.

DPC++ daily 2021-07-08

sycl-nightly/20210708

[SYCL][L0] Uplift level-zero loader from v1.2.3 to v1.4.1 (#4052)

DPC++ daily 2021-07-07

[SYCL] Fix pathological case of visiting callees of a function. (#4065)

The markdevice rewrite improved the way we were checking recursive
functions, however as an oversight didn't 'uniqify' each callee-check.

This patch ensures we only visit each callee 1x, even if it is called
multiple times.

Note that this isn't a 'perfect' fix, we could skip any function we've
ever 'seen' before in this kernel, however it results in some reduced
diagnostic quality for recursive and attribute-collection issues.

This at least reduces the 'pathological' cases that remain to just those
that are also mostly pathological for templates in general (though we
are still worse-off than template instantiations).

DPC++ daily 2021-07-06

[SYCL][FPGA] Allow use_stall_enable_clusters attribute to kernel (#4031)

This patch collects and applies the FPGA attribute intel::use_stall_enable_clusters to the callers/SYCL kernel if directly applied through functors/lambda function.

The attribute has to be applicable to all functions, which can include the SYCL kernels and ​must not be propagated up to the caller/SYCL kernel when called from a function.

This patch fixes FPGA emulator bug that was introduced on #3900.

DPC++ daily 2021-07-05

[SYCL] Changed USM copy src and dst parameter order (#4037)

As noted in https://github.com/intel/llvm/pull/3897#issuecomment-872363647,
a spec bug was identified. The USM `copy` member functions take the `src`
and `dst` parameters in the wrong order. The order should be `(src, dst)`,
which matches the standard C++ `copy` function and matches the existing
SYCL `copy` functions that take accessor parameters.

DPC++ daily 2021-07-02

[SYCL][Driver][NFC] Update integration footer test for 32-bit host (#…

…4039)

The sycl-int-footer.cpp test is relying on host settings for some of the
checks.  This can change when the host is 32-bits and the tests will
fail.  Update test to force x86_64 targets for these checks.

DPC++ daily 2021-07-01

[SYCL] [Tests] Do not copy device binary image mocks (#4023)

Simplified, the motivation behind this change is the following.
Employing std::vector to store device binary images makes them
be allocated in heap which can't belong to neither any of loaded
shared objects nor to the executable itself. Moving allocation to
in-place makes the images be allocated in the executable.

DPC++ daily 2021-06-30

[SYCL] Switch to using integration footer by default (#3777)

Added spec_constant_integration.hpp header file, which is included from
integration footer.
Added get_spec_constant_symbolic_ID_wrapper which in combination
with spec_constant_integration.hpp allows us to avoid exploiting a UB
related to instantiating a template before we have seen all its
specializations.

Replaced -fsycl-use-footer compiler flag with -fno-sycl-use-footer
flag with the opposite semantics.

DPC++ daily 2021-06-29

[SYCL] Allow fpga_reg only for PODs and Trivially-copyable structs (#…

…3643)

This change restricts the INTEL::fpga_reg function to only take in trivially copyable structs, and models the hardware better but created a registered copy, rather than just passing through as a reference. 

The intention of this function was initially built for PODs and later extended to structs in OpenCL. It literally is used to force a register stage in hardware between the input and output (i.e. in the software model, it is an exact copy of the data in memory). It doesn't translate directly to C++ objects because classes with complex copy constructors cannot be modelled to do what is described above, and building out this builtin in hardware as per the software model reduces its use case. As such, restricting the function to only types that have a usable and correct implementation of this function is the ideal thing to do here

Note that I also removed the old mapping to intelfpga::fpga_reg as part of this changelist. 

Testing:
- Ran this new header file with a variety of SYCL examples in the FPGA design suite to ensure that it was still behaving in its intended behavior

DPC++ daily 2021-06-28

[SYCL][NFC] Rename file and variables/methods (#4000)

Renaming file and variables for greater generality, so that we
can support other offloading mechanisms if required in the future

Signed-off-by: Elizabeth Andrews <elizabeth.andrews@intel.com>