Access bits of a Logic by Logic index

[mkorbel1]

Motivation

Sometimes it's desirable to access a bit of a Logic signal by another Logic. This is achievable with >> n and & Const(1), but it would be nice to just use [n] directly to generate that code for ease of use and readability.

Desired solution

Modify the overloaded operator[] on Logic so that it can accept either an int or another Logic, and appropriately generates hardware if necessary (if it's a Logic).

[akshay-wankhede]

Hi, can I take this one next?

[mkorbel1]

It might be a good idea to make a new custom module so that the generated output SystemVerilog has [] instead of << &1