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Tech Note 009 - 64-bit Oberon0

Adapting the Oberon07 compiler and Oberon OS to 64-bits

Extending RISC5 to 64-bits (erisc5)

  • registers R0 through R15, PC, H, SPC extended from 32-bit to 64-bit
  • 32-bit opcodes unchanged
  • 64-bit word loads and stores alingned to 32-bit boundaries
  • 64-bit memory-mapped device registers take double the space

General OS considerations for 64-bit

  • start of general use system RAM may not be 0 (0x00200000 on Pinebook Pro, for example)
  • Method Table entries for 64-bit Oberon take 8 bytes instead of 4 bytes for 32-bit Oberon
  • Method Table start at start of system RAM + 64 bytes for 64-bit Oberon
  • In 32-bit RISC5 Oberon there is space for 31 MT entries (through byte address 255.)
  • 64-bit Oberon may reserve space for 1008 entries (up to Start of System RAM + 8192 bytes.)
  • 32-bit Oberon may also reserve space for 1008 entries (up to Start + 4096 bytes.)
  • First 32 or 64 bytes are implementation dependent and reserved (e.g. for reset vector, etc.)
  • Kernel.Mod for each platform is platform dependent and will define interrupt vectors, mmu tables, etc. as appropriate.
  • On hardware providing u-boot, Kernel.Mod may retrieve useful configuration information from a Device Tree Blob.
  • On hardware providing UEFI, Kernel.Mod may retrieve useful information from the firmware.
  • Module records are 32 bytes + 12 words = 80 bytes for 32-bit systems or 128 bytes for 64-bit systems.
  • Structures in Files.Mod and FileDir.Mod require adjustment for 64-bit integers, technote 004 describes a 64-bit Oberon filesystem.