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soc_linux/make.py: Remove Xilinx specific code since not tested and s…
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…tatus is unknown.

Let's keep the repo more generic.
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@enjoy-digital
enjoy-digital committed Jul 9, 2024
1 parent f7cbd49 commit 629a46e
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Showing 2 changed files with 1 addition and 82 deletions.
22 changes: 0 additions & 22 deletions make.py
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Original file line number Diff line number Diff line change
Expand Up @@ -88,11 +88,6 @@ def __init__(self):
# Buses
"spi",
"i2c",
# Monitoring
"xadc",
# 7-Series specific
"mmcm",
"icap_bitstream",
})

class ArtyA7(Arty): pass
Expand All @@ -112,11 +107,6 @@ def __init__(self):
# Buses
"spi",
"i2c",
# Monitoring
"xadc",
# 7-Series specific
"mmcm",
"icap_bitstream",
})

# NeTV2 support ------------------------------------------------------------------------------------
Expand All @@ -134,8 +124,6 @@ def __init__(self):
"leds",
# Video
"framebuffer",
# Monitoring
"xadc",
})

# Genesys2 support ---------------------------------------------------------------------------------
Expand Down Expand Up @@ -165,8 +153,6 @@ def __init__(self):
#"sata",
# GPIOs
"leds",
# Monitoring
"xadc",
})

# VC707 support ---------------------------------------------------------------------------------
Expand All @@ -182,8 +168,6 @@ def __init__(self):
"sdcard",
# GPIOs
"leds",
# Monitoring
"xadc",
})

# KCU105 support -----------------------------------------------------------------------------------
Expand Down Expand Up @@ -938,8 +922,6 @@ def main():
from litex_boards.platforms.gsd_orangecrab import feather_i2c
board.platform.add_extension(feather_i2c)

if "mmcm" in board.soc_capabilities:
soc.add_mmcm(2)
if "spisdcard" in board.soc_capabilities:
soc.add_spi_sdcard()
if "sdcard" in board.soc_capabilities:
Expand All @@ -956,10 +938,6 @@ def main():
soc.add_spi(args.spi_data_width, args.spi_clk_freq)
if "i2c" in board.soc_capabilities:
soc.add_i2c()
if "xadc" in board.soc_capabilities:
soc.add_xadc()
if "icap_bitstream" in board.soc_capabilities:
soc.add_icap_bitstream()

# Build ------------------------------------------------------------------------------------
build_dir = os.path.join("build", board_name)
Expand Down
61 changes: 1 addition & 60 deletions soc_linux.py
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Original file line number Diff line number Diff line change
Expand Up @@ -17,10 +17,7 @@
from litex.soc.cores.gpio import GPIOOut, GPIOIn
from litex.soc.cores.spi import SPIMaster
from litex.soc.cores.bitbang import I2CMaster
from litex.soc.cores.xadc import XADC
from litex.soc.cores.pwm import PWM
from litex.soc.cores.icap import ICAPBitstream
from litex.soc.cores.clock import S7MMCM

from litex.tools.litex_json2dts_linux import generate_dts

Expand All @@ -39,7 +36,7 @@ def __init__(self, **kwargs):
def add_rgb_led(self):
rgb_led_pads = self.platform.request("rgb_led", 0)
for n in "rgb":
self.add_module(name=f"rgb_led_{n}0", PWM(getattr(rgb_led_pads, n)))
self.add_module(name=f"rgb_led_{n}0", module=PWM(getattr(rgb_led_pads, n)))

# Switches ---------------------------------------------------------------------------------

Expand All @@ -58,62 +55,6 @@ def add_spi(self, data_width, clk_freq):
def add_i2c(self):
self.i2c0 = I2CMaster(self.platform.request("i2c", 0))

# XADC (Xilinx only) -----------------------------------------------------------------------

def add_xadc(self):
self.xadc = XADC()

# ICAP Bitstream (Xilinx only) -------------------------------------------------------------

def add_icap_bitstream(self):
self.icap_bit = ICAPBitstream();

# MMCM (Xilinx only) -----------------------------------------------------------------------

def add_mmcm(self, nclkout):
if (nclkout > 7):
raise ValueError("nclkout cannot be above 7!")

self.cd_mmcm_clkout = []
self.mmcm = S7MMCM(speedgrade=-1)
self.mmcm.register_clkin(self.crg.cd_sys.clk, self.clk_freq)

for n in range(nclkout):
self.cd_mmcm_clkout += [ClockDomain(name="cd_mmcm_clkout{}".format(n))]
self.mmcm.create_clkout(self.cd_mmcm_clkout[n], self.clk_freq)
self.mmcm.clock_domains.cd_mmcm_clkout = self.cd_mmcm_clkout

self.add_constant("clkout_def_freq", int(self.clk_freq))
self.add_constant("clkout_def_phase", int(0))
self.add_constant("clkout_def_duty_num", int(50))
self.add_constant("clkout_def_duty_den", int(100))
# We need to write exponent of clkout_margin to allow the driver for smaller inaccuracy
from math import log10
exp = log10(self.mmcm.clkouts[0][3])
if exp < 0:
self.add_constant("clkout_margin_exp", int(abs(exp)))
self.add_constant("clkout_margin", int(self.mmcm.clkouts[0][3] * 10 ** abs(exp)))
else:
self.add_constant("clkout_margin", int(self.mmcm.clkouts[0][3]))
self.add_constant("clkout_margin_exp", int(0))

self.add_constant("nclkout", int(nclkout))
self.add_constant("mmcm_lock_timeout", int(10))
self.add_constant("mmcm_drdy_timeout", int(10))
self.add_constant("vco_margin", int(self.mmcm.vco_margin))
self.add_constant("vco_freq_range_min", int(self.mmcm.vco_freq_range[0]))
self.add_constant("vco_freq_range_max", int(self.mmcm.vco_freq_range[1]))
self.add_constant("clkfbout_mult_frange_min", int(self.mmcm.clkfbout_mult_frange[0]))
self.add_constant("clkfbout_mult_frange_max", int(self.mmcm.clkfbout_mult_frange[1]))
self.add_constant("divclk_divide_range_min", int(self.mmcm.divclk_divide_range[0]))
self.add_constant("divclk_divide_range_max", int(self.mmcm.divclk_divide_range[1]))
self.add_constant("clkout_divide_range_min", int(self.mmcm.clkout_divide_range[0]))
self.add_constant("clkout_divide_range_max", int(self.mmcm.clkout_divide_range[1]))

self.mmcm.expose_drp()

self.comb += self.mmcm.reset.eq(self.mmcm.drp_reset.re)

# Ethernet configuration -------------------------------------------------------------------

def configure_ethernet(self, remote_ip):
Expand Down

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